HA13568R 概述
DISK DRIVE MOTOR CONTROLLER, PDSO56, TTP-56DTR 运动控制电子器件
HA13568R 规格参数
生命周期: | Transferred | 零件包装代码: | SSOP |
包装说明: | TSSOP, | 针数: | 56 |
Reach Compliance Code: | unknown | 风险等级: | 5.31 |
模拟集成电路 - 其他类型: | DISK DRIVE MOTOR CONTROLLER | JESD-30 代码: | R-PDSO-G56 |
长度: | 14 mm | 端子数量: | 56 |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
认证状态: | Not Qualified | 座面最大高度: | 1.2 mm |
表面贴装: | YES | 端子形式: | GULL WING |
端子节距: | 0.5 mm | 端子位置: | DUAL |
宽度: | 6.1 mm | Base Number Matches: | 1 |
HA13568R 数据手册
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PDF下载HA13568AT/HA13568R
CD-ROM Combo Driver
ADE-207-261 (Z)
1st Edition
July 1998
Description
The HA13568AT and HA13568R are combination of Spindle, Focus, Tracking, Slide, Tray designed for
CD-ROM and have following functions and features.
Features
•
•
•
•
•
•
•
1.5 A sensorless spindle driver
0.5 A BTL focus driver
0.5 A BTL tracking driver
1.5 A H bridge slide motor driver
0.5 A H bridge tray motor driver
Over temperature shut down (OTSD)
Voltage regulator control circuit
Functions
•
•
•
•
•
Sensorless driver with self start
Soft switching drive
Snubberless
Low output saturation voltage
Direct PWM slide driver
HA13568AT/HA13568R
Pin Arrangement
• HA13568AT
1
2
3
4
5
6
7
8
9
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
GND
GND
TRRREF
TRRIN
NC
FCSREF
FCSIN
FCSRS
TRRRS
VFCS
NC
NC
TRYLIM
TRYR
TRYF
SLDIN
SLDLIM
RT
FCSP
FCGND
FCSN
TRRP 10
TRRN 11
TRYP 12
TRYN 13
VSLD 14
SLGND 15
SLDN 16
SLDP 17
VBST 18
B1 19
CT2
VSS
CT3
CT1
CE
VREGF
VREGS
BRKSEL
PHASE
PC
B2 20
RNF 21
U
V
22
23
24
CT
AGC
W
VCTL
REFIN
UFIL
VSPN 25
WFIL 26
VFIL 27
GND 28
GND
(Top view)
• HA13568R
GND
1
2
3
4
5
6
7
8
9
56 GND
TRRREF
TRRIN
NC
55 FCSREF
54 FCSIN
53 FCSRS
52 TRRRS
51 VFCS
50 FCSP
49 FCGND
48 FCSN
47 TRRP
46 TRRN
45 TRYP
44 TRYN
43 VSLD
42 SLGND
41 SLDN
40 SLDP
39 VBST
38 B1
NC
NC
TRYLIM
TRYR
TRYF
SLDIN 10
SLDLIM 11
RT 12
CT2 13
VSS 14
CT3 15
CT1 16
CE 17
VREGF 18
VREGS 19
BRKSEL 20
PHASE 21
PC 22
37 B2
36 RNF
35
34
33
U
V
CT 23
AGC 24
VCTL 25
REFIN 26
UFIL 27
GND 28
W
32 VSPN
31 WFIL
30 VFIL
29 GND
(Top view)
2
HA13568AT/HA13568R
Pin Description
Pin No.
HA13568AT HA13568R
Pin Name Function
2
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
FCSREF
FCSIN
FCSRS
TRRRS
VFCS
FCS driver block reference voltage
3
FCS control input pin
FCS sense pin
4
5
TRR sense pin
6
FCS driver and TRR driver power supply
FCS driver P output
7
FCSP
8
FCGND
FCSN
TRRP
TRRN
TRYP
FCS driver and TRR driver GND
FCS driver N output
9
10
11
12
13
14
15
16
17
18
TRR driver P output
TRR driver N output
TRY driver P output
TRYN
VSLD
TRY driver N output
SLD driver and TRY driver power supply
SLD driver and TRY driver GND
SLD driver N output
SLGND
SLDN
SLDP
SLD driver P output
VBST
Booster output pin. This circuit generates a voltage about 1.5 V
above that of the VSPN pin.
19
20
21
22
23
24
25
26
27
30
31
32
38
37
36
35
34
33
32
31
30
27
26
25
B1
Booster pumping capacitor connection
B2
RNF
U
Spindle driver current detection
U phase output
V
V phase output
W
W phase output
VSPN
WFIL
VFIL
UFIL
REFIN
VCTL
Spindle and booster power supply
W phase low pass filter. Connect a filter C to this pin during GND.
V phase low pass filter. Connect a filter C to this pin during GND.
U phase low pass filter. Connect a filter C to this pin during GND.
Reference voltage of spindle and slide
Spindle control input. Generates forward torque when a DC voltage
higher than REFIN is applied, and brake when a DC voltage lower
than REF is applied.
33
24
AGC
For AGC. Holds the level used for IC internal processing fixed even
if the B-EMF level fluctuates due to the rotation speed.
3
HA13568AT/HA13568R
Pin Description (cont)
Pin No.
HA13568AT HA13568R
Pin Name Function
34
35
36
23
22
21
CT
Spindle center tap
PC
Spindle driver phase compensation
PHASE
Outputs the B-EMF zero cross phase. Open corrector. (See the
timing chart)
37
20
BRKSEL
To select the brake mode. Lo: Short brake, Hi: Reverse full brake
(when forward torque input: BRKSEL = H)
38
39
40
41
19
18
17
16
VREGS
VREGF
CE
Voltage regulator sense pin (VREGS ≈ 3.3 V output)
Voltage regulator force pin
Chip enable. Input Hi: active
CT1
Time constant for clock oscillator circuit. The clock oscillator
frequency is determined by the external capacitor and resistor Ct1
and Rt.
42
15
CT3
Time constant for PWM carrier oscillator. The carrier frequency is
determined by the external capacitor and resistor Ct3 and Rt.
43
44
14
13
VSS
CT2
Control block power supply. 5 V
Time constant for start-up oscillator. The start-up oscillator
frequency is determined by the external capacitor and resistor Ct2
and Rt.
45
12
RT
Reference voltage (3.3 V). The IC’s internal reference current is
determined by this voltage and the external resistor Rt.
46
47
48
49
50
51
52
53
54
55
11
10
9
SLDLIM
SLDIN
TRYF
TRYR
TRYLIM
NC
SLD output maximum duty setting
SLD control input pin
TRY driver forward input
TRY driver reverse input
TRY output voltage setting pin
No connection
8
7
6
5
NC
4
NC
3
TRRIN
TRRREF
TRR control input pin
TRR driver block reference voltage
GND
2
1, 28, 29, 56, TAB
4
HA13568AT/HA13568R
Block Diagram
C102
24
VSS
43
AGC
33
VSPN
25
32
14
23
CT
U V W
34
27
UFIL
VFIL
WFIL
30
27
26
30
31
35
U
B-EMF
detection
U
V
Commutation
22
Tmask
1.5A
Vspn
34
21
Drive
mode
V
SPN
23
SPN
PHASE 36
output
Mask
time
Vref
33
36
W
W
24
21
Vbst
Rnf
13
CT2
44
Start-up
circuit
RNF
Ct2
25
26
VCTL 32
Current
control
REFIN 31
20
22
38
37
39
51
50
53
48
PC
BRKSEL 37
CE 40
35
19
20
18
6
Brake
OTSD
B1
17
12
16
CLK
Bias
B2
Rt
RT
45
CLK
OSC
VBST
Vbst
CT1
41
VFCS
FCSP
Ct1
P
N
7
54
55
FCSIN
3
2
0.5A
BTL
FCSRS
FCSN
4
FCS
TRR
FCSREF
Vfcs
2
9
Vbst
47
52
46
49
43
40
TRRP
3
2
P
N
10
5
TRRIN 54
0.5A
BTL
TRRRS
TRRN
TRRREF 55
Vfcs
2
11
8
FCGND
Vbst
14 VSLD
SLDP
P
N
17
1.5AH
bridge
SLD
TRY
M
M
10
SLDIN 47
41
45
SLD
control
SLDN
16
SLDLIM 46
11
19
Vbst
TRYP
12
P
N
VREGS 38
VREGF 39
0.5AH
bridge
Vreg
TAB
44
42
TRYN
13
18
15 SLGND
15
7
9
8
42
50
48
49
CT3
TRYLIM TRYF TRYR
Ct3
: HA13568AT
: HA13568R
51 , 52 , 53 : NC pin
4 , 5 , 6 : NC pin
5
HA13568AT/HA13568R
Timing Chart
1. Start-up
CE
0
Tc2
Vhct2
Vlct2
CT2
0
+
Output
current
0
(U phase)
−
+
0
−
Output
current
(V phase)
+
0
−
Output
current
(W phase)
PHASE
0
B-EMF
Mask period
Synchronous mode
B-EMF mode
Note: Tc2 is as follows.
8 (Vhct2 − Vlct2) Rt Ct2
Tc2 =
Vrt
Where,
Vhct2 : CT2 pin high voltage (See electrical characteristics)
Vlct2 : CT2 pin low voltage (See electrical characteristics)
6
HA13568AT/HA13568R
2. Acceleration (switching mode)
U
V
W
+
0
–
Reverse
start-up
voltage
B-EMF
PHASE
0
+
0
−
Output
current
(U phase)
+
0
−
Output
current
(V phase)
+
0
−
Output
current
(W phase)
7
HA13568AT/HA13568R
3. Running (soft switching mode)
U
V
W
+
Reverse
start-up
0
voltage
B-EMF
−
PHASE
0
Output
voltage
(U phase)
0
+
0
−
Output
current
(U phase)
Truth Table
Table 1
Overall
CE
L
OTSD
X
SPN Driver
FCS Driver
TRR Driver
SLD Driver
TRY Driver
Z
Z
Z
Z
Z
H
ON
Z
Z
Z
Z
Z
OFF
ON
ON
ON
ON
ON
Note: X: Option, Z: Hi impedance
Table 2
SPN Driver
BRKSEL
VCTL
SPN Driver
X
> REFIN
REFIN
Forward torque
Z
L
< REFIN
Short brake
Reverse brake
H
REFIN – 0.6 V
Note: X: Option, Z: Hi impedance
8
HA13568AT/HA13568R
Table 3
TRY Driver
TRYF
TRYR
P Output
N Output
L
L
Z
L
Z
H
L
L
H
L
H
H
H
H
H
H
Note: Z: Hi impedance
9
HA13568AT/HA13568R
Application
1. FCS, TRR voltage drive
+5V
+12V
C101
VSS
VSPN
C102
AGC
CT
C103
C104
C105
Ct2
UFIL
VFIL
WFIL
CT2
U
V
SPN
W
5V
R105
Q1
Rnf
VREGF
VREGS
PHASE
RNF
Cpc
3.3V
C108
Vcc
PC
B1
BRKSEL
CE
MPU
C106
C107
R101
VCTL
B2
C109
Rt1
Ct1
RT
VBST
Rt2
CT1
+5V
VREF
REFIN
VFCS
FCSP
R103
C111
DMO
FOO
FCSRS
FCSN
FCS
R110
FCSIN
R111
R112
R113
TRRP
R104
C112
FCSREF
TRRIN
TRRRS
TRRN
FCGND
VSLD
TRR
TRO
TRRREF
SLDIN
R102
FMO
R106
SLDP
C110
M SLD
SLDLIM
CT3
SLDN
TRYP
R107
Ct3
M TRY
TRYF
TRYN
TRYR
TRYLIM
SLGND
TAB
10
HA13568AT/HA13568R
2. FCS, TRR voltage drive
FCSP
FCSRS
FCSN
R110
R111
R103
FCS
FO
FCSIN
(Zin ≈ 12kΩ)
C111
RSFCS
FCSREF
(Zin ≈ 12kΩ)
R108
C113
DSP
TO
R112
R113
TRRIN
(Zin ≈ 12kΩ)
TRRP
TRRRS
TRRN
R104
TRR
C112
REF
TRREF
(Zin ≈ 12kΩ)
RSTRR
R109
C114
Note: Other pins have the same connections as those used in application 1.
11
HA13568AT/HA13568R
3. When used at a voltage other than 3.3 V with a voltage regulator (Vout = 3.3 to Vcc – 1 V)
Vcc (5V or 12V)
R105
VREGF
Q1
+
−
Vout
C115
Rr1
Rr2
3.3V
3.3V
VREGS
Note: Other pins have the same connections as those used in application 1.
External Components
Recommended Recommended
Parts No.
R101
R102
R103
R104
R105
R106
R107
R108
R109
Value
47 kΩ
47 kΩ
6.8 Ω
6.8 Ω
500 Ω
20 kΩ
27 kΩ
6.8 Ω
6.8 Ω
Range
≤ 47 kΩ
≤ 47 kΩ
—
Purpose
Note
Filter for SPN driver control input
Filter for SLD driver control input
To stop FCS block oscillation
To stop TRR block oscillation
for Q1 bias
—
≥ 100 Ω
—
for TRY driver output voltage setting
—
—
To stop FCS block oscillation
To stop TRR block oscillation
for BTL gain setting
—
R110 to R113 20 kΩ
—
7
Rnf
Rt1
0.25 Ω
1.8 kΩ
≥ 0.25 Ω
SPN driver current detection resistor
1
Rt1 + Rt2 = 10 kΩ Reference current setting and SLD driver
2, 5
maximum duty setting
Rt2
8.2 kΩ
1 Ω
RSFCS
RSTRR
Rr1
≥ 0.33 Ω
≥ 0.33 Ω
—
for FCS driver current sense
for TRR driver current sense
Voltage regulator division resistor
7
8
1 Ω
—
Rr2
—
—
C101
C102
C103
C104
C105
C106
0.1 µF
0.047 µF
0.01 µF
≥ 0.1 µF
for Power supply by passing
for B-EMF Amplitude AGC
for B-EMF filter
6
0.22 µF
≥ 0.22 µF
for Booster pumping
12
HA13568AT/HA13568R
External Components (cont)
Recommended Recommended
Parts No.
C107
C108
C109
C110
C111
C112
C113
C114
C115
Ct1
Value
Range
Purpose
Note
0.47 µF
0.1 µF
≥ 0.47 µF
for Booster output smoothing
for SPN driver phase compensation
Filter for SPN control input
0.01 µF
3300 pF
0.01 µF
0.01 µF
0.01 µF
0.01 µF
2.2 µF
Filter for SLD control input
—
—
—
—
To stop FCS block oscillation
To stop TRR block oscillation
To stop FCS block oscillation
To stop TRR block oscillation
for Voltage regulator smoothing
150 pF
≥ 120 pF
Time constant for CLK oscillation. Use a
capacitor with good temperature
characteristics.
3
4
5
Ct2
0.033 µF
Time constant for start-up oscillation. Use a
capacitor with good temperature
characteristics.
Ct3
Q1
470 pF
≥ 390 pF
PWM carrier oscillation time constant
Transistor for voltage regulator
Note: 1. The output current maximum value Iospnmax of SPN driver is controlled according to the
following equation. However, Vspncl is the current limiter reference voltage. (See the electrical
characteristics)
Vspncl
Iospnmax =
Rnf
2. The maximum duty Dmax of SLD driver output is controlled according to the following equation.
Vrt
Rt2
Vlct3
Vrt
Dmax =
−
× 100 (%)
Vhct3 − Vlct3 Rt
However,
Rt2
Rt
Vlct3
Vrt
Rt = Rt1 + Rt2,
≥
Where, Vrt
: RT pin voltage (See the electrical characteristics)
Vlct3 : CT3 pin low voltage (≈ 1.3 V)
Vhct3 : CT3 pin high voltage (≈ 3.3 V)
Since Vrt ≈ Vhct3, Dmax is not limited at 100% when Rt1 = 0 W.
3. The CLK oscillation frequency is determined by the following equation.
Vrt
fclk =
8 Ct1 Rt ∆Vct1
Where, Vrt
: RT pin voltage (See the electrical characteristics)
∆Vct1 : CT1 pin voltage amplitude (≈ 1 V)
4. The Ct2 for start-up oscillation is determined by the following equation.
13
HA13568AT/HA13568R
1
6
J
Tc2 =
Ct2 =
P Kt Ispnmax
Tc2 Vrt
8 Rt (Vhct2 − Vlct2)
Where, J
P
: Spindle motor inertia (kg · cm · S2)
: Number of spindle motor poles (Total number of S poles and N poles)
: Spindle motor torque constant (kg · cm / A)
Kt
Vhct2 : CT2 pin high voltage (≈ 3.3 V)
Vlct2 : CT2 pin low voltage (≈ 1.3 V)
5. The PWM oscillation frequency fpwm is determined by the following equation.
Vrt
fpwm =
8 Ct3 Rt (Vhct3 − Vlct3)
Where, Vhct3 : CT3 pin high voltage (≈ 3.3 V)
Vlct3 : CT3 pin low voltage (≈ 1.3 V)
6. The C103 to C105 for B-EMF filter are determined by the following equation.
21
35
≤ C103 ≤
π
Rflt No P
π
Rflt No P
Where, Rfill : B-EMF detection output resistor (See the electrical characteristics)
No : Maximum rotation speed (rpm)
7. The FCS and TRR is determined by the following equation.
Voltage drive:
R1
Rin + R2
Gv =
Current drive:
R1
Gm =
((Rin + R2) Rs)
Where, R1
: Resistor of IC inside (≈30kΩ)
: Resistor of IC inside (≈7kΩ)
R2
Rin
: Resistor value inserted in the input (Ω)
(R110 to R113)
Rs
: Current sense resistor (Ω)
8. The output voltage Vout of voltage regulator is determined by the following equation.
Rr1
Vout = 3.3 1 +
Rr2
14
HA13568AT/HA13568R
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Vss
Rating
Unit
V
Note
Supply voltage
7
1
1
1
1
2
SPN supply voltage
FCS & TRR supply voltage
SLD & TRY supply voltage
Input voltage
Vspn
Vfcs
Vsld
Vin
15
V
15
V
15
V
0 to Vss
V
Vintrylim
Iospn
Iofcs
Iosld
PT
Vss to Vsld
V
SPN output current
1.5
A
3
3
3
4
1
FCS & TRR & TRY output current
SLD output current
0.5
A
1.5
A
Power dissipation
5
W
°C
°C
Junction temperature
Storage temperature range
Tj
160
Tstg
–55 to +125
Note: 1. Operating voltage range is shown below.
Vss = 4.25 to 5.75 V
Vspn = 4.25 to 13.8 V
Vfcs = 4.25 to 13.8 V (However, the output high voltage is clamped at 7 V.)
Vsld = 4.25 to 13.8 V
Tjopr = 0 to +135°C
2. Applied to BRKSEL, VCTL, REFIN, CE, FCSIN, FCSREF, TRRIN, TRRREF, SLDIN, SLDLIM,
TRYF and TRYR.
3. ASO (Area of Safety Operation) of each output transistor is shown below (TBD).
ASO of SPN driver
ASO of SLD driver
2.0
1.5
2.0
1.5
1.0
1.0
t = 0.1ms
t = 0.1ms
0.5
0.5
t = 1ms
t = 1ms
t = 10ms
t = 10ms
0.2
0.1
0.2
0.1
1
2
5
10 15 20
1
2
5
10 15 20
The voltage between Corrector and Emitter Vce (V)
The voltage between Corrector and Emitter Vce (V)
4. Thermal resistance is shown below.
θj-tab ≤ 12°C / W (back side tab soldering area is 70% or more)
θj-a ≤ 25°C / W (mounted on 4 layer multi glass-epoxy board, back side tab soldering area is
70% or more)
15
HA13568AT/HA13568R
Electrical Characteristics
(Ta = 25°C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V)
Applicable
Pins
Item
Symbol
Iss0
Min
—
—
—
—
14
11
6
Typ
0.7
—
Max
0.9
0.2
0.01
0.01
25
Unit
mA
mA
mA
mA
mA
mA
mA
mA
Test Conditions
Note
Quiescent current
CE = L
VSS
Ispn0
Ifcs0
Isld0
Iss1
VSPN
VFCS
VSLD
VSS
—
—
20
15
10
—
CE = H, VCTL =
Ispn1
Ifcs1
Isld1
20
FCSIN = TRRIN = VSPN
SLDIN = REFIN, VFCS
15
—
1.0
TRYF = TRYR = L VSLD
All load open
Iss2
20
11
7
33
60
50
15
1.0
mA
mA
mA
mA
CE = H, VCTL =
FCSIN = TRRIN = VSPN
SLDIN = 5 V, VFCS
VSS
Ispn2
Ifcs2
Isld2
30
10
–15
–1.0
TRYF, TRYR = H, VSLD
L, All load open
Logic
input
Input current
Iince
Iin
0
70
—
100
±10
0.8
µA
mA
V
Vin = 0 to 5 V
BRKSEL,
—
—
2.0
—
—
—
CE, TRYF,
TRYR
Low level voltage
High level voltage
Low level voltage
Leak current
Vil
—
Vih
—
—
V
Logic
Vol
—
0.4
V
Io = 1 mA
PHASE
U, V, W
output
Icer1
Vsatspn
—
±10
1.75
µA
V
Vce = 15 V
Iospn = 1.0 A
SPN
Output saturation
voltage
1.25
1
2
driver
Leak current
Icer2
1.3
2.2
3
µA
Vce = 15 V
Current limiter
voltage
Vspncl
238
265
292
mV
Rnf = 0.25 Ω
RNF
FCS
Input resistance
Rinfcs
9.6
12
12
—
14.4
14.4
5
kΩ
kΩ
V
FCSIN
driver
Rinfcsref 9.6
Input voltage range Vinfcs
0
16
HA13568AT/HA13568R
Electrical Characteristics
(Ta = 25°C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V) (cont)
Applicable
Pins
Item
Symbol Min
Typ
Max
Unit
Test Conditions
Note
FCS
Output quiescent
voltage
Vqfcs
2.375 2.5
2.625
V
FCSIN=FCSREF= FCSP,
3
driver
2.5 V, VFCS=5 V
FCSN
Output offset
voltage
Vosfcs
Vsatfcs
—
—
—
±20
µV
Output saturation
voltage
1.0
1.4
V
Io = 0.33 A
1
4
Voltage gain
Gvfcs
Bfcs
11.6
100
9.6
12.6
—
13.6
—
dB
kHz
kΩ
kΩ
V
Gain band width
Input resistance
∆Gv = –3 dB
TRR
Rintrr
12
14.4
14.4
5
TRRIN
driver
Rintrrref 9.6
Input voltage range Vintrr
12
0
—
Output quiescent
voltage
Vqtrr
2.375 2.5
2.625
V
FCSIN=TRRREF= TRRP,
3
2.5 V, VFCS=5 V
TRRN
Output offset
voltage
Vostrr
Vsattrr
—
—
—
±20
mV
V
FCSIN = REF
Output saturation
voltage
1.0
1.4
Io = 0.33 A
1
4
Voltage gain
Gvtrr
Btrr
11.6
100
—
12.6
—
13.6
—
dB
kHz
V
Gain band width
∆Gv = –3 dB
SLD
Output saturation
voltage
Vsatsld
1.5
2.0
Iosld = 0.75 A
SLDP,
SLDN
1
8
driver
Leak current
Icer3
—
—
—
—
—
—
—
—
—
1.0
±100
100
5
µA
mA
µs
µs
V
Vce = 15 V
Penetration current Iovlap
Transient response tplh1
VSLD
SLDP,
SLDN
time
tphl1
5
TRY
Output saturation
voltage
Vsattry
1.4
Iotry = 0.33 A
Vce = 15 V
TRYP,
TRYN
1
8
driver
Leak current
Icer3
—
—
—
—
—
0.1
—
—
—
—
—
0.7
±100
100
5
µA
mA
µs
µs
µA
V
Penetration current Iovlap
Transient response tplh1
VSLD
TRYP,
TRYN
time
tphl1
5
Input current
Output voltage
Iintrylim
Vlimtry
±5
Vtrylim=7 to VSLD
1.0
RL = 16Ω,
9
Vtrylim = 7 V
17
HA13568AT/HA13568R
Electrical Characteristics
(Ta = 25°C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V) (cont)
Applicable
Pins
Item
Symbol Min
Typ
—
Max
±5.0
3.0
Unit
µA
V
Test Conditions
Note
SPN
Input current
Iinspn
Vref
—
Vctl = 0 to Vss–1V
VCTL,
REFIN
2
current
control
REF voltage range
Dead zone voltage
1.6
±50
—
—
Vdzspn
Gctl
—
±120
±1.5
mV
dB
Vref reference
Current control
gain
–12
RNF
Drive
mode
Change threshold
voltage
Vctl
—
—
—
—
0.5
±0.1
V
Vref reference
SOFT SW mode
SW mode
VCTL
5
5
fPHASE
≥fCT2 ±50% Hz
U, V, W
SW ↔ SOFT SW
Output resistance
<fCT2 –20% Hz
B-EMF
Rflt
10
±20% kΩ
UFIL, VFIL,
WFIL
detection
Threshold voltage
of PHASE
Viemf
—
—
40
±50% mVpp VSPN ≥ Vss + 3VF
±50% mVpp VSPN ≤ Vss + 3VF
U, V, W
6
occurrence
28
CLK
RT voltage
Vrt
3.135 3.30 3.465
V
RT
OSC
CLK oscillation
frequency
fclk
210
240
270
kHz
Rt = 10 kΩ,
CT1
Ct1 = 82 pF
Start-up
circuit
Start-up oscillation
frequency
fct2
437
485
534
Hz
Rt = 10 kΩ,
CT2
Ct2 = 0.033 µF
SLD
Input current
Iinsld
—
0
—
—
—
±5.0
4.0
µA
V
Vsld = 0 to Vss–1V SLDIN
SLDLIM
control
Input voltage range Vinsld
Limiter input
current
Isldlim
—
±5.0
µA
PWM oscillation
frequency
fpwm
33
38
42.35 kHz
Rt = 10 kΩ,
Ct3 = 470 pF
Control gain
D/V
80
—
90
100
20
%/V
mV
mA
7
8
Offset voltage
Vossld
—
SLDIN = REFIN
Voltage
Output sink current Isinkreg 8.5
12.2
—
VREGS = 4 V,
VREGF = 4 V
regulator
Output voltage
Voutreg 3.135 3.30 3.465
V
OTSD
Operating
Tsd
135
160
—
°C
temperature
Hysteresis
Thys
—
50
—
°C
Note: 1. The output saturation voltage is the sum of the upper and lower saturation voltages.
2. See figure 1. Where,
18
HA13568AT/HA13568R
∆Vrnf
∆Vctl
Gctl = 20 log
Reverse
torque
Forward
torque
Vspncl
Vdzspn
∆Vrnf
Vref
∆Vctl
Vctl (V)
0 Reverse brake
Short brake
Figure 1
3. Where,
Vfcsp + Vfcsn
Vqfcs =
2
Vtrrp + Vtrrn
2
Vqtrr =
4.
See figure 2. Where,
∆Vfcsp ∆Vfcsn
∆Vfcsin ∆Vfcsin
Gvfcs = 20 log
Gvtrr = 20 log
∆Vfcsp
(∆Vtrrp)
∆Vtrrp ∆Vtrrn
∆Vtrrin ∆Vtrrin
∆Vfcsin
(∆Vtrrin)
0
Vref Vfcsin (Vtrrin)
Figure 2
5. The circuit operates in soft switching drive mode only when the control input (Vctl) is lower than
CT2 and fPHASE is higher than the threshold voltage. See figure 3.
f
SOFT SW mode
SW mode
fCT2
SW mode
0
0.5V
VCTL − REFIN
Figure 3
6. PHASE is output only when B-EMF exceeds the threshold voltage.
7. See figure 4. Where,
∆D
∆Vin
D/V =
SLDP = PWM
SLDN = H
SLDP = H
SLDN = PWM
100
∆D
∆Vin
Vref
0
Vinsld (V)
Figure 4
8. Design guide only.
9. Vlimtry = VTRYP – VTRYLIM, or VTRYN – VTRYLIM
19
HA13568AT/HA13568R
Reference Data
SPN Driver Output Saturation Voltage vs.
Output Current
FCS Driver Output Saturation Voltage vs.
Output Current
3
2
1
0
3
2
1
0
0
0.5
1.0
1.5
0
0.2
0.4
0.6
Output Current Iospn (A)
Output Current Iofcs (A)
SLD Driver Output Saturation Voltage vs.
TRR Driver Output Saturation Voltage vs.
Output Current
Output Current
4
3
3
2
1
0
2
1
0
0
0.5
1.0
1.5
0
0.2
0.4
0.6
Output Current Iosld (A)
Output Current Iotrr (A)
TRY Driver Output Saturation Voltage vs.
RT Voltage vs. Junction Temperature
Output Current
3
3.6
3.4
3.2
3.0
2
1
0
0
0.2
0.4
0.6
0
25
50
75
100
135
Output Current Iotry (A)
Junction Temperature Tj (°C)
20
HA13568AT/HA13568R
Package Dimensions
Preliminary
Unit: mm
14.0
14.2 Max
56
29
HA13568AT : Top view
HA13568R : Under view
1
28
0.50
0.08
+0.04
0.21
0.19
−0.05
M
+0.03
1.0
−0.05
8.10 ± 0.15
0.65 Max
0° − 8°
0.50 ± 0.1
0.08
(7.5)
1
28
HA13568AT : Under view
HA13568R : Top view
56
29
Hitachi Code
TTP-56DT (HA13568AT)
TTP-56DTR (HA13568R)
JEDEC
EIAJ
Weight (reference value) 0.32 g
21
HA13568AT/HA13568R
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & IC Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111
Fax: (03) 3270-5109
For further information write to:
Hitachi Semiconductor
(America) Inc.
2000 Sierra Point Parkway
Brisbane, CA. 94005-1897
U S A
Hitachi Europe GmbH
Continental Europe
Dornacher Straße 3
D-85622 Feldkirchen
München
Hitachi Europe Ltd.
Electronic Components Div.
Northern Europe Headquarters
Whitebrook Park
Lower Cookham Road
Maidenhead
Berkshire SL6 8YA
United Kingdom
Tel: 01628-585000
Fax: 01628-585160
Hitachi Asia Pte. Ltd.
16 Collyer Quay #20-00
Hitachi Tower
Singapore 049318
Tel: 535-2100
Tel: 800-285-1601
Fax:303-297-0447
Tel: 089-9 91 80-0
Fax: 089-9 29 30-00
Fax: 535-1533
Hitachi Asia (Hong Kong) Ltd.
Unit 706, North Tower,
World Finance Centre,
Harbour City, Canton Road
Tsim Sha Tsui, Kowloon
Hong Kong
Tel: 27359218
Fax: 27306071
Copyright © Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
22
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