HCTS30K/SAMPLE [RENESAS]

HCT SERIES, 8-INPUT NAND GATE, CDFP14;
HCTS30K/SAMPLE
型号: HCTS30K/SAMPLE
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

HCT SERIES, 8-INPUT NAND GATE, CDFP14

CD 输入元件 逻辑集成电路
文件: 总9页 (文件大小:236K)
中文:  中文翻译
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TM  
HCTS30MS  
Radiation Hardened  
8-Input NAND Gate  
August 1995  
Features  
Pinouts  
14 LEAD CERAMIC DUAL-IN-LINE  
METAL SEAL PACKAGE (SBDIP)  
MIL-STD-1835 CDIP2-T14  
TOP VIEW  
• 3 Micron Radiation Hardened SOS CMOS  
• Total Dose 200K RAD (Si)  
2
• SEP Effective LET No Upsets: >100 MEV-cm /mg  
-9  
A
B
1
2
3
4
5
6
7
14 VCC  
13 NC  
• Single Event Upset (SEU) Immunity < 2 x 10 Errors/  
Bit-Day (Typ)  
12  
• Dose Rate Survivability: >1 x 10 RAD (Si)/s  
C
12 H  
10  
• Dose Rate Upset >10 RAD (Si)/s 20ns Pulse  
D
11 G  
E
10 NC  
• Latch-Up Free Under Any Conditions  
o
o
F
9
8
NC  
Y
• Military Temperature Range: -55 C to +125 C  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
GND  
• LSTTL Input Compatibility  
- VIL = 0.8V Max  
14 LEAD CERAMIC METAL SEAL  
FLATPACK PACKAGE (FLATPACK)  
MIL-STD-1835 CDFP3-F14  
TOP VIEW  
- VIH = VCC/2 Min  
• Input Current Levels Ii 5µA at VOL, VOH  
A
B
1
2
3
4
5
6
7
14  
13  
12  
VCC  
NC  
H
Description  
C
The Intersil HCTS30MS is a Radiation Hardened 8-Input  
NAND Gate. A high on all input forces the output to a low  
state.  
D
11  
10  
G
E
NC  
NC  
Y
F
9
8
The HCTS30MS utilizes advanced CMOS/SOS technology  
to achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
GND  
Ordering Information  
PART NUMBER  
HCTS30DMSR  
TEMPERATURE RANGE  
-55oC to +125oC  
-55oC to +125oC  
+25oC  
SCREENING LEVEL  
Intersil Class S Equivalent  
Intersil Class S Equivalent  
Sample  
PACKAGE  
14 Lead SBDIP  
HCTS30KMSR  
14 Lead Ceramic Flatpack  
14 Lead SBDIP  
HCTS30D/Sample  
HCTS30K/Sample  
HCTS30HMSR  
+25oC  
Sample  
14 Lead Ceramic Flatpack  
Die  
+25oC  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.  
Spec Number 518639  
FN3056.1  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
440  
HCTS30MS  
Functional Diagram  
A
B
C
D
Y
E
F
G
H
TRUTH TABLE  
INPUTS  
OUTPUTS  
A
L
B
X
L
C
X
X
L
D
X
X
X
L
E
X
X
X
X
L
F
X
X
X
X
X
L
G
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
L
Y
H
H
H
H
H
H
H
H
L
X
X
X
X
X
X
X
H
X
X
X
X
X
X
H
X
X
X
X
X
H
X
X
X
X
H
X
X
X
H
X
X
H
X
H
H
NOTE: L = Logic Level Low, H = Logic level High, X = Don’t Care  
Spec Number 518639  
441  
Specifications HCTS30MS  
Absolute Maximum Ratings  
Reliability Information  
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V  
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V  
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA  
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA  
(All Voltage Reference to the VSS Terminal)  
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC  
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265oC  
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC  
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1  
Thermal Resistance  
θJA  
θJC  
SBDIP Package. . . . . . . . . . . . . . . . . . . .  
74oC/W  
24oC/W  
30oC/W  
Ceramic Flatpack Package . . . . . . . . . . . 116oC/W  
Maximum Package Power Dissipation at +125oC Ambient  
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W  
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W  
If device power exceeds package dissipation capability, provide  
heat sinking or derate linearly at the following rate:  
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/oC  
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/oC  
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent  
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed  
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..  
Operating Conditions  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V  
Input Rise and Fall Times at 4.5V VCC (tr, tf) . . . . . . . 100ns/V Max  
Operating Temperature Range (TA). . . . . . . . . . . . -55oC to +125oC  
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V  
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC  
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS  
GROUP  
A SUB-  
LIMITS  
(NOTE 1)  
PARAMETER  
SYMBOL  
CONDITIONS  
GROUPS  
TEMPERATURE  
+25oC  
MIN  
MAX  
UNITS  
µA  
Quiescent Current  
ICC  
VCC = 5.5V,  
VIN = VCC or GND  
1
2, 3  
1
-
-
10  
+125oC, -55oC  
+25oC  
200  
µA  
Output Current  
(Sink)  
IOL  
IOH  
VOL  
VCC = 4.5V, VIH = 4.5V,  
VOUT = 0.4V, VIL = 0V  
4.8  
4.0  
-4.8  
-4.0  
-
-
-
mA  
mA  
mA  
mA  
V
2, 3  
1
+125oC, -55oC  
+25oC  
Output Current  
(Source)  
VCC = 4.5V, VIH = 4.5V,  
VOUT = VCC -0.4V,  
VIL = 0V  
-
2, 3  
1, 2, 3  
+125oC, -55oC  
+25oC, +125oC, -55oC  
-
Output Voltage Low  
VCC = 4.5V, VIH = 2.25V,  
0.1  
IOL = 50µA, VIL = 0.8V  
VCC = 5.5V, VIH = 2.75V,  
IOL = 50µA, VIL = 0.8V  
1, 2, 3  
1, 2, 3  
1, 2, 3  
+25oC, +125oC, -55oC  
+25oC, +125oC, -55oC  
+25oC, +125oC, -55oC  
-
0.1  
V
V
V
Output Voltage High  
VOH  
VCC = 4.5V, VIH = 2.25V,  
IOH = -50µA, VIL = 0.8V  
VCC  
-0.1  
-
-
VCC = 5.5V, VIH = 2.75V,  
IOH = -50µA, VIL = 0.8V  
VCC  
-0.1  
Input Leakage  
Current  
IIN  
FN  
VCC = 5.5V, VIN = VCC or  
GND  
1
+25oC  
-
-
-
±0.5  
±5.0  
-
µA  
µA  
-
2, 3  
+125oC, -55oC  
Noise Immunity  
Functional Test  
VCC = 4.5V, VIH = 2.25V,  
VIL = 0.8V (Note 2)  
7, 8A, 8B  
+25oC, +125oC, -55oC  
NOTES:  
1. All voltages reference to device GND.  
2. For functional tests VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.  
Spec Number 518639  
442  
Specifications HCTS30MS  
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS  
GROUP  
LIMITS  
(NOTES 1, 2)  
A SUB-  
PARAMETER  
SYMBOL  
CONDITIONS  
GROUPS  
TEMPERATURE  
+25oC  
MIN  
MAX  
22  
UNITS  
ns  
Input to Output  
TPHL  
VCC = 4.5V  
9
2
2
2
2
10, 11  
9
+125oC, -55oC  
+25oC  
23  
ns  
TPLH  
VCC = 4.5V  
22  
ns  
10, 11  
+125oC, -55oC  
25  
ns  
NOTES:  
1. All voltages referenced to device GND.  
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.  
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS  
LIMITS  
PARAMETER  
SYMBOL  
CONDITIONS  
NOTES  
TEMPERATURE  
+25oC  
MIN  
MAX  
105  
225  
10  
UNITS  
pF  
Capacitance Power  
Dissipation  
CPD  
VCC = 5.0V, f = 1MHz  
1
1
1
1
1
1
-
-
-
-
-
-
+125oC, -55oC  
+25oC  
pF  
Input Capacitance  
CIN  
VCC = 5.0V, f = 1MHz  
VCC = 4.5V  
pF  
+125oC  
10  
pF  
Output Transition  
Time  
TTHL  
TTLH  
+25oC  
15  
ns  
+125oC  
22  
ns  
NOTE:  
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly  
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.  
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS  
200K RAD  
LIMITS  
(NOTES 1, 2)  
PARAMETER  
Quiescent Current  
Output Current (Sink)  
SYMBOL  
ICC  
CONDITIONS  
TEMPERATURE  
+25oC  
MIN  
-
MAX  
0.2  
-
UNITS  
mA  
VCC = 5.5V, VIN = VCC or GND  
IOL  
VCC = 4.5V, VIN = VCC or GND,  
VOUT = 0.4V  
+25oC  
4.0  
mA  
Output Current  
(Source)  
IOH  
VOL  
VOH  
IIN  
VCC = 4.5V, VIN = VCC or GND,  
VOUT = VCC -0.4V  
+25oC  
+25oC  
+25oC  
+25oC  
-4.0  
-
-
0.1  
-
mA  
V
Output Voltage Low  
Output Voltage High  
Input Leakage Current  
VCC = 4.5V and 5.5V,  
VIH = VCC/2, VIL = 0.8V, IOL = 50µA  
VCC = 4.5V and 5.5V,  
VIH = VCC/2, VIL = 0.8V, IOH = -50µA  
VCC  
-0.1  
V
VCC = 5.5V, VIN = VCC or GND  
-
±5  
µA  
Spec Number 518639  
443  
Specifications HCTS30MS  
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)  
200K RAD  
LIMITS  
(NOTES 1, 2)  
PARAMETER  
SYMBOL  
CONDITIONS  
TEMPERATURE  
MIN  
MAX  
UNITS  
Noise Immunity  
Functional Test  
FN  
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V,  
(Note 3)  
+25oC  
-
-
-
Input to Output  
TPHL  
TPLH  
VCC = 4.5V  
VCC = 4.5V  
+25oC  
+25oC  
2
2
23  
25  
ns  
ns  
NOTES:  
1. All voltages referenced to device GND.  
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.  
3. For functional tests VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.  
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)  
GROUP B  
PARAMETER  
SUBGROUP  
DELTA LIMIT  
ICC  
5
5
3µA  
IOL/IOH  
-15% of 0 Hour  
TABLE 6. APPLICABLE SUBGROUPS  
GROUP A SUBGROUPS  
CONFORMANCE GROUPS  
METHOD  
100%/5004  
100%/5004  
100%/5004  
100%/5004  
100%/5004  
100%/5004  
100%/5004  
Sample/5005  
Sample/5005  
Sample/5005  
Sample/5005  
READ AND RECORD  
ICC, IOL/H  
Initial Test (Preburn-In)  
1, 7, 9  
1, 7, 9  
Interim Test I (Postburn-In)  
Interim Test II (Postburn-In)  
PDA  
ICC, IOL/H  
ICC, IOL/H  
1, 7, 9  
1, 7, 9, Deltas  
1, 7, 9  
Interim Test III (Postburn-In)  
PDA  
ICC, IOL/H  
1, 7, 9, Deltas  
2, 3, 8A, 8B, 10, 11  
1, 2, 3, 7, 8A, 8B, 9, 10, 11  
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas  
1, 7, 9  
Final Test  
Group A (Note 1)  
Group B  
Subgroup B-5  
Subgroup B-6  
Subgroups 1, 2, 3, 9, 10, 11  
Group D  
NOTE:  
1, 7, 9  
1. Alternate group A inspection in accordance with Method 5005 of MIL-STD-883 may be exercised.  
Spec Number 518639  
444  
Specifications HCTS30MS  
TABLE 7. TOTAL DOSE IRRADIATION  
TEST  
READ AND RECORD  
CONFORMANCE  
GROUPS  
METHOD  
PRE RAD  
POST RAD  
PRE RAD  
1, 9  
POST RAD  
Group E Subgroup 2  
5005  
1, 7, 9  
Table 4  
Table 4 (Note 1)  
NOTE:  
1. Except FN test which will be performed 100% Go/No-Go.  
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS  
OSCILLATOR  
OPEN  
STATIC BURN-IN I TEST CONNECTIONS (Note 1)  
8, 9, 10, 13 1 - 5, 6, 7, 11, 12  
STATIC BURN-IN II TEST CONNECTIONS (Note 1)  
8, 9, 10, 13  
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)  
9, 10, 13  
NOTES:  
GROUND  
1/2 VCC = 3V ± 0.5V  
VCC = 6V ± 0.5V  
50kHz  
25kHz  
-
14  
1 - 5, 6, 11, 12, 14  
14  
-
-
-
-
7
-
-
7
8
1 - 5, 6, 11, 12  
1. Each pin except VCC and GND will have a resistor of 10KΩ ± 5% for static burn-in  
2. Each pin except VCC and GND will have a resistor of 1KΩ ± 5% for dynamic burn-in  
TABLE 9. IRRADIATION TEST CONNECTIONS  
OPEN  
GROUND  
VCC = 5V ± 0.5V  
1, 2, 3, 4, 5, 6, 11, 12, 14  
8, 9, 10, 13  
7
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.  
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.  
Spec Number 518639  
445  
HCTS30MS  
Intersil Space Level Product Flow - ‘MS’  
Wafer Lot Acceptance (All Lots) Method 5007  
(Includes SEM)  
100% Interim Electrical Test 1 (T1)  
100% Delta Calculation (T0-T1)  
GAMMA Radiation Verification (Each Wafer) Method 1019,  
4 Samples/Wafer, 0 Rejects  
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,  
o
+125 C min., Method 1015  
100% Nondestructive Bond Pull, Method 2023  
Sample - Wire Bond Pull Monitor, Method 2011  
Sample - Die Shear Monitor, Method 2019 or 2027  
100% Internal Visual Inspection, Method 2010, Condition A  
100% Interim Electrical Test 2 (T2)  
100% Delta Calculation (T0-T2)  
100% PDA 1, Method 5004 (Notes 1and 2)  
o
100% Dynamic Burn-In, Condition D, 240 hrs., +125 C or  
100% Temperature Cycle, Method 1010, Condition C,  
10 Cycles  
Equivalent, Method 1015  
100% Interim Electrical Test 3 (T3)  
100% Delta Calculation (T0-T3)  
100% Constant Acceleration, Method 2001, Condition per  
Method 5004  
100% PDA 2, Method 5004 (Note 2)  
100% Final Electrical Test  
100% PIND, Method 2020, Condition A  
100% External Visual  
100% Fine/Gross Leak, Method 1014  
100% Radiographic, Method 2012 (Note 3)  
100% External Visual, Method 2009  
Sample - Group A, Method 5005 (Note 4)  
100% Data Package Generation (Note 5)  
100% Serialization  
100% Initial Electrical Test (T0)  
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,  
o
+125 C min., Method 1015  
NOTES:  
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.  
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the  
failures from subgroup 7.  
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.  
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.  
5. Data Package Contents:  
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-  
tity).  
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.  
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test  
equipment, etc. Radiation Read and Record data on file at Intersil.  
• X-Ray report and film. Includes penetrometer measurements.  
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).  
• Lot Serial Number Sheet (Good units serial number and lot number).  
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.  
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed  
by an authorized Quality Representative.  
Spec Number  
446  
HCTS30MS  
AC Load Circuit  
AC Timing Diagrams  
DUT  
TEST  
POINT  
VIH  
INPUT  
VS  
CL  
RL  
VIL  
TPLH  
TPHL  
VOH  
VOL  
VOH  
VOL  
CL = 50pF  
VS  
OUTPUT  
RL = 500Ω  
TTLH  
TTHL  
80%  
80%  
20%  
20%  
OUTPUT  
AC VOLTAGE LEVELS  
PARAMETER  
VCC  
HCTS  
4.50  
3.00  
1.30  
0
UNITS  
V
V
V
V
V
VIH  
VS  
VIL  
GND  
0
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
Spec Number 518639  
447  
HCTS30MS  
Die Characteristics  
DIE DIMENSIONS:  
87 x 88 mils  
METALLIZATION:  
Type: SiAl  
Metal Thickness: 11kÅ ± 1kÅ  
GLASSIVATION:  
Type: SiO  
2
Thickness: 13kÅ ± 2.6kÅ  
WORST CASE CURRENT DENSITY:  
5
2
<2.0 x 10 A/cm  
BOND PAD SIZE:  
100µm x 100µm  
4 mils x 4 mils  
Metallization Mask Layout  
HCTS30MS  
A
(1)  
VCC  
(14)  
NC  
(13)  
B (2)  
(12) H  
(11) G  
C (3)  
(10) NC  
D (4)  
E (5)  
(9) NC  
(6)  
F
(7)  
GND  
(8)  
Y
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.  
The mask series for the HCTS30 is TA14428A.  
Spec Number 518639  
448  

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