HD74AC373FP-EL [RENESAS]
AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, SOP-20;
| 型号： | HD74AC373FP-EL |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, SOP-20 锁存器 |
| 文件： | 总10页 (文件大小：136K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74AC373/HD74ACT373
Octal Transparent Latch with 3-State Output
REJ03D0273–0200Z
(Previous ADE-205-394 (Z))
Rev.2.00
Jul.16.2004
Description
The HD74AC373/HD74ACT373 consists of eight latches with 3-state outputs from bus organized system applications.
The flip-flops appear transparent to the data when Latch Enable (LE) is High. When LE is Low, the data that meets the
setup time is latched. Data appears on the bus when the Output Enable (OE) is Low. When OE is High, the bus output
is in the high impedance state.
Features
•
•
•
•
Eight Latches in a Single Package
3-State Outputs for Bus Interfacing
Outputs Source/Sink 24 mA
HD74AC373 has TTL-Compatible Inputs
•
Ordering Information: Ex. HD74AC373
Part Name
HD74AC373P
Package Type
DIP-20 pin
Package Code Package Abbreviation Taping Abbreviation (Quantity)
DP-20N, -20NEV P
—
HD74AC373FPEL SOP-20 pin (JEITA) FP-20DAV
HD74AC373RPEL SOP-20 pin (JEDEC) FP-20DBV
FP
RP
T
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
HD74AC373TELL TSSOP-20 pin
TTP-20DAV
Notes: 1. Please consult the sales office for the above package availability.
2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of
the package code.
Rev.2.00, Jul.16.2004, page 1 of 9
HD74AC373/HD74ACT373
Pin Arrangement
OE
1
2
20
19
18
V
CC
O
D
D
O
O
0
0
1
O7
3
D
7
6
4
17 D
1
2
5
O
6
5
16
15
14
13
12
11
6
O
7
D
D
5
4
D2
D3
O3
8
9
O4
LE
10
Gnd
(Top view)
Logic Symbol
D
0
D
1
D
2
D3
D
4
D5 D6 D7
LE
OE
O0 O1 O2 O3
O4 O5 O6 O7
Pin Names
D0 – D7
LE
Data Inputs
Latch Enable Input
Output Enable Input
3-State Latch Outputs
OE
O0 – O7
Rev.2.00, Jul.16.2004, page 2 of 9
HD74AC373/HD74ACT373
Truth Table
Inputs
Outputs
On
OE
LE
Dn
H
X
X
L
Z
L
H
H
L
L
L
H
X
H
O0
L
H : High Voltage Level
L
Z
X
:
:
:
Low Voltage Level
High Impedance
Immaterial
O0 : Previous O0 before Low-to-High Transition of Clock
Functional Description
The HD74AC373/HD74ACT373 contains eight D-type latches with 3-state standard outputs. When the Latch Enable
(LE) input is High, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch
output will change state each time its D input changes. When LE is Low, the latches store the information that was
present on the D inputs setup time proceding the High-to-Low transition of LE. The 3-state standard outputs are
controlled by the Output Enable (OE) input. When OE is Low, the standard outputs are in the 2-state mode. When OE
is High, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the
latches.
Logic Diagram
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D7
D
D
D
D
D
D
D
D
O
O
O
O
O
O
O
O
G
G
G
G
G
G
G
G
LE
OE
O0
O1
O2
O3
O4
O5
O6
O7
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
Absolute Maximum Ratings
Item
Symbol
VCC
Ratings
–0.5 to 7
Unit
Condition
VI = –0.5V
Supply voltage
V
DC input diode current
IIK
–20
mA
mA
V
20
VI = Vcc+0.5V
DC input voltage
VI
–0.5 to Vcc+0.5
DC output diode current
IOK
–50
mA
mA
V
VO = –0.5V
50
VO = Vcc+0.5V
DC output voltage
VO
–0.5 to Vcc+0.5
±50
DC output source or sink current
DC VCC or ground current per output pin
Storage temperature
IO
mA
mA
°C
ICC, IGND
Tstg
±50
–65 to +150
Rev.2.00, Jul.16.2004, page 3 of 9
HD74AC373/HD74ACT373
Recommended Operating Conditions: HD74AC373
Item
Symbol
VCC
Ratings
Unit
Condition
Supply voltage
2 to 6
V
Input and Output voltage
Operating temperature
VI, VO
Ta
0 to VCC
–40 to +85
8
V
°C
Input rise and fall time
(except Schmitt inputs)
tr, tf
ns/V
VCC = 3.0V
VCC = 4.5 V
VCC = 5.5 V
VIN 30% to 70% VCC
DC Characteristics: HD74AC373
Item
Sym-
bol
Vcc
(V)
Ta = 25°C
Ta = –40 to
+85°C
min. max.
Unit
Condition
min.
2.1
3.15
3.85
—
typ.
1.5
max.
—
Input Voltage
VIH
VIL
3.0
2.1
3.15
3.85
—
—
V
VOUT = 0.1 V or VCC –0.1 V
VOUT = 0.1 V or VCC –0.1 V
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
5.5
2.25
2.75
1.50
2.25
2.75
2.99
4.49
5.49
—
—
—
—
—
0.9
1.35
1.65
—
0.9
1.35
1.65
—
—
—
—
—
Output voltage
VOH
2.9
4.4
5.4
2.58
3.94
4.94
—
2.9
4.4
5.4
2.48
3.80
4.80
—
V
VIN = VIL or VIH
IOUT = –50 µA
—
—
—
—
—
—
VIN = VIL or VIH
IOH = –12 mA
—
—
—
IOH = –24 mA
IOH = –24 mA
—
—
—
VOL
0.002 0.1
0.001 0.1
0.001 0.1
0.1
0.1
0.1
0.37
0.37
0.37
±1.0
VIN = VIL or VIH
IOUT = 50 µA
—
—
—
—
—
—
—
—
—
0.32
—
VIN = VIL or VIH
IOL = 12 mA
IOL = 24 mA
IOL = 24 mA
—
0.32
0.32
±0.1
—
—
—
Input leakage
current
IIN
—
—
µA
µA
VIN = VCC or GND
3 State current
IOZ
5.5
—
—
±0.5
—
±5.0
VIN(OE) = VIL, VIH
VIN = VCC or GND
VOUT = VCC or GND
Dynamic output
current*
IOLD
IOHD
ICC
5.5
5.5
5.5
—
—
—
—
—
—
—
86
—
—
80
mA
mA
µA
VOLD = 1.1 V
—
–75
—
VOHD = 3.85 V
Quiescent supply
current
8.0
VIN = VCC or ground
*Maximum test duration 2.0 ms, one output loaded at a time.
Recommended Operating Conditions: HD74ACT373
Item
Symbol
VCC
Ratings
Unit
Condition
Supply voltage
2 to 6
V
V
Input and output voltage
Operating temperature
VI, VO
Ta
0 to VCC
–40 to +85
8
°C
ns/V
Input rise and fall time
(except Schmitt inputs)
tr, tf
V
V
CC = 4.5V
CC = 5.5V
VIN 0.8 to 2.0 V
Rev.2.00, Jul.16.2004, page 4 of 9
HD74AC373/HD74ACT373
DC Characteristics: HD74ACT373
Item
Sym-
bol
VCC
(V)
Ta = 25°C
Ta = –40 to
Unit
Condition
+85°C
min.
2.0
typ.
1.5
1.5
1.5
1.5
4.49
5.49
—
max.
—
min.
2.0
2.0
—
max.
—
Input voltage
VIH
VIL
4.5
V
V
V
V
OUT = 0.1 V or VCC–0.1 V
OUT = 0.1 V or VCC –0.1 V
IN = VIL or VIH
5.5
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
5.5
5.5
2.0
—
—
—
0.8
0.8
—
0.8
0.8
—
—
—
Output voltage
VOH
4.4
5.4
3.94
4.94
—
4.4
5.4
3.80
4.80
—
V
IOUT = –50 µA
—
—
—
—
VIN = VIL
IOH = –24 mA
IOH = –24 mA
—
—
—
VOL
0.001 0.1
0.001 0.1
0.1
0.1
0.37
0.37
±1.0
±5.0
VIN = VIL or VIH
IOUT = 50 µA
—
—
—
—
—
—
—
0.32
—
VIN = VIL
IOL = 24 mA
IOL = 24 mA
—
0.32
±0.1
±0.5
—
Input current
IIN
—
—
µA
µA
VIN = VCC or GND
3 State current
IOZ
—
—
VIN = VIL, VIH
VOUT = VCC or GND
ICC/input current
ICCT
IOLD
IOHD
ICC
5.5
5.5
5.5
5.5
—
—
—
—
0.6
—
—
—
—
1.5
—
mA
mA
mA
µA
VIN = VCC–2.1 V
VOLD = 1.1 V
Dynamic output
current*
86
–75
—
—
—
—
VOHD = 3.85 V
Quiescent supply
current
—
8.0
80
VIN = VCC or ground
*Maximum test duration 2.0 ms, one output loaded at a time.
AC Characteristics: HD74AC373
Ta = +25°C
CL = 50 pF
Typ
Ta = –40°C to +85°C
CL = 50 pF
Item
Propagation delay
Dn to On
Symbol VCC (V)*1
Min
1.0
Max
13.5
9.5
Min
Max
15.0
Unit
tPLH
tPHL
tPLH
tPHL
tZH
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
10.0
7.0
9.5
7.0
10.0
7.5
9.5
7.0
9.0
7.0
8.5
6.5
10.0
8.0
8.0
6.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
ns
ns
ns
ns
ns
ns
ns
ns
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
10.5
14.5
10.5
15.0
10.5
14.0
10.5
13.0
9.5
Propagation delay
Dn to On
13.0
9.5
Propagation delay
LE to On
13.5
9.5
Propagation delay
LE to On
12.5
9.5
Output enable time
11.5
8.5
Output enable time
Output disable time
Output disable time
tZL
11.5
8.5
13.0
9.5
tHZ
12.5
11.0
11.5
8.5
14.5
12.5
12.5
10.0
tLZ
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Rev.2.00, Jul.16.2004, page 5 of 9
HD74AC373/HD74ACT373
AC Characteristics: HD74AC373
Ta = +25°C
CL = 50 pF
Ta = –40°C to +85°C
CL = 50 pF
Item
Symbol VCC (V)*1
Min
1.0
Typ
Max
10.0
Min
Max
11.5
Unit
Propagation delay
Dn to On
tPLH
tPHL
tPLH
tPHL
5.0
5.0
5.0
5.0
8.5
8.0
8.5
8.0
1.0
1.0
1.0
1.0
ns
ns
ns
ns
Propagation delay
Dn to On
1.0
1.0
1.0
10.0
11.5
11.5
11.5
Propagation delay
LE to On
11.0
10.0
Propagation delay
LE to On
Output enable time
Output enable time
Output disable time
Output disable time
tZH
tZL
tHZ
tLZ
5.0
5.0
5.0
5.0
1.0
1.0
1.0
1.0
8.0
7.5
9.0
7.5
9.5
9.0
11.0
8.5
1.0
1.0
1.0
1.0
10.5
10.5
12.5
10.0
ns
ns
ns
ns
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Operating Requirements: HD74AC373
Ta = –40°C
to +85°C
CL = 50 pF
Ta = +25°C
CL = 50 pF
Item
Setup time, HIGH or LOW
Dn to LE
Symbol VCC (V)*1
Typ
Guaranteed Minimum
Unit
tsu
3.3
5.0
3.3
5.0
3.3
5.0
3.5
5.5
6.0
4.5
0.0
0.0
6.0
4.5
ns
ns
ns
2.0
4.0
0.0
0.0
5.5
4.0
Hold time, HIGH or LOW
Dn to LE
th
–3.0
–1.5
4.0
LE pulse width, HIGH
tw
2.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Operating Requirements: HD74ACT373
Ta = –40°C
Ta = +25°C
CL = 50 pF
to +85°C
CL = 50 pF
Item
Symbol VCC (V)*1
Typ
Guaranteed Minimum
Unit
Setup time, HIGH or LOW
Dn to LE
tsu
5.0
5.0
5.0
3.0
0.0
2.0
7.0
8.0
1.0
8.0
ns
ns
ns
Hold time, HIGH or LOW
Dn to LE
th
0.0
7.0
LE pulse width, HIGH
tw
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Input capacitance
Symbol
Typ
Unit
Condition
CIN
4.5
pF
pF
VCC = 5.5 V
VCC = 5.0 V
Power dissipation capacitance
CPD
40.0
Rev.2.00, Jul.16.2004, page 6 of 9
HD74AC373/HD74ACT373
Package Dimensions
As of January, 2003
Unit: mm
24.50
25.40 Max
20
11
10
1
1.30
0.89
7.62
1.27 Max
+ 0.11
– 0.05
0.25
– 15
2.54 ± 0.25
0.48 ± 0.10
0˚
˚
Package Code
JEDEC
DP-20N
—
JEITA
Mass (reference value)
Conforms
1.26 g
Unit: mm
24.50
25.40 Max
20
11
10
1
1.30
0.89
7.62
1.27 Max
*0.25 ± 0.06
2.54 ± 0.25
*0.48 ± 0.08
0˚ – 15˚
Package Code
JEDEC
DP-20NEV
—
*NI/Pd/AU Plating
JEITA
Mass (reference value)
Conforms
1.26 g
Rev.2.00, Jul.16.2004, page 7 of 9
HD74AC373/HD74ACT373
As of January, 2003
Unit: mm
12.6
13 Max
11
10
20
1
+ 0.20
7.80
– 0.30
0.80 Max
1.15
0˚ – 8˚
1.27
0.70 ± 0.20
*0.40 ± 0.06
0.15
0.12 M
Package Code
JEDEC
FP-20DAV
—
JEITA
Mass (reference value)
Conforms
0.31 g
*Ni/Pd/Au plating
As of January, 2003
Unit: mm
12.8
13.2 Max
11
10
20
1
+ 0.25
– 0.40
10.40
0.935 Max
1.45
0˚ – 8˚
+ 0.57
– 0.30
1.27
0.70
*0.40 ± 0.06
0.15
M
0.12
Package Code
JEDEC
JEITA
FP-20DBV
Conforms
—
*Ni/Pd/Au plating
Mass (reference value)
0.52 g
Rev.2.00, Jul.16.2004, page 8 of 9
HD74AC373/HD74ACT373
As of January, 2003
Unit: mm
6.50
6.80 Max
20
11
1
10
0.65
1.0
*0.20 ± 0.05
0.13
M
6.40 ± 0.20
0.65 Max
0˚ – 8˚
0.50 ± 0.10
0.10
Package Code
JEDEC
TTP-20DAV
—
JEITA
—
*Ni/Pd/Au plating
Mass (reference value)
0.07 g
Rev.2.00, Jul.16.2004, page 9 of 9
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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