HD74ALVC162835 [RENESAS]
18-bit Universal Bus Driver with 3-state Outputs; 18位通用总线驱动器,具有三态输出![HD74ALVC162835](http://pdffile.icpdf.com/pdf1/p00157/img/icpdf/HD74A_872325_icpdf.jpg)
型号: | HD74ALVC162835 |
厂家: | ![]() |
描述: | 18-bit Universal Bus Driver with 3-state Outputs |
文件: | 总16页 (文件大小:242K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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HD74ALVC162835
18-bit Universal Bus Driver with 3-state Outputs
REJ03D0055-0700Z
(Previous ADE-205-201E (Z) )
Rev.7.00
Oct.02.2003
Description
The HD74ALVC162835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation.
Data flow from A to Y is controlled by the output enable (OE). The dein the transparent mode
when the latch enable (LE) is high. When LE is low, the A data is l(CLK) input is held
at a high or low logic level. If the LE is low, the A data is storehe low to high
transition of CLK. When OE is high, the outputs are in the h
To ensure the high impedance state during power up or ied to VCC through a
pullup register; the minimum value of the register is nking capability of the
driver.
All outputs, which are designed to sink resistors to reduce overshoot and
undershoot.
Features
•
•
•
•
•
•
Meets “PC SDRAM regt document, Rev. 1.2”
CC = 2.3 V to 3.6 V
V
Typical VOL gro3.3 V, Ta = 25°C)
Typical VOH 3.3 V, Ta = 25°C)
High output curr3.0 V)
All outputs have equeries resistors, so no external resistors are required
Rev.7.00, Oct.02.2003, page 1 of 15
HD74ALVCH162835
Function Table
Inputs
Output Y
OE
H
L
LE
CLK
A
X
L
X
H
H
L
X
Z
L
X
L
X
H
L
H
L
L
↑
L
L
↑
H
X
H
*1
L
L
L or H
Y0
H :
L :
X :
Z :
↑ :
High level
Low level
Immaterial
High impedance
Low to high transition
Note: 1. Output level before the indicated steady-state ihed.
Rev.7.00, Oct.02.2003, page 2 of 15
HD74ALVCH162835
Pin Arrangement
NC 1
56 GND
55 NC
2
NC
54
53
52
51
A1
Y1
GND
Y2
3
4
GND
A2
5
6
Y3
A3
7
50 VCC
49 A
VCC
Y4
8
Y5
9
4
10
Y6
11
12
13
GND
Y7
Y8
Y9 14
Y10
15
16
17
0
A11
A12
Y11
Y12
40
39 GND
38
GND
Y
A13
37 A14
A15
VCC
A16
A17
GND
A18
CLK
GND
36
35
34
33
32
31
30
29
5
26
27
8
OE
LE 28
(Top view)
Rev.7.00, Oct.02.2003, page 3 of 15
HD74ALVCH162835
Absolute Maximum Ratings
Item
Symbol
Ratings
–0.5 to 4.6
–0.5 to 4.6
–0.5 to VCC+0.5
–50
Unit
V
Conditions
Supply voltage range
Input voltage range *1
Output voltage range *1, 2
Input clamp current
Output clamp current
Continuous output current
VCC, GND current / pin
VCC
VI
V
VO
V
IIK
mA
mA
mA
mA
W
VI < 0
IOK
±50
VO < 0 or VO > VCC
VO = 0 to VCC
IO
±50
ICC or IGND
PT
±100
Maximum power dissipation
1
TSSOP
at Ta = 55°C (in still air) *3
Storage temperature range
Tstg
–65 to 150
Notes: Stresses beyond those listed under “absolute maximum rnent damage to
the device. These are stress ratings only, and functiothese or any
other conditions beyond those indicated under “recn” is not implied.
Exposure to absolute-maximum-rated conditions fect device reliability.
1. The input and output negative-voltage ratinput and output clamp
current ratings are observed.
2. The input and output positive-voltaup to 4.6 V if the input and output
clamp-current ratings are observ
3. The maximum power dissipation temperature of 150°C and board
trace length of 750 mils.
Recommended Opera
Item
Min
2.3
0
Max
3.6
VCC
VCC
–6
Unit
V
Conditions
Supply voltage
Input voltage
V
Output voltage
High-level output current
VO
0
V
IOH
—
—
—
—
—
—
0
mA
VCC = 2.3 V
VCC = 2.7 V
VCC = 3.0 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3.0 V
–8
–12
6
Low-level output current
IOL
mA
8
12
Input transition rise or fall rate
Operating free-air temperature
∆t/∆v
10
ns/V
°C
Ta
–40
85
Note: Unused or floating control pins must be held high or low.
Rev.7.00, Oct.02.2003, page 4 of 15
HD74ALVCH162835
Logic Diagram
27
OE
30
CLK
28
LE
54
A1
1D
C1
3
Y1
CLK
To seventeen oth
Rev.7.00, Oct.02.2003, page 5 of 15
HD74ALVCH162835
Electrical Characteristics
Ta = –40 to 85°C
Item
Symbol VCC (V)
Min
2.3 to 2.7 1.7
2.7 to 3.6 2.0
Max
—
Unit Test Conditions
Input voltage
VIH
V
—
VIL
2.3 to 2.7
2.7 to 3.6
—
—
0.7
0.8
V
Output voltage
VOH
2.3 to 3.6 VCC–0.2 —
V
IOH = –100 µA
2.3
1.9
1.7
2.4
2.0
2.0
—
—
IOH = –4 mA, VIH = 1.7 V
I6 mA, VIH = 1.7 V
A, VIH = 2.0 V
= 2.0 V
= 2.0 V
2.3
—
3.0
—
2.7
—
3.0
—
VOL
2.3 to 3.6
2.3
0.
40
—
VIL = 0.7 V
mA, VIL = 0.7 V
= 6 mA, VIL = 0.8 V
IOL = 8 mA, VIL = 0.8 V
IOL = 12 mA, VIL = 0.8 V
VIN = VCC or GND
2.3
—
3.0
2.7
3.0
Input current
IIN
3
µA
µA
µA
µA
Off state output current IOZ
Quiescent supply current I
VOUT = VCC or GND
VIN = VCC or GND
750
One input at (VCC–0.6)V,
other inputs at VCC or GND
Rev.7.00, Oct.02.2003, page 6 of 15
HD74ALVCH162835
Switching Characteristics
(Ta = –40 to 85°C)
Item
Symbol VCC (V)
Min
150
150
150
1.0
—
Typ
—
—
—
—
—
—
—
—
—
—
—
4.5
6.0
7.0
Max
—
Unit From (Input) To (Output)
Maximum clock
frequency
fmax
2.5±0.2
2.7
MHz
—
3.3±0.3
2.5±0.2
2.7
—
Propagation delay time tPLH
tPHL
5.0
5.0
4.2
5.9
5.8
5.
4.9
4.5
7.0
9.0
9.0
ns
A
Y
Y
Y
Y
Y
3.3±0.3
2.5±0.2
2.7
1.0
1.3
—
LE
3.3±0.3
2.5±0.2
2.7
1.3
1.4
—
OE
OE
3.3±0.3
2.5±0.2
2.7
1.4
1.4
Output enable time
Output disable time
tZH
tZL
ns
3.3±0.3
2.5
tHZ
tLZ
.0
Input capacitance
Output capacitance
C
pF
pF
Control inputs
Data inputs
Y ports
Rev.7.00, Oct.02.2003, page 7 of 15
HD74ALVCH162835
Switching Characteristics (cont.)
(Ta = –40 to 85°C)
Item
Symbol VCC (V)
Min
2.2
2.1
1.7
1.9
1.6
1.5
1.3
1.1
1.0
0.6
0.6
0.7
1.4
3.3
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit From (Input)
Setup time
tsu
2.5±0.2
2.7
ns
Data before CLK↑
3.3±0.3
2.5±0.2
2.7
Data before LE↑
CLK “H”
3.3±0.3
2.5±0.2
2.7
ata before LE↑
“L”
3.3±0.3
2.5±0.2
2.7
Hold time
th
ns
LK↑
3.3±0.3
2.5±0.2
2.7
ata after LE↑
CLK “H” or “L”
3.3±0.
2.5
Pulse width
tw
LE “L”
CLK “H” or “L”
Rev.7.00, Oct.02.2003, page 8 of 15
HD74ALVCH162835
Switching Characteristics (cont.)
(Ta = 0 to 85°C)
Item
Symbol VCC (V)
Min
Typ
Max
Unit FROM
(Input)
TO
(Output)
Propagation
delay time
CL=0pF *1 tPLH, tPHL 3.3±0.165 0.9
—
—
—
—
—
—
2.0
4.5
2.9
4.5
4.8
2.5
ns
A
Y
Y
CL=50pF
CL=0pF *1
3.3±0.165 1.0
3.3±0.165 1.4
3.3±0.165 1.9
3.3±0.165 1.9
CLK
CLK, A
CL=50pF
*1, 2
CL=50pF tSSO
Y
Y
Output rise /
fall time
CL=50pF tTLH, tTHL 3.3±0.165 1.0
lts/
*1
Notes: 1. This parameter is characterized but not tested.
2. tSSO : Simultaneous switching output time.
Operating Characteristics
(Ta = 25 °C)
Item
Symbo.3±0.3 V Unit Test Conditions
p
24.5
6.0
Power dissipation Outputs enable
pF CL = 0, f = 10 MHz
capacitance
Outputs dis
Rev.7.00, Oct.02.2003, page 9 of 15
HD74ALVCH162835
Test Circuit
See under table
500 Ω
S1
OPEN
GND
*1
CL
500 Ω
Load Circuit for Outputs
Vcc
Vcc=2.5±0.2V
Symbol
3
tPLH/ tPHL
OPEN
tsu / th / tw
tZH/ tHZ
tZL / tLZ
CL
G
Note:
1. CL includes probe and jig ca
Rev.7.00, Oct.02.2003, page 10 of 15
HD74ALVCH162835
Waveforms - 1
tr
tf
V
IH
90 %
Vref
90 %
Vref
Input
10 %
10 %
GND
tPHL
tPLH
VOH
Output
Vref
Vref
VOL
Wave forms – 2
t
V
IH
Timing Input
Data Input
GND
V
IH
Vref
GND
tw
V
IH
Vref
Input
GND
Rev.7.00, Oct.02.2003, page 11 of 15
HD74ALVCH162835
Wave forms – 3
tf
tr
V
IH
90 %
Vref
90 %
Vref
Output
Control
10 %
tZL
10 %
GND
tLZ
≈VOH1
Vref
Waveform - A
Waveform - B
V
ref1
VOL
VOH
tZH
tHZ
Vref
≈VOL1
Vcc=2.7V,
3.3±0.3V
C
2.7 V
2 VCC
1.5 V
OH1
VOL1
OL +0.15 V VOL +0.3 V
VOH–0.15 V VOH–0.3 V
VCC
3.0 V
GND
GND
Notes:
1. All input pulses are g the following characteristics :
PRR ≤ 10 MHz, ns. (VCC = 2.5±0.2 V)
PRR ≤ 10 MH2.5 ns. (VCC = 2.7 V, 3.3±0.3 V)
2. Waveform nal conditions such that the output is low except
when di
3. Wavh internal conditions such that the output is high except
wontrol.
4. The ne at a time with one transition per measurement.
Rev.7.00, Oct.02.2003, page 12 of 15
HD74ALVCH162835
IV Characteristics for Register Output (Measured value)
Weak condition HIGH
Vcc = 3.15 V, Ta = 85 ˚C
VOH (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
-10
-20
-30
-40
-50
-60
-70
-80
on HIGH
V, Ta = 0 ˚C
VOH (V)
1.5
2.0
2.5
3.0
3.5
-20
-40
-60
-80
-100
Rev.7.00, Oct.02.2003, page 13 of 15
HD74ALVCH162835
Weak condition LOW
Vcc = 3.15 V, Ta = 85 ˚C
80
70
60
50
40
30
20
10
0
0.0
0.5
1.0
3.0
3.5
LOW
Ta = 0 ˚C
100
60
40
20
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VOL (V)
Rev.7.00, Oct.02.2003, page 14 of 15
HD74ALVCH162835
Package Dimensions
As of January, 2003
14.0
Unit: mm
14.2 Max
56
29
1
28
0.50
0.08
*0.19 ± 0.05
M
.0
8.10 ± 0.2
0.65 Max
.1
0.10
de
TTP-56DAV
—
—
*Ni/Pd/Au plating
s (reference value)
0.23 g
Rev.7.00, Oct.02.2003, page 15 of 15
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