HD74HC595 [RENESAS]

8-bit Shift Register/Latch (with 3-state outputs); 8位移位寄存器/锁存( 3态输出)
HD74HC595
型号: HD74HC595
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

8-bit Shift Register/Latch (with 3-state outputs)
8位移位寄存器/锁存( 3态输出)

移位寄存器
文件: 总11页 (文件大小:114K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HD74HC595  
8-bit Shift Register/Latch (with 3-state outputs)  
REJ03D0634-0200  
(Previous ADE-205-514)  
Rev.2.00  
Mar 30, 2006  
Description  
This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The  
storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage  
register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading.  
Both the shift register and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks  
together, the shift register state will always be one clock pulse ahead of the storage register.  
Features  
High Speed Operation: tpd (RCK to Q) = 17 ns typ (CL = 50 pF)  
High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs)  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Ordering Information  
Package Code  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
HD74HC595P  
Package Type  
DILP-16 pin  
SOP-16 pin (JEITA)  
(Previous Code)  
PRDP0016AE-B  
(DP-16FV)  
P
PRSP0016DH-B  
(FP-16DAV)  
HD74HC595FPEL  
FP  
EL (2,000 pcs/reel)  
Note: Please consult the sales office for the above package availability.  
Function Table  
Inputs  
Function  
QA to QH high impedance  
RCK  
X
SCK  
X
SCLR  
G
H
X
X
X
X
X
X
L
Shift register cleared QH’ = L  
X
H
H
Shift register clocked Qn = Qn – 1, QA = SER  
Contents of shift register transferred to output latches  
X
Rev.2.00 Mar 30, 2006 page 1 of 10  
HD74HC595  
Pin Arrangement  
1
2
3
4
5
6
7
16  
V
Q
B
CC  
15 Q  
A
Q
C
D
Q
14  
13  
12  
11  
10  
9
SER  
G
QE  
Q
F
RCK  
SCK  
SCLR  
QG  
QH  
GND 8  
QH'  
(Top view)  
Rev.2.00 Mar 30, 2006 page 2 of 10  
HD74HC595  
Logic Diagram  
G
RCK  
SER  
Q
Q
Q
Q
Q
Q
Q
A
B
C
D
D
Q
Q
Q
Q
Q
Q
Q
Q
D
D
D
D
D
D
D
D
R
D
R
D
R
D
R
D
E
R
F
D
R
G
D
R
QH  
D
SCK  
R
SCLR  
QH'  
Rev.2.00 Mar 30, 2006 page 3 of 10  
HD74HC595  
Absolute Maximum Ratings  
Item  
Supply voltage range  
Input / Output voltage  
Input / Output diode current  
Output current  
Symbol  
VCC  
Ratings  
–0.5 to 7.0  
–0.5 to VCC +0.5  
±20  
Unit  
V
VIN, VOUT  
IIK, IOK  
IOUT  
V
mA  
mA  
mA  
mW  
°C  
±35  
VCC, GND current  
ICC or IGND  
PT  
±75  
Power dissipation  
500  
Storage temperature  
Tstg  
–65 to +150  
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of  
which may be realized at the same time.  
Recommended Operating Conditions  
Item  
Supply voltage  
Symbol  
VCC  
Ratings  
2 to 6  
Unit  
V
Conditions  
Input / Output voltage  
Operating temperature  
VIN, VOUT  
Ta  
0 to VCC  
–40 to 85  
0 to 1000  
0 to 500  
0 to 400  
V
°C  
VCC = 2.0 V  
VCC = 4.5 V  
CC = 6.0 V  
Input rise / fall time*1  
tr, tf  
ns  
V
Note: 1. This item guarantees maximum limit when one input switches.  
Waveform: Refer to test circuit of switching characteristics.  
Rev.2.00 Mar 30, 2006 page 4 of 10  
HD74HC595  
Electrical Characteristics  
Ta = 25°C  
Typ Max  
Ta = –40 to+85°C  
Item  
Symbol VCC (V)  
VIH  
Unit  
Test Conditions  
Min  
1.5  
3.15  
4.2  
Min  
1.5  
3.15  
4.2  
Max  
Input voltage  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
4.5  
6.0  
2.0  
4.5  
6.0  
4.5  
6.0  
2.0  
4.5  
6.0  
4.5  
6.0  
2.0  
4.5  
6.0  
4.5  
6.0  
6.0  
V
VIL  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
V
V
Output voltage  
VOH  
1.9  
4.4  
5.9  
4.18  
5.68  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
4.13  
5.63  
QA to QH  
IOH = –20 µA  
Vin = VIH or VIL  
IOH = –6 mA  
IOH = –7.8 mA  
IOL = 20 µA  
VOL  
VOH  
VOL  
IOZ  
0.0  
0.0  
0.0  
0.1  
0.1  
0.1  
0.26  
0.26  
0.1  
0.1  
0.1  
0.33  
0.33  
V
V
V
QA to QH  
Vin = VIH or VIL  
IOL = 6 mA  
IOL = 7.8 mA  
IOH = –20 µA  
Output voltage  
1.9  
4.4  
5.9  
4.18  
5.68  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
4.13  
5.63  
Q’H  
Vin = VIH or VIL  
IOH = –4 mA  
IOH = –5.2 mA  
IOL = 20 µA  
0.0  
0.0  
0.0  
0.1  
0.1  
0.1  
0.26  
0.26  
±0.5  
0.1  
0.1  
0.1  
0.33  
0.33  
±5.0  
Q’H  
Vin = VIH or VIL  
IOL = 4 mA  
IOL = 5.2 mA  
Off-state output  
current  
µA Vin = VIH or VIL,  
Vout = VCC or GND  
Input current  
Iin  
6.0  
6.0  
±0.1  
±1.0  
µA Vin = VCC or GND  
Quiescent supply  
current  
ICC  
4.0  
40  
µA Vin = VCC or GND, Iout = 0 µA  
Rev.2.00 Mar 30, 2006 page 5 of 10  
HD74HC595  
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)  
Ta = 25°C  
Typ Max  
Ta = –40 to +85°C  
Item  
Maximum clock  
frequency  
Symbol VCC (V)  
Unit  
Test Conditions  
Min  
100  
20  
17  
200  
40  
34  
80  
16  
14  
100  
20  
17  
5
Min  
125  
25  
21  
250  
50  
43  
100  
20  
17  
125  
25  
21  
5
Max  
4
fmax  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
12  
17  
20  
13  
15  
1
5
27  
31  
115  
23  
20  
150  
30  
26  
175  
35  
30  
150  
30  
26  
150  
30  
26  
MHz  
21  
24  
145  
29  
25  
190  
38  
33  
220  
44  
37  
190  
38  
33  
190  
38  
33  
Propagation delay  
time  
tPLH  
tPHL  
ns SCK to QH’  
tPLH  
tPHL  
ns RCK to Q  
tPLH  
ns SCLR to QH’  
Output enable  
time  
tZL  
ns  
tZH  
Output disable  
time  
tLZ  
ns  
tHZ  
Setup time  
tsu  
ns SER to SCK  
8
ns SCK to RCK  
8
Pulse width  
Removal time  
Hold time  
tw  
trem  
th  
ns  
1
ns  
ns  
5
5
5
5
5
Output rise/fall  
time  
tTLH  
tTHL  
75  
15  
13  
60  
12  
10  
10  
95  
19  
16  
75  
15  
13  
5
ns QH’  
4
ns  
Q
5
Input capacitance  
Cin  
pF  
Rev.2.00 Mar 30, 2006 page 6 of 10  
HD74HC595  
Test Circuit  
VCC  
VCC  
Output  
1 kΩ  
G
OPEN  
GND  
VCC  
QA to QH  
or  
Input  
S1  
RCK  
SER  
SCK  
SCLR  
QH'  
CL =  
50 pF  
Pulse Generator  
Zout  
= 50  
Input  
TEST  
S1  
Pulse Generator  
Zout  
tPLH/ tPHL  
tZH/ tHZ  
tZL / tLZ  
OPEN  
= 50  
GND  
VCC  
Note : 1. CL includes probe and jig capacitance.  
Waveforms  
Waveform – 1 (SCK to QH')  
t
f
t
r
VCC  
90 %  
Input SCK  
50 % 50 %  
50 %  
10 %  
10 %  
t (L)  
0 V  
t (H)  
w
w
tPLH  
tPHL  
90 %  
VOH  
90 %  
Output QH'  
50 %  
10 %  
50 %  
10 %  
VOL  
tTLH  
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns  
Waveform – 2 (RCK to Q)  
tTHL  
tr  
VCC  
0 V  
90 %  
50 %  
Input RCK  
10 %  
tPLH/tPHL  
VOH  
90 %  
90 %  
10 %  
Output  
to QH  
50 %  
10 %  
Q
A
VOL  
tTLH/tTHL  
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns  
Rev.2.00 Mar 30, 2006 page 7 of 10  
HD74HC595  
Waveform – 3 (SCLR to QH')  
t
f
t
r
VCC  
0 V  
90 %  
90 %  
50 %  
Input SCLR  
50 %  
10 %  
tPHL  
90 %  
10 %  
t
w
VOH  
Output QH'  
Input SCK  
50 %  
10 %  
VOL  
tTHL  
trem  
VCC  
90 %  
50 %  
10 %  
0 V  
tTLH  
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns  
Waveform – 4 (SER to SCK)  
t /t  
t /t  
r f  
r f  
VCC  
0 V  
90 %  
90 %  
50 %  
10 %  
90 %  
50 %  
10 %  
90 %  
Input SER  
50 %  
10 %  
50 %  
10 %  
tsu  
th  
VCC  
0 V  
90 %  
Input SCK  
50 %  
10 %  
tr  
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns  
Rev.2.00 Mar 30, 2006 page 8 of 10  
HD74HC595  
Waveform – 5 (SCK to RCK)  
tr  
tf  
VCC  
0 V  
90 %  
90 %  
Input SCK  
50 %  
10 %  
10 %  
tsu  
tw  
VCC  
0 V  
90 %  
Input RCK  
50 %  
10 %  
50 %  
10 %  
tr  
tf  
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns  
Waveform – 6 (tZL, tZH, tLZ, tHZ  
)
tf  
tr  
VCC  
90 %  
50 %  
90 %  
50 %  
Input G  
10 %  
10 %  
0 V  
tZL  
tLZ  
VOH  
50 %  
tZH  
Waveform - A  
Waveform - B  
10 %  
tHZ  
VOL  
VOH  
90 %  
50 %  
VOL  
Notes : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns  
2. Waveform - A is for an output with internal conditions such that the  
output is low except when disabled by the output control.  
3. Waveform - B is for an output with internal conditions such that the  
output is high except when disabled by the output control.  
4. The output are measured one at a time with one transition per measurement.  
Rev.2.00 Mar 30, 2006 page 9 of 10  
HD74HC595  
Package Dimensions  
JEITA Package Code  
P-DIP16-6.3x19.2-2.54  
RENESAS Code  
PRDP0016AE-B  
Previous Code  
DP-16FV  
MASS[Typ.]  
1.05g  
D
16  
9
1
8
b 3  
0.89  
Z
Dimension in Millimeters  
Min Nom Max  
7.62  
Reference  
Symbol  
e1  
D
E
19.2 20.32  
6.3 7.4  
5.06  
bp  
e
c
A
e 1  
A1  
bp  
b3  
c
0.51  
0.40 0.48 0.56  
1.30  
0.19 0.25 0.31  
( Ni/Pd/Au plating )  
θ
0° 15°  
2.29 2.54 2.79  
e
Z
1.12  
2.54  
L
JEITA Package Code  
RENESAS Code  
PRSP0016DH-B  
Previous Code  
FP-16DAV  
MASS[Typ.]  
0.24g  
P-SOP16-5.5x10.06-1.27  
*1  
D
F
NOTE)  
1. DIMENSIONS"*1 (Nom)"AND"*2"  
DO NOT INCLUDE MOLD FLASH.  
2. DIMENSION"*3"DOES NOT  
INCLUDE TRIM OFFSET.  
16  
9
bp  
Index mark  
Terminal cross section  
( Ni/Pd/Au plating )  
1
8
bp  
*3  
e
Dimension in Millimeters  
Reference  
Symbol  
Z
x
M
Min Nom Max  
L1  
D
E
10.06 10.5  
5.50  
A2  
A1  
A
bp  
b1  
c
0.00 0.10 0.20  
2.20  
0.34 0.40 0.46  
y
L
0.15 0.20 0.25  
c1  
θ
Detail F  
0° 8°  
7.50 7.80 8.00  
HE  
e
x
1.27  
0.12  
0.15  
y
Z
L
L1  
0.80  
0.50 0.70 0.90  
1.15  
Rev.2.00 Mar 30, 2006 page 10 of 10  
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