HD74HC640FPEL [RENESAS]

Octal Bus Transceivers (with 3-state outputs); 八路总线收发器( 3态输出)
HD74HC640FPEL
型号: HD74HC640FPEL
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

Octal Bus Transceivers (with 3-state outputs)
八路总线收发器( 3态输出)

总线收发器
文件: 总11页 (文件大小:140K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HD74HC640, HD74HC643  
Octal Bus Transceivers (with 3-state outputs)  
REJ03D0637-0200  
(Previous ADE-205-517)  
Rev.2.00  
Mar 30, 2006  
Description  
Each device has an active enable G and a direction control input, DIR. When DIR is high, data flows from the A inputs  
to the B outputs. When DIR is low, data flows from the B inputs to the A outputs. The HD74HC640 transfers inverted  
data from one bus to other and the HD74HC643 transfers inverted data from the A bus to the B bus and true data from  
the B bus to the A bus.  
Features  
High Speed Operation: tpd = 12 ns typ (CL = 50 pF)  
High Output Current: Fanout of 15 LSTTL Loads  
Wide Operating Voltage: VCC = 2 to 6 V  
Low Input Current: 1 µA max  
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
HD74HC640P  
Package Type  
DILP-20 pin  
PRDP0020AC-B  
(DP-20NEV)  
P
PRSP0020DD-B  
(FP-20DAV)  
HD74HC640FPEL SOP-20 pin (JEITA)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
HD74HC640RPEL  
SOP-20 pin (JEDEC)  
HD74HC643RPEL  
PRSP0020DC-A  
(FP-20DBV)  
Note: Please consult the sales office for the above package availability.  
Function Table  
Control Inputs  
Operation  
G
DIR  
L
HD74HC640  
B data to A bus  
A data to B bus  
Isolation  
HD74HC643  
B data to A bus  
A data to B bus  
Isolation  
L
L
H
H
X
H : high level  
L
:
:
low level  
irrelevant  
X
Rev.2.00 Mar 30, 2006 page 1 of 10  
HD74HC640, HD74HC643  
Pin Arrangement  
HD74HC640  
1
2
20  
19  
18  
DIR  
VCC  
A
1
2
Enable G  
A
3
B
1
2
3
4
17 B  
16 B  
15 B  
A
3
4
4
A
5
A5  
A6  
A7  
A8  
6
7
14  
13  
12  
11  
B
B
B
B
5
6
7
8
9
GND  
10  
8
(Top View)  
HD74HC643  
1
2
20  
19  
18  
DIR  
V
CC  
A
1
2
Enable G  
A
3
B
1
2
3
4
17 B  
16 B  
15 B  
A
3
4
4
A
5
A5  
A6  
A7  
A8  
6
7
14  
13  
12  
11  
B
B
B
B
5
6
7
8
9
GND  
10  
8
(Top View)  
Rev.2.00 Mar 30, 2006 page 2 of 10  
HD74HC640, HD74HC643  
Logic Diagram  
HD74HC640  
G
DIR  
VCC  
A
B
VCC  
To 7 Other  
Inverters  
To 7 Other  
Inverters  
HD74HC643  
G
DIR  
VCC  
A
B
VCC  
To 7 Other  
Inverters  
To 7 Other  
Inverters  
Rev.2.00 Mar 30, 2006 page 3 of 10  
HD74HC640, HD74HC643  
Absolute Maximum Ratings  
Item  
Supply voltage range  
Input / Output voltage  
Input / Output diode current  
Output current  
Symbol  
VCC  
Ratings  
–0.5 to 7.0  
–0.5 to VCC +0.5  
±20  
Unit  
V
VIN, VOUT  
IIK, IOK  
IO  
V
mA  
mA  
mA  
mW  
°C  
±35  
VCC, GND current  
ICC or IGND  
PT  
±75  
Power dissipation  
500  
Storage temperature  
Tstg  
–65 to +150  
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of  
which may be realized at the same time.  
Recommended Operating Conditions  
Item  
Supply voltage  
Symbol  
VCC  
Ratings  
2 to 6  
Unit  
V
Conditions  
Input / Output voltage  
Operating temperature  
VIN, VOUT  
Ta  
0 to VCC  
–40 to 85  
0 to 1000  
0 to 500  
0 to 400  
V
°C  
VCC = 2.0 V  
VCC = 4.5 V  
Input rise / fall time*1  
tr, tf  
ns  
VCC = 6.0 V  
Note: 1. This item guarantees maximum limit when one input switches.  
Waveform: Refer to test circuit of switching characteristics.  
Electrical Characteristics  
Ta = 25°C  
Typ Max  
Ta = –40 to+85°C  
Item  
Symbol VCC (V)  
VIH  
Unit  
Test Conditions  
Min  
1.5  
3.15  
4.2  
Min  
1.5  
3.15  
4.2  
Max  
Input voltage  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
4.5  
6.0  
2.0  
4.5  
6.0  
4.5  
6.0  
6.0  
V
VIL  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
V
V
Output voltage  
VOH  
1.9  
4.4  
5.9  
4.18  
5.68  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
4.13  
5.63  
Vin = VIH or VIL IOH = –20 µA  
IOH = –6 mA  
IOH = –7.8 mA  
VOL  
0.0  
0.0  
0.0  
0.1  
0.1  
0.1  
0.26  
0.26  
±0.5  
0.1  
0.1  
0.1  
0.33  
0.33  
±5.0  
V
Vin = VIH or VIL IOL = 20 µA  
IOL = 6 mA  
IOL = 7.8 mA  
Off-state output  
current  
IOZ  
µA Vin = VIH or VIL,  
Vout = VCC or GND  
Input current  
Iin  
6.0  
6.0  
±0.1  
±1.0  
µA Vin = VCC or GND  
Quiescent supply  
current  
ICC  
4.0  
40  
µA Vin = VCC or GND, Iout = 0 µA  
Rev.2.00 Mar 30, 2006 page 4 of 10  
HD74HC640, HD74HC643  
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)  
Ta = 25°C  
Typ Max  
Ta = –40 to +85°C  
Item  
Propagation delay  
time  
Symbol VCC (V)  
Unit  
Test Conditions  
Min  
Min  
Max  
115  
23  
tPHL  
tPLH  
tZL  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
2.0  
4.5  
6.0  
12  
12  
15  
15  
17  
17  
4
90  
18  
ns  
15  
20  
90  
115  
23  
ns  
ns  
ns  
ns  
ns  
ns  
pF  
18  
15  
20  
Output enable  
time  
230  
46  
290  
58  
39  
49  
tZH  
230  
46  
290  
58  
39  
49  
Output disable  
time  
tLZ  
215  
43  
270  
54  
37  
46  
tHZ  
215  
43  
270  
54  
37  
46  
Output rise/fall  
time  
tTLH  
tTHL  
60  
75  
12  
15  
5
10  
13  
Input capacitance  
Cin  
10  
10  
Test Circuit  
HD74HC640  
VCC  
VCC  
G
Input  
Input  
Output  
Pulse Generator  
Zout  
S1  
= 50  
A1  
B1  
1 kΩ  
OPEN  
GND  
VCC  
S2  
Pulse Generator  
Zout  
CL =  
50 pF  
= 50  
DIR  
TEST  
S2  
tPLH/ tPHL  
tZH/ tHZ  
tZL / tLZ  
OPEN  
GND  
VCC  
Notes : 1. CL includes probe and jig capacitance.  
2. A2–B2, A3–B3, A4–B4, A5–B5, A6–B6, A7–B7, A8–B8 are identical to above load circuit.  
3. S1 is a input / output swich.  
Rev.2.00 Mar 30, 2006 page 5 of 10  
HD74HC640, HD74HC643  
HD74HC643  
VCC  
VCC  
G
Input  
Input  
Output  
Pulse Generator  
Zout  
S1  
= 50  
A1  
B1  
1 kΩ  
OPEN  
GND  
VCC  
S2  
Pulse Generator  
Zout  
CL =  
50 pF  
= 50  
DIR  
TEST  
tPLH/ tPHL  
tZH/ tHZ  
tZL / tLZ  
S2  
OPEN  
GND  
VCC  
Notes : 1. CL includes probe and jig capacitance.  
2. A2–B2, A3–B3, A4–B4, A5–B5, A6–B6, A7–B7, A8–B8 are identical to above load circuit.  
3. S1 is a input / output swich.  
Rev.2.00 Mar 30, 2006 page 6 of 10  
HD74HC640, HD74HC643  
Waveforms  
HD74HC640  
• Waveform – 1  
Input A  
tr  
tf  
VCC  
0 V  
90 %  
50 %  
90 %  
50 %  
10 %  
10 %  
tPLH  
tPHL  
VOH  
90 %  
90 %  
Output B  
50 %  
10 %  
50 %  
10 %  
VOL  
tTLH  
tTHL  
Waveform – 2  
tf  
tr  
VCC  
0 V  
90 %  
90 %  
50 %  
50 %  
10 %  
tZL  
Input G  
10 %  
tLZ  
VOH  
VOL  
VOH  
VOL  
50 %  
Waveform - A  
Waveform - B  
10 %  
tZH  
tHZ  
90 %  
50 %  
Notes : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns  
2. Waveform - A is for an output with internal conditions such that the  
output is low except when disabled by the output control.  
3. Waveform - B is for an output with internal conditions such that the  
output is high except when disabled by the output control.  
4. The output are measured one at a time with one transition per measurement.  
Rev.2.00 Mar 30, 2006 page 7 of 10  
HD74HC640, HD74HC643  
HD74HC643  
Waveform – 1  
Input B  
tr  
tf  
VCC  
0 V  
90 %  
50 %  
90 %  
50 %  
10 %  
10 %  
tPHL  
tPLH  
VOH  
90 %  
90 %  
Output A  
50 %  
10 %  
50 %  
10 %  
VOL  
tTLH  
tTHL  
Waveform – 2  
tf  
tr  
VCC  
0 V  
90 %  
50 %  
90 %  
50 %  
Input G  
10 %  
10 %  
tZL  
tLZ  
VOH  
VOL  
VOH  
VOL  
50 %  
Waveform - A  
Waveform - B  
10 %  
90 %  
tZH  
tHZ  
50 %  
Notes : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns  
2. Waveform - A is for an output with internal conditions such that the  
output is low except when disabled by the output control.  
3. Waveform - B is for an output with internal conditions such that the  
output is high except when disabled by the output control.  
4. The output are measured one at a time with one transition per measurement.  
Rev.2.00 Mar 30, 2006 page 8 of 10  
HD74HC640, HD74HC643  
Package Dimensions  
JEITA Package Code  
P-DIP20-6.3x24.5-2.54  
RENESAS Code  
Previous Code  
DP-20NEV  
MASS[Typ.]  
1.26g  
PRDP0020AC-B  
D
20  
11  
1
10  
b 3  
0.89  
Z
Dimension in Millimeters  
Min Nom Max  
7.62  
Reference  
Symbol  
e1  
D
E
A
A1  
bp  
b3  
c
24.50 25.40  
6.30 7.00  
5.08  
bp  
e
c
0.51  
e1  
0.40 0.48 0.56  
1.30  
0.19 0.25 0.31  
( Ni/Pd/Au plating )  
θ
0° 15°  
2.29 2.54 2.79  
e
Z
1.27  
2.54  
L
JEITA Package Code  
RENESAS Code  
PRSP0020DD-B  
Previous Code  
FP-20DAV  
MASS[Typ.]  
0.31g  
P-SOP20-5.5x12.6-1.27  
*1  
D
F
NOTE)  
1. DIMENSIONS"*1 (Nom)"AND"*2"  
DO NOT INCLUDE MOLD FLASH.  
2. DIMENSION"*3"DOES NOT  
INCLUDE TRIM OFFSET.  
20  
11  
bp  
Index mark  
Terminal cross section  
( Ni/Pd/Au plating )  
1
10  
x
Dimension in Millimeters  
Reference  
Symbol  
*3  
e
bp  
Z
M
Min Nom Max  
D
L1  
12.60 13.0  
5.50  
E
A2  
A1  
A
bp  
b1  
c
0.00 0.10 0.20  
2.20  
0.34 0.40 0.46  
0.15 0.20 0.25  
y
L
c1  
θ
0° 8°  
7.50 7.80 8.00  
Detail F  
HE  
e
x
1.27  
0.12  
0.15  
y
Z
L
L1  
0.80  
0.50 0.70 0.90  
1.15  
Rev.2.00 Mar 30, 2006 page 9 of 10  
HD74HC640, HD74HC643  
JEITA Package Code  
RENESAS Code  
Previous Code  
FP-20DBV  
MASS[Typ.]  
0.52g  
P-SOP20-7.5x12.8-1.27  
PRSP0020DC-A  
*1  
D
F
NOTE)  
20  
11  
1. DIMENSIONS"*1 (Nom)"AND"*2"  
@ DO NOT INCLUDE MOLD FLASH.  
2. DIMENSION"*3"DOES NOT  
@ INCLUDE TRIM OFFSET.  
bp  
Index mark  
Terminal cross section  
( Ni/Pd/Au plating )  
Dimension in Millimeters  
Reference  
Symbol  
Min Nom Max  
1
10  
x
D
E
12.80 13.2  
7.50  
*3  
e
bp  
Z
M
L1  
A2  
A1  
A
bp  
b1  
c
0.10 0.20 0.30  
2.65  
0.34 0.40 0.46  
0.20 0.25 0.30  
c1  
θ
0° 8°  
10.00 10.40 10.65  
L
y
HE  
e
x
1.27  
0.12  
0.15  
Detail F  
y
Z
L
L1  
0.935  
0.40 0.70 1.27  
1.45  
Rev.2.00 Mar 30, 2006 page 10 of 10  
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