HD74LV06ATELL-E [RENESAS]
LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14, TSSOP-14;型号: | HD74LV06ATELL-E |
厂家: | RENESAS TECHNOLOGY CORP |
描述: | LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, PDSO14, TSSOP-14 驱动器 |
文件: | 总8页 (文件大小:93K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HD74LV06A
Hex Inverter Buffers / Drivers with Open Drain Outputs
REJ03D0230–0600
Rev.6.00
Dec 23, 2005
Description
The HD74LV06A has six inverter buffers / drivers with open drain outputs in a 14-pin package.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
Features
•
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
All outputs VO (Max.) = 5.5 V (@VCC = 2.0 V to 5.5 V, Output “Z” state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V)
Ordering Information
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
Part Name
Package Type
HD74LV06AFPEL
HD74LV06ARPEL
HD74LV06ATELL
SOP–14 pin (JEITA)
PRSP0014DF-B
(FP–14DAV)
FP
RP
T
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
SOP–14 pin (JEDEC)
TSSOP–14 pin
PRSP0014DE-A
(FP–14DNV)
PTSP0014JA-B
(TTP–14DV)
Note: Please consult the sales office for the above package availability.
Function Table
Input A
Output Y
L
H
Z
L
Note: H: High level
L: Low level
Z: High impedance
Rev.6.00 Dec 23, 2005 page 1 of 7
HD74LV06A
Pin Arrangement
1A
1Y
VCC
14
1
2
3
4
5
6
7
13 6A
2A
6Y
12
2Y
5A
11
3A
5Y
10
3Y
4A
4Y
9
8
GND
(Top view)
Absolute Maximum Ratings
Item
Symbol
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
Unit
V
Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
VCC
VI
V
VO
V
Output: L
VCC: OFF Output: Z
VI < 0
Input clamp current
IIK
IOK
mA
mA
mA
mA
Output clamp current
Continuous output current
±50
VO < 0
IO
±35
VO = 0 to VCC
Continuous current through
VCC or GND
ICC or IGND
±50
Maximum power dissipation at
Ta = 25°C (in still air)*3
PT
785
500
mW
SOP
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 7.0 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.6.00 Dec 23, 2005 page 2 of 7
HD74LV06A
Recommended Operating Conditions
Item
Supply voltage range
Input voltage range
Output voltage range
Output current
Symbol
VCC
VI
Min
2.0
0
Max
5.5
5.5
5.5
50
Unit
V
Conditions
V
VO
0
V
IOL
—
—
—
—
0
µA
mA
VCC = 2.0 V
2
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
8
16
Input transition rise or fall rate
Operating free-air temperature
∆t / ∆v
200
100
20
ns/V
°C
0
0
Ta
–40
85
Note: Unused or floating inputs must be held high or low.
Logic Diagram
A
Y
DC Electrical Characteristics
Ta = –40 to 85°C
Item
Symbol
VCC (V)*
2.0
Min
1.5
Typ
Max
Unit
V
Test Conditions
Input voltage
VIH
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
V
V
V
CC × 0.7
CC × 0.7
CC × 0.7
—
—
—
VIL
0.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Min to Max
2.3
—
V
V
V
CC × 0.3
CC × 0.3
CC × 0.3
0.1
—
—
Output voltage
Input current
VOL
—
V
IOL = 50 µA
—
0.4
IOL = 2 mA
IOL = 8 mA
IOL = 16 mA
3.0
—
0.44
0.55
±1
4.5
—
IIN
0 to 5.5
Min to Max
—
µA
µA
VIN = 5.5 V or GND
VO = 5.5 V
Off state output
current
IOZ
—
±2.5
Quiescent supply
current
ICC
IOFF
CIN
5.5
0
—
—
—
—
—
20
5
µA
µA
pF
VIN = VCC or GND, IO = 0
VI or VO = 0 to 5.5 V
VI = VCC or GND
Output leakage
current
Input capacitance
3.3
2.3
—
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.6.00 Dec 23, 2005 page 3 of 7
HD74LV06A
Switching Characteristics
VCC = 2.5 ± 0.2 V
Ta = 25°C
Ta = –40 to 85°C
Test
Conditions
FROM
(Input)
TO
(Output)
Item
Symbol
Unit
Min Typ Max
Min
1.0
1.0
1.0
1.0
Max
13.0
18.0
13.0
18.0
Propagation
delay time
tPLH
—
—
—
—
4.7 10.4
9.5 15.2
5.4 10.4
7.9 15.2
ns CL = 15 pF
CL = 50 pF
A
Y
tPHL
CL = 15 pF
CL = 50 pF
VCC = 3.3 ± 0.3 V
Ta = 25°C
Min Typ Max
Ta = –40 to 85°C
Test
Unit
FROM
(Input)
TO
(Output)
Item
Symbol
Conditions
Min
1.0
1.0
1.0
1.0
Max
8.5
Propagation
delay time
tPLH
—
—
—
—
4.0
7.3 10.6
4.3 7.1
5.8 10.6
7.1
ns CL = 15 pF
CL = 50 pF
A
Y
12.0
8.5
tPHL
CL = 15 pF
12.0
CL = 50 pF
VCC = 5.0 ± 0.5 V
Ta = 25°C
Min Typ Max
Ta = –40 to 85°C
Test
Unit
FROM
(Input)
TO
(Output)
Item
Symbol
Conditions
Min
1.0
1.0
1.0
1.0
Max
6.5
8.5
6.5
8.5
Propagation
delay time
tPLH
—
—
—
—
3.3
5.6
3.4
4.1
5.5
7.5
5.5
7.5
ns CL = 15 pF
CL = 50 pF
A
Y
tPHL
CL = 15 pF
CL = 50 pF
Operating Characteristics
CL = 50 pF
VCC (V)
Ta = 25°C
Item
Symbol
Unit
Test Conditions
Min
—
Typ
9.6
Max
—
Power dissipation capacitance
CPD
3.3
5.0
pF
f = 10 MHz
—
11.4
—
Noise Characteristics
CL = 50 pF
VCC (V)
Ta = 25°C
Typ
Item
Symbol
Unit
Test Conditions
Min
Max
Quiet output, maximum
dynamic VOL
VOL (P)
3.3
3.3
3.3
3.3
—
0.3
0.8
V
Quiet output, minimum
dynamic VOL
VOL (V)
VIH (D)
VIL (D)
—
2.31
—
–0.1
—
–0.8
—
V
V
V
High-level dynamic input
voltage
Low-level dynamic input
voltage
—
0.99
Rev.6.00 Dec 23, 2005 page 4 of 7
HD74LV06A
Test Circuit
VCC
RL = 1 k
Ω
CL
*
Note: CL includes the probe and jig capacitance.
• Waveform − 1
t
r
t
f
VCC
0 V
90%
50% VCC
90%
50% VCC
Input
10%
10%
tPHL
tPLH
VOH
50% VCC
VOL + 0.3 V
Output
VOL
Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω,
t
≤ 3 ns,
t
≤ 3 ns
r
f
2. The output are measured one at a time with one transition per measurement.
Rev.6.00 Dec 23, 2005 page 5 of 7
HD74LV06A
Package Dimensions
JEITA Package Code
RENESAS Code
Previous Code
FP-14DNV
MASS[Typ.]
0.13g
P-SOP14-3.95x8.65-1.27
PRSP0014DE-A
*1
F
NOTE)
D
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
14
8
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
Dimension in Millimeters
Reference
Symbol
Min Nom Max
1
7
D
E
8.65 9.05
3.95
*3
e
bp
Z
x
M
A2
A1
A
bp
b1
c
L 1
0.10 0.14 0.25
1.75
0.34 0.40 0.46
0.15 0.20 0.25
c1
θ
L
0° 8°
5.80 6.10 6.20
y
HE
e
x
Detail F
1.27
0.25
0.15
y
Z
L
L1
0.635
0.40 0.60 1.27
1.08
JEITA Package Code
RENESAS Code
PRSP0014DF-B
Previous Code
FP-14DAV
MASS[Typ.]
0.23g
P-SOP14-5.5x10.06-1.27
*1
D
F
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
14
8
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
1
7
bp
*3
e
Z
Dimension in Millimeters
Reference
Symbol
x
M
Min Nom Max
L1
D
E
10.06 10.5
5.50
A2
A1
A
bp
b1
c
0.00 0.10 0.20
2.20
0.34 0.40 0.46
L
y
0.15 0.20 0.25
c1
θ
Detail F
0° 8°
7.50 7.80 8.00
HE
e
x
1.27
0.12
0.15
y
Z
L
L1
1.42
0.50 0.70 0.90
1.15
Rev.6.00 Dec 23, 2005 page 6 of 7
HD74LV06A
JEITA Package Code
RENESAS Code
PTSP0014JA-B
Previous Code
TTP-14DV
MASS[Typ.]
0.05g
P-TSSOP14-4.4x5-0.65
*1
D
F
14
8
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
b p
Index mark
Terminal cross section
( Ni/Pd/Au plating )
Dimension in Millimeters
Reference
Symbol
1
7
Min Nom Max
D
*3
5.00 5.30
4.40
bp
Z
x
M
E
A2
A1
A
bp
b1
c
L1
e
0.03 0.07 0.10
1.10
0.15 0.20 0.25
0.10 0.15 0.20
c1
θ
L
0° 8°
6.20 6.40 6.60
y
HE
e
x
Detail F
0.65
0.13
0.10
y
Z
L
L1
0.83
0.4 0.5 0.6
1.0
Rev.6.00 Dec 23, 2005 page 7 of 7
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