HD74LV132ATELL [RENESAS]

Quad. 2-input NAND Schmitt-triggers; 四。二输入NAND施密特触发器
HD74LV132ATELL
型号: HD74LV132ATELL
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

Quad. 2-input NAND Schmitt-triggers
四。二输入NAND施密特触发器

触发器
文件: 总9页 (文件大小:68K)
中文:  中文翻译
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HD74LV132A  
Quad. 2-input NAND Schmitt-triggers  
REJ03D0317–0300Z  
(Previous ADE-205-260A (Z))  
Rev.3.00  
Jun. 03, 2004  
Description  
The HD74LV132A has four two-input schmitt trigger NAND gates in a 14-pin package.  
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the  
low-power consumption extends the battery life.  
Features  
VCC = 2.0 V to 5.5 V operation  
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)  
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)  
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)  
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)  
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)  
Ordering Information  
Part Name  
Package Type  
Package Code  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
HD74LV132AFPEL  
HD74LV132ARPEL  
HD74LV132ATELL  
SOP–14 pin(JEITA)  
SOP–14 pin(JEDEC)  
TSSOP–14 pin  
FP–14DAV  
FP–14DNV  
TTP–14DV  
FP  
RP  
T
EL (2,000 pcs/reel)  
EL (2,500 pcs/reel)  
ELL (2,000 pcs/reel)  
Note: Please consult the sales office for the above package availability.  
Function Table  
Inputs  
Output Y  
A
B
H
X
L
H
L
L
H
H
X
Note: H: High level  
L: Low level  
X: Immaterial  
Rev.3.00 Jun. 03, 2004 page 1 of 8  
HD74LV132A  
Pin Arrangement  
VCC  
4B  
1
2
3
4
5
6
7
14  
13  
12  
1A  
1B  
1Y  
4A  
11 4Y  
10 3B  
2A  
2B  
3A  
3Y  
2Y  
9
8
GND  
(Top view)  
Absolute Maximum Ratings  
Item  
Symbol  
VCC  
Ratings  
Unit  
Conditions  
Supply voltage range  
Input voltage range*1  
Output voltage range*1, 2  
–0.5 to 7.0  
–0.5 to 7.0  
–0.5 to VCC + 0.5  
–0.5 to 7.0  
–20  
V
V
V
VI  
VO  
Output: H or L  
VCC: OFF  
Input clamp current  
IIK  
IOK  
IO  
mA  
mA  
mA  
mA  
VI < 0  
Output clamp current  
±50  
VO < 0 or VO > VCC  
VO = 0 to VCC  
Continuous output current  
Continuous current through  
±25  
ICC or IGND  
±50  
VCC or GND  
Maximum power dissipation at PT  
Ta = 25°C (in still air)*3  
785  
mW  
SOP  
500  
TSSOP  
Storage temperature  
Tstg  
–65 to 150  
°C  
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of  
which may be realized at the same time.  
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are  
observed.  
2. This value is limited to 5.5 V maximum.  
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.  
Rev.3.00 Jun. 03, 2004 page 2 of 8  
HD74LV132A  
Recommended Operating Conditions  
Item  
Symbol  
VCC  
VI  
Min  
2.0  
0
Max  
5.5  
5.5  
VCC  
–50  
–2  
Unit  
V
Conditions  
Supply voltage range  
Input voltage range  
Output voltage range  
Output current  
V
VO  
0
V
IOH  
–40  
µA  
mA  
VCC = 2.0 V  
VCC = 2.3 to 2.7 V  
VCC = 3.0 to 3.6 V  
VCC = 4.5 to 5.5 V  
VCC = 2.0 V  
–6  
–12  
50  
IOL  
µA  
2
mA  
VCC = 2.3 to 2.7 V  
VCC = 3.0 to 3.6 V  
VCC = 4.5 to 5.5 V  
6
12  
Operating free-air temperature  
Ta  
85  
°C  
Note: Unused or floating inputs must be held high or low.  
Logic Diagram  
A
B
Y
Rev.3.00 Jun. 03, 2004 page 3 of 8  
HD74LV132A  
DC Electrical Characteristics  
Ta = –40 to 85°C  
Unit Test Conditions  
Item  
Symbol  
V
CC (V)*  
Min  
Typ Max  
+
Input threshold  
voltage  
VT  
2.5  
1.75  
2.31  
3.5  
V
3.3  
5.0  
VT  
2.5  
0.75  
0.99  
1.5  
0.25  
0.33  
0.5  
1.5  
3.3  
5.0  
Input hysteresis  
voltage  
VH  
2.5  
1.0  
1.32  
2.0  
V
V
VT+ – VT  
3.3  
5.0  
Input voltage  
VIH  
2.0  
2.3 to 2.7  
3.0 to 3.6  
4.5 to 5.5  
2.0  
V
V
V
CC × 0.7  
CC × 0.7  
CC × 0.7  
VIL  
0.5  
2.3 to 2.7  
3.0 to 3.6  
4.5 to 5.5  
V
V
V
CC × 0.3  
CC × 0.3  
CC × 0.3  
Output voltage  
VOH  
Min to Max VCC – 0.1  
V
IOH = –50 µA  
IOH = –2 mA  
2.3  
2.0  
2.48  
3.8  
3.0  
IOH = –6 mA  
4.5  
IOH = –12 mA  
IOL = 50 µA  
VOL  
Min to Max  
2.3  
0.1  
0.4  
0.44  
0.55  
±1  
IOL = 2 mA  
3.0  
IOL = 6 mA  
4.5  
IOL = 12 mA  
Input current  
Quiescent supply  
current  
IIN  
0 to 5.5  
5.5  
µA  
µA  
VIN = 5.5 V or GND  
VIN = VCC or GND, IO = 0  
ICC  
20  
Output leakage  
current  
IOFF  
0
5
µA  
VIN or VO = 0 V to 5.5 V  
Input capacitance  
CIN  
3.3  
1.9  
pF  
VI = VCC or GND  
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.  
Rev.3.00 Jun. 03, 2004 page 4 of 8  
HD74LV132A  
Switching Characteristics  
VCC = 2.5 ± 0.2 V  
TO  
Ta = 25°C  
Ta = –40 to 85°C  
Test  
Conditions  
FROM  
(Input)  
Item  
Symbol  
Unit  
(Output)  
Min Typ Max Min  
Max  
18.5  
23.0  
Propagation  
delay time  
tPLH  
tPHL  
7.9  
16.5 1.0  
ns  
CL = 15 pF  
CL = 50 pF  
A or B  
Y
10.8 20.2 1.0  
VCC = 3.3 ± 0.3 V  
TO  
Ta = 25°C  
Ta = –40 to 85°C  
Test  
FROM  
(Input)  
Item  
Symbol  
Unit Conditions  
(Output)  
Min Typ Max Min  
Max  
14.0  
17.5  
Propagation  
delay time  
tPLH  
tPHL  
5.6  
7.6  
11.9 1.0  
15.4 1.0  
ns  
CL = 15 pF  
CL = 50 pF  
A or B  
Y
VCC = 5.0 ± 0.5 V  
TO  
Ta = 25°C  
Ta = –40 to 85°C  
Test  
FROM  
(Input)  
Item  
Symbol  
Unit Conditions  
(Output)  
Min Typ Max Min  
Max  
9.0  
Propagation  
delay time  
tPLH  
tPHL  
3.9  
5.3  
7.7  
9.7  
1.0  
1.0  
ns  
CL = 15 pF  
CL = 50 pF  
A or B  
Y
11.0  
Operating Characteristics  
CL = 50 pF  
Ta = 25°C  
Item  
Symbol  
VCC (V)  
Unit Test Conditions  
pF f = 10 MHz  
Min  
Typ  
7.5  
Max  
Power dissipation capacitance  
CPD  
3.3  
5.0  
11.2  
Noise Characteristics  
CL = 50 pF  
Test Conditions  
Ta = 25°C  
Item  
Symbol  
VOL (P)  
VCC (V)  
Unit  
Min  
Typ  
Max  
Quiet output, maximum  
dynamic VOL  
3.3  
3.3  
3.3  
3.3  
3.3  
0.21  
0.8  
–0.8  
V
V
V
V
V
Quiet output, minimum  
dynamic VOL  
VOL (V)  
VOH (V)  
VIH (D)  
VIL (D)  
–0.09  
3.12  
Quiet output, minimum  
dynamic VOH  
High-level dynamic input  
voltage  
2.31  
Low-level dynamic inout  
voltage  
0.99  
Rev.3.00 Jun. 03, 2004 page 5 of 8  
HD74LV132A  
Test Circuit  
Measurement point  
*
C L  
Note: CL includes the probe and jig capacitance.  
Waveform 1  
tr  
tf  
VCC  
0 V  
90%  
50% VCC  
90%  
50% VCC  
Input  
10%  
10%  
tPHL  
tPLH  
VOH  
In phase output  
50% VCC  
50% VCC  
50% VCC  
tPLH  
VOL  
tPHL  
VOH  
50% VCC  
Out of phase output  
VOL  
Notes:  
1. Input waveform: PRR 1 MHz, Zo = 50 , t r3 ns, t f 3 ns  
2. The output are measured one at a time with one transition per measurement.  
Rev.3.00 Jun. 03, 2004 page 6 of 8  
HD74LV132A  
Package Dimensions  
As of January, 2003  
Unit: mm  
10.06  
10.5 Max  
8
14  
1
7
+ 0.20  
7.80  
– 0.30  
1.42 Max  
1.15  
0˚ – 8˚  
1.27  
0.70 ± 0.20  
*0.40 ± 0.06  
0.15  
M
0.12  
Package Code  
JEDEC  
FP-14DAV  
JEITA  
Mass (reference value)  
Conforms  
0.23 g  
*Ni/Pd/Au plating  
As of January, 2003  
Unit: mm  
8.65  
9.05 Max  
8
14  
1
7
+ 0.10  
6.10  
– 0.30  
0.635 Max  
1.08  
0˚ – 8˚  
+ 0.67  
1.27  
0.60  
– 0.20  
*0.40 ± 0.06  
0.15  
M
0.25  
Package Code  
JEDEC  
JEITA  
FP-14DNV  
Conforms  
Conforms  
0.13 g  
*Ni/Pd/Au plating  
Mass (reference value)  
Rev.3.00 Jun. 03, 2004 page 7 of 8  
HD74LV132A  
As of January, 2003  
Unit: mm  
5.00  
5.30 Max  
14  
8
1
7
0.65  
1.0  
*0.20 ± 0.05  
0.13 M  
6.40 ± 0.20  
0.83 Max  
0˚ – 8˚  
0.50 ± 0.10  
0.10  
Package Code  
JEDEC  
TTP-14DV  
JEITA  
*Ni/Pd/Au plating  
Mass (reference value)  
0.05 g  
Rev.3.00 Jun. 03, 2004 page 8 of 8  
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