HD74LV573A [RENESAS]
Octal D-type Transparent Latches with 3-state Outputs; 八路D型透明锁存器带3态输出![HD74LV573A](http://pdffile.icpdf.com/pdf1/p00100/img/icpdf/HD74LV573A_533213_icpdf.jpg)
型号: | HD74LV573A |
厂家: | ![]() |
描述: | Octal D-type Transparent Latches with 3-state Outputs |
文件: | 总9页 (文件大小:94K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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HD74LV573A
Octal D-type Transparent Latches with 3-state Outputs
REJ03D0519–0100
Rev.1.00
Feb. 01, 2005
Description
The HD74LV573A has eight D type latches with three state outputs in a 20 pin package. When the latch enables input
is high, the Q outputs will follow the D inputs. When the latch enables goes low, data at the D inputs will be retained at
the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all
outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the
storage elements. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
•
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V)
Ordering Information
Part Name
Package Type
SOP–20 pin (JEITA)
TSSOP–20 pin
Package Code
Package
Taping Abbreviation
(Quantity)
(Previous Code)
Abbreviation
HD74LV573AFPEL
HD74LV573ATELL
PRSP0020DD–B
(FP–20DAV)
FP
EL (2,000 pcs/reel)
PTSP0020JB–A
(TTP–20DAV)
T
ELL (2,000 pcs/reel)
Function Table
Inputs
Output Q
OE
H
LE
X
D
X
L
Z
L
L
H
H
L
L
L
H
X
H
Q0
Note: H: High level
L: Low level
X: Immaterial
Z: High impedance
Q0: Output level before the indicated steady state input conditions were established.
Rev.1.00 Feb.01.2005 page 1 of 8
HD74LV573A
Pin Arrangement
20 VCC
19 1Q
18 2Q
OE 1
D
D
D
D
D
D
D
D
Q
Q
Q
Q
Q
Q
Q
Q
2
3
1D
2D
3D
4D
5D
6D
7D
4
3Q
4Q
5Q
17
16
15
5
6
7
14 6Q
8
13
7Q
9
12
11
8D
8Q
LE
GND
10
(Top view)
Absolute Maximum Ratings
Item
Symbol
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
Unit
V
Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
VCC
VI
V
VO
V
Output: H or L
CC: OFF or Output: Z
V
Input clamp current
IIK
IOK
IO
mA
mA
mA
mA
VI < 0
Output clamp current
Continuous output current
±50
VO < 0 or VO > VCC
VO = 0 to VCC
±35
Continuous current through
VCC or GND
I
CC or IGND
±70
Maximum power dissipation at
Ta = 25°C (in still air)*3
PT
835
757
mW
SOP
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.1.00 Feb.01.2005 page 2 of 8
HD74LV573A
Recommended Operating Conditions
Item
Supply voltage range
Input voltage range
Output voltage range
Symbol
VCC
Min
2.0
0
Max
5.5
5.5
VCC
5.5
–50
–2
Unit
V
Conditions
VI
V
VO
0
V
H or L
0
High impedance state
VCC = 2.0 V
Output current
IOH
—
—
—
—
—
—
—
—
0
µA
mA
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
–8
–16
50
VCC = 4.5 to 5.5 V
IOL
µA
VCC = 2.0 V
2
mA
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
8
16
VCC = 4.5 to 5.5 V
Input transition rise or fall rate
Operating free-air temperature
∆t /∆v
200
100
20
ns/V
°C
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
0
0
VCC = 4.5 to 5.5 V
Ta
–40
85
Note: Unused or floating inputs must be held high or low.
DC Electrical Characteristics
Ta = –40 to 85°C
Item
Symbol
VCC (V)*
2.0
Min
1.5
Typ
Max
—
Unit
V
Test Conditions
Input voltage
VIH
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
V
V
V
CC × 0.7
CC × 0.7
CC × 0.7
—
—
—
—
VIL
VOH
VOL
0.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Min to Max
2.3
—
V
V
V
CC × 0.3
CC × 0.3
CC × 0.3
—
—
—
Output voltage
VCC – 0.1
2.0
2.48
3.8
—
V
IOH = –50 µA
IOH = –2 mA
IOH = –8 mA
—
3.0
—
4.5
—
IOH = –16 mA
Min to Max
2.3
0.1
IOL = 50 µA
IOL = 2 mA
IOL = 8 mA
—
0.4
3.0
—
0.44
0.55
±1
4.5
—
IOL = 16 mA
Input current
IIN
0 to 5.5
5.5
—
µA VIN = 5.5 V or GND
µA VO = VCC or GND
Off-state output
current
IOZ
—
±5
Quiescent supply
current
ICC
IOFF
CIN
5.5
0
—
—
—
—
—
20
5
µA VIN = VCC or GND, IO = 0
µA VI or VO = 0 to 5.5 V
pF VI = VCC or GND
Output leakage
current
Input capacitance
3.3
2.9
—
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.1.00 Feb.01.2005 page 3 of 8
HD74LV573A
Switching Characteristics
VCC = 2.5 ± 0.2 V
Ta = 25°C
Ta = –40 to 85°C
Test
Conditions
CL = 15 pF
FROM
TO
Item
Symbol
Unit
(Input) (Output)
Min Typ Max
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
5.0
2.0
6.5
Max
18.0
19.0
21.0
23.0
19.0
22.0
15.0
19.0
—
Propagation
delay time
tPLH
tPHL
—
—
8.3 15.8
9.1 16.2
10.4 18.7
11.1 19.1
8.9 16.2
10.9 19.0
6.2 12.6
8.3 17.3
ns
D
Q
LE
D
—
CL = 50 pF
—
LE
OE
Enable time
Disable time
tZH
tZL
—
ns
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
Q
Q
—
tHZ
tLZ
—
OE
—
Setup time
Hold time
tSU
th
5.0
2.0
6.5
—
—
—
—
—
—
ns
ns
ns
Data before LE ↓
Data after LE ↓
LE "H"
—
Pulse width
tw
—
VCC = 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
Test
FROM
(Input)
TO
Item
Symbol
Unit
Conditions
(Output)
Min Typ Max
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
3.5
1.5
5.0
Max
13.0
14.0
16.5
17.5
13.5
17.0
13.0
16.5
—
Propagation
delay time
tPLH
tPHL
—
—
5.8 11.0
6.4 11.9
7.3 14.5
7.8 15.4
6.3 11.5
7.7 15.0
4.7 11.0
6.0 14.5
ns CL = 15 pF
D
Q
LE
D
—
CL = 50 pF
—
LE
OE
Enable time
Disable time
tZH
tZL
—
ns CL = 15 pF
Q
Q
—
CL = 50 pF
tHZ
tLZ
—
ns CL = 15 pF
OE
—
CL = 50 pF
Setup time
Hold time
tSU
th
3.5
1.5
5.0
—
—
—
—
—
—
ns
ns
ns
Data before LE ↓
Data after LE ↓
LE "H"
—
Pulse width
tw
—
VCC = 5.0 ± 0.5 V
Ta = 25°C
Ta = –40 to 85°C
Test
FROM
(Input)
TO
Item
Symbol
Unit
(Output)
Conditions
Min Typ Max
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
3.5
1.5
5.0
Max
8.0
9.0
10.0
11.0
9.0
11.0
9.0
11.0
—
Propagation
delay time
tPLH
tPHL
—
—
4.1
4.5
5.1
5.5
4.5
5.5
3.3
4.0
—
6.8
7.7
8.8
9.7
7.7
9.7
7.7
9.7
—
ns
CL = 15 pF
D
Q
LE
D
—
CL = 50 pF
—
LE
OE
Enable time
Disable time
tZH
tZL
—
ns
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
Q
Q
—
tHZ
tLZ
—
OE
—
Setup time
Hold time
tSU
th
3.5
1.5
5.0
ns
ns
ns
Data before LE ↓
Data after LE ↓
LE "H"
—
—
—
Pulse width
tw
—
—
—
Rev.1.00 Feb.01.2005 page 4 of 8
HD74LV573A
Output-skew Characteristics
CL = 50 pF
Ta = 25°C
Ta = –40 to 85°C
Item
Output skew
Symbol
V
CC = (V)
Unit
Min
Max
2.0
Min
—
Max
2.0
tsk (O)
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
—
—
—
ns
1.5
—
1.5
1.0
—
1.0
Note: Skew between any outputs of the same package switching in the same direction. This parameter is warranted
but not production tested.
Operating Characteristics
CL = 50 pF
Ta = 25°C
Typ
Item
Symbol VCC = (V)
Unit
Test Conditions
Min
—
Max
—
Power dissipation capacitance
CPD
3.3
5.0
16.6
pF
f = 10 MHz
—
18.2
—
Noise Characteristics
CL = 50 pF
Ta = 25°C
Typ
Item
Symbol VCC = (V)
Unit
Test Conditions
Min
Max
Quiet output, maximum
dynamic VOL
VOL (P)
VOL (V)
VOH (V)
VIH (D)
VIL (D)
3.3
3.3
3.3
3.3
3.3
—
0.6
0.8
V
Quiet output, minimum
dynamic VOL
—
—
–0.6
2.9
—
–0.8
—
V
V
V
V
Quiet output, minimum
dynamic VOH
High-level dynamic input
voltage
2.31
—
—
Low-level dynamic input
voltage
—
0.99
Test Circuit
Output
1 kΩ
OPEN
GND
VCC
S2
CL
TEST
tPLH/tPHL
tZH/tHZ
tZL /tLZ
S2
OPEN
GND
VCC
Note: CL includes the probe and jig capacitance.
Rev.1.00 Feb.01.2005 page 5 of 8
HD74LV573A
• Waveform − 1
tr
tf
VCC
90% 90%
50%VCC
Input LE
Input D
50%VCC
10%
tf
10%
tr
GND
VCC
90%
90%
10%
10%
GND
VOH
tPHL
tPLH
Output Q
50%VCC
50%VCC
VOL
• Waveform − 2
tr
VCC
90%
10%
Input LE
GND
VCC
tr
tf
90%
50%VCC
90%
50%VCC
Input D
10%
10%
tPHL
GND
VOH
tPLH
Output Q
50%VCC
50%VCC
VOL
• Waveform − 3
tr
tf
VCC
90% 90%
50% 50%
VCC VCC
Input LE
10%
10%
th
tw
tsu
GND
VCC
Input D
50%VCC
50%VCC
GND
Rev.1.00 Feb.01.2005 page 6 of 8
HD74LV573A
• Waveform − 4
tf
tr
VCC
90%
50%VCC
10%
90%
50%VCC
10%
Input OE
GND
VCC
tZL
tLZ
50%VCC
tZH
Waveform
Waveform
−
−
A
V
OL + 0.3 V
VOL
VOH
tHZ
VOH− 0.3 V
B
50%VCC
OV
Notes:
1. tr ≤ 3 ns, tf ≤ 3 ns
2. Input waveform: PRR ≤ 1 MHZ, duty cycle 50%
3. Waveform−A is for an output with internal conditions such that the output is low except
when disabled by the output control.
4. Waveform−B is for an output with internal conditions such that the output is high except
when disabled by the output control.
Rev.1.00 Feb.01.2005 page 7 of 8
HD74LV573A
Package Dimensions
JEITA Package Code
RENESAS Code
Previous Code
FP-20DAV
MASS[Typ.]
0.31g
P-SOP20-5.5x12.6-1.27
PRSP0020DD-B
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
*1
D
F
20
11
bp
Index mark
Dimension in Millimeters
Reference
Symbol
Min
Nom
12.60
5.50
Max
13.0
Terminal cross section
( Ni/Pd/Au plating )
D
E
A 2
A 1
A
1
10
x
0.00
0.34
0.15
0.10
0.40
0.20
0.20
2.20
0.46
*3
e
bp
Z
M
L1
b p
b 1
c
0.25
c
1
q
0
°
8°
H E
e
7.50
7.80
1.27
8.00
y
x
0.12
0.15
0.80
0.90
L
y
Z
L
Detail F
0.50
0.70
1.15
L
1
JEITA Package Code
RENESAS Code
PTSP0020JB-A
Previous Code
TTP-20DAV
MASS[Typ.]
0.07g
P-TSSOP20-4.4x6.5-0.65
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
*1
D
F
20
11
b p
Dimension in Millimeters
Reference
Symbol
Min
Nom
6.50
4.40
Max
6.80
Terminal cross section
( Ni/Pd/Au plating )
D
Index mark
E
A 2
A 1
A
0.03
0.15
0.10
0.07
0.20
0.15
0.10
1.10
0.25
1
10
*3
L 1
e
bp
b1
c
bp
Z
x
M
0.20
c 1
q
0
°
8°
H E
e
6.20
6.40
0.65
6.60
x
0.13
0.10
0.65
0.6
L
y
y
Z
Detail F
L
0.4
0.5
1.0
L
1
Rev.1.00 Feb.01.2005 page 8 of 8
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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