HD74LVC374AFPEL-E [RENESAS]
LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, SOP-20;
| 型号： | HD74LVC374AFPEL-E |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, SOP-20 驱动 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总8页 (文件大小：192K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74LVC374A
Octal D-type Flip Flops with 3-state Outputs
REJ03D0355–0400Z
(Previous ADE-205-113B (Z))
Rev.4.00
Jul. 27, 2004
Description
The HD74 LVC374A has eight edge trigger D type flip flops with three state outputs in a 20 pin package. Data at the
D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock input.
When the clock input goes low, data at the D inputs will be retained at the outputs until clock input returns high again.
When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of
what signals are present at the other inputs and the state of the storage elements. Low voltage and high-speed operation
is suitable at the battery drive product (note type personal computer) and low ponsumption extends the life of a
battery for long time operation.
Features
•
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or ou
Typical VOL ground bounce < 0.8 V (@VCC = 3.
Typical VOH undershoot > 2.0 V (@VCC = 3.
High output current ±24 mA (@VCC = 3.
Ordering Information
Part Name
Package T
e
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LVC374AFPEL
HD74LVC374ATELL
SOP
T
AV
FP
T
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
–20DAV
Note: Please consult the ckage availability.
Function Table
Inputs
Output Q
G
H
CK
X
↑
D
X
L
Z
L
L
L
↑
H
X
H
Q0
L
L
H:
L:
X:
Z:
↑ :
Q0:
High level
Low level
Immaterial
High impedance
Low to high transition
Level of Q before the indicated steady input conditions were established.
Rev.4.00 Jul. 27, 2004 page 1 of 7
HD74LVC374A
Pin Arrangement
1
2
20 VCC
19 8Q
18 8D
G
1Q
1D
Q
Q
G
G
CK D
CK D
3
2D
4
17
16
15
7D
7Q
6Q
D
Q
D
Q
CK
G
CK
G
5
2Q
3Q
3D
6
Q
Q
G
G
CK D
CK D
7
14 6D
8
13
12
4D
5D
D
Q
D
Q
CK
G
CK
G
9
4Q
GND
10
(Top view)
Absolute Maximum Ratings
Item
Symbol
VCC
IIK
Ratin
nit
Conditions
Supply voltage
Input diode current
Input voltage
–
V
mA
V
VI = –0.5 V
VI
Output diode current
IOK
mA
VO = –0.5 V
VO = VCC+0.5 V
Output "H" or "L"
Output "Z" or VCC:OFF
Output voltage
0.5
0
V
Output current
mA
mA
°C
VCC, GND current / pin
Storage temperature
0
–65 to +150
Note: The absolute maximum ratvalues, which must not individually be exceeded, and furthermore, no two of
which may be realized at the me time.
Rev.4.00 Jul. 27, 2004 page 2 of 7
HD74LVC374A
Recommended Operating Conditions
Item
Symbol
Ratings
1.5 to 5.5
2.0 to 5.5
0 to 5.5
0 to VCC
0 to 5.5
–40 to 85
–12
Unit
Conditions
Supply voltage
VCC
V
Data hold
At operation
Input / output voltage
VI
V
V
G, CK, D
Output "H" or "L"
VO
Output "Z" or VCC:OFF
Operating temperature
Output current
Ta
IOH
°C
mA
VCC = 2.7 V
–24*2
VCC = 3.0 V to 5.5 V
VCC = 2.7 V
IOL
12
24*2
mA
VCC = 3.0 V to 5.5 V
Input rise / fall time *1
tr, tf
10
ns/V
Notes: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
2. Duty cycle ≤ 50%
Electrical Characteristics
Ta = –40 to
Item
Symbol
V
CC (V)
nditions
Min
Input voltage
VIH
2.7 to 3.6 2.0
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
V
CC
VIL
V
Output voltage
VOH
2.7 to
IOH = –100 µA
2.7
IOH = –12 mA
—
IOH = –24 mA
—
0.2
0.4
0.55
0.55
±5.0
±5.0
V
IOL = 100 µA
IOL = 12 mA
IOL = 24 mA
—
—
Input current
IIN
5.5
.7 to 5.5
—
µA
µA
VIN = 5.5 V or GND
VIN = VCC, GND
Off state output current
IOZ
—
V
OUT = 5.5 V or GND
Output leak current
IOFF
ICC
0
—
—
—
—
20
µA
µA
VIN / VOUT = 5.5 V
Quiescent supply current
2.7 to 3.6
2.7 to 5.5
3.0 to 3.6
±10
10
VIN / VOUT = 3.6 to 5.5 V
VIN = VCC or GND
∆ICC
500
µA
VIN = one input at(VCC–0.6)V,
other inputs at VCC or GND
Rev.4.00 Jul. 27, 2004 page 3 of 7
HD74LVC374A
Switching Characteristics
Ta = –40 to 85°C
From
To
Item
Symbol VCC (V)
Unit
(Input)
(Output)
Min
80.0
100.0
125.0
—
Typ
—
Max
Maximum clock
frequency
fmax
2.7
—
MHz
3.3±0.3
5.0±0.5
2.7
150.0
—
—
—
Propagation delay time
Output enable time
Output disable time
Setup time
tPLH
tPHL
—
9.5
8.5
7.0
9.5
8.5
7.0
8.5
7.5
6.5
—
ns
ns
ns
ns
CK
G
Q
Q
Q
3.3±0.3
5.0±0.5
2.7
1.5
—
—
—
tZH
tZL
—
—
3.3±0.3
5.0±0.5
2.7
1.5
—
—
—
tHZ
tLZ
—
—
G
3.3±0.3
5.0±0.5
2.7
1.5
—
—
—
tsu
2.0
2.0
2.0
1.5
1.5
1.5
3.3
3.3
—
3.3±0.3
5.0±0.5
2.7
—
—
—
Hold time
th
—
3.3±0.3
5.0±0.5
2.7
—
Pulse width
tw
3.3±0.3
5.0±0.5
2.7
Between output pins skew*1 tOSLH
tOSHL
3.3±0
5.
1.0
1.0
—
Input capacitance
Output capacitance
CIN
CO
5.0
pF
pF
—
Note: 1. This parameter is c
tosLH = | tPLHm - n
|
Rev.4.00 Jul. 27, 2004 page 4 of 7
HD74LVC374A
Test Circuit
VCC
VCC
Output
500Ω
450Ω
S1
G
OPEN
1Q to 8Q
*1 See under table
Input
GND
CL=
50 pF
50 Ω Scope
Pulse generator
Zout = 50 Ω
1D to 8D
Input
S1
Symbol
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
tPLH/ tPHL
tsu / th / tw
Pulse generator
OPEN
OPEN
CK
Zout = 50 Ω
tZH/ t
tZ
GND
V
GND
2×Vcc
Note:
1. CL includes probe and jig capacitance.
Waveforms – 1
tr
V
IH
Input CK
Vref
10 %
tr
f
GND
V
IH
%
10 %
Input D
GND
VOH
tPHL
Output Q
Vref
Vref
VOL
Rev.4.00 Jul. 27, 2004 page 5 of 7
HD74LVC374A
Waveforms – 2
tr
tf
V
IH
90 % 90 %
Vref Vref
Input CK
Vref
10 %
tsu
10 %
tw
GND
tw
th
V
IH
Vref
Vref
Input D
GND
Waveforms – 3
tf
tr
V
IH
90 %
Vref
90
Vr
Input G
10 %
1
GND
tZL
≈VOH1
Vref
Waveform - A
Waveform - B
OL + 0.3 V
VOL
VOH
tZH
VOH– 0.3 V
≈VOL1
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
TEST
VIH
2.7 V
1.5 V
3 V
Vcc
50%Vcc
Vcc
Vref
VOH1
VOL1
GND
GND
Notes:
1. tr = 2.5 ns,
2. Input wavefor0 MHz, duty cycle 50%
3. Waveform – A shnput conditions such that the output is "L" level when enable by the
output control.
4. Waveform – B shows input conditions such that the output is "H" level when enable by the
output control.
Rev.4.00 Jul. 27, 2004 page 6 of 7
HD74LVC374A
Package Dimensions
As of January, 2002
Unit: mm
12.6
13 Max
11
10
20
1
+ 0.20
7.80
– 0.30
0.80 Max
1.15
0˚ – 8˚
1.27
0.70 ± 0.2
*0.40 ± 0.06
0.15
0.12 M
P–20DAV
—
ue)
Conforms
0.31 g
*Pd plating
As of January, 2002
Unit: mm
6.5
6.
20
1
1.0
*0.20 ± 0.05
0.13
M
6.40 ± 0.20
0.65 Max
0˚ – 8˚
0.50 ± 0.10
0.10
Package Code
JEDEC
TTP–20DAV
—
JEITA
—
*Pd plating
Mass (reference value)
0.07 g
Rev.4.00 Jul. 27, 2004 page 7 of 7
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