ICL3222CV-T [RENESAS]
DUAL LINE TRANSCEIVER, PDSO20, PLASTIC, MO-153AC, TSSOP-20;
| 型号： | ICL3222CV-T |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | DUAL LINE TRANSCEIVER, PDSO20, PLASTIC, MO-153AC, TSSOP-20 光电二极管 |
| 文件： | 总28页 (文件大小：649K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICL3221, ICL3222, ICL3223,
ICL3232, ICL3241, ICL3243
®
Data Sheet
March 1, 2006
FN4805.21
One Microamp Supply-Current, +3V to +5.5V,
250kbps, RS-232 Transmitters/Receivers
Features
• Pb-Free Plus Anneal Available as an Option
(RoHS Compliant) (See Ordering Info)
The Intersil ICL32XX devices are 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
• 15kV ESD Protected (Human Body Model)
V.28/V.24 specifications, even at V
= 3.0V. Targeted
CC
• Drop in Replacements for MAX3221, MAX3222,
MAX3223, MAX3232, MAX3241, MAX3243, SP3243
applications are PDAs, Palmtops, and notebook and laptop
computers where the low operational, and even lower
standby, power consumption is critical. Efficient on-chip
charge pumps, coupled with manual and automatic
powerdown functions (except for the ICL3232), reduce the
standby supply current to a 1µA trickle. Small footprint
packaging, and the use of small, low value capacitors ensure
board space savings as well. Data rates greater than
250kbps are guaranteed at worst case load conditions. This
family is fully compatible with 3.3V only systems, mixed 3.3V
and 5.0V systems, and 5.0V only systems.
• ICL3221 is Low Power, Pin Compatible Upgrade for 5V
MAX221
• ICL3222 is Low Power, Pin Compatible Upgrade for 5V
MAX242, and SP312A
• ICL3232 is Low Power Upgrade for HIN232/ICL232 and
Pin Compatible Competitor Devices
• RS-232 Compatible with V
CC
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• Latch-Up Free
= 2.7V
The ICL324X are 3-driver, 5-receiver devices that provide a
complete serial port suitable for laptop or notebook
computers. Both devices also include noninverting always-
active receivers for “wake-up” capability.
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Manual and Automatic Powerdown Features (Except
ICL3232)
The ICL3221, ICL3223 and ICL3243, feature an
automatic powerdown function which powers down the
on-chip power-supply and driver circuits. This occurs when
an attached peripheral device is shut off or the RS-232
cable is removed, conserving system power automatically
without changes to the hardware or operating system.
These devices power up again when a valid RS-232
voltage is applied to any receiver input.
• Guaranteed Mouse Driveability (ICL324X Only)
• Receiver Hysteresis For Improved Noise Immunity
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . . . .1µA
Table 1 summarizes the features of the devices represented
by this data sheet, while Application Note AN9863
summarizes the features of each device comprising the
ICL32XX 3V family.
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
TABLE 1. SUMMARY OF FEATURES
NO. OF
MONITOR Rx.
DATA
MANUAL
POWER-
DOWN?
AUTOMATIC
POWERDOWN
FUNCTION?
NO. OF NO.OF
RATE
Rx. ENABLE
FUNCTION?
READY
PART NUMBER
Tx.
Rx.
(R
)
(kbps)
OUTPUT?
OUTB
ICL3221
ICL3222
ICL3223
ICL3232
ICL3241
ICL3243
1
2
2
2
3
3
1
2
2
2
5
5
0
0
0
0
2
1
250
250
250
250
250
250
Yes
Yes
Yes
No
No
No
No
No
No
No
Yes
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
Yes
No
Yes
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1999-2006. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Ordering Information
PART NUMBER (NOTE 1)
ICL3221CA
PART MARKING
ICL3221CA
TEMP. RANGE (°C)
0 to 70
PACKAGE
16 Ld SSOP
PKG. DWG. #
M16.209
ICL3221CAZ (Note 2)
ICL3221CV
ICL3221CAZ
ICL3221CV
3221CVZ
0 to 70
16 Ld SSOP (Pb-free)
16 Ld TSSOP
M16.209
M16.173
M16.173
M16.209
M16.209
M20.209
M20.209
M18.3
0 to 70
ICL3221CVZ (Note 2)
ICL3221IA
0 to 70
16 Ld TSSOP (Pb-free)
16 Ld SSOP
ICL3221IA
ICL3221IAZ
ICL3222CA
ICL3222CAZ
ICL3222CB
3222CBZ
-40 to 85
-40 to 85
0 to 70
ICL3221IAZ (Note 2)
ICL3222CA
16 Ld SSOP (Pb-free)
20 Ld SSOP
ICL3222CAZ (Note 2)
ICL3222CB
0 to 70
20 Ld SSOP (Pb-free)
18 Ld SOIC
0 to 70
ICL3222CBZ (Note 2)
ICL3222CP
0 to 70
18 Ld SOIC (Pb-free)
18 Ld PDIP
M18.3
ICL3222CP
ICL3222CPZ
ICL3222CV
ICL3222CVZ
ICL3222IA
ICL3222IAZ
ICL3222IB
ICL3222IV
ICL3222IVZ
ICL3223CA
ICL3223CAZ
ICL3223CP
ICL3223CPZ
ICL3223CV
ICL3223IA
ICL3223IAZ
ICL3223IV
ICL3223IVZ
ICL3232CA
3232CAZ
0 to 70
E18.3
ICL3222CPZ (Note 2)
ICL3222CV
0 to 70
18 Ld PDIP* (Pb-free)
20 Ld TSSOP
E18.3
0 to 70
M20.173
M20.173
M20.209
M20.209
M18.3
ICL3222CVZ (Note 2)
ICL3222IA
0 to 70
20 Ld TSSOP (Pb-free)
20 Ld SSOP
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
ICL3222IAZ (Note 2)
ICL3222IB
20 Ld SSOP (Pb-free)
18 Ld SOIC
ICL3222IV
20 Ld TSSOP
M20.173
M20.173
M20.209
M20.209
E20.3
ICL3222IVZ (Note 2)
ICL3223CA
20 Ld TSSOP (Pb-free)
20 Ld SSOP
ICL3223CAZ (Note 2)
ICL3223CP
0 to 70
20 Ld SSOP (Pb-free)
20 Ld PDIP
0 to 70
ICL3223CPZ (Note 2)
ICL3223CV
0 to 70
20 Ld PDIP* (Pb-free)
20 Ld TSSOP
E20.3
0 to 70
M20.173
M20.209
M20.209
M20.173
M20.173
M16.209
M16.209
M16.3
ICL3223IA
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
20 Ld SSOP
ICL3223IAZ (Note 2)
ICL3223IV
20 Ld SSOP (Pb-free)
20 Ld TSSOP
ICL3223IVZ (Note 2)
ICL3232CA
20 Ld TSSOP (Pb-free)
16 Ld SSOP
ICL3232CAZ (Note 2)
ICL3232CB
0 to 70
16 Ld SSOP (Pb-free)
16 Ld SOIC
ICL3232CB
3232CBZ
0 to 70
ICL3232CBZ (Note 2)
ICL3232CBN
0 to 70
16 Ld SOIC (Pb-free)
16 Ld SOIC (N)
M16.3
3232CBN
0 to 70
M16.15
M16.15
E16.3
ICL3232CBNZ (Note 2)
ICL3232CP
3232CBNZ
ICL3232CP
ICL3232CPZ
ICL3232CV
0 to 70
16 Ld SOIC (N) (Pb-free)
16 Ld PDIP
0 to 70
ICL3232CPZ (Note 2)
ICL3232CV
0 to 70
16 Ld PDIP* (Pb-free)
16 Ld TSSOP
E16.3
0 to 70
M16.173
FN4805.21
2
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Ordering Information (Continued)
PART NUMBER (NOTE 1)
ICL3232CVZ (Note 2)
ICL3232IA
PART MARKING
3232CVZ
TEMP. RANGE (°C)
0 to 70
PACKAGE
16 Ld TSSOP (Pb-free)
16 Ld SSOP
PKG. DWG. #
M16.173
ICL3232IA
3232IAZ
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
M16.209
M16.209
M16.3
ICL3232IAZ (Note 2)
ICL3232IB
16 Ld SSOP (Pb-free)
16 Ld SOIC
ICL3232IB
3232IBZ
ICL3232IBZ (Note 2)
ICL3232IBN
16 Ld SOIC (Pb-free)
16 Ld SOIC (N)
M16.3
3232IBN
M16.15
M16.15
M16.173
M16.173
M28.209
M28.209
M28.3
ICL3232IBNZ (Note 2)
ICL3232IV
3232IBNZ
16 Ld SOIC (N) (Pb-free)
16 Ld TSSOP
ICL3232IV
3232IVZ
ICL3232IVZ (Note 2)
ICL3241CA
16 Ld TSSOP (Pb-free)
28 Ld SSOP
ICL3241CA
ICL3241CAZ
ICL3241CB
ICL3241CBZ
ICL3241CV
ICL3241CVZ
ICL3241IA
ICL3241IAZ
ICL3241IB
ICL3241IBZ
ICL3241IV
ICL3241IVZ
ICL3243CA
ICL3243CAZ
ICL3243CB
ICL3243CBZ
ICL3243CV
ICL3243CVZ
ICL3243IA
ICL3243IAZ
ICL3241CAZ (Note 2)
ICL3241CB
0 to 70
28 Ld SSOP (Pb-free)
28 Ld SOIC
0 to 70
ICL3241CBZ (Note 2)
ICL3241CV
0 to 70
28 Ld SOIC (Pb-free)
28 Ld TSSOP
M28.3
0 to 70
M28.173
M28.173
M28.209
M28.209
M28.3
ICL3241CVZ (Note 2)
ICL3241IA
0 to 70
28 Ld TSSOP (Pb-free)
28 Ld SSOP
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
ICL3241IAZ (Note 2)
ICL3241IB
28 Ld SSOP (Pb-free)
28 Ld SOIC
ICL3241IBZ (Note 2)
ICL3241IV
28 Ld SOIC (Pb-free)
28 Ld TSSOP
M28.3
M28.173
M28.173
M28.209
M28.209
M28.3
ICL3241IVZ (Note 2)
ICL3243CA
28 Ld TSSOP (Pb-free)
28 Ld SSOP
ICL3243CAZ (Note 2)
ICL3243CB
0 to 70
28 Ld SSOP (Pb-free)
28 Ld SOIC
0 to 70
ICL3243CBZ (Note 2)
ICL3243CV
0 to 70
28 Ld SOIC (Pb-free)
28 Ld TSSOP
M28.3
0 to 70
M28.173
M28.173
M28.209
M28.209
ICL3243CVZ (Note 2)
ICL3243IA
0 to 70
28 Ld TSSOP (Pb-free)
28 Ld SSOP
-40 to 85
-40 to 85
ICL3243IAZ (Note 2)
28 Ld SSOP (Pb-free)
*Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
NOTES:
1. Most surface mount devices are available on tape and reel; add “-T” to suffix.
2. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
FN4805.21
3
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Pinouts
ICL3221 (SSOP, TSSOP)
TOP VIEW
ICL3222 (PDIP, SOIC)
TOP VIEW
EN
C1+
V+
1
2
3
4
5
6
7
8
9
18 SHDN
17
EN
C1+
V+
1
2
3
4
5
6
7
8
16 FORCEOFF
15 V
V
CC
CC
16 GND
15 T1
14 GND
13 T1
C1-
C2+
C2-
V-
OUT
C1-
C2+
C2-
V-
OUT
14 R1
13 R1
IN
12 FORCEON
11 T1
OUT
IN
IN
10 INVALID
R1
12 T1
11 T2
T2
OUT
IN
R1
9
IN
OUT
R2
10
R2
IN
OUT
ICL3222 (SSOP, TSSOP)
ICL3223 (PDIP, SSOP, TSSOP)
TOP VIEW
TOP VIEW
EN
1
2
20 SHDN
19
EN
1
2
20 FORCEOFF
19
C1+
V+
V
CC
C1+
V+
V
CC
3
18 GND
17 T1
3
18 GND
17 T1
C1-
C2+
C2-
V-
4
C1-
C2+
C2-
V-
4
OUT
OUT
5
16 R1
15 R1
5
16 R1
15 R1
IN
IN
6
6
OUT
OUT
7
14 NC
13 T1
7
14 FORCEON
T2
8
T2
8
13 T1
IN
OUT
IN
OUT
R2
9
12
T2
R2
9
12
T2
IN
IN
11 NC
IN
IN
10
R2
10
11 INVALID
R2
OUT
OUT
ICL3232 (PDIP, SOIC, SSOP, TSSOP)
ICL3241 (SOIC, SSOP, TSSOP)
TOP VIEW
TOP VIEW
C2+
C2-
V-
1
2
28 C1+
27 V+
C1+
V+
1
2
3
4
5
6
7
8
16 V
CC
15 GND
14 T1
3
26 V
CC
25 GND
24 C1-
C1-
C2+
C2-
V-
OUT
R1
R2
R3
R4
R5
4
IN
IN
IN
IN
IN
13 R1
12 R1
IN
5
OUT
IN
6
23 EN
11 T1
10 T2
7
22 SHDN
T2
OUT
IN
8
21 R1
OUTB
OUTB
OUT
OUT
OUT
OUT
OUT
R2
IN
9
R2
OUT
T1
9
20
R2
OUT
10
11
12
13
14
19 R1
18 R2
17 R3
16 R4
15 R5
T2
OUT
T3
OUT
T3
T2
T1
IN
IN
IN
FN4805.21
4
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Pinouts (Continued)
ICL3243 (SOIC, SSOP, TSSOP)
TOP VIEW
C2+
C2-
V-
1
2
28 C1+
27 V+
3
26 V
CC
25 GND
R1
R2
R3
R4
R5
4
IN
IN
IN
IN
IN
5
24 C1-
6
23 FORCEON
22 FORCEOFF
21 INVALID
7
8
T1
9
20
R2
OUT
OUT
OUT
OUTB
OUT
OUT
OUT
OUT
OUT
10
11
12
13
14
19 R1
18 R2
17 R3
16 R4
15 R5
T2
T3
T3
T2
T1
IN
IN
IN
Pin Descriptions
PIN
FUNCTION
V
System power supply input (3.0V to 5.5V).
CC
V+
Internally generated positive transmitter supply (+5.5V).
Internally generated negative transmitter supply (-5.5V).
Ground connection.
V-
GND
C1+
C1-
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
TTL/CMOS compatible transmitter Inputs.
C2+
C2-
T
IN
T
RS-232 level (nominally ±5.5V) transmitter outputs.
RS-232 compatible receiver inputs.
OUT
R
IN
R
TTL/CMOS level receiver outputs.
OUT
R
TTL/CMOS level, noninverting, always enabled receiver outputs.
OUTB
INVALID
EN
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
Active low receiver enable control; doesn’t disable R outputs.
OUTB
Active low input to shut down transmitters and on-board power supply, to place device in low power mode.
SHDN
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (See Table 2).
FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
FN4805.21
5
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Typical Operating Circuits
ICL3221
ICL3222
C
(OPTIONAL CONNECTION, NOTE)
C
(OPTIONAL CONNECTION, NOTE)
3
3
+3.3V
C
+3.3V
+
+
0.1µF
0.1µF
17
15
2
2
3
7
C
0.1µF
3
C1+
V
1
C1+
1
V
C
CC
+
+
CC
T
C
3
+
+
3
+
+
V+
V-
V+
V-
0.1µF
4
5
0.1µF
4
0.1µF
C1-
C2+
C1-
C2+
5
C
2
C
2
+
7
0.1µF
C
4
0.1µF
C
4
6
6
C2-
C2-
0.1µF
0.1µF
+
T
1
1
12
15
8
11
13
T1
T1
T1
T1
OUT
IN
OUT
OUT
IN
T
2
11
13
9
1
8
T2
T2
R1
R1
IN
IN
OUT
5kΩ
R
1
14
9
EN
R1
R1
R2
OUT
OUT
IN
IN
5kΩ
16
10
R
V
1
CC
FORCEOFF
INVALID
10
1
12
TO POWER
CONTROL
LOGIC
R2
FORCEON
GND
5kΩ
R
2
EN
14
18
V
CC
SHDN
GND
16
NOTE: The negative terminal of C can be
3
connected to either V
or GND
CC
NOTE: The negative terminal of C can be
3
connected to either V
or GND
CC
ICL3223
19
ICL3232
+3.3V
C
(OPTIONAL CONNECTION, NOTE)
3
+
0.1µF
+3.3V
+
2
0.1µF
C
0.1µF
C1+
3
1
V
16
CC
C
+
3
+
V+
V-
4
5
1
0.1µF
C
0.1µF
C1-
C2+
1
C1+
V
2
6
CC
C
3
+
+
+
V+
V-
C
2
3
4
0.1µF
+
C1-
C2+
7
0.1µF
C
4
6
C
0.1µF
2
C2-
0.1µF
+
C
4
5
T
T
1
2
C2-
13
17
8
0.1µF
+
T1
T2
T1
T2
IN
IN
OUT
OUT
T
T
1
2
11
14
7
T1
T2
T1
IN
IN
OUT
OUT
12
15
10
12
T2
16
9
R1
R2
R1
R2
OUT
OUT
IN
IN
5kΩ
5kΩ
13
8
R
1
R1
R1
R2
OUT
OUT
IN
IN
10
1
R
5kΩ
5kΩ
1
R
2
9
EN
R2
20
11
R
2
V
FORCEOFF
INVALID
CC
14
TO POWER
GND
15
FORCEON
CONTROL LOGIC
GND
18
NOTE: The negative terminal of C can be
3
connected to either V
or GND
CC
FN4805.21
March 1, 2006
6
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Typical Operating Circuits (Continued)
ICL3241
ICL3243
+3.3V
+
+3.3V
0.1µF
+
26
0.1µF
28
26
28
27
C
C1+
1
V
C
CC
3
+
+
C
0.1µF
+
C1+
V
27
3
1
V+
V-
0.1µF
CC
C
3
+
24
1
0.1µF
+
V+
V-
C1-
C2+
24
0.1µF
C1-
C2+
C
2
1
C
2
3
9
0.1µF
C
4
+
2
0.1µF
C
4
C2-
0.1µF
2
+
C2-
0.1µF
+
T
T
T
1
2
3
T
T
T
14
1
2
3
14
9
T1
T1
IN
OUT
T1
T1
IN
OUT
13
12
10
11
13
12
10
11
T2
T3
T2
T3
T2
T3
T2
T3
IN
OUT
OUT
IN
IN
OUT
OUT
IN
21
20
19
R1
R2
OUTB
OUTB
R2
OUTB
20
19
4
5
4
5
R1
R1
R2
OUT
OUT
IN
IN
R1
R1
R2
OUT
IN
IN
R
R
1
2
5kΩ
5kΩ
5kΩ
R
5kΩ
5kΩ
1
18
18
17
R2
R2
OUT
R
2
17
16
6
7
6
R3
R4
R3
R4
OUT
OUT
IN
IN
R3
R3
OUT
IN
R
R
3
4
5kΩ
R
R
R
3
4
16
15
7
8
R4
R5
R4
R5
OUT
OUT
IN
IN
5kΩ
5kΩ
5kΩ
5kΩ
15
23
8
R5
R5
OUT
IN
R
5
FORCEON
5
23
22
EN
22
21
V
CC
FORCEOFF
V
CC
SHDN
GND
25
GND
25
INVALID
FN4805.21
March 1, 2006
7
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Absolute Maximum Ratings
Thermal Information
Thermal Resistance (Typical, Note 3)
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
θ
JA
(°C/W)
CC
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
16 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . .
18 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . .
20 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . .
16 Ld Wide SOIC Package . . . . . . . . . . . . . . . . . . .
16 Ld Narrow SOIC Package. . . . . . . . . . . . . . . . . .
18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
20 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
28 Ld SSOP and TSSOP Packages . . . . . . . . . . . .
90
80
77
100
115
75
T
R
, FORCEOFF, FORCEON, EN, SHDN . . . . . . . . . -0.3V to 6V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
IN
IN
Output Voltages
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
75
T
R
OUT
135
122
145
140
100
, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V +0.3V
OUT CC
Short Circuit Duration
T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
OUT
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC, SSOP, TSSOP - Lead Tips Only)
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
Operating Conditions
Temperature Range
ICL32XXCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
ICL32XXIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = 25°C
TEMP
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
MAX UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All R Open, FORCEON = GND, FORCEOFF = V
IN
25
-
1.0
10
µA
CC
(ICL3221, ICL3223, ICL3243 Only)
Supply Current, Powerdown
FORCEOFF = SHDN = GND (Except ICL3232)
25
25
-
-
1.0
0.3
10
µA
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded,
VCC = 3.15V,
ICL3221-32
1.0
mA
FORCEON = FORCEOFF =
SHDN = V
CC
VCC = 3.0V, ICL3241-43
25
-
0.3
1.0
mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
Input Logic Threshold High
T
T
, FORCEON, FORCEOFF, EN, SHDN
Full
Full
Full
Full
Full
-
2.0
2.4
-
-
0.8
-
V
V
IN
, FORCEON, FORCEOFF, EN, V
= 3.3V
= 5.0V
-
IN
CC
CC
SHDN
V
-
-
V
Input Leakage Current
T
, FORCEON, FORCEOFF, EN, SHDN
IN
±0.01
±0.05
±1.0
±10
µA
µA
Output Leakage Current
(Except ICL3232)
FORCEOFF = GND or EN = V
-
CC
Output Voltage Low
Output Voltage High
I
I
= 1.6mA
= -1.0mA
Full
Full
-
-
0.4
-
V
V
OUT
OUT
V
-0.6 V
-0.1
CC
CC
AUTOMATIC POWERDOWN (ICL3221, ICL3223, ICL3243 Only, FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
Enable Transmitters
ICL32XX Powers Up (See Figure 6)
Full
-2.7
-0.3
-
-
2.7
0.3
V
V
Receiver Input Thresholds to
Disable Transmitters
ICL32XX Powers Down (See Figure 6)
Full
-
INVALID Output Voltage Low
INVALID Output Voltage High
I
I
= 1.6mA
= -1.0mA
Full
Full
-
-
0.4
-
V
V
OUT
V
-0.6
OUT
CC
FN4805.21
8
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Electrical Specifications Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = 25°C (Continued)
TEMP
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
MAX UNITS
Receiver Threshold to
Transmitters Enabled Delay (t
25
-
100
-
µs
)
WU
Receiver Positive or Negative
25
25
-
-
1
-
µs
Threshold to INVALID High Delay
(t
)
INVH
Receiver Positive or Negative
30
-
µs
Threshold to INVALID Low Delay
(t
)
INVL
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
Full
25
25
25
25
25
25
-25
0.6
0.8
-
-
25
-
V
V
V
V
V
V
= 3.3V
= 5.0V
= 3.3V
= 5.0V
1.2
1.5
1.5
1.8
0.3
5
CC
CC
CC
CC
-
V
Input Threshold High
2.4
2.4
-
V
-
V
Input Hysteresis
-
V
Input Resistance
3
7
kΩ
TRANSMITTER OUTPUTS
Output Voltage Swing
Output Resistance
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
Full
Full
Full
±5.0
±5.4
10M
±35
-
-
V
Ω
V
= V+ = V- = 0V, Transmitter Output = ±2V
300
-
CC
Output Short-Circuit Current
Output Leakage Current
-
-
±60
±25
mA
µA
V
= ±12V, V
= 0V or 3V to 5.5V
CC
OUT
Automatic Powerdown or FORCEOFF = SHDN = GND
MOUSE DRIVEABILITY (ICL324X Only)
Transmitter Output Voltage
(See Figure 9)
T1 = T2 = GND, T3 = V , T3
Loaded with 3kΩ to
Full
±5
-
-
V
IN
IN
IN
CC
OUT
GND, T1
and T2
Loaded with 2.5mA Each
OUT
OUT
TIMING CHARACTERISTICS
Maximum Data Rate
R
= 3kΩ, C = 1000pF, One Transmitter Switching
Full
25
250
500
0.3
0.3
200
200
200
100
8.0
-
-
kbps
µs
L
L
Receiver Propagation Delay
Receiver Input to Receiver
Output, C = 150pF
t
t
-
-
-
-
PHL
PLH
L
25
µs
Receiver Output Enable Time
Receiver Output Disable Time
Transmitter Skew
Normal Operation (Except ICL3232)
Normal Operation (Except ICL3232)
25
-
-
ns
25
-
-
ns
t
t
- t
PHL PLH
Full
Full
25
-
1000
500
30
30
ns
Receiver Skew
- t
PHL PLH
-
ns
Transition Region Slew Rate
V
R
= 3.3V,
= 3kΩ to 7kΩ,
C = 200pF to 2500pF
4
6
V/µs
V/µs
CC
L
L
C = 200pF to 1000pF
L
25
Measured From 3V to -3V or -3V
to 3V
ESD PERFORMANCE
RS-232 Pins (T
, R
)
Human Body Model
ICL3221 - ICL3243
25
25
25
25
25
-
-
-
-
-
±15
±8
-
-
-
-
-
kV
kV
kV
kV
kV
OUT IN
IEC61000-4-2 Contact Discharge ICL3221 - ICL3243
IEC61000-4-2 Air Gap Discharge ICL3221 - ICL3232
ICL3241 - ICL3243
±8
±6
All Other Pins
Human Body Model
ICL3221 - ICL3243
±2
FN4805.21
9
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
The ICL3221/22/23/41 inverting receivers disable only when
Detailed Description
EN is driven high. ICL3243 receivers disable during forced
(manual) powerdown, but not during automatic powerdown
(See Table 2).
ICL32XX interface ICs operate from a single +3V to +5.5V
supply, guarantee a 250kbps minimum data rate, require
only four small external 0.1µF capacitors, feature low power
consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections:
charge pump, transmitters and receivers.
ICL324X monitor receivers remain active even during
manual powerdown and forced receiver disable, making
them extremely useful for Ring Indicator monitoring.
Standard receivers driving powered down peripherals must
be disabled to prevent current flow through the peripheral’s
protection diodes (See Figures 2 and 3). This renders them
useless for wake up functions, but the corresponding
monitor receiver can be dedicated to this task as shown in
Figure 3.
Charge-Pump
Intersil’s new ICL32XX family utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a V
supply as
CC
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
V
CC
R
R
XIN
XOUT
GND ≤ V
voltage doubler and inverter functions at V
= 3.3V. See
CC
≤ V
-25V ≤ V
≤ +25V
5kΩ
ROUT
CC
RIN
the Capacitor Selection section, and Table 3 for capacitor
recommendations for other operating conditions. The charge
pumps operate discontinuously (i.e., they turn off as soon as
the V+ and V- supplies are pumped up to the nominal
values), resulting in significant power savings.
GND
FIGURE 1. INVERTING RECEIVER CONNECTIONS
Low Power Operation
These 3V devices require a nominal supply current of
Transmitters
0.3mA, even at V
= 5.5V, during normal operation (not in
CC
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
powerdown mode). This is considerably less than the 5mA
to 11mA current required by comparable 5V RS-232 devices,
allowing users to reduce system power simply by switching
to this new family.
Pin Compatible Replacements For 5V Devices
The ICL3221/22/32 are pin compatible with existing 5V
RS-232 transceivers - see the Features section on the front
page for details.
Except for the ICL3232, all transmitter outputs disable and
assume a high impedance state when the device enters the
powerdown mode (See Table 2). These outputs may be
driven to ±12V when disabled.
This pin compatibility coupled with the low Icc and wide
operating supply range, make the ICL32XX potential lower
power, higher performance drop-in replacements for existing
5V applications. As long as the ±5V RS-232 output swings
are acceptable, and transmitter input pull-up resistors aren’t
required, the ICL32XX should work in most 5V applications.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), V
≥ 3.0V, with one
CC
transmitter operating at full speed. Under more typical
conditions of V ≥ 3.3V, R = 3kΩ, and C = 250pF, one
CC
L
L
transmitter easily operates at 900kbps.
Transmitter inputs float if left unconnected, and may cause
When replacing a device in an existing 5V application, it is
I
increases. Connect unused inputs to GND for the best
CC
acceptable to terminate C to V
as shown on the Typical
3
CC
performance.
Operating Circuit. Nevertheless, terminate C to GND if
3
Receivers
possible, as slightly better performance results from this
configuration.
All the ICL32XX devices contain standard inverting receivers
that three-state (except for the ICL3232) via the EN or
FORCEOFF control lines. Additionally, the two ICL324X
products include noninverting (monitor) receivers (denoted
Powerdown Functionality (Except ICL3232)
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1µA, because the on-chip charge
by the R
label) that are always active, regardless of the
OUTB
state of any control lines. All the receivers convert RS-232
signals to CMOS output levels and accept inputs up to ±25V
while presenting the required 3kΩ to 7kΩ input impedance
pump turns off (V+ collapses to V , V- collapses to GND),
CC
and the transmitter outputs three-state. Inverting receiver
outputs may or may not disable in powerdown; refer to
Table 2 for details. This micro-power mode makes these
devices ideal for battery powered and portable applications.
(See Figure 1) even if the power is off (V
= 0V). The
CC
receivers’ Schmitt trigger input stage uses hysteresis to
increase noise immunity and decrease errors due to slow
input signal transitions.
FN4805.21
10
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
The ICL3221, ICL3223, and ICL3243 utilize a two pin
Software Controlled (Manual) Powerdown
approach where the FORCEON and FORCEOFF inputs
determine the IC’s mode. For always enabled operation,
FORCEON and FORCEOFF are both strapped high. To
switch between active and powerdown modes, under logic
or software control, only the FORCEOFF input need be
driven. The FORCEON state isn’t critical, as FORCEOFF
dominates over FORCEON. Nevertheless, if strictly manual
control over powerdown is desired, the user must strap
FORCEON high to disable the automatic powerdown
circuitry. ICL3243 inverting (standard) receiver outputs also
disable when the device is in manual powerdown, thereby
eliminating the possible current path through a shutdown
peripheral’s input protection diode (See Figures 2 and 3).
Most devices in the ICL32XX family provide pins that allow
the user to force the IC into the low power, standby state.
On the ICL3222 and ICL3241, the powerdown control is via
a simple shutdown (SHDN) pin. Driving this pin high enables
normal operation, while driving it low forces the IC into its
powerdown state. Connect SHDN to V
if the powerdown
CC
function isn’t needed. Note that all the receiver outputs
remain enabled during shutdown (See Table 2). For the
lowest power consumption during powerdown, the receivers
should also be disabled by driving the EN input high (See
next section, and Figures 2 and 3).
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE
RS-232
SIGNAL
PRESENT
AT
FORCEOFF
(NOTE 4)
OUTB
OUTPUTS OUTPUTS OUTPUT
RECEIVER
INPUT?
OR SHDN FORCEON
EN
TRANSMITTER RECEIVER
R
INVALID
INPUT
INPUT
INPUT
OUTPUTS
MODE OF OPERATION
ICL3222, ICL3241
N.A.
L
L
N.A.
N.A.
N.A.
N.A.
L
H
L
High-Z
High-Z
Active
Active
Active
High-Z
Active
High-Z
Active
Active
Active
Active
N.A.
N.A.
N.A.
N.A.
Manual Powerdown
N.A.
Manual Powerdown w/Rcvr. Disabled
Normal Operation
N.A.
H
H
N.A.
H
Normal Operation w/Rcvr. Disabled
ICL3221, ICL3223
No
No
H
H
H
H
H
H
L
H
H
L
L
H
L
Active
Active
Active
Active
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Active
High-Z
Active
High-Z
Active
High-Z
Active
High-Z
Active
High-Z
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
L
L
Normal Operation
(Auto Powerdown Disabled)
Yes
H
H
L
Normal Operation
(Auto Powerdown Enabled)
Yes
L
H
L
No
L
Powerdown Due to Auto Powerdown
Logic
No
L
H
L
L
Yes
X
X
X
X
H
H
L
Manual Powerdown
Yes
L
H
L
Manual Powerdown w/Rcvr. Disabled
Manual Powerdown
No
L
No
L
H
L
Manual Powerdown w/Rcvr. Disabled
ICL3243
No
H
H
H
H
L
L
N.A.
N.A.
N.A.
Active
Active
High-Z
Active
Active
Active
Active
Active
Active
L
H
L
Normal Operation
(Auto Powerdown Disabled)
Yes
No
Normal Operation
(Auto Powerdown Enabled)
Powerdown Due to Auto Powerdown
Logic
Yes
No
L
L
X
X
N.A.
N.A.
High-Z
High-Z
High-Z
High-Z
Active
Active
H
L
Manual Powerdown
Manual Powerdown
NOTE:
4. Applies only to the ICL3241 and ICL3243.
FN4805.21
11
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
The INVALID output always indicates whether or not a valid
FORCEOFF
FORCEON
RS-232 signal is present at any of the receiver inputs (See
Table 2), giving the user an easy way to determine when the
interface block should power down. In the case of a
disconnected interface cable where all the receiver inputs
are floating (but pulled to GND by the internal receiver pull
down resistors), the INVALID logic detects the invalid levels
and drives the output low. The power management logic
then uses this indicator to power down the interface block.
Reconnecting the cable restores valid levels at the receiver
inputs, INVALID switches high, and the power management
logic wakes up the interface block. INVALID can also be
used to indicate the DTR or RING INDICATOR signal, as
long as the other receiver inputs are floating, or driven to
GND (as in the case of a powered down driver). Connecting
FORCEOFF and FORCEON together disables the
PWR
MGT
LOGIC
INVALID
ICL3221/23/43
I/O
UART
CPU
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
automatic powerdown feature, enabling them to function as
a manual SHUTDOWN input (See Figure 4).
With any of the above control schemes, the time required to
V
CC
exit powerdown, and resume transmission is only 100µs. A
mouse, or other application, may need more time to wake up
from shutdown. If automatic powerdown is being utilized, the
RS-232 device will reenter powerdown if valid receiver levels
aren’t reestablished within 30µs of the ICL32XX powering
up. Figure 5 illustrates a circuit that keeps the ICL32XX from
initiating automatic powerdown for 100ms after powering up.
This gives the slow-to-wake peripheral circuit time to
reestablish valid RS-232 output levels.
V
CC
CURRENT
FLOW
V
CC
V
= V
CC
OUT
Rx
POWERED
DOWN
UART
Tx
OLD
SHDN = GND
MASTER POWERDOWN LINE
POWER
MANAGEMENT
UNIT
GND
RS-232 CHIP
0.1µF
1MΩ
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
FORCEOFF
FORCEON
ICL3221/23/43
V
CC
FIGURE 5. CIRCUIT TO PREVENT AUTO POWERDOWN FOR
100ms AFTER FORCED POWERUP
TRANSITION
DETECTOR
TO
ICL324X
WAKE-UP
LOGIC
Automatic Powerdown (ICL3221/23/43 Only)
Even greater power savings is available by using the
devices which feature an automatic powerdown function.
When no valid RS-232 voltages (See Figure 6) are sensed
on any receiver input for 30µs, the charge pump and
transmitters powerdown, thereby reducing supply current to
1µA. Invalid receiver levels occur whenever the driving
peripheral’s outputs are shut off (powered down) or when the
RS-232 interface cable is disconnected. The ICL32XX
powers back up whenever it detects a valid RS-232 voltage
level on any receiver input. This automatic powerdown
feature provides additional system power savings without
changes to the existing operating system.
V
CC
R2
OUTB
R
T
V
= HI-Z
X
OUT
R2
OUT
POWERED
DOWN
R2
IN
UART
T1
IN
X
T1
OUT
FORCEOFF = GND
OR SHDN = GND, EN = V
CC
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
FN4805.21
12
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
(standard) receiver outputs placing them in a high
impedance state. This is useful to eliminate supply current,
due to a receiver output forward biasing the protection diode,
VALID RS-232 LEVEL - ICL32XX IS ACTIVE
2.7V
INDETERMINATE - POWERDOWN MAY OR
MAY NOT OCCUR
when driving the input of a powered down (V
= GND)
CC
peripheral (See Figure 2). The enable input has no effect on
transmitter nor monitor (R ) outputs.
0.3V
OUTB
INVALID LEVEL - POWERDOWN OCCURS AFTER 30ms
-0.3V
Capacitor Selection
INDETERMINATE - POWERDOWN MAY OR
MAY NOT OCCUR
The charge pumps require 0.1µF capacitors for 3.3V
operation. For other supply voltages refer to Table 3 for
capacitor values. Do not use values smaller than those listed
in Table 3. Increasing the capacitor values (by a factor of 2)
reduces ripple on the transmitter outputs and slightly
-2.7V
VALID RS-232 LEVEL - ICL32XX IS ACTIVE
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
reduces power consumption. C , C , and C can be
2
3
4
increased without increasing C ’s value, however, do not
1
Automatic powerdown operates when the FORCEON input
is low, and the FORCEOFF input is high. Tying FORCEON
high disables automatic powerdown, but manual powerdown
is always available via the overriding FORCEOFF input.
Table 2 summarizes the automatic powerdown functionality.
increase C without also increasing C , C , and C to
1
2
3
4
maintain the proper ratios (C to the other capacitors).
1
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
Devices with the automatic powerdown feature include an
INVALID output signal, which switches low to indicate that
invalid levels have persisted on all of the receiver inputs for
more than 30µs (See Figure 7). INVALID switches high 1µs
after detecting a valid RS-232 level on a receiver input.
INVALID operates in all modes (forced or automatic
powerdown, or forced on), so it is also useful for systems
employing manual powerdown circuitry. When automatic
powerdown is utilized, INVALID = 0 indicates that the
ICL32XX is in powerdown mode.
TABLE 3. REQUIRED CAPACITOR VALUES
V
C
C , C , C
CC
1
2
3
4
(V)
(µF)
0.1
(µF)
3.0 to 3.6
4.5 to 5.5
3.0 to 5.5
0.1
0.047
0.1
0.33
0.47
RECEIVER
INPUTS
INVALID
REGION
}
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
TRANSMITTER
OUTPUTS
power supply noise, decouple V
to ground with a
CC
capacitor of the same value as the charge-pump capacitor C .
1
V
CC
INVALID
OUTPUT
t
t
INVH
INVL
Connect the bypass capacitor as close as possible to the IC.
0
PWR UP
AUTOPWDN
Operation Down to 2.7V
V+
ICL32XX transmitter outputs meet RS-562 levels (±3.7V), at
V
CC
0
full data rate, with V
as low as 2.7V. RS-562 levels
CC
typically ensure interoperability with RS-232 devices.
V-
Transmitter Outputs when Exiting
Powerdown
FIGURE 7. AUTOMATIC POWERDOWN AND INVALID
TIMING DIAGRAMS
Figure 8 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
The time to recover from automatic powerdown mode is
typically 100µs.
Receiver ENABLE Control (ICL3221/22/23/41 Only)
Several devices also feature an EN input to control the
receiver outputs. Driving EN high disables all the inverting
FN4805.21
13
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
for a single transmitter driving 1000pF and an RS-232 load
at 250kbps. The static transmitters were also loaded with an
RS-232 receiver.
5V/DIV
2V/DIV
FORCEOFF
T1
V
CC
+
0.1µF
V
CC
V+
V-
+
1
C1+
+
C
C
C
3
4
C1-
C2+
C2-
ICL32XX
T2
+
2
C
+
V
= +3.3V
CC
C1 - C4 = 0.1µF
T
T
TIME (20µs/DIV)
IN
OUT
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
1000pF
R
IN
R
OUT
EN
5K
Mouse Driveability
SHDN OR
V
The ICL324X have been specifically designed to power a
serial mouse while operating from low voltage supplies.
Figure 9 shows the transmitter output voltages under
increasing load current. The on-chip switching regulator
ensures the transmitters will supply at least ±5V during worst
case conditions (15mA for paralleled V+ transmitters, 7.3mA
for single V- transmitter). The Automatic Powerdown feature
does not work with a mouse, so FORCEOFF and
CC
FORCEOFF
FIGURE 10. TRANSMITTER LOOPBACK TEST CIRCUIT
5V/DIV
T1
IN
FORCEON should be connected to V
.
CC
T1
6
5
4
3
2
1
OUT
V
+
OUT
V
= 3.0V
CC
R1
OUT
T1
V
= +3.3V
CC
C1 - C4 = 0.1µF
0
V
+
OUT
-1
-2
-3
-4
-5
-6
5µs/DIV
T2
T3
ICL3241/43
FIGURE 11. LOOPBACK TEST AT 120kbps
V
V
-
CC
1
OUT
V
-
OUT
5V/DIV.
T1
0
2
3
4
5
6
7
8
9
10
LOAD CURRENT PER TRANSMITTER (mA)
IN
FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CURRENT (PER TRANSMITTER, i.e., DOUBLE
CURRENT AXIS FOR TOTAL V CURRENT)
OUT+
T1
OUT
High Data Rates
The ICL32XX maintain the RS-232 ±5V minimum transmitter
output voltages even at high data rates. Figure 10 details a
transmitter loopback test circuit, and Figure 11 illustrates the
loopback test result at 120kbps. For this test, all transmitters
were simultaneously driving RS-232 loads in parallel with
1000pF, at 120kbps. Figure 12 shows the loopback results
R1
OUT
V
= +3.3V
CC
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 12. LOOPBACK TEST AT 250kbps
FN4805.21
14
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
Interconnection with 3V and 5V Logic
The ICL32XX directly interface with 5V CMOS and TTL logic
families. Nevertheless, with the ICL32XX at 3.3V, and the
logic supply at 5V, AC, HC, and CD4000 outputs can drive
ICL32XX inputs, but ICL32XX outputs do not reach the
SYSTEM
V
CC
POWER-SUPPLY SUPPLY
VOLTAGE
(V)
VOLTAGE
(V)
COMPATIBILITY
minimum V for these logic families. See Table 4 for more
IH
3.3
3.3
Compatible with all CMOS
families.
information.
5
5
Compatible with all TTL and
CMOS logic families.
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. ICL32XX
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
Typical Performance Curves VCC = 3.3V, TA = 25°C
6
25
20
V
+
OUT
4
2
1 TRANSMITTER AT 250kbps
1 OR 2 TRANSMITTERS AT 30kbps
0
15
10
-SLEW
-2
-4
+SLEW
V
-
OUT
-6
5
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 13. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 14. SLEW RATE vs LOAD CAPACITANCE
45
45
ICL3221
40
ICL3222 - ICL3232
40
35
30
25
20
15
10
250kbps
35
250kbps
30
25
120kbps
20kbps
20
15
10
5
120kbps
20kbps
5
0
0
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 15. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 16. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FN4805.21
March 1, 2006
15
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Typical Performance Curves VCC = 3.3V, TA = 25°C (Continued)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
NO LOAD
45
40
35
30
ALL OUTPUTS STATIC
ICL324X
250kbps
ICL3221 - ICL3232
120kbps
25
20
15
10
5
20kbps
ICL324X
ICL324X
2.5 3.0
0
3.5
4.0
4.5
5.0
5.5
6.0
4000
5000
2000
3000
1000
0
SUPPLY VOLTAGE (V)
LOAD CAPACITANCE (pF)
FIGURE 17. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 18. SUPPLY CURRENT vs SUPPLY VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ICL3221: 286
ICL3222: 338
ICL3223: 357
ICL3232: 296
ICL324X: 464
PROCESS:
Si Gate CMOS
FN4805.21
16
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Dual-In-Line Plas tic Packages (PDIP)
E16.3 (JEDEC MS-001-BB ISSUE D)
N
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
INCHES
MILLIMETERS
1 2
3
N/2
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
A
A1
A2
B
-
4
-A-
0.015
0.115
0.014
0.045
0.008
0.735
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
18.66
0.13
7.62
6.10
4
D
E
BASE
PLANE
0.195
0.022
0.070
0.014
0.775
-
4.95
0.558
1.77
0.355
19.68
-
-
A2
A
-C-
-
SEATING
PLANE
B1
C
8, 10
L
C
L
-
D1
B1
eA
A1
A
D1
e
D
5
eC
C
B
D1
E
5
eB
0.010 (0.25) M
C
B S
0.325
0.280
8.25
7.11
6
NOTES:
E1
e
5
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
e
A
6
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
e
-
0.430
0.150
-
10.92
3.81
7
B
L
0.115
2.93
4
9
4. Dimensions A, A1 and L are measured with the package seated in JE-
N
16
16
DEC seating plane gauge GS-3.
Rev. 0 12/93
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
e
6. E and
are measured with the leads constrained to be perpendic-
A
-C-
ular to datum
.
7. e and e are measured at the lead tips with the leads unconstrained.
B
C
e
must be zero or greater.
C
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
FN4805.21
17
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Dual-In-Line Plastic Packages (PDIP)
N
E18.3 (JEDEC MS-001-BC ISSUE D)
E1
18 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INDEX
AREA
1
2
3
N/2
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-A-
A
A1
A2
B
-
4
D
E
0.015
0.115
0.014
0.045
0.008
0.845
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
21.47
0.13
7.62
6.10
4
BASE
PLANE
A2
A
0.195
0.022
0.070
0.014
0.880
-
4.95
0.558
1.77
0.355
22.35
-
-
-C-
C
SEATING
PLANE
-
L
C
L
B1
C
8, 10
D1
B1
eA
A1
A
D1
-
e
eC
C
eB
B
D
5
0.010 (0.25) M
B S
D1
E
5
NOTES:
0.325
8.25
6
1. Controlling Dimensions: INCH. In case of conflict between English and
E1
e
0.280
7.11
5
Metric dimensions, the inch dimensions control.
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
e
A
6
Publication No. 95.
e
-
0.430
-
10.92
7
B
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
L
0.115
0.150
2.93
3.81
4
9
N
18
18
Rev. 2 11/03
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
e
6. E and
are measured with the leads constrained to be perpendic-
A
-C-
ular to datum
.
7. e and e are measured at the lead tips with the leads unconstrained.
B
C
C
e
must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3
may have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
FN4805.21
18
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SOIC)
M16.15 (JEDEC MS-012-AC ISSUE C)
N
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
0.0688
0.0098
0.020
MIN
1.35
0.10
0.33
0.19
9.80
3.80
MAX
1.75
NOTES
-B-
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
-
1
2
3
0.25
-
L
0.51
9
SEATING PLANE
A
0.0075
0.3859
0.1497
0.0098
0.3937
0.1574
0.25
-
-A-
10.00
4.00
3
h x 45°
D
4
-C-
0.050 BSC
1.27 BSC
-
α
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
e
A1
C
5
B
0.10(0.004)
L
6
0.25(0.010) M
C
A M B S
N
α
16
16
7
0°
8°
0°
8°
-
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Rev. 1 6/05
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4805.21
19
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Thin Shrink Small Outline Plastic Packages (TSSOP)
M16.173
N
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
E
INCHES
MIN
-
MILLIMETERS
E1
-B-
GAUGE
PLANE
SYMBOL
MAX
0.043
0.006
0.037
0.012
0.008
0.201
0.177
MIN
-
MAX
1.10
0.15
0.95
0.30
0.20
5.10
4.50
NOTES
A
A1
A2
b
-
0.002
0.033
0.0075
0.0035
0.193
0.169
0.05
0.85
0.19
0.09
4.90
4.30
-
1
2
3
-
L
0.25
0.05(0.002)
SEATING PLANE
A
9
0.010
A2
-A-
c
-
D
D
3
-C-
E1
e
4
α
0.026 BSC
0.65 BSC
-
e
A1
c
E
0.246
0.256
6.25
6.50
-
b
0.10(0.004)
L
0.020
0.028
0.50
0.70
6
0.10(0.004) M
C
A M B S
N
16
16
7
o
o
o
o
0
8
0
8
-
α
NOTES:
Rev. 1 2/02
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact. (Angles in degrees)
FN4805.21
20
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SSOP)
M16.209 (JEDEC MO-150-AC ISSUE B)
N
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
-
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
0.002
0.065
0.009
0.004
0.233
0.197
0.05
1.65
0.22
0.09
5.90
5.00
-
1
2
3
0.072
0.014
0.009
0.255
0.220
1.85
0.38
0.25
6.50
5.60
-
L
0.25
SEATING PLANE
A
9
0.010
A2
-A-
C
D
E
-
D
3
-C-
4
α
e
0.026 BSC
0.65 BSC
-
e
A1
C
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
6
0.25(0.010) M
C
A M B S
N
α
16
16
7
0°
8°
0°
8°
-
NOTES:
Rev. 3 6/05
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4805.21
21
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SOIC)
M16.3 (JEDEC MS-013-AA ISSUE C)
N
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
10.10
7.40
MAX
2.65
NOTES
-B-
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
0.4133
0.2992
-
0.30
-
1
2
3
L
0.51
9
SEATING PLANE
A
0.0091
0.3977
0.2914
0.32
-
-A-
10.50
7.60
3
h x 45°
D
4
-C-
0.050 BSC
1.27 BSC
-
α
H
h
0.394
0.010
0.016
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
e
A1
C
5
B
0.10(0.004)
L
6
0.25(0.010) M
C
A M B S
N
α
16
16
7
0°
8°
0°
8°
-
NOTES:
Rev. 1 6/05
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4805.21
22
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SOIC)
M18.3 (JEDEC MS-013-AB ISSUE C)
N
18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MIN
0.0926
0.0040
0.013
MILLIMETERS
E
SYMBOL
MAX
0.1043
0.0118
0.0200
0.0125
0.4625
0.2992
MIN
2.35
0.10
0.33
0.23
11.35
7.40
MAX
2.65
NOTES
-B-
A
A1
B
C
D
E
e
-
0.30
-
1
2
3
L
0.51
9
SEATING PLANE
A
0.0091
0.4469
0.2914
0.32
-
-A-
11.75
7.60
3
h x 45°
D
4
-C-
0.050 BSC
1.27 BSC
-
α
H
h
0.394
0.010
0.016
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
e
A1
C
5
B
0.10(0.004)
L
6
0.25(0.010) M
C
A M B S
N
α
18
18
7
0°
8°
0°
8°
-
NOTES:
Rev. 1 6/05
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Thelead width“B”, as measured 0.36mm (0.014inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4805.21
23
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Thin Shrink Small Outline Plas tic Packages (TSSOP)
M20.173
N
20 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
E
E1
-B-
INCHES
MIN
MILLIMETERS
GAUGE
PLANE
SYMBOL
MAX
0.047
0.006
0.051
0.0118
0.0079
0.260
0.177
MIN
-
MAX
1.20
0.15
1.05
0.30
0.20
6.60
4.50
NOTES
A
A1
A2
b
-
-
1
2
3
0.002
0.031
0.0075
0.0035
0.252
0.169
0.05
0.80
0.19
0.09
6.40
4.30
-
L
0.25
0.010
-
0.05(0.002)
SEATING PLANE
A
9
-A-
D
c
-
D
3
-C-
α
E1
e
4
A2
e
A1
0.026 BSC
0.65 BSC
-
c
b
0.10(0.004)
E
0.246
0.256
6.25
0.45
6.50
0.75
-
0.10(0.004) M
C
A M B S
L
0.0177
0.0295
6
N
20
20
7
NOTES:
o
o
o
o
0
8
0
8
-
α
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AC, Issue E.
Rev. 1 6/98
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimen-
sion at maximum material condition. Minimum space between protru-
sion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
FN4805.21
24
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Shrink Small Outline Plastic Packages (SSOP)
M20.209 (JEDEC MO-150-AE ISSUE B)
N
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
M
M
B
0.25(0.010)
H
INCHES
MIN
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MAX
0.078
0.008’
0.070’
0.015
0.008
0.289
0.212
MIN
1.73
0.05
1.68
0.25
0.09
7.07
5.20’
MAX
1.99
0.21
1.78
0.38
0.20’
7.33
5.38
NOTES
-B-
A
A1
A2
B
0.068
0.002
0.066
0.010’
0.004
0.278
0.205
1
2
3
L
0.25
SEATING PLANE
A
9
0.010
A2
-A-
C
D
E
D
3
4
-C-
α
e
0.026 BSC
0.65 BSC
e
A1
C
H
L
0.301
0.311
7.65
7.90’
B
0.10(0.004)
0.025
0.037
0.63
0.95
6
7
M
M
S
B
0.25(0.010)
C
A
N
α
20
20
0 deg.
8 deg.
0 deg.
8 deg.
NOTES:
Rev. 3 11/02
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
FN4805.21
25
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Thin Shrink Small Outline Plastic Packages (TSSOP)
M28.173
N
28 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
E
E1
-B-
INCHES
MIN
MILLIMETERS
GAUGE
PLANE
SYMBOL
MAX
0.047
0.006
0.051
0.0118
0.0079
0.386
0.177
MIN
MAX
1.20
0.15
1.05
0.30
0.20
9.80
4.50
NOTES
A
A1
A2
b
-
-
-
1
2
3
0.002
0.031
0.0075
0.0035
0.378
0.169
0.05
0.80
0.19
0.09
9.60
4.30
-
L
0.25
0.05(0.002)
-
SEATING PLANE
A
0.010
A2
9
-A-
D
c
-
D
3
-C-
α
E1
e
4
e
A1
0.026 BSC
0.65 BSC
-
c
b
0.10(0.004)
E
0.246
0.256
6.25
0.45
6.50
0.75
-
0.10(0.004) M
C
A M B S
L
0.0177
0.0295
6
N
28
28
7
NOTES:
o
o
o
o
0
8
0
8
-
α
1. These package dimensions are within allowable dimensions of
Rev. 0 6/98
JEDEC MO-153-AE, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimen-
sion at maximum material condition. Minimum space between protru-
sion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
FN4805.21
26
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Shrink Small Outline Plastic Packages (SSOP)
M28.209 (JEDEC MO-150-AH ISSUE B)
N
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
GAUGE
PLANE
SYMBOL
MIN
-
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
-B-
A
A1
A2
B
-
0.002
0.065
0.009
0.004
0.390
0.197
0.05
1.65
0.22
0.09
9.90
5.00
-
1
2
3
0.072
0.014
0.009
0.413
0.220
1.85
0.38
0.25
10.50
5.60
-
L
0.25
SEATING PLANE
A
9
0.010
A2
-A-
C
D
E
-
D
3
-C-
4
α
e
0.026 BSC
0.65 BSC
-
e
A1
C
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
B
0.10(0.004)
6
0.25(0.010) M
C
A M B S
N
α
28
28
7
NOTES:
0°
8°
0°
8°
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
Rev. 2 6/05
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN4805.21
27
March 1, 2006
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plas tic Packages (SOIC)
M28.3 (JEDEC MS-013-AE ISSUE C)
N
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
MAX
2.65
0.30
0.51
0.32
18.10
7.60
NOTES
-B-
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
-
-
1
2
3
L
9
SEATING PLANE
A
0.0091
0.6969
0.2914
-
0.7125 17.70
3
-A-
o
h x 45
D
0.2992
7.40
4
0.05 BSC
1.27 BSC
-
-C-
α
H
h
0.394
0.01
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
e
A1
C
5
B
0.10(0.004)
L
0.016
6
0.25(0.010) M
C
A M B S
N
α
28
28
7
o
o
o
o
0
8
0
8
-
NOTES:
Rev. 0 12/93
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN4805.21
28
March 1, 2006
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