ISL1539IVEZ [RENESAS]
ISL1539IVEZ;
| 型号： | ISL1539IVEZ |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | ISL1539IVEZ |
| 文件： | 总11页 (文件大小：760K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL1539
FN7516
Rev 4.00
June 21, 2013
Dual Channel Differential VDSL2 Line Driver
The ISL1539 is to be used for high performance long reach
and high speed applications, including ADSL2, ADSL2+, and
VDSL2 20dBm.
Features
• 450mA output drive capability
• 44.1V
differential output drive into 100
• -85dBc THD @ 1MHz 2V
P-P
The ISL1539 is an integral part of the signal chain. The driver
has been optimized for flat gain response and reduced
harmonic distortion and noise in the bands of interest to
improve the overall signal to noise in the system.
P-P
• High slew rate of 1200V/µs differential
• Bandwidth - 80MHz @ A = 10
V
These drivers achieve a total harmonic distortion (THD)
measurement of typically -60dB MTPR @ 1.1MHz, while
consuming typically 10mA per DSL channel of total supply
current. This supply current can be set using a resistor on the
• Current control pins
• Channel separation
- 80dB @ 500kHz
- 75dB @ 1MHz
I
pin. Two other pins (C and C ) can also be used to adjust
ADJ
supply current to one of four pre-set modes (full-I , 3/4-I ,
0 1
S
S
- 60dB @ 4MHz
1/2-I , and full power-down). The ISL1539 operates on ±5V to
S
±15V supplies and retains its bandwidth and linearity over the
complete supply range.
• Pb-free (RoHS compliant)
Applications
• VDSL2 20dBm
• ADSL2++
The device is supplied in the small footprint (4mmx5mm) 24 Ld
QFN package and is specified for operation over the full
-40°C to +85°C temperature range.
Ordering Information
Pin Configuration
PART NUMBER
PART
PACKAGE
ISL1539
(24 LD QFN)
TOP VIEW
(Notes 2, 3)
MARKING
(Pb-free)
PKG. DWG. #
MDP0046
ISL1539IRZ
1539 IRZ
1539 IRZ
24 Ld QFN
ISL1539IRZ-T7
(Note 1)
24 Ld QFN
MDP0046
ISL1539IRZ-T13 1539 IRZ
(Note 1)
24 Ld QFN
MDP0046
VINA+
VINB+
GND
1
2
3
4
5
6
7
19 VINA-
NOTES:
18 VINB-
1. Please refer to TB347 for details on reel specifications.
17 VOUTB
16 NC/SHIELD
15 VOUTC
14 VINC-
2. These Intersil Pb-free plastic packaged products employ special Pb-
free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is
RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-
free requirements of IPC/JEDEC J STD-020.
THERMAL
PAD
IADJ
NC
VINC+
VIND+
13 VIND-
3. For Moisture Sensitivity Level (MSL), please see device information
page for ISL1539. For more information on MSL, please see tech
brief TB363
FN7516 Rev 4.00
June 21, 2013
Page 1 of 11
ISL1539
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
V + to V - Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +30V
Thermal Resistance (Typical)
24 Ld QFN Package . . . . . . . . . . . . . . . . . . .
JA (°C/W)
38
JC (°C/W)
S
S
V + Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +30V
N/A
S
V - Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -30V to +0.3V
S
Power Dissipation. . . . . . . . . . . . . . . . . . .See curves on page 8 and page 8
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . .-40°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Driver V + Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V - to V +
IN
S
S
C , C Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
0
1
I
Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +4V
ADJ
Current into any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA
Output Current from Driver (Static) . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . . . . . . 3kV
Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . . . . . . 250V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted,
all tests are at the specified temperature and are pulsed tests, therefore: T = T = T
J
C
A
Electrical Specifications
V
= ±12V, R = 3kΩ, R = 65Ω, I
= C = C = 0V, T = +25°C. Amplifiers tested separately.
S
F
L
ADJ
0
1
A
MIN
MAX
PARAMETER
DESCRIPTION
CONDITIONS
(Note 4)
TYP
(Note 4) UNIT
SUPPLY CHARACTERISTICS
I + (Full I )
Positive Supply Current per Amplifier
Negative Supply Current per Amplifier
Positive Supply Current per Amplifier
Negative Supply Current per Amplifier
Positive Supply Current per Amplifier
Negative Supply Current per Amplifier
Positive Supply Current per Amplifier
Negative Supply Current per Amplifier
GND Supply Current per Amplifier
All outputs at 0V, C = C = 0V, R
= 0
= 0
7.5
10
-9.9
7.5
-7.4
5.1
-5
12.5
-7.4
mA
mA
mA
mA
mA
mA
mA
mA
mA
S
S
0
1
ADJ
ADJ
I - (Full I )
All outputs at 0V, C = C = 0V, R
-12.4
S
S
0
1
I + (3/4 I )
All outputs at 0V, C = 5V, C = 0V, R
= 0
= 0
= 0
= 0
S
S
0
1
ADJ
ADJ
ADJ
I - (3/4 I )
All outputs at 0V, C = 5V, C = 0V, R
0 1
S
S
I + (1/2 I )
All outputs at 0V, C = 0V, C = 5V, R
3.7
6.3
-3.5
1.0
S
S
0
1
I - (1/2 I )
All outputs at 0V, C = 0V, C = 5V, R
-6.2
S
S
0
1
ADJ
I + (Power-down)
All outputs at 0V, C = C = 5V, R
= 0
0.1
0
S
0
1
ADJ
ADJ
I - (Power-down)
All outputs at 0V, C = C = 5V, R
= 0
-1.0
S
0
1
I
All outputs at 0V
0.1
GND
INPUT CHARACTERISTICS
Input Offset Voltage
V
-2
-5
+1
0
+2
+5
mV
mV
µA
OS
V
V
Mismatch
OS
I +
OS
Non-Inverting Input Bias Current
Inverting Input Bias Current
-10
-75
-15
+10
+60
+15
B
I -
µA
B
I -
I - Mismatch
B
0
3
µA
B
R
Transimpedance
MΩ
nV/Hz
pA/Hz
V
OL
N
e
Input Noise Voltage
-Input Noise Current
Input High Voltage
2.7
19
i
N
V
C
C
C
C
C
and C inputs, with signal
1.8
1.6
IH
IL
0
0
0
0
0
1
and C inputs, without signal
V
1
V
Input Low Voltage
and C inputs
0.8
40
V
1
I
I
I
Input High Current for C
C
= 5V, C = 5V
10
µA
IH0 , IH1
0,
1
1
I
Input Low Current for C or C
= 0V, C = 0V
-15
-4.0
µA
IL0, IL1
0
1
1
FN7516 Rev 4.00
June 21, 2013
Page 2 of 11
ISL1539
Electrical Specifications
V
= ±12V, R = 3kΩ, R = 65Ω, I
= C = C = 0V, T = +25°C. Amplifiers tested separately. (Continued)
S
F
L
ADJ 0 1 A
MIN
MAX
PARAMETER
DESCRIPTION
CONDITIONS
(Note 4)
TYP
(Note 4) UNIT
OUTPUT CHARACTERISTICS
V
Loaded Output Swing
R = 100Ω
±11.1
10.95
V
V
OUT
L
(R Single-ended to GND)
L
R = 50Ω(+)
10.65
9.8
L
R = 50Ω (-)
-10.95 -10.55
10.7
V
V
L
R = 25Ω (+)
L
R = 25Ω (-)
-10.7
450
-9.2
V
L
I
I
Linear Output Current
Output Current
A = 5, R = 10Ω f = 100kHz, THD = -60dBc (10Ω
mA
OL
V
L
single-ended)
V
= 1V, R = 1Ω
1
A
OUT
OUT
L
DYNAMIC PERFORMANCE
BW
-3dB Bandwidth
A
= +10
80
-90
-94
-89
-86
-80
-90
-75
-85
-70
MHz
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
V
HD2 at 200kHz
HD3 at 200kHz
THD at 200kHz
HD2 at 1MHz
2nd Harmonic Distortion at 200kHz
3rd Harmonic Distortion at 200kHz
Total Harmonic Distortion at 200kHz
2nd Harmonic Distortion at 1MHz
f
f
f
f
f
f
f
f
= 200kHz, R = 100Ω, V
= 2V
= 2V
= 2V
C
C
C
C
C
C
C
C
L
OUT
OUT
OUT
P-P
P-P
P-P
= 200kHz, R = 100Ω, V
L
= 200kHz, R = 100Ω, V
L
= 1MHz, R = 100ΩV
OUT
= 2V
P-P
L
= 1MHz, R = 25ΩV
OUT
= 2V
P-P
L
HD3 at 1MHz
3rd Harmonic Distortion at 1MHz
= 1MHz, R = 100ΩV = 2V
OUT
L
P-P
= 1MHz, R = 25ΩV
OUT
= 2V
L
P-P
THD at 1MHz
MTPR
Total Harmonic Distortion at 1MHz
Multi-Tone Power Ratio
= 1MHz, R = 100Ω V = 2V
OUT
L
P-P
26kHz to 1.1MHz, R
LINE
= 100Ω,
P
= 20.4dBM
LINE
SR
Slewrate (single-ended)
V
from -8V to +8V measured at ±4V
500
V/µs
OUT
NOTE:
4. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
FN7516 Rev 4.00
June 21, 2013
Page 3 of 11
ISL1539
Pin Descriptions
ISL1539IR
(QFN24)
PIN NAME
VINA+
FUNCTION
CIRCUIT
1
Amplifier A non-inverting input
V +
S
V -
S
CIRCUIT 1
2
3
4
VINB+
GND
Amplifier B non-inverting input
Ground connection
(Reference Circuit 1)
IADJ (Note 5)
Supply current control pin for both
DSL channels #1 and #2
V +
S
I
ADJ
V -
S
GND
CIRCUIT 2
5
6
7
8
NC
VINC+
Not connected
Amplifier C non-inverting input
Amplifier D non-inverting input
DSL channel #2 current control pin
(Reference Circuit 1)
(Reference Circuit 1)
VIND+
C1CD (Note 6)
V +
V +
S
S
1K
C
OAB
V -
S
I
ADJ
CIRCUIT 3
9
10, 22
11, 21
12
C0CD (Note 6)
VS-
DSL channel #2 current control pin (Reference Circuit 3)
Negative supply
Positive supply
VS+
VOUTD
VIND-
Amplifier D output
(Reference Circuit 1)
(Reference Circuit 1)
(Reference Circuit 1)
(Reference Circuit 1)
13
Amplifier D inverting input
Amplifier C inverting input
Amplifier C output
14
VINC-
15
VOUTC
NC/SHIELD
VOUTB
16
17
Amplifier B output
(Reference Circuit 1)
FN7516 Rev 4.00
June 21, 2013
Page 4 of 11
ISL1539
Pin Descriptions(Continued)
ISL1539IR
(QFN24)
PIN NAME
VINB-
FUNCTION
Amplifier B inverting input
Amplifier A inverting input
Amplifier A output
CIRCUIT
(Reference Circuit 1)
(Reference Circuit 1)
(Reference Circuit 1)
18
19
VINA-
20
VOUTA
23
C0AB (Note 7)
C1AB (Note 7)
DSL channel #1 current control pin (Reference Circuit 3)
DSL channel #1 current control pin (Reference Circuit 3)
24
NOTES:
5. I
ADJ
controls bias current (I ) setting for both DSL channels.
S
6. Amplifiers C and D comprise DSL channel #2. C
and C
control I settings for DSL channel #2.
S
control I settings for DSL channel #1.
S
0CD
0AB
1CD
1AB
7. Amplifiers A and B comprise DSL channel #1. C
and C
Typical Performance Curves
V
C
= ±12V
= 1.8pF
= +12.4
S
L
V
C
= ±12V
= 1.8pF
= +12.4
S
L
R = 2kΩ
F
R
= 2kΩ
F
A
V
A
V
R
= 100Ω
L
R
= 100Ω
L
R
= 3kΩ
R
= 3kΩ
F
F
R
= 5kΩ
R = 5kΩ
F
F
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS R (FULL
F
FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS R (HALF
F
POWER MODE)
POWER MODE)
V
= ±12V
= +12.4
= 27pF
V
R
= ±12V
= 5kΩ
= +12.4
S
S
F
A
V
R
= 3.48kΩ
F
C
R
A
L
V
= 100Ω
R
= 100Ω
L
L
C
= 100pF
L
C
= 47pF
L
R
= 4.99kΩ
F
C
= 22pF
L
C
= 1.8pF
L
FIGURE 3. FREQUENCY RESPONSE FOR VARIOUS C
(FULL POWER MODE)
FIGURE 4. COMMON MODE FREQUENCY RESPONSE FOR
VARIOUS R (FULL POWER MODE)
L
F
FN7516 Rev 4.00
June 21, 2013
Page 5 of 11
ISL1539
Typical Performance Curves (Continued)
V
R
= ±12V
= 3kΩ
= +12.4
S
F
V
R
= ±12V
= 5kΩ
= +12.4
S
F
A
V
A
V
R
= 100Ω
L
R
= 100Ω
L
2ND HD
3RD HD
2ND HD
3RD HD
FIGURE 5. 200KHz 2ND AND 3RD HARMONIC DISTORTION vs
VOLTAGE OUTPUT (FULL POWER MODE)
FIGURE 6. 200kHz 2ND AND 3RD HARMONIC DISTORTION vs
VOLTAGE OUTPUT (HALF POWER MODE)
V
R
= ±12V
= 3kΩ
= +12.4
S
F
V
R
= ±12V
= 5kΩ
= +12.4
S
F
A
V
A
V
R
= 100Ω
L
R
= 100Ω
L
3RD HD
2ND HD
2ND HD
3RD HD
FIGURE 7. 1MHz 2ND AND 3RD HARMONIC DISTORTION vs
OUTPUT VOLTAGE (FULL POWER MODE)
FIGURE 8. 1MHz 2ND AND 3RD HARMONIC DISTORTION vs
OUPUT VOLTAGE (HALF POWER MODE)
V
R
= ±12V
= 5kΩ
= +12.4
V
R
= ±12V
= 3kΩ
= +12.4
S
F
S
F
A
A
V
V
3RD HD
R
= 100Ω
R
= 100Ω
L
L
3RD HD
2ND HD
2ND HD
FIGURE 9. 3.75MHz 2ND AND 3RD HARMONIC DISTORTION vs
OUTPUT VOLTAGE (FULL POWER MODE)
FIGURE 10. 3.75MHz 2ND AND 3RD HARMONIC DISTORTION vs
OUTPUT VOLTAGE (HALF POWER MODE)
FN7516 Rev 4.00
June 21, 2013
Page 6 of 11
ISL1539
Typical Performance Curves (Continued)
V
R
= ±12V
= 3kΩ
= +12.4
V
R
= ±12V
= 3kΩ
= +12.4
S
F
S
F
A
A
V
V
R
= 100Ω
R
= 100Ω
L
L
3.75MHz
1MHz
10MHz
3RD HD
2ND HD
200kHz
FIGURE 11. 10MHz 2ND AND 3RD HARMONIC DISTORTION vs
OUTPUT VOLTAGE (FULL POWER MODE)
FIGURE 12. TOTAL HARMONIC DISTORTION FOR VARIOUS
FREQUENCIES (FULL POWER MODE)
V
R
= ±12V
= 3kΩ
= +12.4
V = ±12V
S
S
F
FULL +I
S
R
= 2kΩ
ADJ
A
V
R
= 475Ω
ADJ
R
= 100Ω
L
3/4 +I
S
FULL -I
S
1/2 +I
S
R
= 0Ω
ADJ
3/4 -I
S
1/2 -I
S
R
()
ADJ
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS R
FIGURE 14. SUPPLY CURRENT vs R
MODE
FOR VARIOUS POWER
ADJ
ADJ
0
-10
-20
-30
AB ≥ CD
-40
-50
-60
-70
CD ≥ AB
-80
-90
-100
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 15. CHANNEL SEPARATION vs FREQUENCY
FIGURE 16. TRANSIMPEDANCE
FN7516 Rev 4.00
June 21, 2013
Page 7 of 11
ISL1539
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CODCTIVITY TEST BOARD
V
R
= ±12V
= 1kΩ
S
L
4.5
4.0
3.5
PSRR-
3.0
2.5
2.0
1.5
3.378W
QFN-24
PSRR+
= +38°C/W
1.0
0.5
0.0
JA
25
85 100
75
125
50
0
150
AMBIENT TEMPERATURE (°C)
FIGURE 17. PSRR vs FREQUENCY
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE
THERMAL CODCTIVITY TEST BOARD
1.2
1.0
0.8
0.6
0.4
0.2
0.0
893mW
QFN-24
= +140°C/W
JA
25
AMBIENT TEMPERATURE (°C)
75
85 100
125
50
0
150
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FN7516 Rev 4.00
June 21, 2013
Page 8 of 11
ISL1539
Application Information
Power Supplies and Dissipation
The ISL1539 consists of two sets of high-power line driver
amplifiers that can be connected for full duplex differential line
transmission. The amplifiers are designed to be used with signals
up to 30MHz and produce low distortion levels. A typical interface
circuit is shown in Figure 20.
Due to the high power drive capability of the ISL1539, much
attention needs to be paid to power dissipation. The power that
needs to be dissipated in the ISL1539 has two main contributors.
The first is the quiescent current dissipation. The second is the
dissipation of the output stage.
The quiescent power in the ISL1539 is not constant with varying
outputs. In reality, 7mA of the 15mA needed to power the drivers
is converted in to output current. Therefore, in the equation below
DRIVER
INPUT
R
LINE +
OUT
+
-
we should subtract the average output current, I , or 7mA,
O
R
R
F
F
whichever is the lowest. We’ll call this term I .
X
R
G
Therefore, we can determine a quiescent current with
Equation 1:
Z
LINE
R
OUT
P
= V I – 2I
S S X
-
+
Dquiescent
(EQ. 1)
LINE -
where:
• V is the supply voltage (V + to V -)
R
R
F
S
S
S
-
RECEVIE
OUT+
R
+
IN
• I is the maximum quiescent supply current (I + + I -)
S
S
S
RECEVIE
AMPLIFIERS
• I is the lesser of I or 7mA (generally I = 7mA)
+
-
X
O
X
R
The dissipation in the output stage has two main contributors.
Firstly, we have the average voltage drop across the output
transistor and secondly, the average output current. For minimal
power dissipation, the user should select the supply voltage and
the line transformer ratio accordingly. The supply voltage should
be kept as low as possible, while the transformer ratio should be
selected so that the peak voltage required from the ISL1539 is
close to the maximum available output swing. There is a trade
off, however, with the selection of transformer ratio. As the ratio
is increased, the receive signal available to the receivers is
reduced.
RECEVIE
OUT-
R
R
F
IN
FIGURE 20. TYPICAL LINE INTERFACE CONNECTION
The amplifiers are wired with one in positive gain and the other in
a negative gain configuration to generate a differential output for
a single-ended input. They will exhibit very similar frequency
responses for gains of three or greater and thus generate very
small common-mode outputs over frequency, but for low gains
the two drivers RF's need to be adjusted to give similar frequency
responses. The positive-gain driver will generally exhibit more
bandwidth and peaking than the negative-gain driver.
Once the user has selected the transformer ratio, the dissipation
in the output stages can be selected with Equation 2:
V
S
2
If a differential signal is available to the drive amplifiers, they
may be wired so:
-------
P
= 2 I
– V
O
Dtransistors
O
(EQ. 2)
where:
• V is the supply voltage (V + to V -)
+
-
S
S
S
R
F
• V is the average output voltage per channel
O
• I is the average output current per channel
2R
O
G
R
F
The overall power dissipation (P
) is obtained by adding
DISS
P
and P
.
Dtransistor
Dquiescent
-
+
Then, the requirement needs to be calculated. This is done
JA
using Equation 3:
FIGURE 21. DRIVERS WIRED FOR DIFFERENTIAL INPUT
T
– T
AMB
JUNCT
-------------------------------------------------
=
Each amplifier has identical positive gain connections, and
optimum common-mode rejection occurs. Further, DC input
errors are duplicated and create common-mode rather than
differential line errors.
JA
P
DISS
(EQ. 3)
FN7516 Rev 4.00
June 21, 2013
Page 9 of 11
ISL1539
where:
Power Supplies
• T
• T
is the maximum die temperature (+150°C)
The power supplies should be well bypassed close to the
ISL1539. A 3.3µF tantalum capacitor for each supply works well.
Since the load currents are differential, they should not travel
through the board copper and set up ground loops that can
return to amplifier inputs. Due to the class AB output stage
design, these currents have heavy harmonic content. If the
ground terminal of the positive and negative bypass capacitors
are connected to each other directly and then returned to circuit
ground, no such ground loops will occur. This scheme is
employed in the layout of the EL1537 demonstration board, and
documentation can be obtained from the factory.
JUNCT
is the maximum ambient temperature
is the dissipation calculated above
AMB
• P
DISS
• is the junction to ambient thermal resistance for the
package when mounted on the PCB
JA
This value is then used to calculate the area of copper
needed on the board to dissipate the power.
JA
The IRE and QFN power packages are designed so that heat may
be conducted away from the device in an efficient manner. To
disperse this heat, the bottom diepad is internally connected to
the mounting platform of the die. Heat flows through the diepad
into the circuit board copper, then spreads and convects to air.
Thus, the ground plane on the component side of the board
becomes the heatsink. This has proven to be a very effective
Power Control Function
The ISL1539 contains two forms of power control operation. Two
digital inputs, C and C , can be used to control the supply
0
1
current of the ISL1539 drive amplifiers. As the supply current is
reduced, the ISL1539 will start to exhibit slightly higher levels of
distortion and the frequency response will be limited. The four
power modes of the ISL1539 are set up as shown in the table1
below.
technique. of +30°C/W can be achieved.
JA
Single Supply Operation
The ISL1539 can also be powered from a single supply voltage.
When operating in this mode, the GND pins can still be
connected directly to GND. To calculate power dissipation, the
equations in the previous section should be used, with V equal
to half the supply rail.
TABLE 1. POWER MODES OF THE EL15371
C
C
Operation
I Full Power Mode
S
1
0
S
0
0
0
1
1
1
0
1
3/4-I Power Mode
S
Output Loading
1/2-I Power Mode
S
While the drive amplifiers can output in excess of 450mA
transiently, the internal metallization is not designed to carry
more than 75mA of steady DC current and there is no
current-limit mechanism. This allows safely driving rms
sinusoidal currents of 2mAx75mA, or 150mA. This current is
more than that required to drive line impedances to large output
levels, but output short circuits cannot be tolerated. The series
output resistor will usually limit currents to safe values in the
event of line shorts. Driving lines with no series resistor is a
serious hazard.
Power Down
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For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
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FN7516 Rev 4.00
June 21, 2013
Page 10 of 11
ISL1539
QFN (Quad Flat No-Lead) Package
Family
MDP0046
QFN (QUAD FLAT NO-LEAD) PACKAGE FAMILY
(COMPLIANT TO JEDEC MO-220)
MILLIMETERS
A
SYMBOL QFN44 QFN38
QFN32
TOLERANCE
±0.10
NOTES
D
B
A
A1
b
0.90
0.02
0.25
0.20
7.00
5.10
0.90 0.90
0.90
0.02
0.22
0.20
5.00
-
-
0.02 0.02
0.25 0.23
0.20 0.20
5.00 8.00
+0.03/-0.02
±0.02
-
1
2
3
c
Reference
Basic
-
PIN #1
I.D. MARK
D
-
E
D2
3.80 5.80 3.60/2.4
8
Reference
8
E
7.00
5.10
7.00 8.00
6.00
Basic
-
E2
5.80 5.80 4.60/3.4
0
Reference
8
2X
0.075 C
e
L
0.50
0.55
44
0.50 0.80
0.40 0.53
0.50
0.50
32
7
Basic
-
2X
0.075 C
±0.05
-
TOP VIEW
N
38
7
32
8
Reference
Reference
Reference
4
6
5
ND
NE
11
0.10 M C A B
b
11
12
8
9
L
PIN #1 I.D.
MILLIMETERS
SYMBOL QFN28 QFN24 QFN20
TOLER-
ANCE
3
QFN16
0.90
NOTES
1
2
3
A
0.90
0.02
0.90 0.90
0.90
0.02
±0.10
-
-
A1
0.02 0.02
0.02
+0.03/
-0.02
(E2)
b
c
0.25
0.20
4.00
2.65
5.00
3.65
0.50
0.40
28
0.25 0.30
0.20 0.20
4.00 5.00
2.80 3.70
5.00 5.00
3.80 3.70
0.50 0.65
0.40 0.40
0.25
0.20
4.00
2.70
4.00
2.70
0.50
0.40
20
0.33
0.20
4.00
2.40
4.00
2.40
0.65
0.60
16
±0.02
Reference
Basic
-
-
5
NE
D
-
D2
E
Reference
Basic
-
-
7
(D2)
E2
e
Reference
Basic
-
BOTTOM VIEW
-
L
±0.05
-
0.10 C
e
N
24
5
20
5
Reference
Reference
Reference
4
6
5
C
ND
NE
6
5
4
SEATING
PLANE
8
7
5
5
4
Rev 11 2/07
0.08 C
SEE DETAIL "X"
NOTES:
N LEADS
& EXPOSED PAD
SIDE VIEW
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Tiebar view shown is a non-functional feature.
3. Bottom-side pin #1 I.D. is a diepad chamfer as shown.
4. N is the total number of terminals on the device.
5. NE is the number of terminals on the “E” side of the package
(or Y-direction).
(c)
2
A
C
6. ND is the number of terminals on the “D” side of the package
(or X-direction). ND = (N/2)-NE.
(L)
7. Inward end of terminal may be square or circular in shape with radius
(b/2) as shown.
A1
DETAIL X
N LEADS
8. If two values are listed, multiple exposed pad options are available. Refer
to device-specific datasheet.
FN7516 Rev 4.00
June 21, 2013
Page 11 of 11
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