ISL28130CBZ-T [RENESAS]

IC OP-AMP, 46.8 uV OFFSET-MAX, 0.4 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, PLASTIC, MS-012, SOIC-8, Operational Amplifier;
ISL28130CBZ-T
型号: ISL28130CBZ-T
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

IC OP-AMP, 46.8 uV OFFSET-MAX, 0.4 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, PLASTIC, MS-012, SOIC-8, Operational Amplifier

光电二极管
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Single, Dual, and Quad Micropower, Low Drift, RRIO  
Operational Amplifiers  
ISL28130, ISL28230, ISL28430  
Features  
The ISL28130, ISL28230 and ISL28430 are single, dual and  
quad micropower, low offset drift operational amplifiers that are  
optimized for single and dual supply operation from 1.8V to 5.5V  
and ±0.9V to ±2.75V. Their low supply current of 20µA and  
rail-to-rail input/output enable the ISL28130, ISL28230, and  
ISL28430 to be an excellent general-purpose op amp for a range  
of applications. The ISL28130, ISL28230 and ISL28430 are  
ideal for handheld devices that operate off 2 AA or single Li-ion  
batteries.  
• Low Input Offset Voltage. . . . . . . . . . . . . . . . . . . . . 40µV, Max.  
• Low Offset Drift . . . . . . . . . . . . . . . . . . . . . . . .150nV/°C, Max.  
• Input Bias Current . . . . . . . . . . . . . . . . . . . . . . . . 250 pA, Max.  
• Quiescent Current (Per Amplifier) . . . . . . . . . . . . . .20µA, Typ.  
• Single Supply Range . . . . . . . . . . . . . . . . . . . . .+1.8V to +5.5V  
• Dual Supply Range. . . . . . . . . . . . . . . . . . . . . .±0.9V to ±2.75V  
• Low Noise (0.01Hz to 10Hz) . . . . . . . . . . . . . . . .1.1µV , Typ.  
P-P  
The ISL28130 is available in industry standard pinouts for  
5 Ld SOT-23, 5 Ld SC70 and 8 Ld SOIC packages. The ISL28230  
is available in industry standard pinouts for 8 Ld MSOP,  
8 Ld SOIC and 8 Ld DFN packages. The ISL28430 is available in  
14 Ld TSSOP and 14 Ld SOIC packages. Commercial devices  
operate over the temperature range of 0°C to 70°C. Full  
temperature range devices operate over the temperature range  
of -40°C to 125°C.  
• Rail-to-Rail Inputs and Output  
Applications  
• Bi-Directional Current Sense  
• Temperature Measurement  
• Medical Equipment  
• Electronic Weigh Scales  
• Precision/Strain Gauge Sensor  
• Precision Regulation  
• Low Ohmic Current Sense  
• High Gain Analog Front Ends  
400  
300  
200  
V
+
I-SENSE+  
+1.8V TO +5.5V  
V
REF  
499k  
4.99k  
4.99k  
+
-
V+  
V-  
V
= ±2.5V  
S
V
SENSE  
OUT  
0.1  
100  
0
V = ±0.9V  
S
499k  
GND  
-100  
I-SENSE-  
-50  
-25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
BI-DIRECTIONAL CURRENT SENSE AMPLIFIER  
FIGURE 2. I vs TEMPERATURE  
FIGURE 1. TYPICAL APPLICATION DIAGRAM  
B
February 23, 2012  
FN7623.4  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2010, 2011, 2012. All Rights Reserved  
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.  
All other trademarks mentioned are the property of their respective owners.  
1
ISL28130, ISL28230, ISL28430  
Ordering Information  
PART NUMBER  
(Notes 3, 4)  
PART  
MARKING  
TEMP RANGE  
TEMPERATURE  
PACKAGE  
(Pb-Free)  
PKG.  
DWG. #  
(°C)  
GRADE  
ISL28130CHZ-T7 (Note 2)  
ISL28130CHZ-T7A (Note 2)  
BDPA (Note 5)  
BDPA (Note 5)  
0 to +70  
0 to +70  
Commercial  
5 Ld SOT-23  
P5.064A  
Commercial  
5 Ld SOT-23  
P5.064A  
Coming Soon  
ISL28130FHZ-T7 (Note 2)  
BEFA (Note 5)  
-40 to +125  
Full  
5 Ld SOT-23  
P5.064A  
Coming Soon  
ISL28130FHZ-T7A (Note 2)  
BEFA (Note 5)  
BLA (Note 5)  
BLA (Note 5)  
-40 to +125  
0 to +70  
Full  
5 Ld SOT-23  
5 Ld SC-70  
5 Ld SC-70  
5 Ld SC-70  
P5.064A  
P5.049  
P5.049  
ISL28130CEZ-T7 (Note 2)  
ISL28130CEZ-T7A (Note 2)  
Commercial  
Commercial  
0 to +70  
Coming Soon  
ISL28130FEZ-T7 (Note 2)  
BNA (Note 5)  
BNA (Note 5)  
28130 CBZ  
-40 to +125  
-40 to +125  
0 to +70  
Full  
P5.049  
P5.049  
M8.15E  
Coming Soon  
ISL28130FEZ-T7A (Note 2)  
5 Ld SC-70  
8 Ld SOIC  
Full  
Coming Soon  
ISL28130CBZ (Note 1)  
Commercial  
Coming Soon  
ISL28130FBZ (Note 1)  
28130 FBZ  
8230Z  
-40 to +125  
0 to +70  
Full  
8 Ld SOIC  
M8.15E  
ISL28230CUZ (Note 1)  
Commercial  
8 Ld MSOP  
M8.118A  
Coming Soon  
ISL28230FUZ (Note 1)  
8230F  
-40 to +125  
0 to +70  
Full  
8 Ld MSOP  
M8.118A  
M8.15E  
M8.15E  
L8.3x3J  
ISL28230CBZ (Note 1)  
ISL28230FBZ (Note 1)  
ISL28230CRZ (Note 1)  
28230 CBZ  
28230 FBZ  
230Z  
Commercial  
Full  
8 Ld SOIC  
-40 to +125  
0 to +70  
8 Ld SOIC  
Commercial  
8 Ld 3mmx3mm DFN  
Coming Soon  
ISL28230FRZ (Note 1)  
230F  
-40 to +125  
0 to +70  
Full  
8 Ld 3mmx3mm DFN  
14 Ld SOIC  
L8.3x3J  
ISL28430CBZ (Note 1)  
28430 CBZ  
Commercial  
MDP0027  
Coming Soon  
ISL28430FBZ (Note 1)  
28430 FBZ  
28430 CVZ  
-40 to +125  
0 to +70  
Full  
14 Ld SOIC  
MDP0027  
MDP0044  
ISL28430CVZ (Note 1)  
Commercial  
14 Ld TSSOP  
Coming Soon  
ISL28430FVZ (Note 1)  
28430 FVZ  
-40 to +125  
Full  
14 Ld TSSOP  
MDP0044  
NOTES:  
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.  
2. Only available in tape and reel. Please refer to TB347 for details on reel specifications.  
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate  
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are  
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
4. For Moisture Sensitivity Level (MSL), please see device information page for ISL28130, ISL28230, ISL28430. For more information on MSL please  
see Tech Brief TB363.  
5. The part marking is located on the bottom of the part.  
FN7623.4  
February 23, 2012  
2
ISL28130, ISL28230, ISL28430  
Pin Configurations  
ISL28130  
(5 LD SOT-23)  
TOP VIEW  
ISL28130  
(8 LD SOIC)  
TOP VIEW  
1
2
3
5
V+  
IN-  
OUT  
V-  
NC  
IN-  
IN+  
V-  
1
2
3
4
8
7
6
5
NC  
V+  
+
-
OUT  
NC  
4
IN+  
ISL28130  
ISL28230  
(5 LD SC-70)  
TOP VIEW  
(8 LD MSOP, SOIC)  
TOP VIEW  
1
2
3
5
4
V+  
IN+  
V-  
OUT_A  
IN-_A  
IN+_A  
V-  
1
2
3
4
8 V+  
+
-
7 OUT_B  
6 IN-_B  
5 IN+_B  
-
+
OUT  
IN-  
+
-
ISL28230  
(8 LD DFN)  
TOP VIEW  
ISL28430  
(14 LD TSSOP, SOIC)  
TOP VIEW  
OUT_A  
IN-_A  
IN+_A  
V+  
1
2
3
4
5
6
7
14 OUT_D  
OUT_A  
IN-_A  
IN+_A  
V-  
V+  
1
2
3
4
8
7
6
5
13 IN-_D  
12 IN+_D  
11 V-  
OUT_B  
IN-_B  
-
+
+
-
PAD  
IN+_B  
IN+_B  
IN-_B  
OUT_B  
10 IN+_C  
+
-
+ -  
9
8
IN-_C  
OUT_C  
FN7623.4  
February 23, 2012  
3
ISL28130, ISL28230, ISL28430  
Pin Descriptions  
ISL28230  
(8 Ld MSOP,  
ISL28430  
(14 Ld  
ISL28130  
ISL28130  
ISL28130  
PIN  
(5 Ld SOT-23) (8 Ld SOIC) (5 LD SC-70) SOIC, DFN) TSSOP, SOIC) NAME  
FUNCTION  
EQUIVALENT CIRCUIT  
3
3
1
IN+  
Non-inverting input  
V+  
3
5
-
3
5
10  
12  
IN+_A  
IN+_B  
IN+_C  
IN+_D  
-
IN-  
-
+
IN+  
V-  
Circuit 1  
2
4
4
2
2
3
4
11  
V-  
Negative supply  
Inverting input  
IN-  
(See “Circuit 1”)  
2
6
-
2
6
9
IN-_A  
IN-_B  
IN-_C  
IN-_D  
-
13  
V+  
1
6
4
OUT Output  
OUT_A  
OUT_B  
OUT_C  
OUT_D  
1
7
-
1
7
8
OUT  
V-  
-
14  
Circuit 2  
5
-
7
5
-
8
-
4
-
V+  
NC  
Positive supply  
1, 5, 8  
-
Not Connected – This pin is not electrically connected internally.  
-
-
PAD  
-
Paddle  
Thermal Pad.  
Connect to most  
negative supply.  
DFN packages only.  
FN7623.4  
February 23, 2012  
4
ISL28130, ISL28230, ISL28430  
Absolute Maximum Ratings  
Thermal Information  
Max Supply Voltage V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5V  
Max Voltage VIN to GND . . . . . . . . . . . . . . . . . . . . (V- - 0.3V) to (V+ + 0.3V)V  
Max Input Differential Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V  
Max Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA  
Max Voltage VOUT to GND (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±3.0V  
ESD Tolerance (ISL28130)  
Human Body Model (Tested at JESD22-A114F) . . . . . . . . . . . . . . . 3000V  
Machine Model (Tested at JESD22-A115B) . . . . . . . . . . . . . . . . . . . 200V  
Charged Device Model (Tested at JESD22-C110D) . . . . . . . . . . . . 1500V  
ESD Tolerance (ISL28230, ISL28430)  
Thermal Resistance (Typical)  
θ
JA (°C/W)  
225  
206  
135  
180  
125  
53  
θ
JC (°C/W)  
110  
146  
95  
5 Ld SOT-23 (Notes 6, 8) . . . . . . . . . . . . . . .  
5 Ld SC70 (Notes 6, 8). . . . . . . . . . . . . . . . .  
8 Ld SOIC (ISL28130) (Notes 6, 8). . . . . . .  
8 Ld MSOP (Notes 6, 8) . . . . . . . . . . . . . . . .  
8 Ld SOIC (ISL28230) (Notes 6, 8). . . . . . .  
8 Ld DFN (Notes 7, 9). . . . . . . . . . . . . . . . . .  
14 Ld TSSOP (Notes 6, 8) . . . . . . . . . . . . . .  
14 Ld SOIC (Notes 6, 8) . . . . . . . . . . . . . . . .  
65  
90  
12  
40  
110  
75  
47  
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C  
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below  
http://www.intersil.com/pbfree/Pb-FreeReflow.asp  
Human Body Model (Tested at JESD22-A114F) . . . . . . . . . . . . . . . 4000V  
Machine Model (Tested at JESD22-A115B) . . . . . . . . . . . . . . . . . . . 400V  
Charged Device Model (Tested at JESD22-C110D) . . . . . . . . . . . . 2000V  
Latch-Up (Passed Per JESD78B). . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C  
Operating Conditions  
Temperature Range  
Full Grade Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C  
Commercial Grade Devices. . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C  
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product  
reliability and result in failures not covered by warranty.  
NOTES:  
6. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.  
JA  
7. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech  
JA  
Brief TB379.  
8. For θ , the “case temp” location is taken at the package top center.  
JC  
9. For θ , the “case temp” location is the center of the exposed metal pad on the package underside.  
JC  
Electrical Specifications V = 5V, V = 0V, V = 2.5V, T = +25°C, R = 10kΩ, unless otherwise specified. Boldface limits apply over the  
+
-
CM  
A
L
entire operating temperature range.  
MIN  
MAX  
PARAMETER  
DESCRIPTION  
CONDITIONS  
(Note 10) TYP (Note 10)  
UNIT  
DC SPECIFICATIONS  
V
Input Offset Voltage  
Vs = 1.8V to 5.5V  
-40  
±5  
40  
µV  
µV  
OS  
Vs = 1.8 to 5.5V;  
T = 0°C to +70°C  
-46.8  
46.8  
Vs = 1.8V to 5.5V;  
-55  
55  
µV  
T = -40°C to +125°C  
TCV  
Input Offset Voltage Temperature Coefficient  
Input Offset Current  
-150  
20  
-60  
150  
nV/°C  
pA  
OS  
I
OS  
TCI  
Input Offset Current Temperature Coefficient  
Input Bias Current  
0.11  
pA/°C  
pA  
OS  
I
T = 0°C to +70°C  
-250  
-700  
-0.1  
250  
700  
5.1  
B
T = -40°C to +125°C  
Guaranteed by CMRR  
pA  
Common Mode Input  
Voltage Range  
V
CMRR  
Common Mode Rejection Ratio  
Power Supply Rejection Ratio  
V
= -0.1V to 5.1V  
110  
105  
125  
138  
dB  
dB  
dB  
dB  
V
CM  
PSRR  
Vs = 2.0V to 5.5V  
105  
105  
V
V
Output Voltage Swing, High  
Output Voltage Swing, Low  
4.950  
4.981  
18  
OH  
50  
mV  
OL  
FN7623.4  
February 23, 2012  
5
ISL28130, ISL28230, ISL28430  
Electrical Specifications V = 5V, V = 0V, V = 2.5V, T = +25°C, R = 10kΩ, unless otherwise specified. Boldface limits apply over the  
+
-
CM  
A
L
entire operating temperature range. (Continued)  
MIN  
MAX  
PARAMETER  
DESCRIPTION  
CONDITIONS  
(Note 10) TYP (Note 10)  
UNIT  
dB  
A
Open Loop Gain  
Supply Voltage  
R
= 1MΩ  
L
150  
OL  
V
Guaranteed by V  
OS  
1.8  
5.5  
25  
35  
V
+
I
Supply Current, Per Amplifier  
R = OPEN  
20  
µA  
µA  
mA  
mA  
S
L
I
I
Output Source Short Circuit Current  
Output Sink Short Circuit Current  
R = Short V-  
15  
SC+  
L
R = Short V+  
-15  
SC-  
L
AC SPECIFICATIONS  
GBWP  
Gain Bandwidth Product  
A = 100, R = 100kΩ, R = 1kΩ,  
400  
kHz  
V
F
G
R
= 10kΩ to V  
L
CM  
e
e
i
V
Peak-to-Peak Input Noise Voltage  
Input Noise Voltage Density  
Input Noise Current Density  
f = 0.01Hz to 10Hz  
f = 1kHz  
1.1  
65  
µV  
P-P  
N
N
P-P  
nV/(Hz)  
fA/(Hz)  
fA/(Hz)  
pF  
f = 1kHz  
72  
N
f = 10Hz  
80  
C
Differential Input Capacitance  
f = 1MHz  
1.6  
1.12  
in  
Common Mode Input Capacitance  
pF  
TRANSIENT RESPONSE  
SR  
Positive Slew Rate  
Negative Slew Rate  
V
= 1V to 4V, R = 10kΩ  
0.2  
0.1  
1.1  
1.1  
20  
V/µs  
V/µs  
µs  
OUT  
L
t , t , Small Signal  
Rise Time, t 10% to 90%  
A = +1, V  
OUT  
R
= 0.1V , R = 0Ω,  
P-P  
r
f
r
V
F
= 10kΩ, C = 1.2pF  
L
L
Fall Time, t 10% to 90%  
µs  
f
t , t Large Signal  
Rise Time, t 10% to 90%  
A
= +1, V  
OUT  
= 2V , R = 0Ω,  
P-P  
µs  
r
f
r
V
F
R
= 10kΩ, C = 1.2pF  
L
L
Fall Time, t 10% to 90%  
f
30  
µs  
t
t
Settling Time to 0.1%, 2V  
Step  
A
= +1, R = 0Ω, R = 10kΩ,  
35  
µs  
s
P-P  
V
F
L
C = 1.2pF  
L
Output Overload Recovery Time, Recovery to  
90% of Output Saturation  
A
= +2, R = 10kΩ, R = Open,  
10.5  
µs  
recover  
V
F
L
C = 3.7pF  
L
NOTE:  
10. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.  
FN7623.4  
February 23, 2012  
6
ISL28130, ISL28230, ISL28430  
n
Typical Performance Curves V+ = 5V, V- = 0V, V = 2.5V, R = Open, T = +25°C, unless otherwise specified.  
CM  
400  
L
400  
300  
200  
100  
0
300  
200  
100  
V
= ±2.5V  
V
= ±2.5V  
S
S
V
= ±0.9V  
S
V
= ±0.9V  
S
0
-100  
-100  
-50  
-25  
0
25  
50  
75  
100  
125  
-50  
-25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 4. I - vs TEMPERATURE  
FIGURE 3. I + vs TEMPERATURE  
B
B
40  
35  
30  
25  
20  
40  
35  
30  
25  
20  
PER AMPLIFIER  
PER AMPLIFIER  
15  
10  
15  
10  
-50  
-25  
0
25  
50  
75  
100  
125  
-50  
-25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 6. SUPPLY CURRENT vs TEMPERATURE, Vs = ±2.5V  
FIGURE 5. SUPPLY CURRENT vs TEMPERATURE, Vs = ±0.9V  
21  
20  
19  
18  
17  
200  
150  
PHASE  
100  
50  
GAIN  
0
R
C
= 10M  
L
L
-50  
V
= 0V  
= 100pF  
IN  
R
= OPEN  
L
SIMULATION  
16  
1.5  
-100  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
0.1m 1m 10m 100m  
1
10 100 1k 10k 100k 1M 10M  
SUPPLY VOLTAGE (V)  
FREQUENCY (Hz)  
FIGURE 8. FREQUENCY RESPONSE vs OPEN LOOP GAIN,  
= 10M  
FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE  
R
L
FN7623.4  
February 23, 2012  
7
ISL28130, ISL28230, ISL28430  
Typical Performance Curves V+ = 5V, V- = 0V, V = 2.5V, R = Open, T = +25°C, unless otherwise specified.  
CM  
L
1
1
R
= 100k  
L
0
0
-1  
-2  
-3  
-4  
-5  
-6  
-7  
-8  
-9  
R
= 100k  
L
-1  
-2  
-3  
-4  
-5  
-6  
-7  
-8  
R
= 1k  
L
R
= 1k  
L
R
= OPEN  
L
R
= 10k  
R
= OPEN  
L
L
R
= 10k  
L
R
= 49.9k  
L
R = 49.9k  
L
V
= ±2.5V  
= 3.7pF  
= +1  
S
V
= ±0.9V  
= 3.7pF  
= +1  
S
C
L
C
L
A
V
A
V
V
= 10mV  
OUT  
P-P  
V
= 10mV  
OUT  
P-P  
-9  
100  
1k  
10k  
100k  
1M  
10M  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 9. GAIN vs FREQUENCY vs R , V = ±0.9V  
FIGURE 10. GAIN vs FREQUENCY vs R , V = ±2.5V  
L
S
L
S
10  
9
1
0
8
-1  
-2  
-3  
-4  
-5  
-6  
-7  
-8  
-9  
R
= R = 1k  
G
F
V
= 1V  
OUT  
7
6
R
= R = 10k  
G
F
V
= 500mV  
OUT  
5
4
R
= R = 100k  
G
V
= 250mV  
F
OUT  
V
= ±2.5V  
= 100k  
= 3.7pF  
= +2  
3
S
L
L
R
C
A
V
= ±2.5V  
S
L
L
2
V
= 100mV  
OUT  
R
C
A
= OPEN  
= 3.7pF  
= 1  
V
V
1
V
= 10mV  
OUT  
= 10mV  
OUT  
P-P  
V
0
100  
100  
1k  
10k  
100k  
1M  
10M  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 11. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES  
R /R  
FIGURE 12. GAIN vs FREQUENCY vs V  
OUT  
f
g
70  
60  
50  
40  
30  
20  
10  
0
1
A
= 1000  
R
= 100, R = 100k  
F
V
0
-1  
-2  
-3  
-4  
-5  
-6  
-7  
-8  
-9  
G
R
= 1k, R = 100k  
F
G
A
= 100  
= 10  
V
V
= ±0.9V  
S
V+ = 5V  
V = ±1.5V  
S
C
R
= 3.7pF  
= 100k  
= 10mV  
L
L
A
V
= ±2.75V  
V
S
V
OUT  
P-P  
R
= 10k, R = 100k  
F
R
= 100k  
= 3.7pF  
= +1  
G
L
L
C
A
A
= 1  
V
V
V
= 10mV  
R
= OPEN, R = 0  
F
OUT  
P-P  
G
-10  
100  
1k  
10k  
100k  
1M  
10M  
10  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 13. FREQUENCY RESPONSE vs CLOSED LOOP GAIN  
FIGURE 14. GAIN vs FREQUENCY vs SUPPLY VOLTAGE  
FN7623.4  
February 23, 2012  
8
ISL28130, ISL28230, ISL28430  
Typical Performance Curves V+ = 5V, V- = 0V, V = 2.5V, R = Open, T = +25°C, unless otherwise specified.  
CM  
L
8
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
C
= 824pF  
L
6
C
= 474pF  
L
4
C
= 224pF  
L
2
0
-2  
-4  
-6  
-8  
-10  
C
= 104pF  
L
R
C
A
= 100k  
= 3.7pF  
= 1  
L
L
C
= 51pF  
= 3.7pF  
L
V
= ±2.5V  
= 100k  
= +1  
S
V
C
R
A
L
L
V
= 4V  
P-P  
OUT  
V
V
= 10mV  
OUT  
P-P  
100  
1k  
10k  
100k  
1M  
10M  
0
50  
100  
150  
200  
TIME (µs)  
250  
300  
350  
400  
FREQUENCY (Hz)  
FIGURE 15. GAIN vs FREQUENCY vs C  
FIGURE 16. LARGE SIGNAL STEP RESPONSE (4V)  
L
0.14  
0.12  
0.10  
0.08  
0.06  
0.04  
0.02  
0
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
R
C
A
= 100k  
= 3.7pF  
= 1  
R
C
A
= 100k  
= 3.7pF  
= 1  
L
L
L
L
V
V
V
= 100mV  
P-P  
V
= 1V  
OUT  
OUT  
P-P  
0
10  
20  
30  
40  
50  
TIME (µs)  
60  
70  
80  
90  
100  
0
5
10  
15  
20  
TIME (µs)  
25  
30  
35  
40  
FIGURE 18. SMALL SIGNAL STEP RESPONSE (100mV)  
FIGURE 17. LARGE SIGNAL STEP RESPONSE (1V)  
5.000  
4.995  
4.990  
4.985  
4.980  
4.975  
40  
V
R
= 5V  
= 10k  
S
V
R
= 5V  
= 10kΩ  
S
L
L
35  
30  
25  
20  
15  
-50  
-25  
0
25  
50  
75  
100  
125  
-50  
-25  
0
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 19. V vs TEMPERATURE  
OH  
FIGURE 20. V vs TEMPERATURE  
OL  
FN7623.4  
February 23, 2012  
9
ISL28130, ISL28230, ISL28430  
Typical Performance Curves V+ = 5V, V- = 0V, V = 2.5V, R = Open, T = +25°C, unless otherwise specified.  
CM  
-20  
L
-20  
V
= ±2.5V  
= OPEN  
= 3.7pF  
= 1  
V
= ±0.9V  
= OPEN  
= 3.7pF  
= 1  
s
L
L
s
L
L
R
C
A
R
C
A
-40  
-40  
V
V
V
V
= 1V  
= 1V  
OUT  
P-P  
OUT  
P-P  
-60  
-80  
-60  
-80  
-100  
-100  
-120  
-140  
-120  
-140  
1k  
10k  
100k  
1M  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 21. CROSSTALK vs FREQUENCY, V = ±0.9V  
S
FIGURE 22. CROSSTALK vs FREQUENCY, V = ±2.5V  
S
FN7623.4  
February 23, 2012  
10  
ISL28130, ISL28230, ISL28430  
Layout Guidelines for High Impedance Inputs  
Applications Information  
Functional Description  
The ISL28130, ISL28230 and ISL28430 are low offset, low drift  
operational amplifiers with a very high open loop gain (150dB)  
and rail-to-rail input/output. The ISL28130, ISL28230 and  
ISL28430 operate on a single supply range of 1.8V to 5.5V or a  
dual supply range of ±0.9V to ±2.75V while consuming only  
20µA of supply current per channel. The ISL28130, ISL28230  
and ISL28430 have a 400kHz gain-bandwidth.  
To achieve maximum performance from the high input impedance  
and low offset voltage of the ISL28130, ISL28230 and ISL28430  
amplifiers, care should be taken in the circuit board layout. The PC  
board surface must remain clean and free of moisture to avoid  
leakage currents between adjacent traces. Surface coating of the  
circuit board reduces surface moisture and provides a humidity  
barrier, reducing parasitic resistance on the board.  
High Gain, Precision DC-Coupled Amplifier  
The high open loop gain, low offset voltage, high bandwidth and  
low 1/f noise make the ISL28130, ISL28230 and ISL28430  
ideal for precision applications.  
The circuit in Figure 24 implements a single-stage DC-coupled  
amplifier with an input DC sensitivity of under 100nV that is only  
possible using a low VOS amplifier with high open loop gain. High  
gain DC amplifiers operating from low voltage supplies are not  
practical using typical low offset precision op amps. For example,  
consider a typical precision amplifier in a gain of 10kV/V. A low  
Rail-to-rail Input and Output (RRIO)  
The RRIO CMOS amplifier uses parallel input PMOS and NMOS  
that enable the inputs to swing 100mV beyond either supply rail.  
The inverting and non-inverting inputs do not have back-to-back  
input clamp diodes and are capable of maintaining high input  
impedance at high differential input voltages. This is effective in  
eliminating output distortion caused by high slew rate input  
signals.  
offset op amp with ±100µV V and 0.5µV/°C offset drift yields  
OS  
a DC error of >1V, with an additional 5mV/°C of  
temperature-dependent error. This amount of error makes it  
difficult to resolve DC input voltage changes in the mV range.  
The ±40µV max V and 150nV/°C temperature drift of the  
OS  
ISL28130, ISL28230, and ISL28430 produce a  
The output stage uses common source connected PMOS and  
NMOS devices to achieve rail-to-rail output drive capability with  
15mA current limit and the capability to swing to within 50mV of  
either rail while driving a 10kΩ load.  
temperature-stable maximum DC output error of only ±400mV,  
with a maximum output temperature drift of 1.5mV/°C. The  
additional benefit of a very low 1/f noise corner frequency and  
some feedback filtering allows DC voltages and voltage  
fluctuations well below 10µV to be easily detected with a simple,  
single-stage amplifier.  
IN+ and IN- Protection  
C
F
All input terminals have internal ESD protection diodes to both  
positive and negative supply rails, limiting the input voltage to  
within one diode beyond the supply rails. For applications in which  
either input is expected to exceed the rails by 0.5V, an external  
series resistor must be used to ensure the input currents never  
exceed 20mA (see Figure 23).  
0.018µF  
1MΩ  
+2.5V  
-
V
OUT  
100Ω  
1MΩ  
V
IN  
R
+
L
-
V
R
OUT  
IN  
100Ω  
V
R
IN  
+
-2.5V  
L
A
= 10kV/V  
CL  
FIGURE 24. HIGH GAIN, PRECISION DC-COUPLED AMPLIFIER  
FIGURE 23. INPUT CURRENT LIMITING  
For additional products, see www.intersil.com/product_tree  
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted  
in the quality certifications found at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time  
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be  
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third  
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN7623.4  
February 23, 2012  
11  
ISL28130, ISL28230, ISL28430  
Revision History  
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make  
sure you have the latest revision.  
DATE  
REVISION  
FN7623.4  
FN7623.3  
CHANGE  
February 10, 2012  
June 13, 2011  
Removed “Coming Soon” from ISL28230FBZ in “Ordering Information” on page 2.  
• Changed minimum operating supply voltage from +1.65V to +1.8V throughout datasheet. Modified Electrical  
Specifications table, beginning on page 5, for all specs related at +1.65V to +1.8V, and all other text references  
accordingly.  
• On page 1, paragraph 2, last sentence: changed from “All devices operate over the temperature range of -  
40°C to +125°C.” to "Commercial temp range devices operate over the temperature range of 0°C to 70°C. Full  
temp range devices operate over the temperature range of -40°C to 125°C."  
• On page 2, Ordering Information: added "Coming Soon" to all devices with -40°C to 125°C temp range and  
to ISL28130CBZ at 0°C to +70°C temp range.  
March 1, 2011  
FN7623.2  
-Ordering Information Table: Removed all 'Coming Soon' under part numbers (except for ISL28130FBZ and  
ISL28230FRZ), added part markings for all 125°C grade parts. Added new data column called 'TEMPERATURE  
GRADE' to distinguish between 'Commercial' and 'Full' temp grades.  
- Electrical Specifications Table: added new text to common conditions: "Boldface limits apply over the entire  
operating temperature range". This note allows bold face limits to apply both to commercial and full grade temp  
devices.  
- Added over temp 0°C to 70°C spec for Vos in addition to -40°C to 125°C Vos spec. Original Vos spec of  
46.8µV for -40°C to 125°C is a typo based on a TCVos of 150nV/C. -40°C to 125°C limit corrected as 55µV  
over temp.  
December 7, 2010  
December 3, 2010  
December 2, 2010  
FN7623.1  
Corrected Thermals for DFN package in “Tja from 125 to 53, “Tjc from 90 to 12”  
Removed Part Markings from Full temp grade parts and changed to TBD until availability is validated.  
-Updated front page text to add DFN packaging and extended temp range -40°C to +125°C  
-Removed previous Ib vs Temp plot and added new -40°C to +125°C Ib vs Temp plot on front page.  
-Updated ordering information table by adding a full temp range option to all parts and temp range column. Also  
added in DFN part to ordering table. All full temp parts are stamped Coming Soon.  
-Added DFN package to Pin Configurations table.  
-Added -40°C to +125°C temp range under Operating Conditions page 5.  
-Added the testing standards performance information to the ESD ratings in Abs Max Table  
-Added new Input Bias Current Ib spec of 700pA MIN/MAX in Electrical Spec table for -40°C to +125°C temp  
range  
-Revised Note 10 for Electrical Spec table as: "Compliance to datasheet limits is assured by one or more  
methods: production test, characterization and/or design."  
-Updated all curves in the datasheet with 0°C to +70°C temp range to -40°C to +125°C temp range.  
-Added DFN package L8.3x3J outline drawing to the end of datasheet.  
October 19, 2010  
August 17, 2010  
On page 6 changed “Supply Current, Per Amplifier” from a typical of 18µA to 20µA to comply with front page.  
Initial Release  
FN7623.0  
Products  
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products  
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.  
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a  
complete list of Intersil product families.  
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on  
intersil.com: ISL28130, ISL28230 , ISL28430.  
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff  
FITs are available from our website at: http://rel.intersil.com/reports/search.php  
FN7623.4  
February 23, 2012  
12  
ISL28130, ISL28230, ISL28430  
Small Outline Transistor Plastic Packages (SC70-5)  
D
P5.049  
VIEW C  
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE  
INCHES MILLIMETERS  
MIN  
e1  
SYMBOL  
MAX  
0.043  
0.004  
0.039  
0.012  
0.010  
0.009  
0.009  
0.085  
0.094  
0.053  
MIN  
0.80  
0.00  
0.80  
0.15  
0.15  
0.08  
0.08  
1.85  
1.80  
1.15  
MAX  
1.10  
0.10  
1.00  
0.30  
0.25  
0.22  
0.20  
2.15  
2.40  
1.35  
NOTES  
5
1
4
A
A1  
A2  
b
0.031  
0.000  
0.031  
0.006  
0.006  
0.003  
0.003  
0.073  
0.071  
0.045  
-
-
-
-
E
C
L
C
E1  
L
2
3
b
b1  
c
e
6
6
3
-
C
L
c1  
D
0.20 (0.008) M  
C
C
C
L
E
E1  
e
3
-
SEATING  
PLANE  
0.0256 Ref  
0.0512 Ref  
0.010 0.018  
0.65 Ref  
1.30 Ref  
0.26 0.46  
A2  
A1  
A
e1  
L
-
-C-  
4
-
L1  
L2  
0.017 Ref.  
0.420 Ref.  
0.15 BSC  
0.10 (0.004)  
C
0.006 BSC  
o
o
o
o
0
8
0
8
-
α
N
b
WITH  
5
5
5
PLATING  
b1  
R
0.004  
0.004  
-
0.10  
0.15  
-
R1  
0.010  
0.25  
c
c1  
Rev. 3 7/07  
NOTES:  
BASE METAL  
1. Dimensioning and tolerances per ASME Y14.5M-1994.  
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.  
4X θ1  
3. Dimensions D and E1 are exclusive of mold flash, protrusions,  
or gate burrs.  
R1  
4. Footlength L measured at reference to gauge plane.  
5. “N” is the number of terminal positions.  
R
6. These Dimensions apply to the flat section of the lead between  
0.08mm and 0.15mm from the lead tip.  
GAUGE PLANE  
SEATING  
PLANE  
7. Controlling dimension: MILLIMETER. Converted inch dimen-  
sions are for reference only.  
L
C
α
L2  
L1  
4X θ1  
VIEW C  
0.4mm  
0.75mm  
2.1mm  
0.65mm  
TYPICAL RECOMMENDED LAND PATTERN  
FN7623.4  
February 23, 2012  
13  
ISL28130, ISL28230, ISL28430  
Package Outline Drawing  
P5.064A  
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE  
Rev 0, 2/10  
1.90  
0-3°  
0.08-0.20  
D
A
5
4
PIN 1  
INDEX AREA  
2.80  
3
1.60  
5
3
0.15 C D  
2x  
(0.60)  
2
0.20 C  
2x  
0.95  
SEE DETAIL X  
END VIEW  
B
0.40 ±0.05  
3
0.20 M C A-B D  
TOP VIEW  
10° TYP  
(2 PLCS)  
H
5
0.15 C A-B  
2x  
2.90  
1.45 MAX  
C
1.14 ±0.15  
GAUGE  
PLANE  
(0.25)  
SEATING PLANE  
0.10  
C
0.45±0.1  
4
SIDE VIEW  
0.05-0.15  
(0.60)  
DETAIL "X"  
(1.20)  
NOTES:  
1. Dimensions are in millimeters.  
Dimensions in ( ) for Reference Only.  
(2.40)  
2. Dimensioning and tolerancing conform to ASME Y14.5M-1994.  
3. Dimension is exclusive of mold flash, protrusions or gate burrs.  
4. Foot length is measured at reference to guage plane.  
This dimension is measured at Datum “H”.  
Package conforms to JEDEC MO-178AA.  
5.  
6.  
(0.95)  
(1.90)  
TYPICAL RECOMMENDED LAND PATTERN  
FN7623.4  
February 23, 2012  
14  
ISL28130, ISL28230, ISL28430  
Package Outline Drawing  
M8.118A  
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)  
Rev 0, 9/09  
A
3.0±0.1  
8
0.25 CAB  
4.9±0.15  
DETAIL "X"  
0.18 ± 0.05  
3.0±0.1  
1.10 Max  
PIN# 1 ID  
B
SIDE VIEW 2  
1
2
0.65 BSC  
TOP VIEW  
0.95 BSC  
0.86±0.09  
GAUGE  
PLANE  
H
C
0.25  
SEATING PLANE  
0.10 ± 0.05  
0.33 +0.07/ -0.08  
0.08 C AB  
3°±3°  
0.10 C  
0.55 ± 0.15  
DETAIL "X"  
SIDE VIEW 1  
5.80  
NOTES:  
1. Dimensions are in millimeters.  
4.40  
3.00  
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA  
and AMSE Y14.5m-1994.  
3.  
Plastic or metal protrusions of 0.15mm max per side are not  
included.  
0.65  
0.40  
4. Plastic interlead protrusions of 0.25mm max per side are not  
included.  
1.40  
5. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
6. This replaces existing drawing # MDP0043 MSOP 8L.  
TYPICAL RECOMMENDED LAND PATTERN  
FN7623.4  
February 23, 2012  
15  
ISL28130, ISL28230, ISL28430  
Thin Shrink Small Outline Package Family (TSSOP)  
0.25 M C A B  
MDP0044  
D
A
THIN SHRINK SMALL OUTLINE PACKAGE FAMILY  
(N/2)+1  
N
MILLIMETERS  
SYMBOL 14 LD 16 LD 20 LD 24 LD 28 LD TOLERANCE  
PIN #1 I.D.  
A
A1  
A2  
b
1.20  
0.10  
0.90  
0.25  
0.15  
5.00  
6.40  
4.40  
0.65  
0.60  
1.00  
1.20  
0.10  
0.90  
0.25  
0.15  
5.00  
6.40  
4.40  
0.65  
0.60  
1.00  
1.20  
0.10  
0.90  
0.25  
0.15  
6.50  
6.40  
4.40  
0.65  
0.60  
1.00  
1.20  
0.10  
0.90  
0.25  
0.15  
7.80  
6.40  
4.40  
0.65  
0.60  
1.00  
1.20  
0.10  
0.90  
0.25  
0.15  
9.70  
6.40  
4.40  
0.65  
0.60  
1.00  
Max  
±0.05  
E
E1  
±0.05  
0.20 C B A  
+0.05/-0.06  
+0.05/-0.06  
±0.10  
2X  
1
(N/2)  
N/2 LEAD TIPS  
B
c
TOP VIEW  
D
E
Basic  
E1  
e
±0.10  
0.05  
H
Basic  
e
C
L
±0.15  
L1  
Reference  
Rev. F 2/07  
SEATING  
PLANE  
0.10 M C A B  
b
NOTES:  
0.10 C  
N LEADS  
1. Dimension “D” does not include mold flash, protrusions or gate  
burrs. Mold flash, protrusions or gate burrs shall not exceed  
0.15mm per side.  
SIDE VIEW  
2. Dimension “E1” does not include interlead flash or protrusions.  
Interlead flash and protrusions shall not exceed 0.25mm per  
side.  
SEE DETAIL “X”  
3. Dimensions “D” and “E1” are measured at dAtum Plane H.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994.  
c
END VIEW  
L1  
A2  
A
GAUGE  
PLANE  
0.25  
L
A1  
0° - 8°  
DETAIL X  
FN7623.4  
February 23, 2012  
16  
ISL28130, ISL28230, ISL28430  
Small Outline Package Family (SO)  
A
D
h X 45°  
(N/2)+1  
N
A
PIN #1  
I.D. MARK  
E1  
E
c
SEE DETAIL “X”  
1
(N/2)  
B
L1  
0.010 M  
C A B  
e
H
C
A2  
A1  
GAUGE  
PLANE  
SEATING  
PLANE  
0.010  
L
4° ±4°  
0.004 C  
b
0.010 M  
C
A
B
DETAIL X  
MDP0027  
SMALL OUTLINE PACKAGE FAMILY (SO)  
INCHES  
SO16  
(0.150”)  
SO16 (0.300”)  
(SOL-16)  
SO20  
SO24  
(SOL-24)  
SO28  
(SOL-28)  
SYMBOL  
SO-8  
0.068  
0.006  
0.057  
0.017  
0.009  
0.193  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
8
SO-14  
0.068  
0.006  
0.057  
0.017  
0.009  
0.341  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
14  
(SOL-20)  
0.104  
0.007  
0.092  
0.017  
0.011  
0.504  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
20  
TOLERANCE  
MAX  
NOTES  
A
A1  
A2  
b
0.068  
0.006  
0.057  
0.017  
0.009  
0.390  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.406  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.606  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
24  
0.104  
0.007  
0.092  
0.017  
0.011  
0.704  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
28  
-
±0.003  
±0.002  
±0.003  
±0.001  
±0.004  
±0.008  
±0.004  
Basic  
-
-
-
c
-
D
1, 3  
E
-
E1  
e
2, 3  
-
L
±0.009  
Basic  
-
L1  
h
-
Reference  
Reference  
-
N
-
Rev. M 2/07  
NOTES:  
1. Plastic or metal protrusions of 0.006” maximum per side are not included.  
2. Plastic interlead protrusions of 0.010” maximum per side are not included.  
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994  
FN7623.4  
February 23, 2012  
17  
ISL28130, ISL28230, ISL28430  
Package Outline Drawing  
M8.15E  
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE  
Rev 0, 08/09  
4
4.90 ± 0.10  
A
DETAIL "A"  
0.22 ± 0.03  
B
6.0 ± 0.20  
3.90 ± 0.10  
4
PIN NO.1  
ID MARK  
5
(0.35) x 45°  
4° ± 4°  
0.43 ± 0.076  
1.27  
0.25 M C A B  
SIDE VIEW “B”  
TOP VIEW  
1.75 MAX  
1.45 ± 0.1  
0.25  
GAUGE PLANE  
C
SEATING PLANE  
0.175 ± 0.075  
SIDE VIEW “A  
0.10 C  
0.63 ±0.23  
DETAIL "A"  
(0.60)  
(1.27)  
NOTES:  
(1.50)  
1. Dimensions are in millimeters.  
Dimensions in ( ) for Reference Only.  
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.  
3.  
Unless otherwise specified, tolerance : Decimal ± 0.05  
(5.40)  
4. Dimension does not include interlead flash or protrusions.  
Interlead flash or protrusions shall not exceed 0.25mm per side.  
The pin #1 identifier may be either a mold or mark feature.  
Reference to JEDEC MS-012.  
5.  
6.  
TYPICAL RECOMMENDED LAND PATTERN  
FN7623.4  
February 23, 2012  
18  
ISL28130, ISL28230, ISL28430  
Package Outline Drawing  
L8.3x3J  
8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE  
Rev 0 9/09  
2X 1.950  
3.00  
A
6X 0.65  
B
5
8
(4X)  
0.15  
1.64 +0.10/ - 0.15  
6
PIN 1  
INDEX AREA  
6
PIN #1 INDEX AREA  
4
1
4
8X 0.30  
0.10 M C A B  
8X 0.400 ± 0.10  
TOP VIEW  
2.38  
+0.10/ - 0.15  
BOTTOM VIEW  
SEE DETAIL "X"  
( 2.38 )  
( 1.95)  
C
0.10  
C
Max 1.00  
0.08  
C
SIDE VIEW  
( 8X 0.60)  
(1.64)  
( 2.80 )  
PIN 1  
5
C
0 . 2 REF  
(6x 0.65)  
0 . 00 MIN.  
0 . 05 MAX.  
( 8 X 0.30)  
DETAIL "X"  
TYPICAL RECOMMENDED LAND PATTERN  
NOTES:  
1. Dimensions are in millimeters.  
Dimensions in ( ) for Reference Only.  
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.  
3.  
Unless otherwise specified, tolerance : Decimal ± 0.05  
4. Dimension applies to the metallized terminal and is measured  
between 0.15mm and 0.30mm from the terminal tip.  
Tiebar shown (if present) is a non-functional feature.  
5.  
6.  
The configuration of the pin #1 identifier is optional, but must be  
located within the zone indicated. The pin #1 identifier may be  
either a mold or mark feature.  
FN7623.4  
February 23, 2012  
19  

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