ISL32740EIAZ [RENESAS]

Isolated 40Mbps RS-485 PROFIBUS Transceiver;
ISL32740EIAZ
型号: ISL32740EIAZ
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

Isolated 40Mbps RS-485 PROFIBUS Transceiver

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中文:  中文翻译
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DATASHEET  
ISL32740E  
Isolated 40Mbps RS-485 PROFIBUS Transceiver  
FN8857  
Rev.4.00  
Nov 30, 2017  
The ISL32740E is a galvanically isolated high-speed  
differential bus transceiver, designed for bidirectional  
data communication on balanced transmission lines. The  
device uses Giant Magnetoresistance (GMR) as its  
isolation technology.  
Features  
• 40Mbps data rate  
• 2.5kV  
isolation/600V  
working voltage  
RMS  
RMS  
• 3V to 5V power supplies  
• 20ns propagation delay  
• 5ns pulse skew  
The part is available in a 16 Ld QSOP package offering  
unprecedented miniaturization, and in a 16 Ld SOICW  
package providing a true 8mm creepage distance.  
• 50kV/µs (typical), 30kV/µs (minimum)  
common-mode transient immunity  
The ISL32740E is PROFIBUS compliant, including the  
rigorous PROFIBUS differential output voltage  
specifications.  
• 15kV ESD protection  
A unique ceramic/polymer composite barrier provides  
excellent isolation and 44,000 years of barrier life.  
• Low EMC footprint  
• Thermal shutdown protection  
• Temperature ranges available  
• -40°C to +85°C (EIBZ)  
• -40°C to +125°C (EFBZ)  
The device is compatible with 3V as well as 5V input  
supplies, allowing an interface to standard  
microcontrollers without additional level shifting.  
Current limiting and thermal shutdown features protect  
against output short circuits and bus contention that may  
cause excessive power dissipation. Receiver inputs are a  
full fail-safe design, ensuring a logic high R-output if  
A/B are floating or shorted.  
• Meets or exceeds ANSI RS-485 and  
ISO 8482:1987(E)  
• PROFIBUS compliant  
• 16 Ld QSOP or 0.3” true 8mm 16 Ld SOICW packages  
• UL 1577 recognized  
Applications  
• PROFIBUS-DP and RS-485 networks  
• VDE V 0884-10 certified  
• Factory automation  
Related Literature  
• For a full list of related documents, visit our website  
• Building environmental control systems  
• Industrial/process control networks  
• Equipment covered under IEC 61010-1 Edition 3  
ISL32740E product page  
ISOLATION  
BARRIER  
ISOLATION  
BARRIER  
5V  
3.3V  
5V  
3.3V  
100n  
100n  
100n  
100n  
1
VDD1  
R
16  
16  
1
VDD1  
R
542R  
135R  
VDD2  
VDD2  
3
4
5
6
3
4
5
6
12  
13  
10  
12  
13  
10  
A
B
A
120R  
RE  
RE  
B
DE  
DE  
ISODE  
ISODE  
D
D
542R  
GND1  
2,8  
GND2  
GND2  
GND1  
2,8  
9,15  
9,15  
ISL32740EIBZ  
ISL32740EIBZ  
ISOLATION  
BARRIER  
3.3V  
5V  
100n  
100n  
100n  
100n  
1
16  
16  
1
VDD1  
VDD2  
VDD2X  
ISORI  
ISORO  
A
VDD2  
VDD2X  
ISORI  
ISORO  
A
VDD1  
10  
15  
12  
11  
9
10  
15  
12  
11  
9
2
4
5
6
2
4
5
6
542R  
135R  
542R  
R
R
RE  
DE  
D
RE  
D
E
D
120R  
B
B
13  
13  
ISODE  
GND2  
14  
ISODE  
GND2  
14  
GND1  
3
GND1  
3
ISL32740EIAZ  
ISL32740EIAZ  
Figure 1. Typical PROFIBUS Application  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 1 of 20  
ISL32740E  
1. Overview  
1. Overview  
1.1  
Typical Operating Circuits  
3.3V  
5V  
3.3V  
5V  
ISOLATION  
BARRIER  
ISOLATION  
BARRIER  
100n  
100n  
100n  
100n  
1
10  
VDD2X VDD2  
ISODE 13  
16  
1
16  
VDD2  
VDD1  
DE  
VDD1  
5
6
5
6
DE  
ISODE 10  
1.09k  
127R  
1.09k  
1.09k  
127R  
1.09k  
A 11  
D
A 12  
B 13  
D
2
4
R
B
9
3
4
R
RE  
ISORO 12  
ISORI 15  
RE  
GND1  
GND2  
14  
GND1  
2,8  
GND2  
9,15  
3
ISL32740EIAZ  
ISL32740EIBZ  
Figure 2. Typical Operating Circuits  
1.2  
Ordering Information  
Part Number  
(Notes 3, 4)  
Temp. Range  
(°C)  
Package  
(RoHS Compliant)  
Part Marking  
32740EIBZ  
Pkg. Dwg. #  
M16.3A  
M16.3A  
M16.15B  
ISL32740EIBZ (Note 1)  
ISL32740EFBZ (Note 1)  
ISL32740EIAZ (Note 2)  
ISL32740EVAL1Z  
ISL32740EVAL2Z  
Notes:  
-40 to +85  
-40 to +125  
-40 to +85  
16 Ld SOICW  
32740EFBZ  
32740EIAZ  
16 Ld SOICW  
16 Ld QSOP  
Evaluation board for ISL32740EIBZ  
Evaluation board for ISL32740EIAZ  
1. Add “-T” suffix for 1k unit or “-T7A” suffix for 250 unit tape and reel options. Refer to TB347 for details on reel specifications.  
2. Add “-T” suffix for 2.5k unit or “-T7A” suffix for 250 unit tape and reel options. Refer to TB347 for details on reel specifications.  
3. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100%  
matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations.  
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements  
of IPC/JEDEC J STD-020.  
4. For Moisture Sensitivity Level (MSL), see the product information page for the ISL32740E. For more information on MSL, see  
TB363.  
Table 1. Key Differences Between Family of Parts  
V
(V)  
V
(V)  
Data Rate  
(Mbps)  
Isolation Voltage  
(kV  
DD1  
DD2  
Part Number  
ISL32704E  
Full/Half Duplex  
)
RMS  
Half  
Full  
Half  
Half  
3.0 – 5.5  
3.0 – 5.5  
3.0 – 5.5  
3.0 – 5.5  
4.5 – 5.5  
4.5 – 5.5  
4.5 – 5.5  
4.5 – 5.5  
4
4
2.5  
2.5  
2.5  
6
ISL32705E  
ISL32740E  
ISL32741E  
40  
40  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 2 of 20  
ISL32740E  
1. Overview  
1.3  
Pin Configurations  
ISL32740E  
(16 Ld SOICW)  
Top View  
ISL32740E  
(16 Ld QSOP)  
Top View  
VDD1  
R
1
2
3
4
5
6
7
8
16 VDD2  
VDD1  
GND1  
R
1
2
3
4
5
6
7
8
16 VDD2  
15 GND2  
14 NC  
15 ISORI  
14 GND2  
13 ISODE  
12 ISORO  
11 A  
GND1  
RE  
RE  
13 B  
DE  
12 A  
DE  
D
11 NC  
D
NC  
10 ISODE  
NC  
NC  
10 VDD2X  
GND1  
9 GND2  
9
B
DE  
D
ISODE  
D
ISODE  
DE  
B
A
B
A
R
R
ISORO  
ISORI  
RE  
RE  
1.4  
Truth Tables  
Transmitting  
Inputs  
Outputs  
RE  
X
DE  
1
D
1
ISODE  
B
0
A
1
1
0
0
1
X
1
0
1
0
0
0
X
X
High-Z  
High-Z*  
High-Z  
High-Z*  
1
0
Receiving  
Inputs  
Output  
RE  
0
DE  
0
A-B  
≥ -0.05V  
RO  
1
V
AB  
0
0
-0.05 > V > -0.2V  
Undetermined  
AB  
0
0
V
≤ -0.2V  
0
AB  
0
0
Inputs Open/Shorted  
1
1
1
X
X
High-Z  
High-Z*  
1
0
Note: *Transceiver shutdown mode  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 3 of 20  
ISL32740E  
1. Overview  
1.5  
Pin Descriptions  
Pin Number  
16 Ld 16 Ld  
SOICW QSOP Name  
Pin  
Function  
1
3
1
2
VDD1 Input power supply.  
R
Receiver output: If A-B -50mV, R is high; If A-B -200mV, R is low; R = High if A and B are unconnected  
(floating) or shorted, or connected to a terminated bus that is not driven.  
2, 8  
4
3
4
GND1 Input power supply ground return. Pin 2 is internally connected to Pin 8 (for SOIC package).  
RE  
Receiver output enable. R is enabled when RE is low; R is high impedance when RE is high. If the Rx  
enable function is not required, connect RE directly to GND1.  
5
6
5
6
DE  
Driver output enable. The driver outputs, A and B, are enabled by bringing DE high. They are high  
impedance when DE is low. If the Tx enable function is not required, connect DE to VDD1 through a 1kΩ  
or greater resistor.  
D
Driver input. A low on D forces output A low and output B high. Similarly, a high on D forces output A high  
and output B low.  
7, 11, 14  
12  
7, 8  
11  
NC  
A
No internal connection.  
±15kV IEC61000 ESD protected RS-485/RS422 level, noninverting receiver input if DE = 0 and  
noninverting driver output if DE = 1.  
13  
9
B
±15kV IEC61000 ESD protected RS-485/RS422 level, inverting receiver input if DE = 0 and inverting  
driver output if DE = 1.  
-
10  
12  
15  
14  
13  
VDD2X Transceiver power supply. Connect to VDD2 (Pin 16).  
-
-
ISORO Isolated receiver output. This pin must be connected to Pin 15.  
ISORI Isolated receiver input. This pin must be connected to Pin 12.  
GND2 Output power supply ground return. Dual ground pins are connected internally.  
9, 15  
10  
ISODE Isolated DE output for use in PROFIBUS applications where the state of the isolated drive enable node  
needs to be monitored.  
16  
16  
VDD2 Output power supply.  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 4 of 20  
ISL32740E  
2. Specifications  
2. Specifications  
2.1  
Absolute Maximum Ratings  
Parameter (Note 5)  
Minimum  
-0.5  
Maximum  
Unit  
Supply Voltages (Note 8)  
VDD1 to GND1  
VDD2 to GND2  
Input Voltages D, DE, RE  
Input/Output Voltages  
A, B  
+7  
7
V
V
V
-0.5  
VDD1 + 0.5  
-9  
+13  
V
V
V
R
-0.5  
VDD1 + 1  
Short-Circuit Duration A, B  
ESD Rating  
Continuous  
See “Electrical Specifications” table on page 7  
Note:  
5. Absolute Maximum specifications mean the device will not be damaged if operated under these conditions. It does not  
guarantee performance.  
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may  
adversely impact product reliability and result in failures not covered by warranty.  
2.2  
Thermal Information  
Thermal Resistance (Typical)  
(°C/W)  
43  
(°C/W)  
20  
JA  
JC  
16 Ld SOICW Package (Notes 6, 7)  
16 Ld QSOP Package (Notes 6, 7)  
Notes:  
77  
41  
6. is measured in free air with the component soldered to a double-sided board.  
JA  
7. For , the “case temp” location is the center of the package top side.  
JC  
Parameter  
Maximum Junction Temperature (Plastic Package)  
Maximum Storage Temperature Range  
Maximum Power Dissipation  
Minimum  
-55  
Maximum  
Unit  
°C  
+150  
+150  
800  
-55  
°C  
mW  
Pb-Free Reflow Profile  
see TB493  
2.3  
Recommended Operation Conditions  
Parameter  
Supply Voltages  
Minimum  
Maximum  
Unit  
V
V
3.0  
4.5  
5.5  
5.5  
V
V
DD1  
DD2  
High-Level Digital Input Voltage, V  
IH  
V
V
= 3.3V  
= 5.0V  
2.4  
3.0  
0
V
V
V
V
V
DD1  
DD1  
DD1  
DD1  
Low-Level Digital Input Voltage, V  
0.8  
IL  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 5 of 20  
ISL32740E  
2. Specifications  
Parameter  
Minimum  
Maximum  
Unit  
V
Differential Input Voltage (Note 9), V  
-7  
12  
60  
ID  
High-Level Output Current (Driver), I  
mA  
mA  
mA  
mA  
°C  
OH  
High-Level Digital Output Current (Receiver), I  
8
OH  
Low-Level Output Current (Driver), I  
-60  
OL  
Low-Level Digital Output Current (Receiver), I  
Junction Temperature, T  
-8  
OL  
-40  
-40  
-40  
+110  
+85  
J
Ambient Operating Temperature, T  
ISL32740EIBZ, ISL32740EIAZ  
ISL32740EFBZ  
°C  
A
+125  
DC Stable  
Digital Input Signal Rise and Fall Times, t , t  
IR IF  
2.4  
Electrical Specifications  
Test conditions: T  
min  
to T  
, V  
= V  
= 4.5V to 5.5V; unless otherwise stated. (Note 8)  
DD2  
max DD1  
Typ  
Parameter  
DC Characteristics  
Driver Line Output Voltage (V , V )  
Symbol  
Test Conditions  
Min  
(Note 12) Max Unit  
V
No load  
No load  
-
-
V
V
A
B
O
DD2  
DD2  
(Note 8)  
Driver Differential Output Voltage (Note 9)  
Driver Differential Output Voltage (Note 9)  
V
-
-
V
V
V
V
V
OD1  
OD2  
OD3  
V
V
R
R
= 54Ω  
= 60Ω  
2.1  
1.9  
2.8  
2.7  
L
L
DD2  
-
Driver Differential Output Voltage  
(Notes 9, 13)  
Change in Magnitude of Differential  
Output Voltage (Note 14)  
V  
R
= 54Ω or 100Ω  
-
0.01  
0.20  
V
OD  
L
Driver Common-Mode Output Voltage  
V
R
R
= 54Ω or 100Ω  
= 54Ω or 100Ω  
-
-
-
3
V
V
OC  
L
L
Change in Magnitude of Driver  
V  
0.01  
0.20  
OC  
Common-Mode Output Voltage (Note 14)  
Bus Input Current (A, B) (Notes 11, 15)  
I
DE = 0V  
V
V
= 12V  
= -7V  
-
220  
µA  
µA  
µA  
µA  
IN2  
IN  
-160  
IN  
High-Level Input Current (DI, DE, RE)  
Low-Level Input Current (DI, DE, RE)  
Absolute Short-Circuit Output Current  
Supply Current  
I
V = 3.5V  
-
-
-
10  
-
IH  
I
I
V = 0.4V  
-10  
IL  
I
I
DE = V  
, -7V ≤ V or V ≤ 12V  
-
-
±250 mA  
OS  
DD1  
A
B
I
V
V
= 5V  
-
4
3
-
6
4
mA  
mA  
mV  
mV  
mV  
pF  
V
DD1  
DD1  
DD1  
= 3.3V  
-
Positive-Going Input Threshold Voltage  
Negative-Going Input Threshold Voltage  
Receiver Input Hysteresis  
V
-7V ≤ V  
-7V ≤ V  
≤ 12V  
≤ 12V  
-
-50  
-
TH+  
CM  
CM  
V
-200  
-
TH-  
V
V
= 0V  
CM  
-
-
28  
9
-
-
HYS  
Differential Bus Input Capacitance  
Receiver Output High Voltage  
Receiver Output Low Voltage  
High impedance Output Current  
Receiver Input Resistance  
C
12  
-
D
V
I
I
= -20µA, V = -50mV  
ID  
V
- 0.2  
CC  
OH  
O
O
V
= +20µA, V = -200mV  
ID  
-
-1  
54  
-
-
0.2  
1
V
OL  
I
0.4V ≤ V ≤ (V  
DD2  
- 0.5)  
-
µA  
kΩ  
mA  
OZ  
O
R
-7V ≤ V  
≤ 12V  
80  
5
-
IN  
CM  
Supply Current  
I
DE = V  
, no load  
16  
DD2  
DD1  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 6 of 20  
ISL32740E  
2. Specifications  
Test conditions: T  
to T  
, V  
= V  
= 4.5V to 5.5V; unless otherwise stated. (Note 8) (Continued)  
DD2  
min  
max DD1  
Typ  
(Note 12) Max Unit  
Parameter  
ESD Performance  
Symbol  
Test Conditions  
Min  
RS-485 Bus Pins (A, B)  
IEC61000-4-2, air-gap discharge to GND2  
IEC61000-4-2, contact discharge to GND2  
-
-
-
±15  
±8  
-
-
-
kV  
kV  
kV  
Human Body Model discharge (HBM) to  
GND2  
±16.5  
All Pins (R, RE, D, DE)  
Human Body Model discharge (HBM) to  
GND1  
-
±2  
-
kV  
Switching Characteristics  
V
= 5V, V  
= 5V  
DD2  
DD1  
Data Rate  
DR  
R
= 54Ω, C = 50pF  
40  
-
-
-
Mbps  
ns  
L
L
Propagation Delay (Notes 9, 16)  
Pulse Skew (Notes 9, 17)  
t
V
= -1.5V to 1.5V, C = 15pF  
20  
1
30  
5
PD  
(P)  
O
O
L
t
V
= -1.5V to 1.5V, C = 15pF  
-
ns  
SK  
L
Skew Limit (Note 10)  
t
(LIM)  
R
= 54Ω, C = 50pF  
L
-
2
10  
30  
30  
30  
30  
-
ns  
SK  
L
Output Enable Time to High Level  
Output Enable Time to Low Level  
t
C
C
C
C
= 15pF  
= 15pF  
= 15pF  
= 15pF  
-
15  
15  
15  
15  
50  
ns  
PZH  
L
t
-
ns  
PZL  
L
Output Disable Time from High Level  
Output Disable Time from Low Level  
Common-Mode Transient Immunity  
t
-
ns  
PHZ  
L
t
-
ns  
PLZ  
L
CMTI  
V
= 1500 V , t  
DC TRANSIENT  
= 25ns  
30  
kV/µs  
CM  
V
= 3.3V, V  
= 5V  
DD2  
DD1  
Data Rate  
DR  
R
= 54Ω, C = 50pF  
40  
-
-
-
Mbps  
ns  
L
L
Propagation Delay (Notes 9, 3)  
Pulse Skew (Notes 9, 4)  
t
V
= -1.5V to 1.5V, C = 15pF  
25  
2
35  
5
PD  
(P)  
O
O
L
t
V
= -1.5V to 1.5V, C = 15pF  
-
ns  
SK  
L
Skew Limit (Note 10)  
t
(LIM)  
R
= 54Ω, C = 50pF  
L
-
4
10  
30  
30  
30  
30  
-
ns  
SK  
L
Output Enable Time to High Level  
Output Enable Time to Low Level  
Output Disable Time from High Level  
Output Disable Time from Low Level  
Common-Mode Transient Immunity  
t
C
C
C
C
= 15pF  
= 15pF  
= 15pF  
= 15pF  
-
17  
17  
17  
17  
50  
ns  
PZH  
L
t
-
ns  
PZL  
L
t
-
ns  
PHZ  
L
t
-
ns  
PLZ  
L
CMTI  
V
= 1500 V , t  
DC TRANSIENT  
= 25ns  
30  
kV/µs  
CM  
Notes: (apply to both driver and receiver sections)  
8. All voltages on the isolator primary side are with respect to GND1. All line voltages and common-mode voltages on the isolator  
secondary or bus side are with respect to GND2.  
9. Differential I/O voltage is measured at the noninverting bus Terminal A with respect to the inverting Terminal B.  
10. Skew limit is the maximum propagation delay difference between any two devices at +25°C.  
11. The power-off measurement in ANSI Standard EIA/TIA-422-B applies to disabled outputs only and is not applied to combined  
inputs and outputs.  
12. All typical values are at V  
, V  
= 5V or V  
= 3.3V and T = +25°C.  
DD1 A  
DD1 DD2  
13. -7V < V  
< 12V; 4.5 < V < 5.5V.  
CM  
and V  
DD  
are the changes in magnitude of V  
14. V  
and V  
respectively, that occur when the input is changed from one  
OD  
OD  
OC  
OD  
logic state to the other.  
15. This applies for both power-on and power-off; refer to ANSI standard RS-485 for the exact condition. The EIA/TIA-422 -B limit  
does not apply for a combined driver and receiver terminal.  
16. Includes 10ns read enable time. Maximum propagation delay is 25ns after read assertion.  
17. Pulse skew is defined as |t  
- t | of each channel.  
PLH PHL  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 7 of 20  
ISL32740E  
2. Specifications  
2.5  
Insulation Specifications  
Parameter  
Symbol  
Test Conditions  
Per IEC 60601  
Min  
Typ  
8.3  
-
Max  
Unit  
mm  
mm  
µm  
Ω
Creepage Distance (external)  
SOICW  
QSOP  
8.03  
-
-
-
-
-
-
-
-
-
-
3.2  
Total Barrier Thickness (internal)  
Barrier Resistance  
-
13  
14  
R
C
500V  
-
>10  
IO  
IO  
Barrier Capacitance  
f = 1MHz  
-
7
pF  
Leakage Current  
240V  
, 60Hz  
-
0.2  
µA  
RMS  
Per IEC 60112  
At maximum operating temperature  
RMS  
RMS  
RMS  
Comparative Tracking Index  
CTI  
≥600  
1000  
1500  
-
-
V
V
High Voltage Endurance (Maximum  
Barrier Voltage for Indefinite Life)  
V
-
-
IO  
V
DC  
Barrier Life  
100°C, 1000V  
energy  
, 60% CL activation  
44000  
Years  
RMS  
2.6  
Magnetic Field Immunity  
Parameter (Note 18)  
= 5V, V = 5V  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Unit  
V
DD1  
DD2  
Power Frequency Magnetic Immunity  
Pulse Magnetic Field Immunity  
H
50Hz/60Hz  
t = 8µs  
P
-
-
-
-
3500  
4500  
4500  
2.5  
-
-
-
-
A/m  
A/m  
A/m  
A/m  
PF  
H
PM  
Damped Oscillatory Magnetic Field  
H
0.1Hz to 1MHz  
OSC  
Cross-Axis Immunity Multiplier  
(Note 19)  
K
X
V
= 3.3V, V  
= 5V  
DD2  
DD1  
Power Frequency Magnetic Immunity  
Pulse Magnetic Field Immunity  
H
50Hz/60Hz  
-
-
-
-
1500  
2000  
2000  
2.5  
-
-
-
-
A/m  
A/m  
A/m  
A/m  
PF  
H
t = 8µs  
P
PM  
Damped Oscillatory Magnetic Field  
H
0.1Hz to1MHz  
OSC  
Cross-Axis Immunity Multiplier  
(Note 19)  
K
X
Notes:  
18. The relevant test and measurement methods are given in the “Electromagnetic Compatibility” on page 10.  
19. External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than “pin-to-pin”  
see (“Electromagnetic Compatibility” on page 10).  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 8 of 20  
ISL32740E  
3. Safety and Approvals  
3. Safety and Approvals  
3.1  
VDE V 0884-10  
Basic Isolation; VDE File Number 5016933-4880-0001/229067  
• Working voltage (V ) 600V (848V ); Basic insulation, Pollution degree 2  
IORM PK  
RMS  
• Transient overvoltage (V  
) 4000V  
PK  
IOTM  
• Each part tested at 1590V for 1s, 5pC partial discharge limit  
PK  
• Samples tested at 4000V for 60s, then 1358V for 10s with 5pC partial discharge limit  
PK  
PK  
Symbol  
Safety-limiting Values  
Value  
180  
270  
54  
Unit  
°C  
T
P
Safety Rating Ambient Temperature  
Safety Rating Power (+180°C)  
S
mW  
mA  
S
I
Supply Current Safety Rating (total of supplies)  
S
3.2  
UL 1577  
Component Recognition Program File Number: E483309  
• Working voltage (V ) 600V (848V ); basic insulation, pollution degree 2  
IORM PK  
RMS  
• Transient overvoltage (V  
) 4000V  
IOTM  
• Each part tested at 3000V  
PK  
(4243V ) for 1s  
RMS  
• Each lot of samples tested at 2500V  
PK  
(3536V ) for 60s  
RMS  
PK  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 9 of 20  
ISL32740E  
4. Electromagnetic Compatibility  
4. Electromagnetic Compatibility  
The ISL32740E is fully compliant with generic EMC standards EN50081, EN50082-1, and the umbrella line-voltage  
standard for Information Technology Equipment (ITE) EN61000. The isolator’s Wheatstone bridge configuration and  
differential magnetic field signaling ensure excellent EMC performance against all relevant standards. Compliance  
tests have been conducted in the following categories:  
Table 2. Compliance Test Categories  
EN50081-1  
EN50082-2  
EN50204  
Residential, Commercial, and  
Light Industrial:  
Industrial Environment  
EN61000-4-2 (ESD)  
Radiated field from digital  
telephones  
Methods EN55022, EN55014  
EN61000-4-3 (Electromagnetic Field Immunity)  
EN61000-4-4 (EFT)  
EN61000-4-6 (RFI Immunity)  
EN61000-4-8 (Power Frequency Magnetic Field immunity)  
EN61000-4-9 (Pulsed Magnetic Field)  
EN61000-4-10 (Damped Oscillatory Magnetic Field)  
Immunity to external magnetic fields is even higher if the field direction  
is “end-to-end” rather than “pin-to-pin” as shown on the right.  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 10 of 20  
ISL32740E  
5. Application Information  
5. Application Information  
The ISL32740E is an isolated PROFIBUS transceiver specifically designed for PROFIBUS-DP applications.  
5.1  
PROFIBUS  
This transceiver uses a differential input receiver for maximum noise immunity and common-mode rejection.  
PROFIBUS (Process Field Bus) is specified in IEC61158 as a standard for field bus communication in automation  
technology. Two versions of PROFIBUS exist: PROFIBUS - PA for Process Automation and PROFIBUS-DP for  
Decentralized Peripherals. The most commonly used version, PROFIBUS-DP, is a protocol for deterministic  
communication between PROFIBUS masters and their remote I/O slaves.  
While the physical layer of PROFIBUS-DP is based on RS-485 with its differential signaling scheme, significant  
differences between the two physical layers exist with regard to cable type, bus termination, and minimum bus  
voltage, to name just a few parameters.  
Table 3. Main Differences Between RS-485 and PROFIBUS-DP  
Parameter  
RS-485  
Unshielded twisted pair  
120Ω  
PROFIBUS-DP  
Shielded twisted pair  
150Ω  
Cable Type  
Characteristic Impedance  
Minimum Driver Output Voltage  
Transceiver Input Capacitance  
External Fail-safe Biasing  
1.5V  
2.1V  
10 to 15pF  
10pF  
Customer configurable  
Always at both cable ends  
(none, at single or both cable ends)  
Resistor Values  
Customer configurable  
Fixed  
5.2  
Galvanic Isolation  
To enable PROFIBUS transceivers operating over a wider common-mode voltage range than specified in RS-485  
(7V to +12V), modern transceiver designs incorporate galvanic digital isolators with the transceiver circuitry. Here  
the ISL32740E uses a Giant Magnetoresistance (GMR) isolation. Figure 3 shows the principle operation of a single  
channel GMR isolator.  
EXTERNAL B-FIELD  
V
DD2  
INTERNAL  
B-FIELD  
GMR1  
GMR3  
GMR2  
IN  
OUT  
GMR4  
GND2  
Figure 3. Single Channel GMR Isolator  
The input signal is buffered and drives a primary coil, which creates a magnetic field that changes the resistance of  
the GMR resistors 1 to 4. GMR1 to GMR4 form a Wheatstone bridge in order to create a bridge output voltage that  
reacts only to magnetic field changes from the primary coil. Large external magnetic fields however, are treated as  
common-mode fields, and are therefore suppressed by the bridge configuration. The bridge output is fed into a  
comparator with an output signal identical in phase and shape to the input signal.  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 11 of 20  
ISL32740E  
5. Application Information  
5.3  
GMR Resistor in Detail  
Figure 4 shows a GMR resistor consisting of ferromagnetic alloy layers B1 and B2 sandwiched around an ultra  
thin, nonmagnetic conducting middle layer A, typically copper. The GMR structure is designed so that in the  
absence of a magnetic field, the magnetic moments in B1 and B2 face opposite directions, thus causing heavy  
electron scattering across layer A, which drastically increases its resistance for current C. When a magnetic field D  
is applied, the magnetic moments in B1 and B2 are aligned and electron scattering is reduced. This lowers the  
resistance of layer A and current C increases.  
HIGH  
LOW  
RESISTANCE  
RESISTANCE  
B1  
A
B1  
A
C
C
C
C
B2  
B2  
D
APPLIED  
MAGNETIC FIELD  
Figure 4. Multilayer GMR Resistor  
5.4  
Low Emissions  
Because GMR isolators do not use complex encoding schemes, such as RF carriers or high-frequency clocks, and  
do not include power transfer coils or transformers, their radiated emission spectrum is practically undetectable.  
60  
50  
40  
30  
20  
10  
0
FCC-B < 1GHz 3m  
EN55022 < 1GHz 3m  
LABORATORY NOISE FLOOR  
QP-MEASUREMENTS  
10MHz  
100MHz  
1GHz  
Figure 5. Undetectable Emissions of GMR Isolators  
5.5  
Low EMI Susceptibility  
Because GMR isolators have no pulse trains or carriers to interfere with, they also have very low EMI susceptibility.  
For the list of compliance tests conducted on GMR isolators refer to “Electromagnetic Compatibility” on page 10.  
5.6  
Receiver (Rx) Features  
This transceiver uses a differential input receiver for maximum noise immunity and common-mode rejection. Input  
sensitivity is ±200mV, as required by the RS-422 and RS-485 specifications. Receiver inputs function with  
common-mode voltages as great as 7V outside the power supplies (for example, +12V and -7V), making them ideal  
for long networks, or industrial environments, where induced voltages are a realistic concern.  
The receiver input resistance of 54kΩ surpasses the RS-422 specification of 4kΩ and is about five times the  
RS-485 “Unit Load” (UL) requirement of 12kΩ minimum. Thus, the ISL32740E is known as a “one-fifth UL”  
transceiver, and there can be up to 160 devices on the RS-485 bus while still complying with the RS-485 loading  
specification.  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 12 of 20  
ISL32740E  
5. Application Information  
The receiver is a “full fail-safe” version that ensures a high-level receiver output if the receiver inputs are  
unconnected (floating), shorted together, or connected to a terminated bus with all the transmitters disabled  
(terminated/undriven).  
Rx outputs deliver large low state currents (typically >30mA) at V = 1V.  
OL  
Receivers easily meet the 40Mbps data rate supported by the driver, and the receiver output is tri-statable using the  
active low RE input.  
5.7  
Driver (Tx) Features  
The RS-485/RS-422 driver is a differential output device that delivers at least 2.1V across a 54Ω load  
(RS-485/PROFIBUS), and at least 2.6V across a 100Ω load (RS-422) even with V = 4.5V. The drivers feature  
CC  
low propagation delay skew to maximize bit width and to minimize EMI.  
Outputs of the drivers are not slew rate limited, so faster output transition times allow data rates of at least 40Mbps.  
Driver outputs are tri-statable through the active high DE input.  
5.7.1  
High V  
Improves Noise Immunity and Flexibility  
OD  
The ISL32740E driver design delivers larger differential output voltages (V ) than the RS-485 standard  
OD  
requires, or than most RS-485 transmitters can deliver. The minimum ±2.1V V  
ensures at least ±600mV  
OD  
transmitters.  
more noise immunity than networks built using standard 1.5V V  
OD  
Another advantage of the large V  
is the ability to drive more than two bus terminations, which allows for  
OD  
using the ISL32740E in “star” and other multi-terminated, “nonstandard” network topologies.  
5.8  
Built-In Driver Overload Protection  
As stated previously, the RS-485 specification requires that drivers survive worst case bus contentions undamaged.  
These transmitters meet this requirement through driver output short-circuit current limits, and on-chip thermal  
shutdown circuitry.  
The driver output stages incorporate short-circuit current limiting circuitry, which ensures that the output current  
never exceeds the RS-485 specification, even at the common-mode voltage range extremes. In the event of a major  
short-circuit condition, the device includes a thermal shutdown feature that disables the drivers whenever the die  
temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers  
automatically re-enable after the die temperature drops about 15°C. If the contention persists, the thermal  
shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown.  
5.9  
Dynamic Power Consumption  
The isolator within the ISL32740E achieves its low power consumption from the way it transmits data across the  
barrier. By detecting the edge transitions of the input logic signal and converting these to narrow current pulses, a  
magnetic field is created around the GMR Wheatstone bridge. Depending on the direction of the magnetic field, the  
bridge causes the output comparator to switch following the input signal. Because the current pulses are narrow,  
about 2.5ns, the power consumption is independent of the mark-to-space ratio and solely depends on frequency.  
Table 4. Supply Current Increase with Data Rate  
Data Rate  
(Mbps)  
I
I
DD2  
DD1  
(mA)  
0.15  
1.5  
3
(mA)  
0.15  
1.5  
3
1
10  
20  
40  
6
6
FN8857 Rev.4.00  
Nov 30, 2017  
Page 13 of 20  
ISL32740E  
5. Application Information  
5.10 Power Supply Decoupling  
Both supplies, V  
and V  
, must be bypassed with 100nF ceramic capacitors. The capacitors should be placed  
DD1  
DD2  
as close as possible to the supply pins for proper operation.  
5.11 DC Correctness  
The ISL32740E incorporates a patented refresh circuit to maintain the correct output state with respect to data input.  
At power-up, the bus outputs follow the truth tables on page 3. The DE input should be held low during power-up to  
prevent false drive data pulses on the bus.  
5.12 Data Rate, Cables, and Terminations  
Twisted pair is the cable of choice for RS-485, RS-422, and PROFIBUS networks. Twisted pair cables tend to pick  
up noise and other electromagnetically induced voltages as common-mode signals, which are effectively rejected  
by the differential receivers in these ICs.  
According to guidelines in the RS-422 and PROFIBUS specifications, networks operating at data rates in excess of  
3Mbps should be limited to cable lengths of 100m (328 ft) or less and the PROFIBUS specification recommends  
that the more expensive “Type A” (22AWG) cable be used. The ISL32740E’s large differential output swing, fast  
transition times, and high drive-current output stages allow operation even at 40Mbps over standard Cat 5 cables in  
excess of 100m (328 ft).  
The ISL324740E can also be used at slower data rates over longer cables, but there are some limitations. The Rx is  
optimized for high-speed operation, so its output may glitch if the Rx input differential transition times are too  
slow. Keeping the transition times below 500ns, (which equates to the Tx driving a 1000ft (305m) Cat 5 cable)  
yields excellent performance across the full operating temperature range.  
To minimize reflections, proper termination is imperative when using this high data rate transceiver. In point-to-  
point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its  
characteristic impedance (typically 100Ω for Cat 5, 120Ω for RS-485, and 150Ω for Type A) at the end farthest  
from the driver. In multireceiver applications, stubs connecting receivers to the main cable should be kept as short  
as possible. Multipoint (multidriver) systems require that the main cable be terminated in its characteristic  
impedance at both ends. Stubs connecting transceivers to the main cable should be kept as short as possible.  
PROFIBUS specifies line termination with fail-safe biasing networks of fixed resistor values at both cable ends.  
VS  
VS  
RB  
RT  
RB  
RB  
RT  
RB  
390R  
220R  
390R  
220R  
390R  
390R  
Figure 6. Line Termination for PROFIBUS-DP  
For isolated data links meeting the requirements of EIA-485, the resistor values for the fail-safe biasing network  
can be calculated using (EQ. 1) through (EQ. 4).  
For data links longer than 100m (330ft) apply fail-safe biasing at both cable ends to compensate for the attenuation  
of the bus fail-safe voltage caused by the voltage divider action of the cable’s DC resistance and the remote fail-  
safe biasing network. Use (EQ. 1) to calculate the bias resistors, R , and (EQ. 2) to determine the termination  
B
resistors, R .  
T
V
Z
0
2
S
----------- ------  
R
(EQ. 1)  
B
V
AB  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 14 of 20  
ISL32740E  
5. Application Information  
2R Z  
B
0
------------------------  
=
R
(EQ. 2)  
T
2R Z  
B
0
where:  
• R is the value of the biasing resistors  
B
• R is the value of the termination resistors  
T
• V is the minimum transceiver supply voltage  
S
• V is the minimum bus voltage during bus idling  
AB  
• Z is the characteristic cable impedance of 120Ω  
0
VS1  
VS2  
RB  
RT  
RB  
RB  
RT  
RB  
1.09k  
127R  
1.09k  
1.09k  
127R  
1.09k  
GND2  
GND1  
Figure 7. Dual Fail-Safe Biasing for Long Data Links  
For data links shorter than 100m, use a single fail-safe biasing network. Match the termination resistor value at the  
cable end without fail-safe biasing with the characteristic cable impedance: R = Z . Then calculate R using  
T1  
0
B
(EQ. 3) and R using (EQ. 4).  
T2  
V
Z
0
4
S
----------- ------  
R
(EQ. 3)  
(EQ. 4)  
B
V
AB  
2R Z  
B
0
------------------------  
R
=
T2  
2R Z  
B
0
V
S
R
542R  
135R  
542R  
B
R
120R  
R
T1  
T2  
R
B
Figure 8. Single Fail-Safe Biasing for Short Data Links  
Note that the resistor values in Figures 7 and 8 have been calculated for V = 4.5V, V = 0.25V, and Z = 120Ω.  
S
AB  
0
FN8857 Rev.4.00  
Nov 30, 2017  
Page 15 of 20  
ISL32740E  
5. Application Information  
5.13 Transient Protection  
Protecting the ISL32740E against transients exceeding the device’s transient immunity requires the addition of an  
external TVS. For this purpose, Semtech’s RClamp0512TQ was chosen due to its high transient protection levels,  
low junction capacitance, and small form factor.  
Table 5. RCLAMP0512 TVS Features  
Parameter  
Symbol  
Value  
±30  
±30  
±4  
Unit  
kV  
ESD (IEC61000-4-2)  
Air  
V
V
ESD  
Contact  
kV  
ESD  
EFT (IEC61000-4-4)  
Surge (IEC61000-4-5)  
Junction Capacitance  
Form Factor  
V
kV  
EFT  
V
±1.3  
3
kV  
SURGE  
C
pF  
J
-
1 x 0.6  
mm  
The TVS is implemented between the bus lines and isolated ground (GND2).  
Because transient voltages on the bus lines are referenced to Earth potential, also known as Protective Earth (PE), a  
high-voltage capacitor (C ) is inserted between GND2 and PE, providing a low-impedance path for high-  
HV  
frequency transients.  
Note that the connection from the PE point on the isolated side to the PE point on the non-isolated side (Earth) is  
usually made using the metal chassis of the equipment, or through a short, thick wire of low-inductance.  
A high-voltage resistor (R ) is added in parallel to C  
HV HV  
to prevent the build-up of static charges on floating  
grounds (GND2) and cable shields (typically used in PROFIBUS). The bill of materials for the circuit in Figure 9 is  
listed in Table 6 on page 16.  
V
S-ISO  
V
S
A
B
A
MCU/  
UART  
ISL32740E  
B
Shield  
TVS  
GND  
PE  
C
HV  
R
HV  
PE  
Non-isolated Ground  
Isolated Ground, Floating RS-485 Common  
Protective Earth Ground, Equipment Safety Ground  
Figure 9. Transient Protection for ISL32740E  
Table 6. BOM for Circuit in Figure 9  
Name  
Function  
Order No.  
Vendor  
TVS  
170W (8, 20µs) 2-LINE PROTECTOR RCLAMP0512TQ  
SEMTECH  
NOVACAP  
C
R
4.7nF, 2kV, 10% CAPACITOR  
1MΩ, 2kV, 5% RESISTOR  
1812B472K202NT  
HVC12061M0JT3  
HV  
TT-ELECTRONICS  
HV  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 16 of 20  
ISL32740E  
6. Revision History  
6. Revision History  
Rev.  
4.00  
3.00  
Date  
Description  
Nov 30, 2017  
Oct 2, 2017  
Updated certification file number for VDE.  
Updated thermal resistance values for the QSOP package. Changed from “92” to “77” and from  
JA JC  
“37” to “41”.  
2.00  
1.00  
Aug 24, 2017  
Jul 6, 2017  
Updated Table 1 on page 2.  
Updated receiving truth table.  
Applied new formatting standards.  
Updated Title.  
Added ISL32740EIAZ and ISL32740EFBZ information throughout document.  
Updated Note 1.  
Updated Pin descriptions for Pins A, B, GND2, ISODE, and VDD2.  
Updated thermal resistance for the SOICW package. Changed from “60” to “43” and from “12” to  
JA JC  
“20”.  
Updated Total Barrier Thickness (internal) spec removed minimum and changed typical from “16” to “13”.  
Updated “Magnetic Field Immunity” on page 8, removed all MIN values.  
Updated POD M16.3A to the latest revision. Changes are as follows:  
-Revised the land pattern.  
0.00  
Feb 28, 2017  
Initial release  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 17 of 20  
ISL32740E  
7. Package Outline Drawings  
For the most recent package outline drawing, see M16.3A.  
7. Package Outline Drawings  
M16.3A  
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOICW)  
Rev 1, 6/17  
1
3
10.08  
10.49  
0.3  
0.5  
SEE DETAIL "X"  
16  
9
0.18  
0.25  
7.42  
7.59  
10.00  
10.64  
6.60  
7.11  
PIN #1  
I.D. MARK  
2
3
0.85  
1.10  
1
8
1.24  
1.30  
0.2  
0.3  
TOP VIEW  
END VIEW  
0.05  
2.34  
2.67  
H
C
2.0  
2.5  
GAUGE  
PLANE  
SEATING  
PLANE  
0.25  
0.1  
0.3  
0.3  
0.5  
5
0.1 MIN  
0.40  
0.10  
C
0° TO 8°  
0.3 MAX  
1.30  
0.1 M  
C
B A  
SIDE VIEW  
DETAIL X  
(1.7)  
NOTES:  
20. Dimension does not include mold flash, protrusions, or gate burrs.  
Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side.  
21. Dimension does not include interlead flash or protrusion. Interlead  
flash or protrusion shall not exceed 0.25 per side.  
(9.75)  
22. Dimensions are measured at datum plane H.  
23. Dimensioning and tolerancing per ASME Y14.5M-1994.  
24. Dimension does not include dambar protrusion.  
25. Dimension in ( ) are for reference only.  
26. Pin spacing is a BASIC dimension; tolerances do not accumulate.  
27. Dimensions are in mm.  
(0.51)  
(1.27)  
TYPICAL RECOMMENDED LAND PATTERN  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 18 of 20  
ISL32740E  
7. Package Outline Drawings  
For the most recent package outline drawing, see M16.15B.  
M16.15B  
16 LEAD QUARTER-SIZE SMALL OUTLINE PLASTIC PACKAGE (QSOP)  
Rev 0, 9/16  
A
1
3
4.77  
5.00  
16  
9
SEE DETAIL "X"  
5.8  
6.2  
3.8  
4.0  
3
2
PIN #1  
I.D. MARK  
45° NOM  
1
8
0.635  
0.20  
0.25  
B
TOP VIEW  
END VIEW  
0.05  
1.00 REF  
H
1.52  
1.75  
C
1.27  
1.42  
GAUGE  
PLANE  
SEATING  
PLANE  
0.25  
0.10  
0.25  
0.2  
0.3  
0.10 MIN  
0.25 MAX  
5
0.10  
C
0° TO 8°  
0.50  
0.75  
0.10 M C B A  
SIDE VIEW  
(0.38)  
DETAIL X  
(1.53)  
NOTES:  
1. Dimension does not include mold flash, protrusions, or gate burrs.  
Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side.  
2. Dimension does not include interlead flash or protrusion. Interlead  
flash or protrusion shall not exceed 0.25 per side.  
(5.30)  
3. Dimensions are measured at datum plane H.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994.  
5. Dimension does not include dambar protrusion.  
6. Dimension in ( ) are for reference only.  
7. Pin spacing is a BASIC dimension; tolerances do not accumulate.  
8. Dimensions are in mm.  
(0.635)  
TYPICAL RECOMMENDED LAND PATTERN  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 19 of 20  
ISL32740E  
8. About Intersil  
8. About Intersil  
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The  
company's products address some of the largest markets within the industrial and infrastructure, mobile computing and  
high-end consumer markets.  
For the most updated datasheet, application notes, related documentation and related parts, please see the respective  
product information page found at www.intersil.com.  
For a listing of definitions and abbreviations of common terms used in our documents, visit:  
www.intersil.com/glossary.  
You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.  
Reliability reports are also available from our website at www.intersil.com/support.  
© Copyright Intersil Americas LLC 2017. All Rights Reserved.  
All trademarks and registered trademarks are the property of their respective owners.  
For additional products, see www.intersil.com/en/products.html  
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted  
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html  
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice,  
provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned  
to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no  
responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN8857 Rev.4.00  
Nov 30, 2017  
Page 20 of 20  

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