ISL9007IUNZ [RENESAS]
High Current LDO with Low IQ and High PSRR;
| 型号： | ISL9007IUNZ |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | High Current LDO with Low IQ and High PSRR 光电二极管 输出元件 调节器 |
| 文件： | 总9页 (文件大小：503K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL9007
FN9218
Rev 3.00
February 11, 2014
High Current LDO with Low I and High PSRR
Q
ISL9007 is a high performance LDO that delivers a continuous
400mA of load current. It has a low standby current and
high PSRR and is stable with output capacitance of 1µF to
10µF with an ESR of up to 200m.
Features
• High performance LDO with 400mA continuous output
• Excellent transient response to large current steps
The ISL9007 has a very high PSRR of 75dB and output noise
• Excellent load regulation: <0.1% voltage change across full
range of load current
less than 30µV
. When coupled with a no load quiescent
RMS
current of 50µA (typical), and 1µA (max) shutdown current, the
ISL9007 is an ideal choice for portable wireless equipment.
• Very high PSRR: 75dB @ 1kHz
• Wide input voltage capability: 2.3V to 6.5V
• Very low quiescent current: 50µA
The ISL9007 comes in fixed voltage options of 3.3V, 2.85V,
2.8V, and 2.5V with ±1.8% output voltage accuracy
over-temperature, line and load. Other output voltage options
may be available upon request.
• Low dropout voltage: typically 200mV @ 400mA
• Low output noise: typically 30µV
@ 100µA (2.5V)
RMS
• Stable with 1µF to 10µF ceramic capacitors
• Shutdown pin turns off LDO for 1µA (max) standby current
• Soft-start to limit input current surge during enable
• Current limit and overheat protection
• ±1.8% accuracy over all operating conditions
• 8 Ld MSOP package
• -40°C to +85°C operating temperature range
• Pb-free (RoHS compliant)
Applications
• PDAs, Cell Phones and Smart Phones
• Portable Instruments, MP3 Players
• Handheld Devices, including Medical Handhelds
VIN
VIN
VO
UVLO
ISL9007
1
5
8
7
6
VIN (3.0V TO 6.5V)
OFF
VOUT
VIN
VIN
SD
VO
SHORT CIRCUIT,
THERMAL PROTECTION,
SOFT-START
CONTROL
LOGIC
SHUTDOWN
ON
GND
C1
C2
SD
+
-
C , C : 1µF X5R CERAMIC CAPACITOR
1
2
BANDGAP AND
TEMPERATURE
SENSOR
GND
FIGURE 1. TYPICAL APPLICATION
FIGURE 2. BLOCK DIAGRAM
FN9218 Rev 3.00
February 11, 2014
Page 1 of 9
ISL9007
Pin Configuration
Pin Descriptions
ISL9007
PIN
(8 LD MSOP)
TOP VIEW
NUMBER
PIN NAME
VO
DESCRIPTION
1
LDO Output:
Connect capacitor of value 1µF to 10µF to
GND (1µF recommended)
1
2
8
VIN
VIN
SD
VO
NC
NC
NC
7
2, 3, 4
5
NC
No Connection
3
4
6
5
GND
GND is the connection to system ground.
Connect to PCB Ground plane.
GND
6
SD
LDO Shutdown. When this signal goes high,
the LDO is turned off.
7, 8
VIN
Supply Voltage/LDO Input:
Connect a 1µF capacitor to GND.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
VO VOLTAGE (V)
(Note 4)
TEMP RANGE
PACKAGE
(Pb-free)
PKG.
DWG. #
PART MARKING
(°C)
ISL9007IUNZ
007NZ
007KZ
007JZ
007FZ
007CZ
3.3
2.85
2.8
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
8 Ld MSOP
M8.118
ISL9007IUKZ
ISL9007IUJZ
ISL9007IUFZ
ISL9007IUCZ
ISL9007EVAL1Z
NOTES:
8 Ld MSOP
8 Ld MSOP
8 Ld MSOP
8 Ld MSOP
M8.118
M8.118
M8.118
M8.118
2.5
1.8
Evaluation Board
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9007. For more information on MSL please see techbrief TB363.
4. For other output voltages, contact Intersil Marketing.
FN9218 Rev 3.00
February 11, 2014
Page 2 of 9
ISL9007
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.1V
VO Pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)V
Thermal Resistance (Typical)
8 Ld MSOP Package (Notes 5, 6) . . . . . . . .
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
JA (°C/W)
157
JC (°C/W)
IN
75
Recommended Operating Conditions
Ambient Temperature Range (T ) . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
A
Supply Voltage (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3V to 6.5V
IN
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5. is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
6. For , the “case temp” location is taken at the package top center.
JC
Electrical Specifications Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and
temperature range of the device as follows: T = -40°C to +85°C; V = (V + 0.5V) to 6.5V with a minimum V of 2.3V; C = 1µF;
A
IN
O
IN
IN
C
= 1µF. Boldface limits apply over the operating temperature range, -40°C to +85°C.
O
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(Note 7) TYP
(Note 7)
UNITS
DC CHARACTERISTICS
Supply Voltage
V
2.3
6.5
70
V
µA
µA
V
IN
Ground Current
I
Quiescent condition: I = 0µA
50
DD
O
Shutdown Current
UVLO Threshold
I
@ +25°C
0.1
1.0
DDS
V
1.9
1.6
2.1
1.8
2.3
UV+
V
2.0
V
UV-
Regulation Voltage Accuracy
Initial accuracy at V = V + 0.5V, I = 10mA, T = +25°C
IN
-0.7
-0.8
-1.8
+0.7
+0.8
+1.8
%
%
%
O
O
J
V
= V + 0.5V to 5.5V, I = 10µA to 400mA, T = +25°C
O O J
IN
V
= V + 0.5V to 5.5V, I = 10µA to 400mA, T = -40°C to
IN
O
O
J
+125°C
Maximum Output Current
Internal Current Limit
I
Continuous
400
470
mA
mA
mV
mV
°C
MAX
I
540
250
200
145
110
750
400
325
LIM
Drop-out Voltage (Note 9)
V
V
T
I
I
= 400mA; 2.5V V 2.8V
O
DO1
DO2
SD+
O
= 400mA; 2.8V V
O
O
Thermal Shutdown Temperature
T
°C
SD-
AC CHARACTERISTICS
Ripple Rejection (Note 8)
I
I
= 10mA, V = 2.8V (min), V = 1.8V
IN
O
O
@ 1kHz
75
60
40
40
dB
dB
dB
@ 10kHz
@ 100kHz
Output Noise Voltage (Note 8)
= 100µA, V = 1.5V, T = +25°C
µV
RMS
O
O
A
BW = 10Hz to 100kHz
DEVICE START-UP CHARACTERISTICS
Device Enable Time
t
Time from assertion of the ENx pin to when the output voltage
reaches 95% of the VO (nom)
250
30
500
60
µs
EN
LDO Soft-start Ramp Rate
t
Slope of linear portion of LDO output voltage ramp during
start-up
µs/V
SSR
FN9218 Rev 3.00
February 11, 2014
Page 3 of 9
ISL9007
Electrical Specifications Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and
temperature range of the device as follows: T = -40°C to +85°C; V = (V + 0.5V) to 6.5V with a minimum V of 2.3V; C = 1µF; C = 1µF.
A
IN
O
IN
IN
O
(Continued)Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
MIN
MAX
PARAMETER
SD PIN CHARACTERISTICS
Input Low Voltage
Input High Voltage
Input Leakage Current
Pin Capacitance
SYMBOL
TEST CONDITIONS
(Note 7) TYP
(Note 7)
UNITS
V
-0.3
1.4
0.4
V
V
IL
V
V
+ 0.3
IH
IN
I , I
IL IH
0.1
µA
pF
C
Informative
5
PIN
NOTES:
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
8. Limits established by characterization and are not production tested.
9. VO-x = 0.98*VO-x(NOM).
Typical Performance Curves
0.10
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
-0.08
-0.10
0.8
V
= 3.3V
O
V
V
= 3.8V
= 3.3V
IN
O
I
= 0mA
0.6
L
0.4
0.2
-40°C
-40C
+25C
0.0
+25°C
-0.2
-0.4
-0.6
-0.8
+85°C
+85C
3.4
3.8
4.2
4.6
5.0
5.4
5.8
6.2
6.6
0
50
100
150
200
250
300
350
400
INPUT VOLTAGE (V)
LOAD CURRENT - I (mA)
O
FIGURE 3. OUTPUT VOLTAGE vs INPUT VOLTAGE (3.3V OUTPUT)
FIGURE 4. OUTPUT VOLTAGE vs LOAD CURRENT
3.4
3.3
3.2
3.1
3.0
2.9
2.8
0.10
V
V
= 3.8V
= 3.3V
= 0mA
V
= 3.3V
IN
O
O
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
I
= 0mA
O
I
L
I
= 150mA
O
I
= 300mA
O
-0.08
-0.10
3.1
3.6
4.1
4.6
5.1
5.6
6.1
6.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
INPUT VOLTAGE (V)
FIGURE 5. OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 6. OUTPUT VOLTAGE vs INPUT VOLTAGE (3.3V OUTPUT)
FN9218 Rev 3.00
February 11, 2014
Page 4 of 9
ISL9007
Typical Performance Curves
2.9
350
300
250
200
150
100
50
V
= 2.8V
O
I
= 0mA
O
2.8
2.7
2.6
2.5
2.4
2.3
I
= 150mA
O
V
= 2.8V
O
I
= 300mA
V = 3.3V
O
O
0
2.6
3.1
3.6
4.1
4.6
5.1
5.6
6.1 6.5
0
50
100
150
200
250
300
350
400
OUTPUT LOAD (mA)
INPUT VOLTAGE (V)
FIGURE 7. OUTPUT VOLTAGE vs INPUT VOLTAGE (2.8V OUTPUT)
FIGURE 8. DROPOUT VOLTAGE vs LOAD CURRENT
350
80
70
60
50
40
30
20
V
= 3.3V
O
300
250
200
150
100
50
125°C
+25°C
+25C
-40C
+85C
-40°C
V
I
= 3.3V
= 0µA
O
O
0
0
50
100
150
200
250
300
350
400
3.0
3.5
4.0
4.58
5.0
5.5
6.0
6.5
INPUT VOLTAGE (V)
OUTPUT LOAD (mA)
FIGURE 9. DROPOUT VOLTAGE vs LOAD CURRENT
FIGURE 10. GROUND CURRENT vs INPUT VOLTAGE
80
200
180
160
140
120
100
80
70
60
50
40
30
20
+25C
+85C
-40C
60
V
V
= 3.8V
= 3.3V
IN
O
40
V
V
= 3.8V
= 3.3V
IN
I
= 0µA
L
20
O
0
0
50
100
150
200
250
300
350
400
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
LOAD CURRENT (mA)
FIGURE 12. GROUND CURRENT vs TEMPERATURE
FIGURE 11. GROUND CURRENT vs LOAD
FN9218 Rev 3.00
February 11, 2014
Page 5 of 9
ISL9007
Typical Performance Curves
V
= 3.3V
= 300mA
O
V
V
I
= 5.0V
= 3.3V
= 300mA
IN
O
L
I
L
C
= 1µF
L
3
2
1
0
5
0
C
= 1µF
L
4.3V
3.6V
10mV/DIV
0
100 200 300 400 500 600 700 800 900
TIME (µs)
1K
400 µs/DIV
FIGURE 13. TURN ON/TURN OFF RESPONSE
FIGURE 14. LINE TRANSIENT RESPONSE, 3.3V OUTPUT
V
= 2.8V
O
I
= 300mA
L
C
= 1µF
L
V
(25mV/DIV)
O
4.2V
3.5V
V
= 1.8V
= 2.8V
O
V
IN
300mA
100µA
10mV/DIV
I
LOAD
100µs/DIV
400µs/DIV
FIGURE 16. LOAD TRANSIENT RESPONSE
FIGURE 15. LINE TRANSIENT RESPONSE, 2.8V OUTPUT
100
90
80
70
60
50
40
30
20
10
0
10
1
V
V
= 3.5V
= 2.5V
= 10mA
IN
O
I
O
C
= 1µF
L
0.1
0.01
V
V
= 3.6V
= 1.8V
IN
O
I
= 10mA
LOAD
C
C
= 1µF
IN
= 1µF
L
0.001
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 18. SPECTRAL NOISE DENSITY vs FREQUENCY
FIGURE 17. PSRR vs FREQUENCY
FN9218 Rev 3.00
February 11, 2014
Page 6 of 9
ISL9007
LDO Regulation and Programmable Output
Divider
Functional Description
The ISL9007 contains all circuitry required to implement a high
performance LDO. High performance is achieved through a
circuit that delivers fast transient response to varying load
conditions. In a quiescent condition, the ISL9007 adjusts its
biasing to achieve the lowest standby current consumption.
The LDO Regulator is implemented with a high-gain operational
amplifier driving a PMOS pass transistor. The design of the
ISL9000 provides a regulator that has low quiescent current, fast
transient response, and overall stability across all operating and
load current conditions. LDO stability is guaranteed for a 1µF to
10µF output capacitor that has a tolerance better than 20% and
ESR less than 200m. The design is performance-optimized for
a 1µF capacitor. Unless limited by the application, use of an
output capacitor value above 4.7µF is not recommended as LDO
performance improvement is minimal.
The device also integrates current limit protection, smart thermal
shutdown protection, and soft-start. Smart thermal shutdown
protects the device against overheating. Soft-start minimize
start-up input current surges without causing excessive device
turn-on time.
Power Control
Soft-start circuitry integrated into each LDO limits the initial
ramp-up rate to about 30µs/V to minimize current surge. The
ISL9007 provides short-circuit protection by limiting the output
current to about 500mA.
The ISL9007 has a shutdown pin (SD) to control power to the LDO
output. When SD is high, the device is in shutdown mode. In this
condition, all on-chip circuits are off, and the device draws
minimum current, typically less than 0.1µA. When the SD pin
goes low, the device first polls the output of the UVLO detector to
ensure that the VIN voltage is at least 2.1V (typical). Once
verified, the device initiates a start-up sequence. During the
start-up sequence, trim settings are first read and latched. Then,
sequentially, the bandgap, reference voltage and current
generation circuitry turn-on. Once the references are stable, the
LDO powers up.
The LDO uses an independently trimmed 1V reference as its
input. An internal resistor divider drops the LDO output voltage
down to 1V. This is compared to the 1V reference for regulation.
The resistor division ratio is programmed in the factory to one of
the following output voltages: 3.3, 2.85V, 2.8V, and 2.5V.
Overheat Detection
The bandgap outputs a proportional-to-temperature current that
is indicative of the temperature of the silicon. This current is
compared with references to determine if the device is in danger
of damage due to overheating. When the die temperature
reaches about +145°C, the LDO momentarily shuts down until
the die cools sufficiently. In the overheat condition, if the LDO
sources more than 50mA it will be shut off. Once the die
temperature falls back below about +110°C, the disabled LDO is
re-enabled and soft-start automatically takes place.
During operation, whenever the VIN voltage drops below about
1.84V, the ISL9007 immediately disables both LDO outputs.
When VIN rises back above 2.1V (assuming the SD pin is low),
the device re-initiates its start-up sequence and LDO operation
will resume automatically.
Reference Generation
The reference generation circuitry includes a trimmed bandgap,
a trimmed voltage reference divider, a trimmed current reference
generator, and an RC noise filter.
The bandgap generates a zero temperature coefficient (TC)
voltage for the regulator reference and other voltage references
required for current generation and over-temperature detection.
A current generator provides references required for adaptive
biasing as well as references for LDO output current limit and
thermal shutdown determination.
FN9218 Rev 3.00
February 11, 2014
Page 7 of 9
ISL9007
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
FN9218.3
CHANGE
February 11, 2014
Converted to New Intersil Template and applied Standards as follows:
Moved Typical Application and Block Diagram graphics from page 6 to page 1
Moved Pin Configuration from page 1 to page 2 and moved pin description from page 6 to page 1
Updated ordering information as follows:
added new part ISL9007IUCZ and Eval board
added Note references and updated note for Tape and Reel Specifications.
updated lead finish in order to match Intrepid.
added MSL note.
Updated Thermal Information as follows:
added Tjc
changed note which reference package from High effective “direct attach” to High effective no direct attach.
changed Tjc note from underside to top (note there was no Tjc note in prior version).
Updated Electrical Specifications as follows:
added Boldface limits note to conditions.
Bolded MIN and MAX values in columns.
Added Note reference in MIN and MAX columns for over-temp note.
Replaced Note which read “Parts are 100% tested...” with “Parameters with MIN and MAX limits...”
Updated POD M8.118 by adding land pattern and moving dimensions from table onto drawing.
Added Rev History and Products Information.
October 30, 2008
March 27, 2008
FN9218.2
FN9218.1
Corrected the units in Figure 15 on page 5 to be kHz.
Added VO pin at 3.6V to Abs Max section.
Added last sentence to paragraph above pinout "Other output voltage options may be available upon request".
Applied Intersil Standards as follows:
Updated pb-free bullet in features indication pb-free only parts,
Updated notes in ordering information (tape and reel reference note and pb-free note to match lead finish),
Added pb-free reflow link to Thermal Information,
Replaced caution statement with legal's suggested verbiage
Added Note to electrical specs indicating parts tested 100% at 25 degrees for Min and Max.
October 13, 2005
FN9218.0
Initial Release.
About Intersil
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management
semiconductors. The company's products address some of the largest markets within the industrial and infrastructure, personal
computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting
www.intersil.com/en/support/ask-an-expert.html. Reliability reports are also available from our website at
http://www.intersil.com/en/support/qualandreliability.html#reliability
© Copyright Intersil Americas LLC 2005-2014. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN9218 Rev 3.00
February 11, 2014
Page 8 of 9
ISL9007
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 3, 3/10
5
3.0±0.05
A
8
DETAIL "X"
D
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
B
0.65 BSC
GAUGE
PLANE
TOP VIEW
0.25
3°±3°
0.55 ± 0.15
DETAIL "X"
0.85±010
H
C
SEATING PLANE
0.10 C
0.25 - 0.036
0.10 ± 0.05
0.08
C A-B D
M
SIDE VIEW 1
(5.80)
NOTES:
1. Dimensions are in millimeters.
(4.40)
(3.00)
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
(0.65)
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
(0.40)
(1.40)
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
TYPICAL RECOMMENDED LAND PATTERN
FN9218 Rev 3.00
February 11, 2014
Page 9 of 9
相关型号：
©2020 ICPDF网 联系我们和版权申明