ISL9014AIRFCZ-T [RENESAS]
Dual LDO with Low Noise, Low IQ, and High PSRR; DFN10; Temp Range: -40° to 85°C;
| 型号： | ISL9014AIRFCZ-T |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Dual LDO with Low Noise, Low IQ, and High PSRR; DFN10; Temp Range: -40° to 85°C 光电二极管 输出元件 调节器 |
| 文件： | 总13页 (文件大小：658K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL9014A
FN6438
Rev 3.00
December 10, 2015
Dual LDO with Low Noise, Low I , and High PSRR
Q
ISL9014A is a high performance dual LDO capable of
sourcing 300mA current from both outputs. The device has a
low standby current and high-PSRR and is stable with output
capacitance of 1µF to 10µF with ESR of up to 200m.
Features
• Integrates two high performance LDOs
- VO1 - 300mA output
- VO2 - 300mA output
A reference bypass pin allows an external capacitor for
adjusting a noise filter for low noise and high PSRR
applications.
• Excellent transient response to large current steps
• Excellent load regulation: <1% voltage change across full
range of load current
The quiescent current is typically only 45µA with both LDOs
enabled and active. Separate enable pins control each
individual LDO output. When both enable pins are low, the
device is in shutdown, typically drawing less than 0.1µA.
• High PSRR: 70dB @ 1kHz
• Wide input voltage capability: 2.3V to 6.5V
• Extremely low quiescent current: 45µA (both LDOs active)
• Low dropout voltage: typically 200mV @ 300mA
Several combinations of voltage outputs are standard.
Output voltage options for each LDO range from 1.5V to
3.3V. Other output voltage options are available on request.
• Low output noise: typically 30µV
@ 100µA (1.5V)
RMS
• Stable with 1µF to 10µF ceramic capacitors
• Separate enable pins for each LDO
Pinout
ISL9014A
(10 LD 3x3 DFN)
TOP VIEW
• Soft-start to limit input current surge during enable
• Current limit and overheat protection
• ±1.8% accuracy over all operating conditions
• Tiny 10 Ld 3mmx3mm DFN package
• -40°C to +85°C operating temperature range
• Pin compatible with Micrel MIC2211
• Pb-free (RoHS compliant)
1
2
3
4
5
10
9
VO1
VO2
NC
VIN
EN1
EN2
8
NC
7
CBYP
NC
6
GND
Applications
• PDAs, Cell Phones and Smart Phones
• Portable Instruments, MP3 Players
• Handheld Devices including Medical Handhelds
FN6438 Rev 3.00
Page 1 of 13
December 10, 2015
ISL9014A
Ordering Information
PART NUMBER
PACKAGE
(Pb-Free)
(Notes 1, 2, 3)
ISL9014AIRNNZ
ISL9014AIRNJZ
ISL9014AIRNFZ
PART MARKING VO1 VOLTAGE VO2 VOLTAGE TEMP RANGE (°C)
PKG. DWG. #
L10.3x3C
DKNA
DKMA
DKLA
DKKA
3.3V
3.3V
3.3V
3.3V
3.3V
2.8V
2.5V
1.8V
-40 to +85
-40 to +85
-40 to +85
-40 to +85
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
L10.3x3C
L10.3x3C
L10.3x3C
ISL9014AIRNCZ (No
longer available,
recommended
replacement:
ISL9000AIRNJZ)
ISL9014AIRMNZ
DKJA
DKHA
3.0V
3.0V
3.3V
3.0V
-40 to +85
-40 to +85
10 Ld 3x3 DFN
10 Ld 3x3 DFN
L10.3x3C
L10.3x3C
ISL9014AIRMMZ (No
longer available,
recommended
replacement:
ISL9000AIRMGZ-T)
ISL9014AIRMGZ
DKGA
DKFA
3.0V
2.9V
2.7V
2.9V
-40 to +85
-40 to +85
10 Ld 3x3 DFN
10 Ld 3x3 DFN
L10.3x3C
L10.3x3C
ISL9014AIRLLZ (No
longer available,
recommended
replacement:
ISL9000AIRLLZ)
ISL9014AIRKNZ (No
longer available,
recommended
DKDA
2.85V
3.3V
-40 to +85
10 Ld 3x3 DFN
L10.3x3C
replacement:
ISL9000AIRKCZ-T)
ISL9014AIRKKZ
ISL9014AIRKJZ
ISL9014AIRKFZ
DKCA
DKBA
DJYA
DKEA
2.85V
2.85V
2.85V
2.85V
2.85V
2.8V
-40 to +85
-40 to +85
-40 to +85
-40 to +85
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
2.5V
ISL9014AIRKPZ (No
longer available,
recommended
1.85V
replacement:
ISL9000AIRKCZ-T)
ISL9014AIRKCZ
ISL9014AIRJNZ
DJWA
DJTA
DJSA
2.85V
2.8V
2.8V
1.8V
3.3V
3.0V
-40 to +85
-40 to +85
-40 to +85
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
L10.3x3C
L10.3x3C
L10.3x3C
ISL9014AIRJMZ (No
longer available,
recommended
replacement:
ISL9000AIRJBZ-T)
ISL9014AIRJRZ (No
longer available,
recommended
replacement:
ISL9000AIRJNZ-T)
DJVA
DJRA
DJPA
2.8V
2.8V
2.8V
2.6V
1.8V
1.5V
-40 to +85
-40 to +85
-40 to +85
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
L10.3x3C
L10.3x3C
ISL9014AIRJCZ (No
longer available,
recommended
replacement:
ISL9000AIRJBZ-T)
ISL9014AIRJBZ
L10.3x3C
FN6438 Rev 3.00
December 10, 2015
Page 2 of 13
ISL9014A
Ordering Information (Continued)
PART NUMBER
(Notes 1, 2, 3)
PACKAGE
(Pb-Free)
PART MARKING VO1 VOLTAGE VO2 VOLTAGE TEMP RANGE (°C)
PKG. DWG. #
L10.3x3C
ISL9014AIRGCZ (No
longer available or
supported)
DJMA
2.7V
1.8V
-40 to +85
10 Ld 3x3 DFN
ISL9014AIRFJZ
ISL9014AIRFDZ
ISL9014AIRFCZ
DJLA
DJKA
DJJA
DKPA
2.5V
2.5V
2.8V
2.0V
1.8V
2.9V
-40 to +85
-40 to +85
-40 to +85
-40 to +85
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
L10.3x3C
L10.3x3C
L10.3x3C
L10.3x3C
2.5V
ISL9014AIRPLZ (No
longer available or
supported)
1.85V
ISL9014AIRCJZ
ISL9014AIRCCZ
DJHA
DJGA
DJEA
1.8V
1.8V
1.5V
2.8V
1.8V
2.8V
-40 to +85
-40 to +85
-40 to +85
10 Ld 3x3 DFN
10 Ld 3x3 DFN
10 Ld 3x3 DFN
L10.3x3C
L10.3x3C
L10.3x3C
ISL9014AIRBJZ (No
longer available or
supported)
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. For availability and lead time of devices with voltage combinations not listed in the table, contact Intersil Marketing.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte
tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
FN6438 Rev 3.00
December 10, 2015
Page 3 of 13
ISL9014A
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.1V
Thermal Resistance (Notes 4, 5)
(°C/W)
50
(°C/W)
10
JA
JC
V
V
Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6V
O1, O2
3x3 DFN Package . . . . . . . . . . . . . . . .
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (V +0.3)V
IN
Junction Temperature Range . . . . . . . . . . . . . . . . .-40°C to +125°C
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range (T ) . . . . . . . . . . . . . . .-40°C to +85°C
A
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3V to 6.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
4. is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
JA
Tech Brief TB379.
5. , “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
JC
Electrical Specifications Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: T = -40°C to +85°C; V = (V + 1.0V) to 6.5V with a minimum V of 2.3V;
A
IN
O
IN
C
= 1µF; C = 1µF; C
= 0.01µF
IN
O
BYP
MIN
MAX
PARAMETER
DC CHARACTERISTICS
Supply Voltage
SYMBOL
TEST CONDITIONS
(Note 7) TYP
(Note 7) UNITS
V
2.3
6.5
V
IN
Ground Current
Quiescent condition: I = 0µA; I = 0µA
O1 O2
I
One LDO active
Both LDO active
@ +25°C
25
45
40
60
µA
µA
µA
V
DD1
DD2
DDS
I
Shutdown Current
UVLO Threshold
I
0.1
1.0
2.3
2.0
+1.8
V
1.9
1.6
2.1
1.8
UV+
V
V
UV-
Regulation Voltage Accuracy
Variation from nominal voltage output, V = V +0.5V to 5.5V,
IN
-1.8
%
O
T = -40°C to +125°C
J
Line Regulation
Load Regulation
V
= (V
+ 1.0V relative to highest output voltage) to 5.5V
OUT
-0.2
0
0.2
0.7
1.0
%/V
%
IN
I
I
= 100µA to 150mA
= 100µA to 300mA
0.1
OUT
OUT
%
Maximum Output Current
I
VO1: Continuous
VO2: Continuous
300
300
350
mA
mA
mA
mV
mV
mV
mV
°C
MAX
Internal Current Limit
I
V
V
V
V
T
475
125
300
250
200
145
110
600
200
500
400
325
LIM
Dropout Voltage (Note 6)
I
I
I
I
= 150mA; V 2.1V
O
DO1
DO2
DO3
DO4
SD+
O
O
O
O
= 300mA; V < 2.5V
O
= 300mA; 2.5V V 2.8V
O
= 300mA; V > 2.8V
O
Thermal Shutdown Temperature
T
°C
SD-
AC CHARACTERISTICS
Ripple Rejection
I
= 10mA, V = 2.8V(min), V = 1.8V, C
IN
= 0.1µF
BYP
O
O
@ 1kHz
70
55
40
dB
dB
dB
@ 10kHz
@ 100kHz
FN6438 Rev 3.00
December 10, 2015
Page 4 of 13
ISL9014A
Electrical Specifications Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: T = -40°C to +85°C; V = (V + 1.0V) to 6.5V with a minimum V of 2.3V;
A
IN
O
IN
C
= 1µF; C = 1µF; C
BYP
= 0.01µF (Continued)
IN
O
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(Note 7) TYP
(Note 7) UNITS
Output Noise Voltage
I
= 100µA, V = 1.5V, T = +25°C, C
BYP
= 0.1µF
30
µV
RMS
O
O
A
BW = 10Hz to 100kHz
DEVICE START-UP CHARACTERISTICS
Device Enable tIme
t
Time from assertion of the ENx pin to when the output voltage
reaches 95% of the VO(nom)
250
30
500
60
µs
EN
LDO Soft-Start Ramp Rate
t
Slope of linear portion of LDO output voltage ramp during
start-up
µs/V
SSR
EN1, EN2 PIN CHARACTERISTICS
Input Low Voltage
V
-0.3
1.4
0.5
V
V
IL
Input High Voltage
Input Leakage Current
Pin Capacitance
V
V
+ 0.3
IH
IN
I , I
IL IH
0.1
µA
pF
C
Informative
5
PIN
NOTES:
6. VOx = 0.98*VOx(NOM); Valid for VOx greater than 1.85V.
7. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
FN6438 Rev 3.00
December 10, 2015
Page 5 of 13
ISL9014A
Typical Performance Curves
0.10
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
-0.08
-0.10
0.8
0.6
0.4
V
V
= 3.8V
= 3.3V
V
I
= 3.3V
IN
O
O
= 0mA
LOAD
0.2
-40°C
-40°C
+25°C
0.0
-0.2
+25°C
+85°C
-0.4
-0.6
-0.8
+85°C
0
50
100
150
200
250
300
350
400
3.4
3.8
4.2
4.6
5.0
5.4
5.8
6.2
6.6
LOAD CURRENT - I (mA)
O
INPUT VOLTAGE (V)
FIGURE 1. OUTPUT VOLTAGE vs INPUT VOLTAGE
(3.3V OUTPUT)
FIGURE 2. OUTPUT VOLTAGE CHANGE vs LOAD CURRENT
3.4
0.10
V
V
= 3.8V
= 3.3V
IN
O
V
= 3.3V
O
0.08
0.06
0.04
0.02
0.00
-0.02
-0.04
-0.06
I
= 0mA
O
3.3
3.2
3.1
3.0
2.9
2.8
I
= 0mA
LOAD
I
= 150mA
O
I
= 300mA
O
-0.08
-0.10
-40 -25 -10
5
20
35
50
65
80
95 110 125
3.1
3.6
4.1
4.6
5.1
5.6
6.1 6.5
TEMPERATURE (°C)
INPUT VOLTAGE (V)
FIGURE 3. OUTPUT VOLTAGE CHANGE vs TEMPERATURE
FIGURE 4. OUTPUT VOLTAGE vs INPUT VOLTAGE
(3.3V OUTPUT)
2.9
350
300
250
V
2 = 2.8V
O
I
= 0mA
O
2.8
2.7
2.6
2.5
2.4
2.3
V
= 2.8V
O
I
= 150mA
O
200
150
100
50
V
= 3.3V
O
I
= 300mA
O
0
2.6
3.1
3.6
4.1
4.6
5.1
5.6
6.1 6.5
0
50
100
150
200
250
300
350
400
INPUT VOLTAGE (V)
OUTPUT LOAD (mA)
FIGURE 5. OUTPUT VOLTAGE vs INPUT VOLTAGE
(VO2 = 2.8V)
FIGURE 6. DROPOUT VOLTAGE vs LOAD CURRENT
FN6438 Rev 3.00
December 10, 2015
Page 6 of 13
ISL9014A
Typical Performance Curves (Continued)
55
50
45
40
35
30
25
175
V
1 = 3.3V
O
150
125
100
75
+125°C
+25°C
+85°C
+25°C
-40°C
-40°C
50
V
V
1 = 3.3V
2 = 2.8V
O
O
25
I
(BOTH CHANNELS) = 0µA
O
0
3.0
3.5
4.0
4.58
5.0
5.5
6.0
6.5
0
25
50
75
100
125
150
175
200
OUTPUT LOAD (mA)
INPUT VOLTAGE (V)
FIGURE 7. V 1 DROPOUT VOLTAGE vs LOAD CURRENT
O
FIGURE 8. GROUND CURRENT vs INPUT VOLTAGE
55
50
45
40
35
200
180
160
140
+85°C
120
100
+25°C
80
60
-40°C
V
V
= 3.8V
= 3.3V
IN
O
40
V
V
V
= 3.8V
1 = 3.3V
2 = 2.8V
IN
30
25
O
O
I
= 0µA
20
0
LOAD
BOTH OUTPUTS ON
0
50
100
150
200
250
300
350
400
-40 -25 -10
5
20
35 50
65
80 95 110 125
TEMPERATURE (°C)
LOAD CURRENT (mA)
FIGURE 10. GROUND CURRENT vs TEMPERATURE
FIGURE 9. GROUND CURRENT vs LOAD
V
2 (10mV/DIV)
V
V
1 = 3.3V
O
O
O
2 = 2.8V
5
I 1 = 300mA
L
V
V
V
= 5.0V
1 = 3.3V
2 = 2.8V
IN
V
I 2 = 300mA
L
IN
1
3
2
1
0
5
0
4
3
2
1
0
O
O
V
O
I 1 = 300mA
L
I 2 = 300mA
L
C -1, C -2 = 1µF
C
L
L
V
2
O
= 0.01µF
BYP
0
100 200 300 400 500 600 700 800 900 1000
TIME (µs)
0
1
2
3
4
5
6
7
8
9
10
TIME (s)
FIGURE 12. TURN-ON/TURN-OFF RESPONSE
FIGURE 11. POWER-UP/POWER-DOWN
FN6438 Rev 3.00
December 10, 2015
Page 7 of 13
ISL9014A
Typical Performance Curves (Continued)
V
I
= 3.3V
V
I
2 = 2.8V
O
O
= 300mA
= 300mA
LOAD
LOAD
C
C
= 1µF
= 0.01µF
C
C
= 1µF
= 0.01µF
LOAD
LOAD
BYP
BYP
4.3V
3.6V
4.2V
3.5V
10mV/DIV
10mV/DIV
400µs/DIV
400µs/DIV
FIGURE 13. LINE TRANSIENT RESPONSE, 3.3V OUTPUT
FIGURE 14. LINE TRANSIENT RESPONSE, 2.8V OUTPUT
100
V
V
= 3.6V
= 1.8V
IN
O
90
80
70
60
50
40
30
20
10
0
I
= 10mA
O
V
(25mV/DIV)
O
C
C
= 0.1µF
BYP
= 1µF
LOAD
V
= 1.8V
= 2.8V
O
V
IN
300mA
I
LOAD
100A
0.1
1k
10k
100k
1M
100µs/DIV
FREQUENCY (Hz)
FIGURE 16. PSRR vs FREQUENCY
FIGURE 15. LOAD TRANSIENT RESPONSE
1000
100
10
V
V
= 3.6V
= 1.8V
IN
O
I
= 10mA
= 0.1µF
LOAD
C
C
C
1
BYP
= 1µF
IN
= 1µF
LOAD
0.1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 17. SPECTRAL NOISE DENSITY vs FREQUENCY
FN6438 Rev 3.00
December 10, 2015
Page 8 of 13
ISL9014A
Pin Description
PIN
PIN #
NAME
TYPE
DESCRIPTION
1
VIN
Analog I/O
Supply Voltage/LDO Input:
Connect a 1µF capacitor to GND.
2
3
4
EN1
EN2
Low Voltage Compatible
CMOS Input
LDO-1 Enable.
Low Voltage Compatible
CMOS Input
LDO-2 Enable.
CBYP
Analog I/O
Reference Bypass Capacitor Pin:
Optionally connect capacitor of value 0.01µF to 1µF between this pin and GND to tune in the
desired noise and PSRR performance.
5, 7, 8
NC
GND
VO2
VO1
NC
No Connection
6
9
Ground
Analog I/O
Analog I/O
GND is the connection to system ground. Connect to PCB Ground plane.
LDO-2 Output: Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
LDO-1 Output: Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
10
Typical Application
ISL9014A
10
9
1
2
V
(2.3V to 6.5V)
ENABLE 1
OFF
ENABLE 2
OFF
V
V
1
2
IN
VIN
VO1
VO2
OUT
OUT
ON
ON
EN1
8
7
3
4
EN2
NC
NC
CBYP
6
5
NC
GND
C1
C2
C3
C4
C1, C3, C4: 1µF X5R CERAMIC CAPACITOR
C2: 0.1µF X5R CERAMIC CAPACITOR
FN6438 Rev 3.00
December 10, 2015
Page 9 of 13
ISL9014A
Block Diagram
V
IN
IS1
LDO
VREF
TRIM
VO1
VO2
ERROR
1V
VO1
AMPLIFIER
QEN1
~1.0V
LDO-1
LDO-2
EN1
EN2
CONTROL
LOGIC
BANDGAP AND
TEMPERATURE
SENSOR
VOLTAGE
REFERENCE
GENERATOR
1.00V
UVLO
GND
CBYP
When one or both of the enable pins are asserted, the
device first polls the output of the UVLO detector to ensure
that VIN voltage is at least about 2.1V. Once verified, the
device initiates a start-up sequence. During the start-up
sequence, trim settings are first read and latched. Then,
sequentially, the bandgap, reference voltage and current
generation circuitry power up. Once the references are
stable, a fast-start circuit quickly charges the external
reference bypass capacitor (connected to the CBYP pin) to
the proper operating voltage. After the bypass capacitor has
been charged, the LDO’s power up.
Functional Description
The ISL9014A contains all circuitry required to implement
two high performance LDO’s. High performance is achieved
through a circuit that delivers fast transient response to
varying load conditions. In a quiescent condition, the
ISL9014A adjusts its biasing to achieve the lowest standby
current consumption.
The device also integrates current limit protection, smart
thermal shutdown protection, staged turn-on and soft-start.
Smart Thermal shutdown protects the device against
overheating. Staged turn-on and soft-start minimize start-up
input current surges without causing excessive device
turn-on time.
If EN1 is brought high, and EN2 goes high before the VO1
output stabilizes, the ISL9014A delays the VO2 turn-on until
the VO1 output reaches its target level.
Power Control
If EN2 is brought high, and EN1 goes high before VO2 starts
its output ramp, then VO1 turns on first and the ISL9014A
delays the VO2 turn-on until the VO1 output reaches its
target level.
The ISL9014A has two separate enable pins (EN1 and EN2)
to individually control power to each of the LDO outputs.
When both EN1 and EN2 are low, the device is in shutdown
mode. During this condition, all on-chip circuits are off, and
the device draws minimum current, typically less than 0.1µA.
FN6438 Rev 3.00
December 10, 2015
Page 10 of 13
ISL9014A
If EN2 is brought high, and EN1 goes high after VO2 starts its
output ramp, then the ISL9014A immediately starts to ramp up
the VO1 output.
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain
operational amplifier driving a PMOS pass transistor. The
design of the ISL9014A provides a regulator that has low
quiescent current, fast transient response, and overall stability
across all operating and load current conditions. LDO stability
is guaranteed for a 1µF to 10µF output capacitor that has a
tolerance better than 20% and ESR less than 200m. The
design is performance-optimized for a 1µF capacitor. Unless
limited by the application, use of an output capacitor value
above 4.7µF is not recommended as LDO performance
improvement is minimal.
If both EN1 and EN2 are brought high at the same time, the
VO1 output has priority, and is always powered up first.
During operation, whenever the VIN voltage drops below about
1.8V, the ISL9014A immediately disables both LDO outputs.
When VIN rises back above 2.1V, the device
re-initiates its start-up sequence and LDO operation will
resume automatically.
Reference Generation
The reference generation circuitry includes a trimmed
bandgap, a trimmed voltage reference divider, a trimmed
current reference generator, and an RC noise filter. The filter
includes the external capacitor connected to the CBYP pin. A
0.01µF capacitor connected CBYP implements a 100Hz
lowpass filter, and is recommended for most high performance
applications. For the lowest noise application, a 0.1µF or
greater CBYP capacitor should be used. This filters the
reference noise to below the 10Hz to 1kHz frequency band,
which is crucial in many noise-sensitive applications.
Soft-start circuitry integrated into each LDO limits the initial
ramp-up rate to about 30µs/V to minimize current surge. The
ISL9014A provides short-circuit protection by limiting the
output current to about 475mA.
Each LDO uses an independently trimmed 1V reference. An
internal resistor divider drops the LDO output voltage down to
1V. This is compared to the 1V reference for regulation. The
resistor division ratio is programmed in the factory.
Overheat Detection
The bandgap outputs a proportional-to-temperature current
that is indicative of the temperature of the silicon. This current
is compared with references to determine if the device is in
danger of damage due to overheating. When the die
The bandgap generates a zero temperature coefficient (TC)
voltage for the reference divider. The reference divider
provides the regulation reference and other voltage references
required for current generation and
temperature reaches about +145°C, one or both of the LDO’s
momentarily shut down until the die cools sufficiently. In the
overheat condition, only the LDO sourcing more than 50mA
will be shut off. This does not affect the operation of the other
LDO. If both LDOs source more than 50mA and an overheat
condition occurs, both LDO outputs are disabled. Once the die
temperature falls back below about +110°C, the disabled
LDO(s) are re-enabled and soft-start automatically takes place.
over-temperature detection.
The current generator outputs references required for adaptive
biasing as well as references for LDO output current limit and
thermal shutdown determination.
FN6438 Rev 3.00
December 10, 2015
Page 11 of 13
ISL9014A
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE
REVISION
CHANGE
December 10, 2015
FN6438.3
Added Rev History and About Intersil Verbiage.
Updated Ordering Information on page 2
Updated POD L10.3x3C to most current version. Rev changes are as follows:
Updated Format to new standard.
Removed package outline and included center to center distance between lands on recommended land
pattern.
Removed Note 4 "Dimension b applies to the metallized terminal and is measured between 0.18mm and
0.30mm from the terminal tip." since it is not applicable to this package. Renumbered notes accordingly.
Tiebar Note 4 updated
From: Tiebar shown (if present) is a non-functional feature.
To: Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends).
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
© Copyright Intersil Americas LLC 2007-2015. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6438 Rev 3.00
December 10, 2015
Page 12 of 13
ISL9014A
Package Outline Drawing
L10.3x3C
10 LEAD DUAL FLAT PACKAGE (DFN)
Rev 4, 3/15
5
3.00
A
B
PIN #1 INDEX AREA
10
1
2
5
PIN 1
INDEX AREA
10 x 0.25
6
C B
0.10
(4X)
1.64
10x 0.40
TOP VIEW
BOTTOM VIEW
M C B
(4X)
0.10
SEE DETAIL "X"
(10 x 0.60)
(10x 0.25)
0.10
C
C
BASE PLANE
0.20
SEATING PLANE
0.08 C
SIDE VIEW
(8x 0.50)
1.64
2.80 TYP
4
0.20 REF
0.05
C
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Tiebar shown (if present) is a non-functional feature and may be
located on any of the 4 sides (or ends).
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
5.
6. Compliant to JEDEC MO-229-WEED-3 except for E-PAD
dimensions.
FN6438 Rev 3.00
December 10, 2015
Page 13 of 13
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