ISL91110IR [RENESAS]
High Efficiency Buck-Boost Regulator with 5.4A Switches;
| 型号： | ISL91110IR |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | High Efficiency Buck-Boost Regulator with 5.4A Switches |
| 文件： | 总13页 (文件大小：721K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL91110IR
High Efficiency Buck-Boost Regulator with 5.4A Switches
FN8709
Rev 0.00
April 17, 2015
The ISL91110IR is a high-current buck-boost switching regulator
for systems using new battery chemistries. It uses Intersil’s
proprietary buck-boost algorithm to maintain voltage regulation
while providing excellent efficiency and very low output voltage
ripple when the input voltage is close to the output voltage.
Features
• Accepts input voltages above or below regulated output
voltage
• Automatic and seamless transitions between buck and
boost modes
The ISL91110IR is capable of delivering at least 2A continuous
output current (V
= 3.3V) over a battery voltage range of 2.5V
• Input voltage range: 1.8V to 5.5V
OUT
to 4.35V. This maximizes the energy utilization of advanced
single-cell Li-ion battery chemistries that have significant capacity
left at voltages below the system voltage. Its fully synchronous
low ON-resistance 4-switch architecture and a low quiescent
current of only 35µA optimize efficiency under all load conditions.
• Output current: up to 2A (PVIN = 3.4V, V
• Output current: up to 2A (PVIN = 2.5V, V
= 5V)
OUT
= 3.3V)
OUT
• Burst current: up to 3A (PVIN = 2.9V, V
600µs, t = 4.6ms)
= 3.3V, t <
ON
OUT
• High efficiency: up to 95%
The ISL91110IR supports standalone applications with a fixed
3.3V or 3.5V output voltage or adjustable output voltage with an
external resistor divider. Output voltages as low as 1V or as high
as 5.2V are supported.
• 35µA quiescent current maximizes light load efficiency
• 2.5MHz switching frequency minimizes external component
size
The ISL91110IR requires only a single inductor and very few
external components. Power supply solution size is minimized by
its 2.5MHz switching frequency, allowing small size external
components.
• Fully protected for short-circuit, over-temperature and
undervoltage
• Small 4mmx4mm 20 Ld TQFN package
The ISL91110IR is available in a 4mmx4mm, 20 Ld TQFN
package.
Applications
• Smartphones and tablet PCs
TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS
• Wireless communication devices
• Optical modules networking equipment
PART NUMBER
ISL91110IRNZ-T
ADJ or FIXED V
OUT
3.3
3.3
3.5
3.5
ADJ
ADJ
ISL91110IRNZ-T7A
ISL91110IR2AZ-T
ISL91110IR2AZ-T7A
ISL91110IRAZ-T
Related Literature
UG022, “ISL91110IRx-EVZ Evaluation Boards User Guide”
ISL91110IRAZ-T7A
100
ISL91110IRNZ
VIN
=
V
= 4.2V
IN
1.8V TO 5.5V
95
90
85
80
75
70
PVIN
LX1
LX2
L1
1µH
C1
2x10µF
VOUT = 3.3V
UP TO 3A
VIN
EN
VOUT
C2
2x22µF
V
= 3.6V
IN
MODE
FB
V
= 3.3V
IN
V
= 3V
1000
IN
1
10
100
LOAD CURRENT (mA)
FIGURE 2. EFFICIENCY: V
OUT
= 3.3V, T = +25°C
A
FIGURE 1. TYPICAL APPLICATION: V
OUT
= 3.3V
FN8709 Rev 0.00
April 17, 2015
Page 1 of 13
ISL91110IR
Block Diagram
LX1
LX2
4
5
1
2
6
7
PVIN
8
17
18
Q1
Q4
VOUT
9
19
20
GATE
DRIVERS
AND
ANTI-SHOOT
THRU
EN
11
10
EN
-
+
Q2
EN
Q3
VIN
VREF
PGND
SGND
3
VIN
MONITOR
VOUT
CLAMP
THERMAL
SHUTDOWN
13
14
CURRENT
DETECT
EN
CONTROL
12 MODE
16 NC
ADJ
OUTPUT
OSC
EN
ERROR
AMP
FB
15
-
FIXED
OUTPUT
+
-
+
REF
COMP
VOLTAGE
PROG.
FIGURE 3. BLOCK DIAGRAM
FN8709 Rev 0.00
April 17, 2015
Page 2 of 13
ISL91110IR
Pin Configuration
Pin Descriptions
ISL91110IR
PIN #
PIN NAMES
DESCRIPTION
(20 LD, 4X4 TQFN)
TOP VIEW
6, 7, 8, 9,
PVIN
Power input; Range: 1.8V to 5.5V. Connect
2x10μF capacitors to PGND.
4, 5
3
LX1
PGND
LX2
Inductor connection, input side
Power ground for high switching current
Inductor connection, output side
Buck-boost regulator output; Connect
2x22μF capacitors to PGND for V
and 3.5V applications, and 2x47µF
20 19 18 17 16
1, 2
LX2
LX2
FB
1
2
3
4
5
15
14
13
12
11
17, 18,
19, 20
VOUT
SGND
SGND
MODE
EN
= 3.3V
OUT
EPAD
PGND
LX1
capacitors to PGND for V
applications.
= 4.5V and 5V
OUT
12
MODE
Logic input, HIGH for auto PFM mode. LOW
for forced PWM operation. Also, this pin can
be used with an external clock sync input.
Range: 2.75MHz to 3.25MHz. Do not leave
floating.
LX1
6
7
8
9
10
10
11
VIN
EN
Supply input; Range: 1.8V to 5.5V.
Logic input, drive HIGH to enable device. Do
not leave floating.
13, 14
15
SGND
FB
Analog ground pin
Voltage feedback pin, connect directly to the
VOUT pin for fixed output voltage versions.
16
NC
No connect pin
Epad
Thermal pad, connect to PGND
Ordering Information
PACKAGE
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
OUTPUT VOLTAGE
TEMP RANGE
(°C)
Tape and Reel
(RoHS Compliant)
PKG.
DWG. #
(V)
3.3
3.3
3.5
3.5
ADJ
ADJ
ISL91110IRNZ-T
91110N
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
20 Ld 4x4 TQFN
20 Ld 4x4 TQFN
20 Ld 4x4 TQFN
20 Ld 4x4 TQFN
20 Ld 4x4 TQFN
20 Ld 4x4 TQFN
L20.4X4C
L20.4X4C
L20.4X4C
L20.4X4C
L20.4X4C
L20.4X4C
ISL91110IRNZ-T7A
ISL91110IR2AZ-T
ISL91110IR2AZ-T7A
ISL91110IRAZ-T
ISL91110IRAZ-T7A
ISL91110IRN-EVZ
ISL91110IR2A-EVZ
ISL91110IRA-EVZ
NOTES:
91110N
911102
911102
91110A
91110A
Evaluation Board for ISL91110IRNZ
Evaluation Board for ISL91110IR2AZ
Evaluation Board for ISL91110IRAZ
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for ISL91110IR. For more information on MSL please see techbrief TB363.
FN8709 Rev 0.00
April 17, 2015
Page 3 of 13
ISL91110IR
Absolute Maximum Ratings
Thermal Information
PVIN, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
LX1, LX2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
FB (Adjustable Version) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V
Thermal Resistance (Typical)
20 Ld 4x4 TQFN Package (Notes 4, 5). . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
JA (°C/W)
39
JC (°C/W)
4
FB (Fixed V
Versions) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
OUT
SGND, PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
ESD Rating
Human Body Model (Tested per JESD22-A114E). . . . . . . . . . . . . . . . 3kV
Machine Model (Tested per JESD22-A115-A). . . . . . . . . . . . . . . . . 200V
Charge Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Latch-up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 5.5V
Max Load Current (V = 3.4V, V
= 5V). . . . . . . . . . . . . . . . . . . . . . .2ADC
= 3.3V) . . . . . . . . . . . . . . . . . . . . .2ADC
IN
OUT
OUT
Max Load Current (V = 2.5V, V
IN
Max Load Current (V = 2.9V, V
= 3.3V, t = 600µs, t = 4.6ms) . . . . . 3A
IN OUT
ON
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
JA
Brief TB379
5. For , the “case temp” location is the center of the exposed metal pad on the package underside.
JC
Analog Specifications
V
= V
= V = 3.6V, V = 3.3V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, T = +25°C. Boldface limits apply
EN OUT A
IN
PVIN
across the operating temperature range, -40°C to +85°C and input voltage range (1.8V to 5.5V) unless specified otherwise.
MIN
TYP
MAX
SYMBOL
PARAMETER
TEST CONDITIONS
(Note 6) (Note 7) (Note 6) UNITS
POWER SUPPLY
V
Input Voltage Range
1.8
5.5
V
V
IN
V
V
Undervoltage Lockout Threshold
Rising
Falling
1.725
1.650
35
1.775
UVLO
IN
1.550
V
I
V
V
Supply Current
PFM mode, no external load on V
OUT
(Note 8)
60
µA
µA
VIN
IN
IN
I
Supply Current, Shutdown
EN = SGND, V = 3.6V
IN
0.05
1.0
SD
OUTPUT VOLTAGE REGULATION
V
Output Voltage Range
ISL91110IRAZ, I
= 100mA, V = 3.6V
OUT IN
1.00
-2
5.20
+2
V
%
OUT
Output Voltage Accuracy
V
V
= 3.7V, V
= 3.3V, I
= 3.3V, I
= 0mA, PWM mode
= 1mA, PFM mode
IN
IN
OUT
OUT
OUT
OUT
= 3.7V, V
-3
+4
%
V
FB Pin Voltage Regulation
FB Pin Bias Current
For adjustable output version, V = 3.6V
IN
0.783
0.80
0.813
20
V
FB
I
For adjustable output version
nA
mV/V
FB
V
/
/
Line Regulation, PWM Mode
I
= 500mA, V
OUT
= 3.3V, V step from 2.3V to
IN
±5
OUT
OUT
5.5V
V
IN
V
Load Regulation, PWM Mode
Line Regulation, PFM Mode
Load Regulation, PFM Mode
V
= 3.7V, V
OUT
= 3.3V, I step from 0mA to
OUT
±0.005
±12.5
±0.4
mV/mA
mV/V
OUT
IN
I
1000mA
OUT
V
/
I
= 100mA, V
OUT
= 3.3V, V step from 2.3V to
IN
OUT
OUT
5.5V
V
I
V
OUT
/
V
= 3.7V, V
OUT
= 3.3V, I
step from 0mA to
OUT
mV/mA
IN
I
100mA
OUT
V
Output Voltage Clamp
Rising
5.25
2.1
5.95
2.9
V
CLAMP
Output Voltage Clamp Hysteresis
400
mV
DC/DC SWITCHING SPECIFICATIONS
f
Oscillator Frequency
Minimum On Time
2.50
80
MHz
ns
SW
t
ONMIN
IPFETLEAK LX1 Pin Leakage Current
INFETLEAK LX2 Pin Leakage Current
V
V
= 3.6V
= 3.6V
-1
-1
1
1
µA
µA
IN
IN
FN8709 Rev 0.00
April 17, 2015
Page 4 of 13
ISL91110IR
Analog Specifications
V
= V
= V = 3.6V, V = 3.3V, L1 = 1µH, C1 = 2x10µF, C2 = 2x22µF, T = +25°C. Boldface limits apply
EN OUT A
IN
PVIN
across the operating temperature range, -40°C to +85°C and input voltage range (1.8V to 5.5V) unless specified otherwise. (Continued)
MIN
TYP
MAX
SYMBOL
SOFT-START AND SOFT DISCHARGE
Soft-start Time
PARAMETER
TEST CONDITIONS
(Note 6) (Note 7) (Note 6) UNITS
t
Time from when EN signal asserts to when output
voltage ramp starts.
1
1
ms
ms
SS
Time from when output voltage ramp starts to
when output voltage reaches 95% of its nominal
value with device operating in buck mode.
V
= 4V, V = 3.3V, I = 200mA
IN
OUT O
Time from when output voltage ramp starts to
when output voltage reaches 95% of its nominal
value with device operating in boost mode.
2
ms
V
= 2V, V = 3.3V, I = 200mA
IN
EN < V
IL
OUT O
R
V
Soft-discharge ON-resistance
120
Ω
DISCHG
OUT
POWER MOSFET
R
R
P-channel MOSFET ON-resistance
N-channel MOSFET ON-resistance
P-channel MOSFET Peak Current Limit
V
V
V
V
= 3.6V, I = 200mA
47
62
40
55
5.4
mΩ
mΩ
mΩ
mΩ
A
DSON_P
DSON_N
PK_LMT
IN
IN
IN
IN
O
= 2.5V, I = 200mA
O
= 3.6V, I = 200mA
O
= 2.5V, I = 200mA
O
I
4.9
5.9
PFM/PWM TRANSITION
Load Current Threshold, PFM to PWM
V
V
= 3.6V, V
= 3.6V, V
= 3.3V
= 3.3V
200
75
mA
mA
°C
IN
IN
OUT
Load Current Threshold, PWM to PFM
Thermal Shutdown
OUT
155
30
Thermal Shutdown Hysteresis
°C
LOGIC INPUTS
I
Input Leakage
V
V
V
= 3.6V
= 3.6V
= 3.6V
0.05
1
µA
V
LEAK
IN
IN
IN
V
Input HIGH Voltage
Input LOW Voltage
1.4
IH
V
0.4
V
IL
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
7. Typical values are for T = +25°C and V = 3.6V.
IN
A
8. Quiescent current measurements are taken when the output is not switching.
FN8709 Rev 0.00
April 17, 2015
Page 5 of 13
ISL91110IR
Typical Performance Curves Unless otherwise noted, operating conditions are: T = +25°C, V = EN = 3.6V, L = 1µH,
A
IN
C
= 2x10µF, C = 2x22µF, V
2
= 3.3V, I = 0A to 3A.
OUT
1
OUT
5.140
5.120
5.100
5.080
5.060
5.040
100
98
V
= 3.6V
IN
V
= 4.2V
LOAD = 500mA
96
94
92
90
88
86
84
82
80
IN
V
= 3.3V
IN
LOAD = 100mA
LOAD = 1000mA
V
= 3V
100
IN
1
10
1000
2.5
3.0
3.5
4.0
4.5
5.0
LOAD CURRENT (mA)
V
(V)
IN
FIGURE 5. OUTPUT VOLTAGE vs LOAD CURRENT (V
= 5V)
FIGURE 4. EFFICIENCY vs INPUT VOLTAGE (V
= 5V)
OUT
OUT
3.340
100
95
90
85
80
75
70
V
= 4.2V
IN
V
= 3.3V
IN
V
= 3V
3.320
3.300
3.280
3.260
3.240
IN
V
= 3.6V
IN
V
= 3V
V
= 4.2V
IN
IN
V
= 3.6V
IN
V
= 3.3V
IN
1
10
100
LOAD CURRENT (mA)
FIGURE 7. OUTPUT VOLTAGE vs LOAD CURRENT (V
1000
1
10
100
1000
LOAD CURRENT (mA)
FIGURE 6. EFFICIENCY: V
= 5V, T = +25°C
= 3.3V)
OUT
OUT
A
130
100
120
110
100
90
98
96
94
92
90
88
86
84
82
80
LOAD = 100mA
LOAD = 500mA
V
= 5V
OUT
80
70
LOAD = 1000mA
60
50
V
= 3.3V
OUT
40
30
1.5
2.5
3.5
(V)
4.5
5.5
2.0
2.5
3.0
3.5
(V)
4.0
4.5
5.0
V
IN
V
IN
FIGURE 9. QUIESCENT CURRENT vs INPUT VOLTAGE (MODE = HIGH)
FIGURE 8. EFFICIENCY vs INPUT VOLTAGE (V
OUT
= 3.3V)
FN8709 Rev 0.00
April 17, 2015
Page 6 of 13
ISL91110IR
Typical Performance Curves Unless otherwise noted, operating conditions are: T = +25°C, V = EN = 3.6V, L = 1µH,
A
IN
C
= 2x10µF, C = 2x22µF, V
2
= 3.3V, I
= 0A to 3A. (Continued)
OUT
1
OUT
LX1 (2V/DIV)
LX1 (2V/DIV)
LX2 (2V/DIV)
LX2 (2V/DIV)
V
(AC, 10mV/DIV)
OUT
V
(AC, 20mV/DIV)
OUT
I
(500mA/DIV)
L
I
(200mA/DIV)
L
400ns/DIV
FIGURE 10. STEADY STATE OPERATION IN PFM (V = 4V,
400ns/DIV
FIGURE 11. STEADY STATE OPERATION IN PWM (V = 4V,
IN
IN
V
= 3.3V, NO LOAD)
V
= 3.3V, NO LOAD)
OUT
OUT
EN (2V/DIV)
EN (2V/DIV)
V
I
(1V/DIV)
V
I
(1V/DIV)
OUT
OUT
(500mA/DIV)
(500mA/DIV)
L
L
400µs/DIV
400µs/DIV
FIGURE 13. SOFT-START (V = 3.6V, V
= 3.3V, 1A RLOAD)
FIGURE 12. SOFT-START (V = 3.6V, V
= 3.3V, NO LOAD)
IN OUT
IN OUT
I
(1A/DIV)
L
LX1 (2V/DIV)
LX2 (2V/DIV)
V
(AC, 200mV/DIV)
OUT
I
(1A/DIV)
LOAD
V
(AC, 50mV/DIV)
OUT
400ns/DIV
200µs/DIV
FIGURE 14. STEADY STATE OPERATION (V = 2.5V, V
IN
= 3.3V,
FIGURE 15. 0A TO 2A LOAD TRANSIENT (V = 3.6V, V = 3.3V)
IN OUT
OUT
2A LOAD)
FN8709 Rev 0.00
April 17, 2015
Page 7 of 13
ISL91110IR
Typical Performance Curves Unless otherwise noted, operating conditions are: T = +25°C, V = EN = 3.6V, L = 1µH,
A
IN
C
= 2x10µF, C = 2x22µF, V
= 3.3V, I
= 0A to 3A. (Continued)
OUT
1
2
OUT
V
(AC, 100mV/DIV)
OUT
V
(AC, 200mV/DIV)
OUT
I
(500mA/DIV)
LOAD
I
(500mA/DIV)
LOAD
200µs/DIV
100µs/DIV
FIGURE 16. 0.5A TO 1.5A LOAD TRANSIENT (V = 3.6V, V
= 3.3V)
IN OUT
FIGURE 17. 0A TO 1A LOAD TRANSIENT (V = 3.6V, V
IN OUT
= 3.3V)
V
(1V/DIV)
IN
V
(AC, 500mV/DIV)
OUT
V
(AC, 200mV/DIV)
OUT
I
(1A/DIV)
LOAD
20µs/DIV
FIGURE 18. 4V TO 3.2V LINE TRANSIENT (V
200µs/DIV
= 3.3V, LOAD = 1A)
OUT
FIGURE 19. 0.1A TO 2A LOAD TRANSIENT (V = 3.6V, V
IN OUT
= 5V)
V
(AC, 500mV/DIV)
OUT
I
(1A/DIV)
LOAD
200µs/DIV
FIGURE 20. 0.5A TO 2A LOAD TRANSIENT (V = 3.6V, V
IN OUT
= 5V)
FN8709 Rev 0.00
April 17, 2015
Page 8 of 13
ISL91110IR
mode operating mode is typically 3ms. Increasing the load
current will increase these typical soft-start times.
Functional Description
Functional Overview
Short Circuit Protection
Refer to the “Block Diagram” on page 2. The ISL91110IR
implements a complete buck boost switching regulator, with
PWM controller, internal switches, references, protection circuitry
and control inputs.
The ISL91110IR provides short-circuit protection by monitoring the
feedback voltage. When feedback voltage is sensed to be lower
than a certain threshold, the PWM oscillator frequency is reduced in
order to protect the device from damage. The P-channel MOSFET
peak current limit remains active during this state.
The PWM controller automatically switches between buck and
boost modes as necessary to maintain a steady output voltage
with changing input voltages and dynamic external loads.
Thermal Shutdown
A built-in thermal protection feature protects the ISL91110IR, if the
die temperature reaches +155°C (typical). At this die temperature,
the regulator is completely shut down. The die temperature
continues to be monitored in this thermal shutdown mode. When
the die temperature falls to +125°C (typical), the device will resume
normal operation. When exiting thermal shutdown, the
ISL91110IR will execute its soft-start sequence.
Internal Supply and References
Referring to the “Block Diagram” on page 2, the ISL91110IR
provides four power input pins. The PVIN pin supplies input power
to the DC/DC converter, while the VIN pin provides operating
voltage source required for stable V
generation. Separate
REF
ground pins (SGND and PGND) are provided to avoid problems
caused by ground shift due to the high switching currents.
Buck-Boost Conversion Topology
Enable Input
The device is enabled by asserting the EN pin HIGH. Driving EN
LOW invokes a power-down mode, where most internal device
functions are disabled.
The ISL91110IR operates in either buck or boost mode. When
operating in conditions where PVIN is close to VOUT, ISL91110IR
alternates between buck and boost mode as necessary to
provide a regulated output voltage.
Figure 21 shows a simplified diagram of the internal switches
and external inductor.
Soft Discharge
When the device is disabled by driving EN LOW, an internal resistor
between VOUT and SGND is activated to slowly discharge the
output capacitor. This internal resistor has a typical 120Ω
resistance.
L
1
LX1
LX2
POR Sequence and Soft-start
SWITCH A
SWITCH D
Asserting the EN pin HIGH allows the device to power-up. A
number of events occur during the start-up sequence. The
internal voltage reference powers up and stabilizes. The device
then starts to operate. There is a typical 1ms delay between
assertion of the EN pin and the start of switching regulator
soft-start ramp.
VOUT
PVIN
SWITCH B
SWITCH C
The soft-start feature minimizes output voltage overshoot and
input in-rush currents. During soft-start, the reference voltage is
FIGURE 21. BUCK BOOST TOPOLOGY
PWM Operation
In buck PWM mode, Switch D is continuously closed and
Switch C is continuously open. Switches A and B operate as a
synchronous buck converter when in this mode.
ramped to provide a ramping V
voltage. While the output
OUT
voltage is lower than approximately 20% of the target output
voltage, switching frequency is reduced to a fraction of the
normal switching frequency to aid in producing low duty cycles
necessary to avoid input in-rush current spikes. Once the output
voltage exceeds 20% of the target voltage, switching frequency is
increased to its nominal value.
In boost PWM mode, Switch A remains closed and Switch B
remains open. Switches C and D operate as a synchronous boost
converter when in this mode.
When the target output voltage is higher than the input voltage,
there will be a transition from buck mode to boost mode during
the soft-start sequence. At the time of this transition, the ramp
rate of the reference voltage is decreased, such that the output
voltage slew rate is decreased. This provides a slower output
voltage slew rate.
PFM Operation
During PFM operation in buck mode, Switch D is continuously
closed and Switch C is continuously open. Switches A and B
operate in discontinuous mode during PFM operation. During
PFM operation in boost mode, the ISL91110IR closes Switch A
and Switch C to ramp up the current in the inductor. When the
inductor current reaches a certain threshold, the device turns off
Switches A and C, then turns on Switches B and D. With Switches
B and D closed, output voltage increases as the inductor current
ramps down.
The V
OUT
ramp time is not constant for all operating conditions.
Soft-start into boost mode will take longer than soft-start into
buck mode. The total soft-start time into buck operating mode is
typically 2ms, whereas the typical soft-start time into boost
FN8709 Rev 0.00
April 17, 2015
Page 9 of 13
ISL91110IR
In most operating conditions, there will be multiple PFM pulses
to charge up the output capacitor. These pulses continue until
Output Voltage Programming, Adjustable
Version
When VREF is connected to SGND, setting and controlling the
output voltage of the ISL91110IRAZ (adjustable output version)
can be accomplished by selecting the external resistor values.
V
has achieved the upper threshold of the PFM hysteretic
OUT
controller. Switching then stops and remains stopped until V
OUT
decays to the lower threshold of the hysteretic PFM controller.
Operation With V Close to V
IN
OUT
Equation 1 can be used to derive the R and R resistor values:
1
2
When the output voltage is close to the input voltage, the
ISL91110IR will rapidly and smoothly switch from boost to buck
mode as needed to maintain the regulated output voltage. This
behavior provides excellent efficiency and very low output
voltage ripple.
R
1
------
V
= 0.8V 1 +
(EQ. 1)
OUT
R
2
When designing a PCB, include a SGND guard band around the
feedback resistor network to reduce noise and improve accuracy
and stability. Resistors R and R should be positioned close to
the FB pin.
1
2
Output Voltage Programming
The ISL91110IR is available in fixed and adjustable output
voltage versions. To use the fixed output version, the VOUT pin
must be connected directly to FB.
Feed-Forward Capacitor Selection
A small capacitor (C3 in Figure 22) in parallel with resistor R is
1
required to provide the specified load and line regulation. The
In the adjustable output voltage version (ISL91110IRAZ), an
external resistor divider is required to program the output
voltage. The FB pin has very low input leakage current, so it is
suggested value of this capacitor is 22pF for R = 187kΩ. An
1
NPO type capacitor is recommended.
possible to use large value resistors (e.g., R = 187kΩ and
1
R = 60.4kΩ for V
= 3.3V) in the resistor divider connected to
2
OUT
the FB input.
Applications Information
Component Selection
The fixed-output version of ISL91110IR requires only three
external power components to implement the buck boost
converter: an inductor, an input capacitor and an output
capacitor.
The adjustable output version of ISL91110IR requires three
additional components to program the output voltage, as shown
in Figure 22. Two external resistors program the output voltage
and a small capacitor is added to improve stability and response.
ISL91110IRAZ
V
=
IN
1.8V TO 5.5V
PVIN
LX1
L
C
1
1
1µH
2x10µF
V
= 1V TO 5.2V
LX2
OUT
UP TO 3A
VIN
EN
VOUT
C
2
2x22µF
R
R
C
1
3
MODE
FB
2
FIGURE 22. ADJUSTABLE OUTPUT APPLICATION
FN8709 Rev 0.00
April 17, 2015
Page 10 of 13
ISL91110IR
TABLE 2. INDUCTOR VENDOR INFORMATION
DESCRIPTION
MANUFACTURER
MFR. PART NUMBER
XFL4020-102ME
7847730
DIMENSION (mm)
WEBSITE
Coilcraft
1µH, 20%, DCR = 10.8mΩtypIsat = 5.4A (typ) 4x4x2.1
1µH, 20%, DCR = 14mΩtypIsat = 5.72A (typ) 4x4.5x3.2
www.coilcraft.com
www.we-online.com
Wurth Elektronik
Inductor Selection
Recommended PCB Layout
An inductor with high frequency core material (e.g., ferrite core)
should be used to minimize core losses and provide good
efficiency. The inductor must be able to handle the peak
switching currents without saturating.
Correct PCB layout is critical for proper operation of the
ISL91110IR. The following are some general guidelines for the
recommended layout:
1. The input and output capacitors should be positioned as close
to the IC as possible.
A 1µH inductor with ≥5.4A saturation current rating is
recommended. Select an inductor with low DCR to provide good
efficiency. In applications where radiated noise must be
minimized, a toroidal or shielded inductor can be used.
2. The ground connections of the input and output capacitors
should be kept as short as possible. The objective is to
minimize the current loop between the ground pads of the
input and output capacitors and the PGND pins of the IC. Use
vias, if required, to take advantage of a PCB ground layer
underneath the regulator.
PVIN and V
Capacitor Selection
OUT
The input and output capacitors should be ceramic X5R type with
low ESL and ESR. The recommended input capacitor value is
2x10µF. The recommended input capacitor must meet the
following requirements: Minimum type is X5R, minimum voltage
rating is 16V and minimum case size is 0603. The recommended
3. The analog ground pin (SGND) should be connected to a
large/low-noise ground plane on the top or an intermediate
layer on the PCB, away from the switching current path of
PGND. This ensures a low noise signal ground reference.
output capacitor value is 2x22µF for 3.3V and 3.5V V
OUT
4. Minimize the trace lengths on the feedback loop to avoid
switching noise pick-up. Vias should be avoided on the
feedback loop to minimize the effect of board parasitic,
particularly during load transients.
applications and 2x47µF for 4.5V and 5V V
OUT
applications. The
recommended output capacitor must meet the following
requirements: For 22µF, the minimum type is X5R, minimum
voltage rating is 10V, and minimum case size is 0603. For 47µF,
the minimum type is X5R, minimum voltage rating is 6.3V, and
minimum case size is 0603.
The LX1 and LX2 traces should be short and must be routed on
the same layer as the IC.
TABLE 3. CAPACITOR VENDOR INFORMATION
MANUFACTURER
AVX
SERIES
X5R
WEBSITE
www.avx.com
Murata
Taiyo Yuden
TDK
X5R
www.murata.com
www.t-yuden.com
www.tdk.com
X5R
X5R
FIGURE 23. RECOMMENDED LAYOUT
FN8709 Rev 0.00
April 17, 2015
Page 11 of 13
ISL91110IR
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision.
DATE
REVISION
FN8709.0
CHANGE
April 17, 2015
Initial Release
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
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Reliability reports are also available from our website at www.intersil.com/support
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For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
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otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8709 Rev 0.00
April 17, 2015
Page 12 of 13
ISL91110IR
Package Outline Drawing
L20.4x4C
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 11/06
4X
2.0
4.00
0.50
16X
A
6
B
16
20
PIN #1 INDEX AREA
6
PIN 1
INDEX AREA
1
15
2 .70 ± 0 . 15
11
5
(4X)
0.15
6
10
0.10 M
C
A B
4
20X 0.25 +0.05 / -0.07
20X 0.4 ± 0.10
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
C
0.10
0 . 90 ± 0 . 1
C
BASE PLANE
( 3. 8 TYP )
(
SEATING PLANE
0.08 C
2. 70 )
( 20X 0 . 5 )
SIDE VIEW
( 20X 0 . 25 )
( 20X 0 . 6)
5
C
0 . 2 REF
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
5.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
FN8709 Rev 0.00
April 17, 2015
Page 13 of 13
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