ISL97682 [RENESAS]
Compact 2-3-4-Ch LED Drivers with Phase Shift Control;
| 型号： | ISL97682 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Compact 2-3-4-Ch LED Drivers with Phase Shift Control |
| 文件： | 总18页 (文件大小：841K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL97682, ISL97683, ISL97684
Compact 2-3-4-Ch LED Drivers with Phase Shift Control
FN7689
Rev.2.00
Sep 19, 2017
The ISL97682, ISL97683, ISL97684 are Intersil’s highly
integrated 2-3-4-channel LED drivers that are suitable for
medium size TFT-LCD backlights. These parts can drive
multiple channels of LEDs from inputs as low as 4V to outputs
of up to 45V. They can also operate from inputs as low as 3V to
outputs of up to 26.5V in bootstrap configuration (see Figure
26 for 3V operation).
Features
• ISL97682 - 2 x 100mA Channels
• ISL97683 - 3 x 50mA Channels
• ISL97684 - 4 x 50mA Channels
• Input Voltage 4.0V~26.5V with Max V
of 45V
OUT
• Input Voltage 3.0V(see Figure 26)~24V with Max V
• PWM Dimming Linearity
of 26.5V
OUT
The ISL97682, ISL97683, ISL97684 feature optional channels
phase shift control. This feature is used to minimize the input,
output ripple characteristics and load transient, which help
eliminate or reduce the video and audio noise interference
from the backlight driver operation.
- PWM Dimming with Adjustable Dimming Frequency with
Duty Cycle Linear from 0.4% to 100% <30kHz
- Direct PWM Dimming with Duty Cycle Linear from 0.009%
to 100% at 200Hz
The ISL97682, ISL97683, ISL97684 offer 8-bit PWM dimming
for systems that need frequency tuning flexibility. With the
unique adaptive boost switching architecture, the ISL97682,
ISL97683, ISL97684 also offer Direct PWM dimming with
output, which follows input and achieves linearity as low as
0.009% at 200Hz or 1.35% at 30kHz.
• Current Matching of 0.7% typical from 1%~100% Dimming
• Selectable 600kHz or 1MHz Switching Frequency in PWM/PFM
Mode
• Dynamic Headroom Control
The drivers incorporate dynamic headroom control that monitors
the highest LED forward voltage string and uses its feedback
signal for the minimum output regulation. The ISL97682,
ISL97683, ISL97684 incorporate extensive fault protection
functions including string open and short circuit detections, OVP,
and OTP. The switching frequency can be selected at either
600kHz or 1.0MHz in PFM or PWM mode. These parts are
available in the thin and compact 16 Ld 3mmx3mm TQFN
package and operate in ambient temperature from -40°C to
+85°C.
• Fault Protection
- String Open/Short Circuit Protections, OVP, OTP
• Thin and Compact TQFN-16 3mmx3mm Package
Applications
• Tablet to Notebook PC Displays LED Backlighting
• PMP LED Backlighting
Related Literature
• For a full list of related documents, visit our website
- ISL97682, ISL97683, ISL97684 product page
L1
L1
D1
45V, 4 x 50mA*
Co
VIN = 4~26.5V
Ci
D1
45V, 4 x 50mA*
Co
VIN = 4~26.5V
10µH
Ci
10µH
10µF
4.7µF
10µF
4.7µF
7
VIN
7
VIN
9
LX
OVP
LX
9
0.1µF
1µF
11
VDC
11
0.1µF
1µF
VDC
ISL97684
ISL97684
12
10
OVP
12
10
EN
6
EN
6
5
PWMI
RSET
5
3
8
4
PWMI
RSET
PGND
PGND
3
8
FPWM/DIRECTPWM
FSW
FPWM/DIRECTPWM
CH1 13
CH2 14
CH1 13
CH2
14
4
2
FSW
15
CH3
15
16
CH3
CH4
2
COMP
COMP
CH4 16
10kΩ
33pF
10kΩ
8.2nF
33pF
8.2nF
1
AGND
AGND
1
*VIN> = 9V AND WITH
GOOD LEDS MATCHING
*VIN >=9V AND WITH
GOOD LEDS MATCHING
FIGURE 1A. DIRECT PWM DIMMING
FIGURE 1B. PWM DIMMING WITH DIMMING FREQUENCY
ADJUSTMENT USING R
FPWM
FIGURE 1. ISL97684 TYPICAL APPLICATION DIAGRAMS
FN7689 Rev.2.00
Sep 19, 2017
Page 1 of 18
ISL97682, ISL97683, ISL97684
Block Diagram
OUTPUT = 45V, 4 X 50mA*
VIN = 4~26.5V
10µH/1.5A
OPTIONAL FUSE
4.7µF/50V
LX
VIN
EN
ISL97684
OVP
INTERNAL
BIAS
OVP
REG
O/P SHORT
VDC
FET
DRIVER
OSC &
RAMP
COMP
Σ=0
IMAX
LOGIC
ILIMIT
PGND
PHASE
SELECT
FSW
FSW
DETECT
PE
OPEN CKT, SHORT CKT DETECTS
COMP
GM
AMP
HIGHEST
VF
STRING
DETECT
CH1
CH4
8-BIT
DAC
DYNAMIC
HEADROOM
CONTROL
VSET
+
-
1
+
-
REF
GEN
RSET
AGND
REFOVP
REFVSC
TEMP
SENSOR
PHASE SELECT
*VIN >= 9V AND WITH
GOOD LEDS MATCHING
PHASE SHIFT
& PWM
CONTROLLER
8-BIT
DIGITIZER
PWMI
+
-
4
FPWM/
DIRECTPWM
DIRECTPWM
DETECT
FIGURE 2. ISL97684 BLOCK DIAGRAM
Ordering Information
PART NUMBER
TEMP RANGE
PACKAGE
PKG.
(Notes 1, 2, 3)
PART MARKING
(°C)
(RoHS Compliant)
DWG. #
ISL97682IRTZ
ISL97683IRTZ
7682
-40 to +85
-40 to +85
-40 to +85
16 LD 3x3 TQFN
L16.3x3D
7683
16 LD 3x3 TQFN
16 LD 3x3 TQFN
L16.3x3D
L16.3x3D
ISL97684IRTZ
7684
ISL97682IRTZEVALZ
ISL97683IRTZEVAL
ISL97684IRTZEVALZ
NOTES:
Evaluation Board
Evaluation Board
Evaluation Board
1. Add “-T” suffix for 6k unit or “-TK” suffix for 1k unit tape and reel options. Refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see the product information page for ISL97682, ISL97683, ISL97684. For more information on MSL, see TB363.
FN7689 Rev.2.00
Sep 19, 2017
Page 2 of 18
ISL97682, ISL97683, ISL97684
Pin Configurations
ISL97682
(16 LD TQFN)
TOP VIEW
ISL97683
(16 LD TQFN)
TOP VIEW
16 15 14 13
16 15 14 13
AGND
COMP
RSET
FSW
1
2
3
4
12 OVP
11 VDC
10 PGND
AGND
COMP
RSET
FSW
1
2
3
4
12 OVP
11 VDC
10 PGND
9
LX
9
LX
5
6
7
8
5
6
7
8
ISL97684
(16 LD TQFN)
TOP VIEW
16 15 14 13
AGND
1
2
3
4
12 OVP
11 VDC
COMP
RSET
FSW
10
9
PGND
LX
5
6
7
8
FN7689 Rev.2.00
Sep 19, 2017
Page 3 of 18
ISL97682, ISL97683, ISL97684
Pin Descriptions
PIN ISL97682 ISL97683 ISL97684
DESCRIPTION
1
2
3
4
AGND
COMP
RSET
FSW
AGND
COMP
RSET
FSW
AGND
COMP
RSET
FSW
Analog Ground for precision circuits
External Compensation Pin
Resistor connection for setting LED current, (see Equation 2 for calculating the ILEDpeak)
FSW = 0 ~ 0.11 * VDC, Boost Switching Frequency = 600kHz with phase shift and PFM mode enabled.
FSW = 0.34 * VDC ~ 0.44 * VDC, Boost Switching Frequency = 600kHz with phase shift and PWM mode
enabled.
FSW = 0.53 * VDC ~ 0.63 * VDC, Boost Switching Frequency = 1MHz with phase shift and PWM mode
enabled.
FSW = 0.86 * VDC ~ VDC, Boost Switching Frequency = 1MHz with phase shift and PFM mode enabled.
5
6
7
PWMI
EN
PWMI
EN
PWMI
EN
PWM brightness control pin.
Enable, can be tied directly to VIN if the system lacks of I/O
VIN
VIN
VIN
LED and Driver Supply Voltage. LED supply and Driver supply can be separated if high voltage application
is needed and dual supplies are available
8
FPWM/
FPWM/
FPWM/
External PWM dimming with frequency modulation or Direct PWM dimming without frequency
DirectPWM DirectPWM DirectPWM modulation.
With a resistor connected to ground, the dimming frequency will be set by the Setting Resistor.
When this pin is floating, the part enters Direct PWM mode such that the dimming follows the input PWM
signal without frequency modulation.
9
LX
PGND
VDC
OVP
CH1
NC
LX
PGND
VDC
OVP
CH1
CH2
CH3
NC
LX
PGND
VDC
OVP
CH1
CH2
CH3
CH4
Input to boost switch
10
11
12
13
14
15
16
Power ground (LX, C , and C Power return)
IN OUT
De-couple capacitor for internally generated 5V supply
Overvoltage protection input
Input 1 to current source, CH, and monitoring
Input 2 to current source, CH, and monitoring (ISL97682 is No Connect)
Input 3 to current source, CH, and monitoring
CH2
NC
Input 4 to current source, CH, and monitoring (ISL97682, ISL97683 are No Connect)
FN7689 Rev.2.00
Sep 19, 2017
Page 4 of 18
ISL97682, ISL97683, ISL97684
Absolute Maximum Ratings
Thermal Information
VIN, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V
VDC, PWMI, FPWM/DirectPWM, FSW, RSET, COMP, OVP . . . -0.3V to 5.5V
CH1 to CH4, LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 45V
PGND, AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Above voltage ratings are all with respect to AGND pin
Thermal Resistance (Typical)
16 LD TQFN (Notes 4, 5) . . . . . . . . . . . . . . .
Thermal Characterization (Typical)
JA (°C/W)
51
JC (°C/W)
4.6
PSI (°C/W)
JT
16 Ld TQFN (Note 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.11
Maximum Continuous Junction Temperature . . . . . . . . . . . . . . . . .+125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. is measured in free air with the component mounted on a high-effective thermal conductivity test board with “direct attach” features. See TB379.
JA
5. For , the “case temp” location is the center of the exposed metal pad on the package underside.
JC
6. PSI is the PSI junction-to-top thermal characterization parameter. If the package top temperature can be measured with this rating then the die
JT
junction temperature can be estimated more accurately than the and thermal resistance ratings.
JC JC
5.
Electrical Specifications All specifications below are characterized at T = -40°C to +85°C; V = 12V, EN = 5V, R
= 20k,
A
IN
SET
unless otherwise noted. Boldface limits apply over the operating temperature range, -40°C to +85°C.
MIN
MAX
PARAMETER
GENERAL
DESCRIPTION
CONDITION
(Note 7)
4.0
TYP
5
(Note 7)
26.5
UNIT
V
Backlight Supply Voltage, (Note 8)
VIN Active Current
T
= +25°C
V
mA
µA
V
IN
A
I
EN = 3.3V
EN = 0V, T = 25°C
VIN
IVIN_STBY
VIN Shutdown Current
5
A
V
V
V
Output Voltage
4.0V < V 26.5V
IN
45
2.5
OUT
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
2.2
4.6
1.5
V
UVLO
100
mV
UVLO_HYS
LINEAR REGULATOR
V
V
LDO Output Voltage
V
V
> 6V
4.8
30
5
V
mV
V
DC
IN
VDC LDO Dropout Voltage
= 5V, I
= 20mA
VDC
200
0.5
LDO
IN
EN
EN
Guaranteed Range for EN Input Low Voltage
Guaranteed Range for EN Input High Voltage
EN low time before shut-down
Low
Hi
V
t
29.5
ms
EN(Low)
BOOST SWITCHING REGULATOR
SS
Soft-start
100% LED Duty Cycle
7
ms
A
SW
Boost FET Current Limit
Internal Boost Switch ON-Resistance
Peak Efficiency
1.4
1.8
2.3
ILimit
r
500
90.1
m
%
DS(ON)
Eff_peak
V
= 24V, 48 LEDs, 30mA
IN
each, L = 10µH with DCR
100mT = +25°C
A
V
= 12V, 48 LEDs, 30mA
87
%
IN
each, L = 10µH with
DCR 100mT = +25°C
A
D
D
Boost Maximum Duty Cycle
Boost Minimum Duty Cycle
V
< 2.4V (F
= 600kHz)
= 600kHz)
92
85
%
%
MAX
FSW
FSW
SW
V
> 2.4V
=1.0MHz)
(F
SW
FSW
FSW
V
V
< 2.4V (F
> 2.4V
8
%
%
MIN
SW
15
(F
= 1.0MHz)
SW
FN7689 Rev.2.00
Sep 19, 2017
Page 5 of 18
ISL97682, ISL97683, ISL97684
Electrical Specifications All specifications below are characterized at T = -40°C to +85°C; V = 12V, EN = 5V, R
= 20k,
A
IN
SET
unless otherwise noted. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
MIN
MAX
PARAMETER
DESCRIPTION
Boost Switching Frequency
CONDITION
< 2.4V
(Note 7)
500
TYP
600
1.0
(Note 7)
650
UNIT
kHz
MHz
µA
F
F
F
SW
SW
SW
> 2.4V
0.9
1.1
ILX_leakage
REFERENCE
LX Leakage Current
LX = 45V, EN = 0
10
I
Channel-to-Channel DC Current Matching
R
= 20k(I
SET LED
= 20mA for
-2
-2.5
-2
+2
+2.5
+2
%
%
%
MATCH
ISL97683/4 and 40mA for
ISL97682)
R
= 40k(I
= 10mA for
LED
SET
ISL97683/4 and 20mA for
ISL97682)
I
Current Accuracy
I
I
= 20mA (ISL97683/4)
= 40mA (ISL97682)
ACC
LED
LED
FAULT DETECTION
V
V
V
V
Channel Short Circuit Threshold
Over-Temperature Threshold
3.8
4.4
150
5
4.9
V
°C
°C
V
SC
temp
Over-Temperature Threshold Accuracy
Overvoltage Limit on OVP Pin
OVP Short Detection Fault Level
temp_acc
OVPlo
1.18
1.22
70
1.24
OVP
mV
fault
CURRENT SOURCES
V
Dominant Channel Current Source Headroom
at CHx Pin
I
I
= 20mA
500
(Note 9)
mV
mV
HEADROOM
LED
LED
V
Dominant Channel Current Sink Headroom
Range at CHx Pin
= 20mA, T = +25°C
90
HEADROOM_RANGE
A
V
Voltage at RSET Pin
1.2
1.22
100
50
1.24
V
RSET
I
Maximum LED Current per Channel
ISL97682
ISL97683
ISL97684
mA
mA
mA
LED(max)
50
PWM GENERATOR
V
V
Guaranteed Range for PWM Input Low Voltage
Guaranteed Range for PWM Input High Voltage
PWMI Input Frequency Range
0.8
V
V
IL
1.5
IH
F
100
30,000
Hz
ns
PWMI
DPWM
Direct PWM Dimming Output Maximum
Resolution
85
8
ACC
t
Direct PWM Dimming Minimum On-Time
Direct PWM Mode
250
450
ns
DPWM_ON_MIN
PWM
PWM Dimming with Adjustable Dimming
Frequency Output Resolution
bit
ACC
PWM
PWMI Input Allowable Jitter Hysteresis
Generated PWM Dimming Frequency Range
Voltage at FPWM pin
-0.46
100
+0.46
30,000
1.24
LSB
Hz
V
HYST
F
PWM
V
R
= 3.3k
1.20
1.22
FPWM
FPWM
NOTES:
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
8. At maximum V of 26V, minimum V
IN
is 28V. Minimum V can be lower at lower V .
OUT IN
OUT
9. Varies within range specified by V
.
HEADROOM_RANGE
FN7689 Rev.2.00
Sep 19, 2017
Page 6 of 18
ISL97682, ISL97683, ISL97684
Typical Performance Curves
90
80
70
60
50
40
85
80
75
70
65
60
55
50
4.2V
IN
3.7V
IN
4.2V
IN
30
20
10
0
3.7V
40
IN
3V
IN
3V
IN
0
20
60
80
100
0
20
40
60
80
100
DC (%)
DC (%)
FIGURE 3. ISL97683 TYPICAL EFFICIENCY FOR 3V TO 4.2V IN A
3P7S, ILED = 20mA/CH SINGLE SUPPLY
FIGURE 4. ISL97683 TYPICAL EFFICIENCY FOR 3V TO 4.2V IN A
3P7S, ILED = 20mA/CH CONFIGURATION AT
CONFIGURATION AT F
= 600kHz IN PWM MODE
F
= 600kHz IN PWM MODE WITH V SUPPLY = 5V
SW
SW IN
90
80
70
60
50
95
90
85
80
75
70
5V
600k PWM
0
5
10
15
20
25
30
0
50
DC (%)
100
DC (%)
FIGURE 5. ISL97683 TYPICAL EFFICIENCY FOR 5V IN A 3P7S,
IN
FIGURE 6. ISL97684 EFFICIENCY FOR 4P10S AT 20mA/CH AT
600kHz IN PWM MODE
ILED = 20mA/CH CONFIGURATION AT F
= 600kHz
SW
IN PWM MODE
93
88
83
78
73
68
63
58
87
86
85
1000k PFM V = 15V
IN
84
1000k PWM 50%
1000k PWM V = 15V
IN
1000k PFM 50%
83
0
10
20
30
40
50
60
70
80
90 100
0
10
20
30
DC (%)
FIGURE 7. ISL97864 PWM vs PFM EFFICIENCY vs DC AT
= 15V IN4P8S CONFIGURATION
FIGURE 8. PFM vs PFM MODE FOR 4P8S vs V AT 1MHz
IN
V
IN
FN7689 Rev.2.00
Sep 19, 2017
Page 7 of 18
ISL97682, ISL97683, ISL97684
Typical Performance Curves (Continued)
32
30
28
26
24
22
20
18
16
14
12
10
8
4.5
4.0
3.5
3.0
2.5
2.0
CH3
CH2
CH4
60
1.5
CALCULATED
CH1
1.0
6
MEASURED
4
2
0
0.5
0
0
20
40
80
100
0
0.8
1.6
2.4
3.2
4.0
4.8
DC (%)
DIMMING DUTY CYCLE (%)
FIGURE 9. CURRENT LINEARITY vs LOW LEVEL PWM DIMMING
DUTY CYCLE AT 12V FOR 4P10S AT 20mA/CH
FIGURE 10. CURRENT LINEARITY vs PWM DIMMING DUTY CYCLE
AT 12V FOR 4P10S AT 20mA/CH
IN
IN
5
4
3
2
1
0
1.0
0.8
0.6
0.4
0.2
0
CH3
CH1
CH2
CH4
0
10
20
30
0
5
10
15
(V)
20
25
30
V
(V)
V
IN
IN
FIGURE 11. QUIESCENT CURRENT vs V WITH EN = HIGH, NO
IN
FIGURE 12. CHANNEL VOLTAGE vs V FOR V = 12V AT 4P10S AT
IN IN
LEDS CONNECTED
20mA/CH
V
(5V/DIV)
IN
V
(5V/DIV)
IN
I
(0.5A/DIV)
IN
I
(0.5A/DIV)
IN
ILED (20mA/DIV)
ILED (20mA/DIV)
FIGURE 13. LINE REGULATION WITH V CHANGE FROM 6V TO 26V
IN
FIGURE 14. LINE REGULATION WITH V CHANGE FROM 26V TO 6V
IN
FOR 4P10S AT 20mA/C
FOR 4P10S AT 20mA/CH
FN7689 Rev.2.00
Sep 19, 2017
Page 8 of 18
ISL97682, ISL97683, ISL97684
Typical Performance Curves (Continued)
V
(50mV/DIV)
V
(1V/DIV)
OUT
O
LX = 20V/DIV)
ILED (20mA/DIV)
FIGURE 15. LOAD REGULATION WITH ILED CHANGE FDROM 100%
FIGURE 16. V
RIPPLE VOLTAGE, V = 12V, 4P10S AT 20mA/CH
IN
OUT
TO 0% PWM DIMMING, V = 12V AT 20mA/CH
IN
V
OUT
V
OUT
I
(0.5A/DIV)
IN
I
(0.5A/DIV)
IN
ILED (20mA/DIV)
EN
EN
ILED (20mA/DIV)
FIGURE 17. IN-RUSH AND LED CURRENT AT V = 5V FOR 4P10S
IN
FIGURE 18. IN-RUSH AND LED CURRENT AT V = 12V FOR 4P10S
IN
AT 20mA/CH
AT 20mA/CH
FN7689 Rev.2.00
Sep 19, 2017
Page 9 of 18
ISL97682, ISL97683, ISL97684
Current Matching and Current Accuracy
Each channel of the LED current is regulated by the current
source circuit, as shown in Figure 19.
Theory of Operation
PWM Boost Converter
The current mode PWM boost converter produces the minimal
voltage needed to enable the LED stack with the highest forward
voltage drop to run at the programmed current. The ISL97682,
ISL97683, and ISL97684 employ current mode control boost
architecture that has a fast current sense loop and a slow voltage
feedback loop. Such architecture achieves a fast transient
response that is essential for the notebook backlight application
where the power can be a series of drained batteries or instantly
change to an AC/DC adapter without rendering a noticeable
visual nuisance. The number of LEDs that can be driven by the
ISL97682, ISL97683, ISL97684 depends on the type of LED
chosen in the application. The ISL97682, ISL97683, ISL97684
are capable of boosting up to 45V and typically driving 13 LEDs
in series for each of the 4 channels, enabling a total of 52 pieces
of the 3.2V/20mA type of LEDs.
The LED peak current is set by translating the R
SET
current to the
output with a scaling factor of 401.8/R . The source terminals
SET
of the current source MOSFETs are designed to operate within a
range at about 500mV to optimize power loss versus accuracy
requirements. The sources of errors of the channel-to-channel
current matching come from the op amps offset, internal layout,
reference, and current source resistors. These parameters are
optimized for current matching and absolute current accuracy.
However, the absolute accuracy is additionally determined by the
external R . A 1% tolerance resistor is recommended.
SET
OVP
The Overvoltage Protection (OVP) pin has a function of setting the
overvoltage trip level as well as limiting the V
range.
regulation
OUT
+
-
+
REF
-
The ISL97682, ISL97683, ISL97684 OVP threshold is set by
R
and R shown by Equation 1:
UPPER
LOWER
RSET
V
= 1.22V * (R
UPPER
+ R
)/R
(EQ. 1)
OUT_OVP
LOWER LOWER
PWM DIMMING
V
can only regulate between 42% and 100% of the V
OUT_OVP
OUT
FIGURE 19. SIMPLIFIED CURRENT SOURCE CIRCUIT
such that:
Allowable V
= 42% to 100% of V
OUT_OVP
OUT
Dynamic Headroom Control
For example, if 10 LEDs are used with the worst case being V
OUT
The ISL97682, ISL97683, ISL97684 feature a proprietary
Dynamic Headroom Control circuit that detects the highest
forward voltage string or the lowest voltage from any of the CH
pins digitally. When the lowest CH voltage is lower than the short
of 35V. If R and R are chosen such that the OVP level is set at
1
2
40V, then the V
is allowed to operate between 16.8V and 40V.
OUT
If the requirement is changed to 4 LEDs of 14V V
application,
OUT
then the OVP level must be reduced and users should follow the
= (42% ~100%) OVP level requirement. Otherwise, the
headroom control will be disturbed such that the channel voltage
can be much higher than expected and sometimes can prevent
the driver from operating properly.
circuit threshold (V ), such voltage will be used as the feedback
SC
V
signal for the boost regulator. The boost makes the output to the
correct level such that the lowest CH is at the target headroom
voltage. Since all LED stacks are connected to the same output
voltage, the other CH pins will have a higher voltage, but the
regulated current source circuit on each channel will ensure that
each channel has the same current. The output voltage will
regulate cycle-by-cycle and it is always referenced to the highest
forward voltage string in the architecture.
OUT
The ratio of the OVP capacitor should be the inverse of the OVP
resistor. For example:
if R
/R
= 33/1, then C
/C = 1/33 with
UPPER LOWER
UPPER LOWER
C
= 100pF and C
= 3.3nF.
UPPER
UPPER
Dimming Controls
The ISL97682, ISL97683, ISL97684 allow two ways of controlling
the LED current, and therefore, the brightness. They are:
Enable
An EN signal is required to enable the internal regulator for normal
operation. If there is no signal for longer than 28ms, the device will
enter shutdown.
1. DC current adjustment
2. PWM chopping of the LED current defined in Step 1.
Power Sequence
There is no specific power sequence requirement for the
ISL97682, ISL97683, ISL97684. The EN signal can be tied to V
but not the VDC that will prevent the device from powering up.
There are various ways to achieve DC or PWM current control,
which will be described in the following.
IN
FN7689 Rev.2.00
Sep 19, 2017
Page 10 of 18
ISL97682, ISL97683, ISL97684
Maximum DC Current Setting
The initial brightness should be set by choosing an appropriate
value for R . This should be chosen to fix the maximum
possible LED current as shown in Equation 2 for ISL97682 and
Equation 3 for ISL97683 and ISL97684:
ILED1-20mA
ILED2-20mA
ILED3-20mA
ILED4-20mA
SET
804
--------------
I
I
=
=
LEDmax
LEDmax
(EQ. 2)
R
SET
ILED_Total_20mA
402
--------------
(EQ. 3)
R
SET
5
10
TIME (ms)
DC Current Adjustment
FIGURE 21. PHASE SHIFT 4-Ch LED DRIVER WITH 10% PWM
DIMMING CHANNEL CURRENT (UPPER) AND TOTAL
CURRENT (LOWER)
Once R
is fixed, the LED DC current can be adjusted.
SET
For example, in the 4-channel ISL97684, if the maximum required
LED current (I ) is 20mA, rearranging Equation 3 yields
LED(max)
Equation 4:
R
= 402 0.02 = 20.1k
ILED4-20mA
ILED3-20mA
ILED2-20mA
ILED1-20mA
SET
(EQ. 4)
PWM Control
The ISL97682, ISL97683, ISL97684 have high speed 8-bit
digitizers that decode the incoming PWM signal and convert it into
2- 3- or 4- channels of 8-bit PWM current with a phase shift
function that will be described later. During the PWM On period,
ILED_Total_80mA
the LED peak current is defined by the R
resistor value. The
SET
average LED current of each channel is controlled by I
the PWM duty cycle in percent shown by Equation 5:
and
LEDmax
5
10
TIME (ms)
I
= I
PWM
LEDmax
(EQ. 5)
LEDave
FIGURE 22. CONVENTIONAL LED DRIVER PWM DIMMING CHANNEL
AND TOTAL CURRENT AT 50% DUTY CYCLE
When the PWM input = 0, all channels are disconnected and the
is guaranteed to be <5µA in this state.
I
LED
The PWM dimming frequency is adjusted by a resistor at the
RFPWM pin, described in “PWM Dimming Frequency
Adjustment” on page 12.
ILED4-20mA
ILED3-20mA
ILED2-20mA
ILED1-20mA
ILED1-20mA
ILED2-20mA
ILED3-20mA
ILED4-20mA
ILED_Total_40mA
5
10
ILED_Total_80mA
TIME (ms)
FIGURE 23. EQUAL PHASE SHIFT LED DRIVER PWM DIMMING
CHANNEL AT 50% DUTY CYCLE
5
10
15
TIME (ms)
FIGURE 20. CONVENTIONAL 4-Ch LED DRIVER WITH 10% PWM
DIMMING CHANNEL CURRENT (UPPER) AND TOTAL
CURRENT (LOWER)
FN7689 Rev.2.00
Sep 19, 2017
Page 11 of 18
ISL97682, ISL97683, ISL97684
For example, for a 200Hz input PWM frequency, the minimum
duty cycle is:
Phase Shift Control
The ISL97682, ISL97683, ISL97684 are capable of delaying the
phase of each current source. Conventional LED drivers exhibit
the worst load transients to the boost circuit by turning on all
channels simultaneously as shown in Figures 20 and 21. In
contrast, the ISL97682, ISL97683, ISL97684 phase shifts each
channel by turning them on once during each PWM dimming
period as shown in Figures 23 and 24. At each dimming duty
cycle except at 100%, the sum of the phase shifted total current
will be less than a conventional LED drivers’ total current.
(EQ. 8)
Min DC = 450ns 200Hz = 0.009%
Table 1 shows the PWM Dimming with Phase Shift and Direct
PWM Dimming configurations.
TABLE 1.
RFWM/
DIRECTPWM
PHASE
SHIFT
DIMMING
RESOLUTION
FUNCTION
For ISL97682, the two channels are separated by 180°. For
ISL97683, the three channels are separated by 90° and not
120°. For ISL97684, the four channels are separated by 90°. If
the channels are combined for higher current application, the
phase shift function must be disabled by running the part in
direct PWM mode by floating the RFPWM/DirectPWM and
selecting switching frequency by biasing the FSW pin as
explained in Table 2.
Connects with
Resistor
PWM Dimming with
frequency adjust
Yes
8-bit
Floating
DirectPWM without
frequency adjust
No
N/A
Switching Frequency and PWM/PFM Mode
When the FSW pin is biased from VDC with a resistor divider
R
and R
, the switching frequency and PFM/PWM
UPPER
LOWER
t
PWMIN
mode will change according to the following FSW levels shown in
Table 2 with the recommended R
UPPER
and R
LOWER
.
60%
PWMI
ILED1
t
(t )
FPWM PWMOUT
TABLE 2.
t
OFF
t
ON
60%
PHASE
40%
FSW
F
SHIFT Mode
R
R
SW
UPPER
LOWER
ILED2
ILED3
ILED4
(0 ~ 0.11)*VDC
(0.34~0.44)*VDC
(0.53~0.63)*VDC
(0.86~1) VDC
600kHz
600kHz
1.0MHz
1.0MHz
Yes
Yes
Yes
Yes
PFM
Open
0
PWM 187k
PWM 100k
120k
138k
Open
PFM
0
The ISL97682, ISL97683, ISL97684 goes into PFM mode at
= 600kHz/1MHz when the FSW pin is biased at 0/VDC volts.
ILED1
F
SW
FIGURE 24. ISL97684 4 CHANNELS PHASE SHIFT ILLUSTRATION
The part will only go into PFM mode depending on the LED output
voltage and loading conditions and can be more efficient than
running the part in PWM mode as shown in Figures 5 and 6. The
dimming frequency can be set or applied up to 30kHz with duty
cycle from 0.4% to 100%. The lower limit of 0.4% is the result of
an 8-bit digitizer resolution.
PWM Dimming Frequency Adjustment
The dimming frequency is set by an external resistor at the
RFPWM/DirectPWM pin to GND calculated by Equation 6:
7
12.4 10
RFPWM
(EQ. 6)
--------------------------------
=
F
PWM
Soft-Start
The in-rush current will flow towards C
and it is determined by the ramp rate of V and the values of
when V is applied
IN
IN
where FPWM is the desirable PWM dimming frequency and
is the setting resistor. Do not bias RFPWM/DirectPWM if
direct PWM dimming is used; see Table 1 for clarification.
OUT
R
FPWM
C
and L.
OUT
Once the part is enabled, the boost regulator will begin to switch
and the current in the inductor will ramp-up. The current in the
boost power switch is monitored and the switching is terminated
in any cycle where the current exceeds the current limit. The
ISL97682, ISL97683, ISL97684 include a soft-start feature
where this current limit starts at a low value (225mA). This is
stepped up to the final 1.8A current limit in 7 further steps of
225mA. These steps will happen over approximately 8ms and
will be extended at a low LED PWM frequency if the LED duty
cycle is low. This allows the output capacitor to be charged to the
required value at a low current limit and prevents high input
current for systems that have only a low to medium output
current requirement.
The PWM dimming frequency can be set or applied up to 30kHz
with duty cycle from 0.4% to 100%. The lower limit of 0.4% is the
result of 8-bit digitizer resolution.
Direct PWM Dimming
The ISL97682, ISL97683, ISL97684 can also operate in direct
PWM dimming mode such that the output follows the input PWM
signal without phase shifting. The FSW pin can still be used to
select between 600kHz and 1MHz in PWM or PFM mode as
explained in “Pin Descriptions” on page 4. To use Direct PWM
mode, users should float the RFPWM/DirectPWM pin. The input
PWM frequency should be limited to 30kHz and the minimum
duty cycle be calculated by Equation 7:
(EQ. 7)
Min Duty Cycle = 450ns Input PWM Frequency
FN7689 Rev.2.00
Sep 19, 2017
Page 12 of 18
ISL97682, ISL97683, ISL97684
Some users employ some special types of LEDs that have zener
diode structure in parallel with the LED for ESD enhancement, thus
enabling open circuit operation. When this type of LED goes open
circuit, the effect is as if the LED forward voltage has increased,
but no light is emitted. Any affected string will not be disabled,
unless the failure results in the boost OVP limit being reached,
allowing all other LEDs in the string to remain functional. Care
should be taken in this case that the boost OVP limit and SCP limit
are set properly, in order to assure that multiple failures on one
string do not cause all other good channels to be faulted out. This
is due to the increased forward voltage of the faulty channel
making all other channels look as if they have LED shorts. See
Table 3 for details for responses to fault conditions.
Fault Protection and Monitoring
The ISL97682, ISL97683, ISL97684 feature extensive protection
functions to cover all the perceivable failure conditions. The
failure mode of a LED can be either open circuit or as a short. The
behavior of an open circuited LED can also take the form of
either infinite resistance (or for some LEDs, a zener diode), which
is integrated into the device in parallel with the now opened LED.
For basic LEDs (which do not have built-in zener diodes), an open
circuit failure of an LED will only result in the loss of one channel
of LEDs without affecting other channels. Similarly, a short circuit
condition on a channel that results in that channel being turned
off does not affect other channels unless a similar fault is
occurring.
Overvoltage Protection (OVP)
The integrated OVP circuit monitors the output voltage and keeps
the voltage at a safe level. The OVP threshold is set as Equation 9:
Due to the lag in boost response to any load change at its output,
certain transient events (such as LED current steps or significant
step changes in LED duty cycle) can transiently look like LED
fault modes. The ISL97682, ISL97683, ISL97684 use feedback
from the LEDs to determine when it is in a stable operating
region and prevents apparent faults during these transient
events from allowing any of the LED stacks to fault out. See
Table 3 for more details.
OVP = 1.22V R
+ R
R
LOWER LOWER
(EQ. 9)
UPPER
These resistors should be large to minimize the power loss. For
example, a 1Mk R and 30k R sets OVP to 41.2V.
UPPER
Large OVP resistors also allow C
LOWER
discharges slowly during the
OUT
PWM Off time. Parallel capacitors should also be placed across
the OVP resistors such that R /R = C /C
Short Circuit Protection (SCP)
.
UPPER LOWER LOWER UPPER
The short circuit detection circuit monitors the voltage on each
channel and disables faulty channels which are detected above
the programmed short circuit threshold. When an LED becomes
shorted, the action taken is described in Table 3. The short circuit
threshold is 4.4V.
Using a C
value of at least 30pF is recommended. These
UPPER
capacitors reduce the AC impedance of the OVP node, which is
important when using high value resistors.
Undervoltage Lockout
If the input voltage falls below the UVLO level of 2.5V, the device
will stop switching and be reset. Operation will restart only if the
device is re-powered and re-enabled once the input voltage is
back in the normal operating range.
Open Circuit Protection (OCP)
When one of the LEDs becomes open circuit, it can behave as
either an infinite resistance or a gradually increasing finite
resistance. The ISL97682, ISL97683, ISL97684 monitors the
current in each channel such that any string which reaches the
intended output current, is considered “good”. Should the current
subsequently fall below the target, the channel will be
considered an “open circuit”. Furthermore, should the boost
output of the ISL97682, ISL97683, ISL97684 reach the OVP
limit, all channels which are not “good” will immediately be
considered as “open circuit”. Detection of an “open circuit”
channel will result in a time-out before disabling of the affected
channel.
Over-Temperature Protection (OTP)
The ISL97682, ISL97683, ISL97684 over-temperature protection
threshold is set to +150°C. Each time this is reached, the boost
will stop switching and the output current sources will be
switched off.
For the extensive fault protection conditions, please refer to
Figure 25 and Table 3 for details.
FN7689 Rev.2.00
Sep 19, 2017
Page 13 of 18
ISL97682, ISL97683, ISL97684
VIN
LX
VOUT
O/P
SHORT
OVP
IMAX
FET
DRIVER
LOGIC
I
LIMIT
VSC
VIN
CH4
VSET/2
REG
REF
THRM
SHDN
T2
TEMP
SENSOR
T1
OTP
VSET
Q1
Q4
+
-
+
VSET
-
PWM1/OC1/SC1
PWM4/OC4/SC4
PHASE SHIFT
AND LOGIC
CONTROL
FIGURE 25. SIMPLIFIED FAULT PROTECTIONS
TABLE 3. PROTECTIONS TABLE
V
REGULATED
BY
OUT
CASE
1
FAILURE MODE
DETECTION MODE
FAILED CHANNEL ACTION
CH1 ON and burns power
GOOD CHANNELS ACTION
CH2 through CH4 Normal
CH1 Short Circuit
Over-Temperature
Protection limit (OTP) not
triggered and CH1 < 4.4V
Highest VF of CH2
through CH4
2
3
4
CH1 Short Circuit
CH1 Short Circuit
OTP triggered but VCH1 < All channels switched off until power-cycled.
4.4V
Highest VF of CH2
through CH4
OTP not triggered but
CH1 > 4.4V
CH1 faults out after 6 PWM cycle
(7-18 in direct PWM) time-out
CH2 through CH4 Normal
Highest VF of CH2
through CH4
CH1 Open Circuit
with infinite
OTP not triggered and
CH1 < 4.4V
V
will ramp to OVP. CH1 will
CH2 through CH4 Normal
Highest VF of CH2
through CH4
OUT
time-out after 6 PWM cycles (7-18
resistance
in direct PWM) and switch off. V
will drop to normal level.
OUT
5
6
7
CH1 LED Open
Circuit but has
paralleled Zener
OTP not triggered and
CH1 < 4.4V
CH1 remains ON and has highest
VF, thus V increases
CH2 through CH4 ON, Q2 through VF of CH1
Q4 burn power
OUT
CH1 LED Open
Circuit but has
paralleled Zener
OTP triggered but CH1 < CH1 goes off
4.4V
Same as CH1
VF of CH1
VF of CH1
CH1 LED Open
Circuit but has
paralleled Zener
OTP not triggered but
CHx > 4.4V
CH1 remains ON and has highest
VF, thus V increases.
V
increases then CH-X
OUT
switches OFF after 6 PWM cycles.
This is an unwanted shut off and
can be prevented by setting OVP
at an appropriate level.
OUT
8
9
Channel-to-Channel OTP triggered but CHx < All channels switched off until chip cooled
Highest VF of CH1
through CH4
VF too high
4.4V
Output LED stack
voltage too high
V
> V
OVP
Driven with normal current. Any channel that has insufficient headroom Highest VF of CH1
will fault out after 6 PWM cycle (7-18 in direct PWM) time-out.
OUT
through CH4
FN7689 Rev.2.00
Sep 19, 2017
Page 14 of 18
ISL97682, ISL97683, ISL97684
The peak current can be derived from the voltage across the
inductor during the Off-period, expressed in Equation 14:
Components Selections
According to the inductor Voltage-Second Balance principle, the
change of inductor current during the switching regulator
On-time is equal to the change of inductor current during the
switching regulator Off-time. Since the voltage across an inductor
is as shown in Equation 10:
IL
= V I 85% V + 1 2V V – V L V f
SW
peak
O
O
I
I
O
I
O
(EQ. 14)
The choice of 85% is just an average term for the efficiency
approximation. The first term is the average current, which is
inversely proportional to the input voltage. The second term is
the inductor current change, which is inversely proportional to L
(EQ. 10)
V
= L I t
L
L
and F
as a result, for a given switching.
SW
and I @ On = I @ Off, therefore:
L
L
(EQ. 11)
V – 0 L D t = V – V – V L 1 – D t
S
I
S
O
D
I
Applications
Low Voltage Operations
where D is the switching duty cycle defined by the turn-on time
over the switching periods. V is a Schottky diode forward
D
The ISL97682, ISL97683, ISL97684 VIN pin can be separately
biased from the LEDs power input to allow low voltage operation.
For systems that have only single supply, VOUT can be tied to the
driver VIN pin to allow initial start-up; see Figure 26. The circuit
works as follows; when the input voltage is available and the
voltage that can be neglected for approximation.
Rearranging the terms without accounting for V gives the boost
D
ratio and duty cycle as Equations 12 and 13:
(EQ. 12)
(EQ. 13)
V
V = 1 1 – D
I
O
device is not enabled, the V
follows V with a Schottky diode
OUT
IN
voltage drop. The V
OUT
bootstrapped to VIN pin allows an initial
D = V – V V
O
O
I
start-up once the part is enabled. Once the driver starts up with
regulating to the target, the VIN pin voltage also increases.
V
OUT
As long as the V
Input Capacitor
does not exceed 26.5V and the extra power
OUT
Switching regulators require input capacitors to deliver peak
charging current and to reduce the impedance of the input
supply. This reduces interaction between the regulator and input
supply, thereby improving system stability. The high switching
frequency of the loop causes almost all ripple current to flow in
the input capacitor, which must be rated accordingly.
loss on VIN is acceptable, this configuration can be used for input
voltage as low as 3.0V. For systems where a single input supply
of 4V to 5.5V is available, the VIN pin can be shorted to VDC,
allowing a slight gain in efficiency due to bypassing the internal
LDO.
For systems that have dual supplies, the VIN pin can be biased
from 5V to 12V. The input voltage can be as low as 2.7V without
the limitations previously mentioned; see Figure 27.
A capacitor with low internal series resistance should be chosen
to minimize heating effects and improve system efficiency, such
as X5R or X7R ceramic capacitors, which offer small size and a
lower value of temperature and voltage coefficient compared to
other ceramic capacitors.
V
< 26.5V
V
= 3V ~ 24V
OUT
IN
ISL97684
It is recommended that an input capacitor of at least 10µF be
used. Ensure the voltage rating of the input capacitor is suitable
to handle the full supply range.
LX
VIN
VDC
OVP
PGND
EN
CH1
CH2
CH3
CH4
Inductor
20mA
PWMI
FSW
The selection of the inductor should be based on its maximum
RSET
and saturation current (I ) characteristics, power dissipation
SAT
AGND
(DCR), EMI susceptibility (shielded vs unshielded), and size.
Inductor type and value influence many key parameters,
including ripple current, current limit, efficiency, transient
performance and stability.
COMP
FIGURE 26. SINGLE SUPPLY 3V OPERATION
The inductor’s maximum current capability must be adequate
enough to handle the peak current at the worst case condition.
Additionally if an inductor core is chosen with too low a current
rating, saturation in the core will cause the effective inductor
value to fall, leading to an increase in peak to average current
level, poor efficiency and overheating in the core. The series
resistance, DCR, within the inductor causes conduction loss and
heat dissipation. A shielded inductor is usually more suitable for
EMI susceptible applications, such as LED backlighting.
FN7689 Rev.2.00
Sep 19, 2017
Page 15 of 18
ISL97682, ISL97683, ISL97684
V
< 26.5V
2.7 TO 24 V
IN
OUT
ISL97684
5V TO 12V BIAS
LX
VIN
VDC
OVP
PGND
EN
CH1
20mA
PWMI
CH2
FSW
RSET
CH3
CH4
AGND
COMP
FIGURE 27. DUAL SUPPLIES 2.7V OPERATION
FN7689 Rev.2.00
Sep 19, 2017
Page 16 of 18
ISL97682, ISL97683, ISL97684
Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not
warranted. Please visit our website to make sure you have the latest revision.
DATE
REVISION
FN7689.2
CHANGE
September 19, 2017
Applied new header/footer.
Added Related Literature
Updated Ordering Information table.
Added VHEADROOM_RANGE spec to EC table.
Added Note 9.
In “Current Matching and Current Accuracy” on page 10 updated 2nd sentence in paragraph 2 for clarification.
Replaced Products section with About Intersil.
February 3, 2012
FN7689.1
FN7689.0
On page 1, RC values on COMP pin in Figure 1A and 1B were both updated with values of 10kΩ, 8.2nF, and 33pF.
On page 4, the pin description for Pin#4 was updated with new numbers to set boost switching frequency and
PFM mode.
In Table 2 on page 12, the FSW pin setting was updated with new numbers to set boost switching frequency and
PFM mode.
March 11, 2011
Initial Release.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing, and high-end consumer markets.
For the most updated datasheet, application notes, related documentation, and related parts, see the respective product information
page found at www.intersil.com.
For a listing of definitions and abbreviations of common terms used in our documents, visit www.intersil.com/glossary.
You can report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
© Copyright Intersil Americas LLC 2011-2017. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7689 Rev.2.00
Sep 19, 2017
Page 17 of 18
ISL97682, ISL97683, ISL97684
For the most recent package outline drawing, see L16.3x3D.
Package Outline Drawing
L16.3x3D
16 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 3/10
4X 1.50
3.00
6
A
12X 0.50
PIN #1
INDEX AREA
B
13
16
6
PIN 1
INDEX AREA
12
1
1.60 SQ
4
9
(4X)
0.15
0.10 M C A B
16X 0.23±0.05
8
5
16X 0.40±0.10
BOTTOM VIEW
TOP VIEW
4
SEE DETAIL “X”
0.10 C
C
0.75 ±0.05
0.08 C
SIDE VIEW
(12X 0.50)
(2.80 TYP) ( 1.60)
(16X 0.23)
5
0 . 2 REF
C
(16X 0.60)
0 . 02 NOM.
0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.25mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
5.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
JEDEC reference drawing: MO-220 WEED.
7.
FN7689 Rev.2.00
Sep 19, 2017
Page 18 of 18
相关型号：
ISL97682IRTZ-T7
LED DISPLAY DRIVER, PQCC16, 3 X 3 MM, ROHS COMPLIANT, PLASTIC, MO-220WEED, TQFN-16
RENESAS
ISL97683IRTZ-T
Compact 3-Ch LED Drivers with Phase Shift Control; TQFN16; Temp Range: -40° to 85°C
RENESAS
ISL97683IRTZ-T13
LED DISPLAY DRIVER, PQCC16, 3 X 3 MM, ROHS COMPLIANT, PLASTIC, MO-220WEED, TQFN-16
RENESAS
©2020 ICPDF网 联系我们和版权申明