NP32N055IHE-E2 [RENESAS]
TRANSISTOR,MOSFET,N-CHANNEL,55V V(BR)DSS,32A I(D),TO-252;型号: | NP32N055IHE-E2 |
厂家: | RENESAS TECHNOLOGY CORP |
描述: | TRANSISTOR,MOSFET,N-CHANNEL,55V V(BR)DSS,32A I(D),TO-252 |
文件: | 总7页 (文件大小:176K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP32N055HHE, NP32N055IHE, NP32N055SHE
SWITCHING
N-CHANNEL POWER MOSFET
DESCRIPTION
ORDERING INFORMATION
These products are N-Channel MOS Field Effect
PART NUMBER
PACKAGE
Transistors designed for high current switching applications.
NP32N055HHE
TO-251 (JEITA) / MP-3
TO-252 (JEITA) / MP-3Z
TO-252 (JEDEC) / MP-3ZK
Note
NP32N055IHE
NP32N055SHE
FEATURES
• Channel temperature 175 degree rated
• Super low on-state resistance
RDS(on) = 25 mΩ MAX. (VGS = 10 V, ID = 16 A)
• Low Ciss : Ciss = 1100 pF TYP.
• Built-in gate protection diode
Note Not for new design.
(TO-251)
(TO-252)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage
VDSS
VGSS
ID(DC)
ID(pulse)
PT
55
V
V
A
Gate to Source Voltage
±20
±32
Drain Current (DC)
Drain Current (Pulse) Note1
Total Power Dissipation (TA = 25°C)
Total Power Dissipation (TC = 25°C)
Single Avalanche Current Note2
Single Avalanche Energy Note2
Channel Temperature
±100
1.2
A
W
W
A
PT
66
IAS
26 / 21 / 7
EAS
6.7 / 44 / 49 mJ
175 °C
–55 to + 175 °C
Tch
Storage Temperature
Tstg
Notes 1. PW ≤ 10 µ s, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, RG = 25 Ω, VGS = 20 → 0 V (See Figure 4.)
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
Rth(ch-C)
Rth(ch-A)
2.27
125
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No.
D14155EJ4V0DS00 (4th edition)
The mark
shows major revised points.
Date Published July 2005 NS CP(K)
Printed in Japan
1999, 2005
NP32N055HHE, NP32N055IHE, NP32N055SHE
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
10
UNIT
µA
µA
V
VDS = 55 V, VGS = 0 V
IDSS
VGS = ±20 V, VDS = 0 V
VDS = VGS, ID = 250 µA
VDS = 10 V, ID = 16 A
VGS = 10 V, ID = 16 A
VDS = 25 V
±10
4.0
IGSS
VGS(th)
| yfs |
RDS(on)
Ciss
2.0
6
3.0
12
19
1100
180
95
16
11
29
10
21
6
Gate to Source Threshold Voltage
Note
Forward Transfer Admittance
S
25
1600
270
170
35
mΩ
pF
pF
pF
ns
Drain to Source On-state Resistance
Input Capacitance
VGS = 0 V
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Coss
Crss
f = 1 MHz
VDD = 28 V, ID = 16 A
VGS = 10 V
td(on)
tr
27
ns
RG = 1 Ω
58
Turn-off Delay Time
Fall Time
td(off)
tf
ns
24
ns
VDD = 44 V
32
Total Gate Charge
QG
nC
nC
nC
V
VGS = 10 V
Gate to Source Charge
Gate to Drain Charge
QGS
QGD
VF(S-D)
trr
ID = 32 A
8
Note
IF = 32 A, VGS = 0 V
IF = 32 A, VGS = 0 V
di/dt = 100 A/µs
1.0
40
57
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Note Pulsed
ns
Qrr
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
D.U.T.
V
GS
0
RG
= 25 Ω
50 Ω
R
L
90%
V
GS
Wave Form
V
GS
10%
90%
R
G
PG.
V
DD
PG.
GS = 20 → 0 V
V
DD
V
VDS
90%
V
DS
V
0
GS
BVDSS
10% 10%
V
DS
Wave Form
0
I
AS
V
DS
I
D
τ
t
d(on)
t
r
t
d(off)
t
f
V
DD
t
on
t
off
τ = 1
µs
Duty Cycle ≤ 1%
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
= 2 mA
IG
RL
50 Ω
PG.
VDD
2
Data Sheet D14155EJ4V0DS
NP32N055HHE, NP32N055IHE, NP32N055SHE
TYPICAL CHARACTERISTICS (TA = 25°C)
Figure2. TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
Figure1. DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
70
60
50
40
30
20
10
0
100
80
60
40
20
0
0
25 50 75 100 125 150 175 200
0
25 50 75 100 125 150 175 200
- Case Temperature - ˚C
TC - Case Temperature - ˚C
TC
Figure4. SINGLE AVALANCHE ENERGY
DERATING FACTOR
Figure3. FORWARD BIAS SAFE OPERATING AREA
1000
60
50
40
30
20
49 mJ
ID(pulse)
44 mJ
100
1 ms
I
D(DC)
I
AS = 7 A
PowerDDiCssipation
Limited
21 A
26 A
10
1
10
0
6.7 mJ
T
C
= 25˚C
Single Pulse
0.1
0.1
1
10
100
25
50
75
100
125
150
175
V
DS
-
Drain to Source Voltage - V
Starting Tch - Starting Channel Temperature - ˚C
Figure5. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
R
th(ch-A) = 125 ˚C/W
100
10
R
th(ch-C) = 2.27 ˚C/W
1
0.1
0.01
Single Pulse
T
C
= 25˚C
µ
10
1 m
10 m
100 m
1
10
100
1000
100
µ
PW - Pulse Width - s
3
Data Sheet D14155EJ4V0DS
NP32N055HHE, NP32N055IHE, NP32N055SHE
Figure7. DRAIN CURRENT vs.
Figure6. FORWARD TRANSFER CHARACTERISTICS
DRAIN TO SOURCE VOLTAGE
120
100
80
100
Pulsed
Pulsed
V
GS =10 V
10
T
A
= −55˚C
25˚C
75˚C
150˚C
175˚C
60
1
0.1
40
20
0
V
DS = 10 V
0.01
1
2
3
4
5
6
7
8
0
1.0
2.0
3.0
4.0
5.0 6.0
VGS - Gate to Source Voltage - V
V
DS - Drain to Source Voltage - V
Figure9. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
Figure8. FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
100
40
Pulsed
30
10
TA
= 175˚C
75˚C
I = 16 A
D
20
10
0
1
0.1
25˚C
−55˚C
0.01
0.01
0
0.1
1
10
100
2
4
6
8
10 12 14 16 18 20
VGS - Gate to Source Voltage - V
ID - Drain Current - A
Figure10. DRAIN TO SOURCE ON-STATE
Figure11. GATE TO SOURCE THRESHOLD VOLTAGE vs.
CHANNEL TEMPERATURE
RESISTANCE vs. DRAIN CURRENT
80
70
60
50
40
30
20
10
0
Pulsed
V
GµS
ID
D=S =25V0
A
4.0
3.0
2.0
V
GS = 10 V
1.0
0
0
1
10
100
−50
0
50
100
150
ID - Drain Current - A
Tch - Channel Temperature - ˚C
4
Data Sheet D14155EJ4V0DS
NP32N055HHE, NP32N055IHE, NP32N055SHE
Figure13. SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
1000
100
Pulsed
40
VGS = 10 V
30
20
VGS = 10 V
10
VGS = 0 V
1
10
0
I
D
= 16 A
150
ch - Channel Temperature - ˚C
0.1
100
0
50
−50
0
0.5
1.0
1.5
T
VSD
- Source to Drain Voltage - V
Figure14. CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
Figure15. SWITCHING CHARACTERISTICS
1000
100
10000
V
GS = 0 V
f = 1 MHz
tf
C
iss
1000
td(off)
Coss
td(on)
tr
10
1
100
10
Crss
0.1
1
10
100
0.1
1
10
100
ID
- Drain Current - A
VDS - Drain to Source Voltage - V
Figure16. REVERSE RECOVERY TIME vs.
DRAIN CURRENT
Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS
80
16
14
12
10
8
1000
100
di/dt = 100 A/µs
GS = 0 V
V
60
V
DD = 44 V
28 V
11 V
V
GS
40
20
6
10
1
4
VDS
2
ID
= 32 A
28 32
0
0
4
8
12 16 20 24
- Gate Charge - nC
0.1
1.0
10
100
Q
G
IF
- Drain Current - A
5
Data Sheet D14155EJ4V0DS
NP32N055HHE, NP32N055IHE, NP32N055SHE
PACKAGE DRAWINGS (Unit: mm)
1) TO-251 (JEITA) / MP-3
2) TO-252 (JEITA) / MP-3Z
2.3 0.2
6.5 0.2
2.3 0.2
6.5 0.2
5.0 0.2
4
0.5 0.1
5.0 0.2
0.5 0.1
4
1
2
3
DESIGN
1
2
3
1.1 0.2
NEW
1.1 0.2
0.9 MAX.
0.8 MAX.
+0.2
−0.1
+0.2
0.5
0.5
−0.1
2.3 TYP.
2.3 TYP.
0.8 TYP.
2.3 TYP.
2.3 TYP.
FOR
1. Gate
2. Drain
3. Source
1. Gate
2. Drain
3. Source
4. Fin (Drain)
NOT
4. Fin (Drain)
3) TO-252 (JEDEC) / MP-3ZK
2.3 0.1
6.5 0.2
5.1 TYP.
4.3 MIN.
0.5 0.1
No Plating
EQUIVALENT CIRCUIT
4
Drain
1
2
3
Body
Diode
Gate
No Plating
0.76 0.12
1.14 MAX.
0 to 0.25
0.5 0.1
2.3 2.3
Gate
Protection
Diode
1.0
Source
1. Gate
2. Drain
3. Source
4. Fin (Drain)
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
6
Data Sheet D14155EJ4V0DS
NP32N055HHE, NP32N055IHE, NP32N055SHE
•
The information in this document is current as of July, 2005. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
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•
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M8E 02. 11-1
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