NP89N04PUK-E2-AY [RENESAS]
MOS FIELD EFFECT TRANSISTOR; MOS场效应
| 型号： | NP89N04PUK-E2-AY |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | MOS FIELD EFFECT TRANSISTOR |
| 文件： | 总8页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Data Sheet
NP89N04PUK
MOS FIELD EFFECT TRANSISTOR
Description
R07DS0562EJ0100
Rev.1.00
Nov 07, 2011
The NP89N04PUK is N-channel MOS Field Effect Transistor designed for high current switching applications.
Features
Super low on-state resistance
DS(on) = 2.95 m MAX. (VGS = 10 V, ID = 45 A)
R
Low Ciss: Ciss = 3900 pF TYP. (VDS = 25 V)
Designed for automotive application and AEC-Q101 qualified
Ordering Information
Part No.
Lead Plating
Pure Sn (Tin)
Packing
Taping (E1 type)
Taping (E2 type)
Package
NP89N04PUK-E1-AY *1
NP89N04PUK-E2-AY *1
Tape 800 p/reel
TO-263 (MP-25ZP)
Note: *1 Pb-free (This product does not contain Pb in the external electrode)
Absolute Maximum Ratings (TA = 25°C)
Item
Symbol
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
Ratings
40
Unit
V
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) *1
20
V
90
A
360
147
A
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)
Channel Temperature
W
W
°C
°C
A
PT2
1.8
Tch
175
Storage Temperature
Tstg
–55 to 175
37
Repetitive Avalanche Current *2
Repetitive Avalanche Energy *2
IAR
EAR
136
mJ
Notes: *1 TC = 25°C, PW 10 s, Duty Cycle 1%
*2 RG = 25 , VGS = 20 0 V
Thermal Resistance
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
Rth(ch-C)
Rth(ch-A)
1.02
83.3
°C/W
°C/W
R07DS0562EJ0100 Rev.1.00
Nov 07, 2011
Page 1 of 6
NP89N04PUK
Electrical Characteristics (TA = 25°C)
Item
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Threshold Voltage
Forward Transfer Admittance *1
Drain to Source On-state Resistance *1
Input Capacitance
Symbol
IDSS
IGSS
VGS(th)
| yfs |
RDS(on)
Ciss
MIN.
—
—
2.0
30
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TYP.
—
MAX.
1
Unit
A
nA
V
Test Conditions
VDS = 40 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
VDS = VGS, ID = 250 A
VDS = 5 V, ID = 45 A
VGS = 10 V, ID = 45 A
VDS = 25 V
—
100
4.0
—
3.0
60
S
2.45
3900
530
200
25
2.95
5850
800
360
60
m
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
VGS = 0 V
Output Capacitance
Coss
Crss
td(on)
tr
f = 1 MHz
Reverse Transfer Capacitance
Turn-on Delay Time
VDD = 20 V, ID = 45 A
V
GS = 10 V
Rise Time
12
30
RG = 0
Turn-off Delay Time
td(off)
tf
65
130
20
Fall Time
8
Total Gate Charge
QG
68
102
—
VDD = 32 V
V
GS = 10 V
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage *1
Reverse Recovery Time
Reverse Recovery Charge
Note: *1 Pulsed test
QGS
QGD
VF(S-D)
trr
18
ID = 90 A
18
—
0.9
47
1.5
—
IF = 90 A, VGS = 0 V
ns
nC
IF = 90 A, VGS = 0 V
di/dt = 100 A/s
Qrr
68
—
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
D.U.T.
VGS
L
RL
R
G = 25 Ω
90%
VGS
Wave Form
VGS
10%
0
RG
PG.
PG.
50 Ω
VDD
VDD
VGS = 20 → 0 V
VDS
90%
90%
VDS
0
VGS
BVDSS
10% 10%
VDS
Wave Form
0
IAS
ID
VDS
τ
td(on)
tr
td(off)
tf
VDD
ton
toff
τ = 1 μs
Duty Cycle ≤ 1%
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
R07DS0562EJ0100 Rev.1.00
Nov 07, 2011
Page 2 of 6
NP89N04PUK
Typical Characteristics (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS SAFE
OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
120
100
80
60
40
20
0
160
140
120
100
80
60
40
20
0
0
25
50
75 100 125 150 175
0
25
50
75 100 125 150 175
TC - Case Temperature - °C
TC - Case Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
1000
100
10
ID(Pulse) = 360 A
RDS(ON) Limited
(VGS=10 V)
PW
ID(DC) = 90 A
= 100
μ
s
PW
=
Power Dissipation Limited
1
ms
PW
=
10 ms
Secondary Breakdown Limited
1
DC
TC = 25°C
Single Pulse
0.1
0.1
1
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
10
Rth(ch-A) = 83.3°C/W
Rth(ch-C) = 1.02°C/W
1
0.1
0.01
Single pulse
0.1 m
1 m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
R07DS0562EJ0100 Rev.1.00
Nov 07, 2011
Page 3 of 6
NP89N04PUK
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
100
400
350
300
250
200
150
100
50
10
1
TA = –55°C
25°C
85°C
150°C
175°C
0.1
0.01
0.001
VGS = 10 V
Pulsed
VDS = 10 V
Pulsed
0
0
0.2
0.4
0.6
0.8
1.0
0
1
2
3
4
5
6
VDS - Drain to Source Voltage - V
VGS - Gate to Source Voltage - V
GATE TO SOURCE THRESHOLD VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
4
3
2
1
100
10
1
TA = –55°C
25°C
85°C
150°C
175°C
VDS = VGS
ID = 250 μA
VDS = 5 V
Pulsed
0
–100 –50
0
50
100
150
200
0.1
1
10
100
Tch - Channel Temperature - °C
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
6
5
4
3
2
6
5
4
3
2
1
1
VGS = 10 V
ID = 45 A
Pulsed
100
ID - Drain Current - A
Pulsed
15
GS - Gate to Source Voltage - V
0
0
1
10
1000
0
5
10
20
V
R07DS0562EJ0100 Rev.1.00
Nov 07, 2011
Page 4 of 6
NP89N04PUK
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
6
5
4
3
2
1
0
Ciss
1000
Coss
VGS = 10 V
D = 45 A
Pulsed
Crss
I
VGS = 0 V
f = 1 MHz
100
0.1
–100 –50
0
50
100
150
200
1
10
100
Tch - Channel Temperature - °C
VDS - Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
1000
100
10
35
30
25
20
15
10
5
14
12
10
8
VDD = 32 V
20 V
8 V
td(off)
td(on)
tr
VGS
6
4
tf
VDD = 20 V
GS = 10 V
G = 0 Ω
V
R
2
VDS
ID = 90 A
1
0.1
0
0
1
10
100
0
10 20 30 40 50 60 70 80
ID - Drain Current - A
QG- Gate Charge - nC
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
1000
100
10
100
10
1
VGS = 10 V
VGS = 0 V
1
di/dt = 100 A/μs
GS = 0 V
V
Pulsed
0.1
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VF(S-D) - Source to Drain Voltage - V
0.1
1
10
100
IF - Drain Current - A
R07DS0562EJ0100 Rev.1.00
Nov 07, 2011
Page 5 of 6
NP89N04PUK
Package Drawing (Unit: mm)
TO-263 (MP-25ZP) (Mass: 1.5 g TYP.)
10.0 0.3
7.88 MIN.
4
4.45 0.2
No plating
1.3 0.2
0.025
to 0.25
0.5
0.75 0.2
2.54
0.25
1
2
3
1. Gate
2. Drain
3. Source
4. Fin (Drain)
Equivalent Circuit
Drain
Body
Diode
Gate
Source
Remark: Strong electric field, when exposed to this device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred.
R07DS0562EJ0100 Rev.1.00
Nov 07, 2011
Page 6 of 6
Revision History
NP89N04PUK Data Sheet
Description
Summary
Rev.
1.00
Date
Page
Nov 07, 2011
—
First Edition Issued
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C - 1
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