PS8352AL2-E3-AX [RENESAS]
ANALOG OUTPUT TYPE OPTICAL COUPLED ISOLATION AMPLIFIER;
| 型号： | PS8352AL2-E3-AX |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | ANALOG OUTPUT TYPE OPTICAL COUPLED ISOLATION AMPLIFIER 放大器 分离技术 隔离技术 输出元件 |
| 文件： | 总20页 (文件大小：430K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Data Sheet
PS8352AL2
R08DS0132EJ0100
Rev.1.00
ANALOG OUTPUT TYPE
Aug 31, 2015
OPTICAL COUPLED ISOLATION AMPLIFIER
DESCRIPTION
The PS8352AL2 is an optically coupled isolation amplifier that uses an IC with a high-accuracy sigma-delta A/D
converter and a GaAIAs light-emitting diode with high-speed response and high luminance efficiency on the input side,
and an IC with a high-accuracy D/A converter on the output side.
The PS8352AL2 is designed specifically for high common mode transient immunity (CMTI) and high linearity (non-
linearity). The PS8352AL2 is designed for current and voltage sensing.
FEATURES
PIN CONNECTION
Non-linearity (NL200 = 0.35% MAX.)
High common mode transient immunity (CMTI = 10 kV/s MIN.)
High isolation voltage (BV = 5 000 Vr.m.s.)
Gain tolerance (G = 7.92 to 8.08 (1%))
Gain: 8 V/V TYP.
Package: 8-pin DIP lead bending type for long creepage distance
for surface mount (L2)
Embossed tape product: PS8352AL2-E3: 2 000 pcs/reel
Pb-Free product
(Top View)
1. VDD
2. VIN+
1
8
1
7
6
5
3. VIN
4. GND1
5. GND2
–
6. VOUT
–
7. VOUT+
8. VDD
2
3
4
2
Safety standards
•
•
•
UL approved: No. E72422
CSA approved: No. CA 101391 (CA5A, CAN/CSA-C22.2 60065, 60950)
DIN EN 60747-5-5 (VDE 0884-5) approved (Option)
APPLICATIONS
AC Servo, inverter
Solar power conditioner
Measurement equipment
Start of mass production
2015-09
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PS8352AL2
Chapter Title
PACKAGE DIMENSIONS (UNIT: mm)
Lead Bending Type (Gull-wing) For Long Creepage Distance For Surface Mount (L2)
5.85±0.25
8
5
11.5±0.3
(7.62)
4
1
(0.82)
S
0.4±0.1
0.25
0.75±0.25
M
1.27
0.1 S
Weight: 0.316g (typ.)
PHOTOCOUPLER CONSTRUCTION
Parameter
Air Distance
Unit (MIN.)
8 mm
Outer Creepage Distance
Isolation Distance
8 mm
0.4 mm
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PS8352AL2
Chapter Title
MARKING EXAMPLE
No. 1 pin
R
Company Initial
Type Number
Assembly Lot
Mark
8352A
N304
N 3 04
Week Assembled
Year Assembled
(Last 1 Digit)
Rank Code
ORDERING INFORMATION
Part Number
Order Number
Solder Plating
Specification
Packing Style
Safety Standard
Approval
Application
Part Number*1
PS8352AL2
PS8352AL2-AX
Pb-Free
Magazine case 50 pcs
Standard products
PS8352AL2
PS8352AL2-E3
PS8352AL2-E3-AX
(Ni/Pd/Au)
Embossed Tape 1 000
pcs/reel
(UL, CSA approved)
PS8352AL2-V
PS8352AL2-V-AX
Magazine case 50 pcs
UL, CSA approved
DIN EN 60747-5-5
(VDE 0884-5)
PS8352AL2-V-E3
PS8352AL2-V-E3-AX
Embossed Tape 1 000
pcs/reel
2011-11 approved
(Option)
*1
For the application of the Safety Standard, following part number should be used.
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PS8352AL2
Chapter Title
ABSOLUTE MAXIMUM RATINGS (T = 25C, unless otherwise specified)
A
Parameter
Operating Ambient Temperature
Storage Temperature
Supply Voltage
Symbol
TA
Ratings
–40 to +110
–55 to+125
0 to 5.5
Unit
C
Tstg
C
VDD1, VDD2
V
Input Voltage
V
IN, VIN
IN, VIN
–2 to VDD1+0.5
–6 to VDD1+0.5
–0.5 to VDD2+0.5
5 000
V
V
2 Seconds Transient Input Voltage
Output Voltage
Isolation Voltage*1
V
V
OUT, VOUT
V
BV
Vr.m.s.
*1
AC voltage for 1 minute at TA = 25C, RH = 60% between input and output.
Pins 1-4 shorted together, 5-8 shorted together.
RECOMMENDED OPERATING CONDITIONS
Parameter
Operating Ambient Temperature
Supply Voltage
Symbol
MIN.
MAX.
110
5.5
Unit
C
TA
–40
4.5
VDD1, VDD2
V
Input Voltage
(Accurate and Linear) *1
V
IN, VIN
–200
200
mV
*1
Using VIN = 0 V (to be connected to GND1) is recommended. Avoid using VIN of 2.5 V or more, because the
internal test mode is activated when the voltage VIN reaches more than 2.5 V.
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PS8352AL2
Chapter Title
ELECTRICAL CHARACTERISTICS (DC Characteristics)
(TYP.: TA = 25C, VIN = VIN = 0 V, VDD1 = VDD2 = 5 V,
MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified)
Parameter
Symbol
Conditions
TA = 25C
MIN.
2
TYP.
0.25
0.25
1.6
MAX.
Unit
Input Offset Voltage
Vos
2
3
mV
3
Input Offset Voltage Drift
vs. Temperature
dVos/dTA
10
V/C
Gain *1
G
200 mV VIN 200 mV,
TA = 25C
7.92
8
8.08
0.35
0.2
V/V
Gain Drift vs. Temperature
VOUT Non-linearity (200 mV) *2
dG/dTA
0.0006
0.014
V/VC
%
NL200
200 mV VIN 200 mV
100 mV VIN 100 mV
VOUT Non-linearity (200 mV) Drift
vs. Temperature
VOUT Non-linearity (100 mV) *2
dNL200/dT
0.0001
%/C
A
NL100
0.011
320
%
Maximum Input Voltage before
VOUT Clipping
VINMAX.
mV
Input Supply Current
Output Supply Current
Input Bias Current
IDD1
IDD2
VIN = 400 mV
VIN = 400 mV
VIN = 0V
13.5
7.8
16
16
1
mA
mA
IIN
1
0.65
0.3
A
Input Bias Current Drift
vs. Temperature
dIIN/dTA
nA/C
Low Level Saturated Output
Voltage
VOL
VOH
VIN = 400 mV
VIN = 400 mV
VIN = VIN = 0 V
1.29
3.8
V
V
High Level Saturated Output
Voltage
Output Voltage (VIN = VIN = 0 V)
Output Short-circuit Current
Equivalent Input Resistance
VOUT Output Resistance
VOCM
2.2
2.55
20
2.8
V
mA
k
IOSC
RIN
450
4
ROUT
Input DC Common-Mode
Rejection Ratio*3
CMRRIN
76
dB
*1
The differential output voltage (VOUT+ VOUT) with respect to the differential input voltage (VIN+ VIN), where VIN+ =
200 mV to 200 mV and VIN = 0 V) is measured under the circuit shown in Fig. 2 NL200, G Test Circuit. Upon
the resulting chart, the gain is defined as the slope of the optimum line obtained by using the method of least
squares.
*2
The differential output voltage (VOUT+ VOUT) with respect to the differential input voltage (VIN+ VIN) is measured
under the circuit shown in Fig. 2 NL200, G Test Circuit. Upon the resulting chart, the optimum line is obtained by
using the method of least squares. Non-linearity is defined as the ratio (%) of the optimum line obtained by
dividing [Half of the peak to peak value of the (residual) deviation] by [full-scale differential output voltage].
For example, if the differential output voltage is 3.2 V, and the peak to peak value of the (residual) deviation is
22.4 mV, while the input VIN+ is 200 mV, the output non-linearity is obtained as follows:
NL200 = 22.4/(2 3 200) = 0.35%
*3
CMRRIN is defined as the ratio of the differential signal gain (when the differential signal is applied between the
input pins) to the common-mode signal gain (when both input pins are connected and the signal is applied). This
value is indicated in dB.
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PS8352AL2
Chapter Title
ELECTRICAL CHARACTERISTICS (AC Characteristics)
(TYP.: TA = 25C, VIN = VIN = 0 V, VDD1 = VDD2 = 5 V,
MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified)
Parameter
Symbol
fC
Conditions
IN = 200 mVp-p, sine wave
IN = 0 V
MIN.
TYP.
100
15.6
2.4
MAX.
Unit
kHz
VOUT Bandwidth (3 dB)
V
V
V
50
VOUT Noise
NOUT
tPD10
tPD50
tPD90
tr/tf
mVr.m.s.
s
VIN to VOUT Signal Delay (50 to 10%)
VIN to VOUT Signal Delay (50 to 50%)
VIN to VOUT Signal Delay (50 to 90%)
VOUT Rise Time/Fall Time (10 to 90%)
Common Mode Transient Immunity*1
IN = 0 to 150 mV step
3.3
5.6
9.9
6.6
4.2
6.1
VIN = 0 to 150 mV step
3.1
s
CMTI
VCM = 0.5 kV, tr = 20 ns,
10
28
kV/s
TA = 25C
Power Supply Noise Rejection*2
PSR
f = 1 MHz
40
mVr.m.s.
*1
CMTI is tested by applying a pulse that rises and falls suddenly (VCM = 0.5 kV) between GND1 on the input side
and GND2 on the output side (pins 4 and 5) by using the circuit shown in Fig. 9 CMTI Test Circuit. CMTI is
defined at the point where the differential output voltage (VOUT+ VOUT) fluctuates 200 mV (>1s) or more from the
average output voltage.
*2
This is the value of the transient voltage at the differential output when 1 Vp-p, 1 MHz, and 40 ns rise/fall time
square wave is applied to both VDD1 and VDD2.
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Chapter Title
TEST CIRCUIT
Fig. 1 VOS Test Circuit
VDD2
VDD1
+15 V
1
2
3
4
8
7
6
5
0.1
μF
0.1
μF
10 kΩ
10 kΩ
0.47 F 0.47 μF
0.1
0.1
μF
+
+
–
+
–
AD624CD
(x100)
VOUT
−
μ
μF
SHIELD
–15 V
Fig. 2 NL200, G Test Circuit
VDD2
VDD1
+15 V
+15 V
1
2
3
4
8
7
6
5
404 Ω
0.1
μF
0.1
μF
10 kΩ
10 kΩ
0.47
0.1
0.1
μ
F
F
0.1
0.1
μF
+
+
VIN
+
–
+
–
AD624CD
(x4)
AD624CD
(x10)
VOUT
−
−
13.2 Ω
0.01 μF
μ
F 0.47 μF
μ
μF
SHIELD
–15 V
10 kΩ
–15 V
0.47 μF
Fig. 3 IDD1 Test Circuit
Fig. 4 IDD2 Test Circuit
I
DD
1
IDD
2
1
2
3
4
8
1
2
3
4
8
7
6
5
7
6
5
+
–
+
–
+
–
+
–
0.1μ
F
0.01
μ
F
0.1μ
F
0.01
μ
F
0.1μF
400 mV
– 400 mV
5 V
5 V
5 V
SHIELD
SHIELD
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PS8352AL2
Chapter Title
Fig. 5 IIN+ Test Circuit
1
8
7
6
5
IIN+
2
3
4
+
–
+
–
0.1μ
F
0.01μF
5 V
SHIELD
Fig. 6 VOUT Test Circuit
V
OL
1
2
3
4
8
7
6
5
+
–
VOL
+
–
0.1μ
0.1μ
0.1μ
F
F
F
0.01
0.01
0.01
μ
μ
μ
F
F
F
0.1
0.1
0.1
μF
–
400 mV
5 V
5 V
5 V
5 V
5 V
5 V
SHIELD
V
OCM
1
2
3
4
8
7
6
5
+
–
VOCM
+
–
μ
F
SHIELD
V
OH
1
2
3
4
8
7
6
5
+
–
VOH
+
–
μ
F
400 mV
SHIELD
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PS8352AL2
Chapter Title
Fig. 7 |IOSC| Test Circuit
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
I
OSC
+
–
+
–
+
–
+
–
I
OSC
0.1μ
F
0.01
μ
F
0.1μ
F
0.01μF
0.1μ
F
0.1μF
5 V
5 V
5 V
5 V
SHIELD
SHIELD
Fig. 8 tPD Test Circuit
10 kΩ
VDD2
VDD1
+15 V
1
2
3
4
8
7
6
5
0.1
μF
0.1
μF
2 kΩ
2 kΩ
0.1
μ
F
F
−
VIN
+
+
–
NE5534
+
VOUT
0.01 μF
–
10 kΩ
0.1
μ
SHIELD
–15 V
Fig. 9 CMTI Test Circuit
150 pF
10 kΩ
VDD2
+15 V
78L05
IN OUT
1
2
3
4
8
7
6
5
0.1
μF
0.1
μF
2 kΩ
2 kΩ
0.1
0.1
μ
F
−
μ
+
9 V
+
–
0.1μF
+
–
PC813
VOUT
150 pF
10 kΩ
μF
SHIELD
+
–
–15 V
VCM
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PS8352AL2
Chapter Title
TYPICAL CHARACTERISTICS (T = 25C, unless otherwise specified)
A
INPUT OFFSET VOLTAGE vs.
AMBIENT TEMPERATURE
INPUT OFFSET VOLTAGE vs.
SUPPLY VOLTAGE
3.0
2.0
1.5
VDD1 = VDD2 = 5 V
VIN+ = VIN- = 0 V
VIN+ = VIN- = 0 V
2.0
1.0
1.0
0.5
0.0
0.0
-0.5
-1.0
-1.0
-2.0
-3.0
-1.5
-2.0
4.5
4.75
5
5.25
5.5
-50
-25
0
25
50
75
100 125
Supply Voltage VDD1, VDD2 (V)
Ambient Temperature Ta (°C)
GAIN vs. AMBIENT TEMPERATURE
GAIN vs. SUPPLY VOLTAGE
8.2
8.1
8.0
7.9
7.8
8.2
8.1
8.0
VDD1 = VDD2 = 5 V
VIN+ = -200 mV to +200 mV,
VIN- = 0 V
VIN+ = -200 mV to +200 mV,
VIN- = 0 V
7.9
7.8
-50 -25
0
25
50
75
100 125
4.5
4.75
5
5.25
5.5
Ambient Temperature Ta (°C)
Supply Voltage VDD1, VDD2 (V)
NON-LINEARITY vs.
AMBIENT TEMPERATURE
NON-LINEARITY vs.
SUPPLY VOLTAGE
0.35
0.30
0.25
0.20
0.35
0.30
VDD1 = VDD2 = 5 V
VIN+ = -200 mV to +200 mV,
VIN- = 0 V
VIN+ = -200 mV to +200 mV,
VIN- = 0 V
0.25
0.20
0.15
0.10
0.05
0.00
0.15
0.10
0.05
0.00
-50
-25
0
25
50
75
100 125
4.5
4.75
5
5.25
5.5
Supply Voltage VDD1, VDD2 (V)
Ambient Temperature Ta (°C)
Remark The graphs indicate nominal characteristics.
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PS8352AL2
Chapter Title
OUTPUT VOLTAGE vs. INPUT VOLTAGE
SUPPLY CURRENT vs. INPUT VOLTAGE
4
3.5
3
16.0
14.0
12.0
10.0
8.0
IDD1
VOUT-
IDD2
2.5
2
6.0
4.0
2.0
0.0
VOUT+
1.5
1
VDD1 = VDD2 = 5 V
-0.2 0
VDD1 = VDD2 = 5 V
0.0
-0.4
0.2
0.4
-0.4
-0.2
0.2
0.4
Input Voltage VIN+ (V)
Input Voltage VIN (V)
INPUT CURRENT vs. INPUT VOLTAGE
GAIN vs. FREQUENCY
3.0
2.0
1.0
0.0
-1.0
1
0
VDD1 = VDD2 = 5 V
VIN- = 0 V
-1
-2
-3
-4
-5
-6
-7
-8
VDD1 = VDD2 = 5 V
VIN- = 0 V
VIN+ = 200 mVp-p sine wave
-2.0
-3.0
-0.4
-0.2
0.0
0.2
0.4
10
100
1000
10000 100000 1000000
Input Voltage VIN (V)
Frequency f (Hz)
FREQUENCY vs.
FREQUENCY vs. SUPPLY VOLTAGE
AMBIENT TEMPERATURE
120.0
100.0
80.0
60.0
40.0
20.0
0.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
VDD1 = VDD2 = 5 V
VIN- = 0 V
VIN+ = 200 mVp-p sine wave
VDD1 = VDD2 = 5 V
VIN- = 0 V
VIN+ = 200 mVp-p sine wave
4.5
4.75
5
5.25
5.5
-50
-25
0
25
50
75
100 125
Supply Voltage VDD1, VDD2 (V)
Ambient Temperature Ta (°C)
Remark The graphs indicate nominal characteristics.
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Chapter Title
SIGNAL DELAY TIME vs.
AMBIENT TEMPERATURE
7.0
tPD90
tPD50
6.0
5.0
4.0
3.0
2.0
t
r
t
f
tPD10
VDD1 = VDD2 = 5 V
VIN- = 0 V
VIN+ = 0 to 150 mV
1.0
0.0
step
-50
-25
0
25
50
75
100 125
Ambient Temperature Ta (°C)
Remark The graphs indicate nominal characteristics.
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PS8352AL2
Chapter Title
TAPING SPECIFICATIONS (UNIT: mm)
Outline and Dimensions (Tape)
2.0±0.1
+0.1
4.0±0.1
1.5
–0
4.5 MAX.
+0.1
2.0
–0
8.0±0.1
0.35
6.35±0.1
Tape Direction
PS8352AL2-E3
Outline and Dimensions (Reel)
2.0±0.5
2.0±0.5
13.0±0.2
R 1.0
21.0±0.8
25.5±1.0
29.5±1.0
Packing: 2 000 pcs/reel
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Chapter Title
RECOMMENDED MOUNT PAD DIMENSIONS (UNIT: mm)
D
A
Part Number
Lead Bending
A
B
C
D
lead bending type (Gull-wing)
for long creepage distance (surface mount)
10.2
1.27
0.8
2.2
PS8352AL2
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Chapter Title
NOTES ON HANDLING
1. Recommended soldering conditions
(1) Infrared reflow soldering
• Peak reflow temperature
260C or below (package surface temperature)
10 seconds or less
• Time of peak reflow temperature
• Time of temperature higher than 220C
60 seconds or less
• Time to preheat temperature from 120 to 180C 12030 s
• Number of reflows
• Flux
Three
Rosin flux containing small amount of chlorine (The flux with a
maximum chlorine content of 0.2 Wt% is recommended.)
Recommended Temperature Profile of Infrared Reflow
(heating)
to 10 s
260°C MAX.
220°C
to 60 s
180°C
120°C
120±30 s
(preheating)
Time (s)
(2) Wave soldering
• Temperature
• Time
260C or below (molten solder temperature)
10 seconds or less
• Preheating conditions
• Number of times
• Flux
120C or below (package surface temperature)
One (Allowed to be dipped in solder including plastic mold portion.)
Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content
of 0.2 Wt% is recommended.)
(3) Soldering by Soldering Iron
• Peak Temperature (lead part temperature) 350C or below
• Time (each pins)
• Flux
3 seconds or less
Rosin flux containing small amount of chlorine (The flux with a
maximum chlorine content of 0.2 Wt% is recommended.)
(a) Soldering of leads should be made at the point 1.5 to 2.0 mm from the root of the lead
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Chapter Title
(4) Cautions
• Fluxes
Avoid removing the residual flux with freon-based and chlorine-based cleaning solvent.
2. Cautions regarding noise
Be aware that when voltage is applied suddenly between the photocoupler’s input and output at startup, the output
transistor may enter the on state, even if the voltage is within the absolute maximum ratings.
USAGE CAUTIONS
1. Usage cautions
(1) This product is weak for static electricity by designed with high-speed integrated circuit so protect against static
electricity when handling.
(2) When the primary power supply (VDD1) is off and only the secondary power supply (VDD2) is being applied
(VDD1 = 0 V and VDD2 = 5 V), VOUT+ outputs a low level, and VOUT− outputs a high level (VOUT+ = 1.3 V TYP.,
VOUT– = 3.8 V TYP.), regardless of the input voltages (VIN+ and VIN−).
(3) The output level of VOUT+ and VOUT− might be unstable for several seconds immediately after the secondary
power supply (VDD2) is applied while the primary power supply (VDD1) is being applied.
2. Board designing
(1) By-pass capacitor of more than 0.1 F is used between VCC and GND near device. Also, ensure that the
distance between the leads of the photocoupler and capacitor is no more than 10 mm.
(2) Keep the pattern connected the input (VIN+, VIN-) and the output (VOUT+, VOUT-), respectively, as short as possible.
(3) Do not connect any routing to the portion of the frame exposed between the pins on the package of the
photocoupler. If connected, it will affect the photocoupler's internal voltage and the photocoupler will not
operate normally.
(4) Because the maximum frequency of the signal input to the photocoupler must be lower than the allowable
frequency band, be sure to connect an anti-aliasing filter (an RC filter with R = 68 and C = 0.01 F, for
example).
(5) The signals output from the PS8352A include noise elements such as chopping noise and quantization noise
generated internally. Therefore, be sure to restrict the output frequency to the required bandwidth by adding a
low-pass filter function (an RC filter with R =10 k and C = 150 pF, for example) to the operational amplifier
(post amplifier) in the next stage to the PS8352A.
3. Avoid storage at a high temperature and high humidity.
R08DS0132EJ0100 Rev.1.00
Aug 31, 2015
Page 16 of 19
PS8352AL2
Chapter Title
SPECIFICATION OF VDE MARKS LICENSE DOCUMENT
Parameter
Symbol
Spec.
Unit
Climatic test class (IEC 60068-1/DIN EN 60068-1)
40/110/21
Dielectric strength
maximum operating isolation voltage
Test voltage (partial discharge test, procedure a for type test and random test)
Upr = 1.5 UIORM, Pd 5 pC
UIORM
Upr
1 130
1 695
Vpeak
Vpeak
Test voltage (partial discharge test, procedure b for all devices)
Upr
2 119
Vpeak
Vpeak
Upr = 1.875 UIORM, Pd 5 pC
Highest permissible overvoltage
UTR
8 000
2
Degree of pollution (DIN EN 60664-1 VDE0110 Part 1)
Comparative tracking index (IEC 60112/DIN EN 60112 (VDE 0303 Part 11))
Material group (DIN EN 60664-1 VDE0110 Part 1)
Storage temperature range
CTI
175
III a
Tstg
TA
–55 to +125
–40 to +110
°C
°C
Operating temperature range
Isolation resistance, minimum value
VIO = 500 V dc at TA = 25°C
Ris MIN.
Ris MIN.
1012
1011
VIO = 500 V dc at TA MAX. at least 100°C
Safety maximum ratings (maximum permissible in case of fault, see thermal
derating curve)
Package temperature
Tsi
Isi
175
400
700
°C
mA
mW
Current (input current IF, Psi = 0)
Power (output or total power dissipation)
Isolation resistance
Psi
VIO = 500 V dc at TA = Tsi
Ris MIN.
109
Dependence of maximum safety ratings with package temperature
1000
900
800
700
600
Psi: Total Power Dissipation
500
400
300
Isi: Input Current
200
100
0
0
25
50
75 100 125 150 175 200
Package temp Tsi (°C)
R08DS0132EJ0100 Rev.1.00
Aug 31, 2015
Page 17 of 19
PS8352AL2
Chapter Title
Method a Destructive Test, Type and Sample Test
VINITIAL =8000V
V
V
pr =1808V
V
IORM =1130V
t3
tm
ttest
t4
t
tini
t2
t1
t1,t2 = 1 to 10 sec
t3,t4 = 1 sec
tm(PARTIAL DISCHARGE)= 10 sec
t
test = 12 sec
ini = 60 sec
t
Method b Non-destructive Test, 100% Production Test
V
pr
=2119V
V
V
=1130V
IORM
t
test
t
t
3
t
p
t
4
t ,t = 0.1 sec
m(PARTIAL DISCHARGE)
3 4
t
t
= 1.0 sec
= 1.2 sec
test
R08DS0132EJ0100 Rev.1.00
Aug 31, 2015
Page 18 of 19
PS8352AL2
Chapter Title
This product uses gallium arsenide (GaAs).
Caution GaAs Products
GaAs vapor and powder are hazardous to human health if inhaled or ingested, so please observe
the following points.
• Follow related laws and ordinances when disposing of the product. If there are no applicable laws
and/or ordinances, dispose of the product as recommended below.
1. Commission a disposal company able to (with a license to) collect, transport and dispose of
materials that contain arsenic and other such industrial waste materials.
2. Exclude the product from general industrial waste and household garbage, and ensure that the
product is controlled (as industrial waste subject to special control) up until final disposal.
• Do not burn, destroy, cut, crush, or chemically dissolve the product.
• Do not lick the product or in any way allow it to enter the mouth.
R08DS0132EJ0100 Rev.1.00
Aug 31, 2015
Page 19 of 19
Notice
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