R5F64563JFD#U0 [RENESAS]

R5F64563JFD#U0;
R5F64563JFD#U0
型号: R5F64563JFD#U0
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

R5F64563JFD#U0

时钟 微控制器 外围集成电路
文件: 总121页 (文件大小:741K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
R32C/156 Group Datasheet  
Datasheet  
R32C/156 Group  
RENESAS MCU  
R01DS0075EJ0120  
Rev.1.20  
Aug 07, 2013  
1. Overview  
1.1  
Features  
The M16C Family offers a robust platform of 32-/16-bit CISC microcomputers (MCUs) featuring high ROM  
code efficiency, extensive EMI/EMS noise immunity, ultra-low power consumption, high-speed processing  
in actual applications, and numerous and varied integrated peripherals. Extensive device scalability from  
low- to high-end, featuring a single architecture as well as compatible pin assignments and peripheral  
functions, provides support for a vast range of application fields.  
The R32C/100 Series is a high-end microcontroller series in the M16C Family. With a 4-Gbyte memory  
space, it achieves maximum code efficiency and high-speed processing with 32-bit CISC architecture,  
multiplier, multiply-accumulate unit, and floating point unit. The selection from the broadest choice of on-  
2
chip peripheral devices — UART, CRC, DMAC, A/D and D/A converters, timers, I C-bus interface, and  
watchdog timer enables to minimize external components.  
The R32C/156 Group is the MCU specific to vehicle networks within the R32C/100 Series. This product,  
provided as 144-pin plastic molded LQFP package, has two channels of CAN module, four channels of  
LIN module, and standard peripherals.  
1.1.1  
Applications  
Automotive, communication equipment, industrial equipment, etc.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 1 of 115  
R32C/156 Group  
1. Overview  
1.1.2  
Performance Overview  
Tables 1.1 and 1.2 show the performance overview of the R32C/156 Group.  
Table 1.1  
Unit  
Performance Overview (1/2)  
Function  
Explanation  
CPU  
Central processing R32C/100 Series CPU Core  
unit  
• Basic instructions: 108  
• Minimum instruction execution time: 15.625 ns (f(CPU) = 64 MHz)  
• Multiplier: 32-bit × 32-bit 64-bit  
• Multiply-accumulate unit: 32-bit × 32-bit + 64-bit 64-bit  
• IEEE-754 compatible FPU: Single precision  
• 32-bit barrel shifter  
• Operating mode: Single-chip mode  
Memory  
Flash memory: 256/384/512 Kbytes  
RAM: 20/24/32 Kbytes  
Data flash: 4 Kbytes × 2 blocks  
2
(1)  
E dataFlash: none /4 Kbytes  
Refer to Table 1.3 for details  
(2)  
Voltage  
Detector  
Low voltage  
detector  
Optional  
Low voltage detection interrupt  
Clock  
Clock generator  
• 4 circuits (main clock, sub clock, PLL, on-chip oscillator)  
• Oscillation stop detector: Main clock oscillator stop/restart detection  
• Frequency divide circuit: Divide-by-2 to divide-by-24 selectable  
• Low power modes: Wait mode, stop mode  
Interrupts  
Interrupt vectors: 261  
External interrupt inputs: NMI, INT × 9, key input × 4  
Interrupt priority levels: 7  
Watchdog Timer  
15 bits × 1 (selectable input frequency from prescaler output)  
Automatic timer start function is available  
DMA  
DMAC  
4 channels  
• Cycle-steal transfer mode  
• Request sources: 52  
• 2 transfer modes: Single transfer, repeat transfer  
DMAC II  
• Triggered by an interrupt request of any peripheral  
• 3 characteristic transfer functions: Immediate data transfer,  
calculation result transfer, chain transfer  
I/O Ports  
Timer  
Programmable I/O • 2 input-only ports  
ports  
• 120 CMOS I/O ports  
• A pull-up resistor is selectable for every 4 input ports  
Timer A  
16-bit timer × 5  
Timer mode, event counter mode, one-shot timer mode, pulse-width  
modulation (PWM) mode  
Two-phase pulse signal processing in event counter mode (two-  
phase encoder input) × 3  
Timer B  
16-bit timer × 6  
Timer mode, event counter mode, pulse frequency measurement  
mode, pulse-width measurement mode  
Three-phase motor Three-phase motor control timer × 1 (timers A1, A2, A4, and B2 used)  
control timer  
8-bit programmable dead time timer  
Notes:  
2
1. Contact a Renesas Electronics sales office to use the non-E dataFlash version.  
2. Contact a Renesas Electronics sales office to use the optional features.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 2 of 115  
R32C/156 Group  
1. Overview  
Table 1.2  
Performance Overview (2/2)  
Unit  
Function  
Explanation  
Serial  
UART0 to UART4 Asynchronous/synchronous serial interface × 5 channels  
2
Interface  
• I C-bus (UART0 to UART2)  
• Special mode 2 (UART0 to UART2)  
A/D Converter  
10-bit resolution × 34 channels  
Sample and hold functionality integrated  
Self test/Open-circuit detection assist  
D/A Converter  
CRC Calculator  
X-Y Converter  
Intelligent I/O  
8-bit resolution × 2  
16  
12  
5
CRC-CCITT (X + X + X + 1)  
16 bits × 16 bits  
Time measurement (input capture): 16 bits × 32  
Digital debounce circuit contained  
Waveform generation (output compare): 16 bits × 32  
Phase shift waveform output mode contained  
Serial Bus Interface  
3 channels  
• Synchronous serial communication mode  
• 4-wire serial bus mode  
Programmable character length: 8 to 16 bits  
LIN Module  
4 channels  
CAN Module  
2 channels  
CAN functionality compliant with ISO 11898-1  
32 mailboxes  
Flash Memory  
Programming and erasure supply voltage: VCC = 3.0 to 5.5 V  
Minimum endurance: 1,000 program/erase cycles  
Security protection: ROM code protect, ID code protect  
Debugging: On-chip debug, on-board flash programming  
2
Minimum endurance: 100,000 program/erase cycles  
64 MHz/VCC = 3.0 to 5.5 V  
E dataFlash  
Operating Frequency/Supply  
Voltage  
Operating Temperature  
-40°C to 85°C (J version)  
(1)  
-40°C to 105°C (L version)  
-40°C to 125°C (K version)  
Current Consumption  
37 mA (VCC = 5.0 V, f(CPU) = 64 MHz)  
8 µA (VCC = 3.3 V, f(XCIN) = 32.768 kHz, wait mode)  
Package  
Note:  
144-pin plastic molded LQFP (PLQP0144KA-A)  
1. Contact a Renesas Electronics sales office to use the L version products.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 3 of 115  
R32C/156 Group  
1. Overview  
1.2  
Product Information  
Table 1.3 lists the product information and Figure 1.1 shows the details of the part number.  
Table 1.3  
R32C/156 Group Product List  
As of August, 2013  
(1)  
(2)  
2
Part Number  
RAM Capacity  
20 Kbytes  
Remarks  
J Version  
Package Code  
ROM Capacity  
E dataFlash  
R5F64561JFD  
R5F64561LFD  
R5F64561KFD  
R5F6456FJFD  
R5F6456FLFD  
R5F6456FKFD  
R5F64562JFD  
R5F64562LFD  
R5F64562KFD  
R5F6456GJFD  
R5F6456GLFD  
R5F6456GKFD  
R5F64563JFD  
R5F64563LFD  
R5F64563KFD  
R5F6456HJFD  
R5F6456HLFD  
R5F6456HKFD  
(3)  
4 Kbytes  
L Version  
K Version  
J Version  
L Version  
K Version  
J Version  
L Version  
K Version  
J Version  
L Version  
K Version  
J Version  
L Version  
K Version  
J Version  
L Version  
K Version  
256 Kbytes  
+ 8 Kbytes  
(3)  
(3)  
(3)  
(3)  
(3)  
(3)  
NA  
4 Kbytes  
384 Kbytes  
+ 8 Kbytes  
PLQP0144KA-A  
24 Kbytes  
(3)  
NA  
4 Kbytes  
512 Kbytes  
+ 8 Kbytes  
32 Kbytes  
(3)  
NA  
Notes:  
1. The old package code is as follows:  
PLQP0144KA-A: 144P6Q-A  
2. “8 Kbytes” in the ROM capacity indicates the data flash capacity.  
2
3. Contact a Renesas Electronics sales office to use the non-E dataFlash version or the L version  
products.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 4 of 115  
R32C/156 Group  
1. Overview  
Part Number  
R5 F 64 56 3 J XXX FD  
Package Code  
FD : PLQP0144KA-A  
ROM Number  
Omitted in the flash memory version  
Temperature Code  
J : -40°C to 85°C  
L : -40°C to 105°C  
K : -40°C to 125°C  
ROM/RAM/E2dataFlash Capacity  
1 : 256 KB/20 KB/4 KB  
2 : 384 KB/24 KB/4 KB  
3 : 512 KB/32 KB/4 KB  
F : 256 KB/20 KB/none  
G : 384 KB/24 KB/none  
H : 512 KB/32 KB/none  
R32C/156 Group  
R32C/100 Series  
Memory Type  
F : Flash memory version  
Figure 1.1  
Part Numbering  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 5 of 115  
R32C/156 Group  
1. Overview  
1.3  
Block Diagram  
Figure 1.2 shows a block diagram of the R32C/156 Group.  
8
8
8
8
8
8
8
Port P0  
Port P1  
Port P2  
Port P3  
Port P4  
Port P5  
Port P6  
Peripherals  
Timer:  
Timer A 16 bits × 5 timers  
Timer B 16 bits × 6 timers  
A/D converter:  
10 bits × 1 circuit  
34 inputs  
Clock generator:  
4 circuits  
- XIN-XOUT  
- XCIN-XCOUT  
- On-chip oscillator  
- PLL frequency synthesizer  
Three-phase motor  
controller  
D/A converter:  
8 bits × 2 channels  
Serial interface:  
5 channels  
Watchdog timer:  
15 bits  
X-Y converter:  
16 bits × 16 bits  
Serial bus interface:  
3 channels  
DMAC  
CRC calculator (CCITT)  
X16 + X12 + X5 + 1  
DMAC II  
CAN Module:  
2 channels  
Memory  
ROM  
R32C/100 Series CPU Core  
LIN Module:  
4 channels  
R2R0  
R2R0  
FLG  
INTB  
ISP  
USP  
PC  
SVF  
SVP  
VCT  
R3R1  
R6R4  
RAM  
R7R5  
Intelligent I/O  
Time measurement: 32  
Wave generation: 32  
A0  
A1  
Multiplier  
A2  
A3  
FB  
E2dataFlash  
SB  
Floating-point unit  
Port P15  
P14_1  
Port P14  
Port P13  
Port P12  
Port P11  
8
4
8
8
5
Figure 1.2  
R32C/156 Group Block Diagram  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 6 of 115  
R32C/156 Group  
1. Overview  
1.4  
Pin Assignment  
Figure 1.3 shows the pin assignment (top view) and Tables 1.4 to 1.7 show the pin characteristics.  
109  
110  
111  
112  
113  
114  
115  
116  
117  
118  
119  
120  
121  
122  
123  
124  
125  
126  
127  
128  
129  
130  
131  
132  
133  
134  
135  
136  
137  
138  
139  
140  
141  
142  
143  
144  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
SSO0 / IIO0_0 / IIO1_0 / AN15_0 / P1_0  
P4_4 / IIO1_4 / SSO1 / LIN0OUT  
P4_5 / IIO1_5 / SSCK1 / LIN0IN  
P4_6 / IIO1_6 / SSI1 / LIN1OUT  
P4_7 / IIO1_7 / SCS1 / LIN1IN  
P12_5 / IIO2_5 / SSCK0  
P12_6 / IIO2_6 / SSI0  
P12_7 / IIO2_7 / SCS0  
P5_0 / IIO0_0  
AN0_7 / P0_7  
AN0_6 / P0_6  
AN0_5 / P0_5  
AN0_4 / P0_4  
TB3IN / P11_4  
IIO1_3 / P11_3  
IIO1_2 / P11_2  
IIO1_1 / P11_1  
P5_1 / IIO0_1  
IIO1_0 / P11_0  
P5_2 / IIO0_2  
AN0_3 / P0_3  
P5_3 / CLKOUT / IIO0_3  
P13_0 / INT0 / IIO3_0  
P13_1 / INT1 / IIO3_1  
VCC  
AN0_2 / P0_2  
AN0_1 / P0_1  
AN0_0 / P0_0  
IIO0_7 / CTS4 / RTS4 / AN15_7 / P15_7  
IIO0_6 / CLK4 / AN15_6 / P15_6  
IIO0_5 / RXD4 / AN15_5 / P15_5  
IIO0_4 / TXD4 / AN15_4 / P15_4  
IIO0_3 / CTS3 / RTS3 / AN15_3 / P15_3  
IIO0_2 / RXD3 / AN15_2 / P15_2  
IIO0_1 / CLK3 / AN15_1 / P15_1  
VSS  
P13_2 / INT2 / IIO3_2  
VSS  
R32C/156 GROUP  
P13_3 / INT3 / IIO3_3  
P5_4 / IIO0_4 / SSO2  
P5_5 / IIO0_5 / SSCK2  
P5_6 / IIO0_6 / SSI2  
P5_7 / IIO0_7 / SCS2  
P13_4 / INT4 / IIO3_4  
P13_5 / INT5 / IIO3_5  
P13_6 / INT6 / IIO3_6  
P13_7 / INT7 / IIO3_7  
PLQP0144KA-A  
(144P6Q-A)  
(Top view)  
IIO0_0 / TXD3 / AN15_0 / P15_0  
VCC  
KI3 / AN_7 / P10_7  
KI2 / AN_6 / P10_6  
KI1 / AN_5 / P10_5  
KI0 / AN_4 / P10_4  
AN_3 / P10_3  
P6_0 / TB0IN / CTS0 / RTS0 / SS0 / SCS0  
P6_1 / TB1IN / CLK0 / SSCK0  
P6_2 / TB2IN / RXD0 / SCL0 / STXD0 / SSI0  
P6_3 / TB5IN / TXD0 / SDA0 / SRXD0 / SSO0  
P6_4 / CTS1 / RTS1 / SS1 / SCS1  
P6_5 / CLK1 / SSCK1  
AN_2 / P10_2  
AN_1 / P10_1  
AVSS  
VSS  
AN_0 / P10_0  
P6_6 / RXD1 / SCL1 / STXD1 / SSI1  
VCC  
VREF  
AVCC  
P6_7 / TXD1 / SDA1 / SRXD1 / SSO1  
P7_0 / TA0OUT / TXD2 / SDA2 / SRXD2 / IIO1_6 / SSO2  
RXD4 / TB2IN / ADTRG / P9_7  
(Note 1)  
Note:  
1. The position of pin number 1 varies by product. Refer to the index mark in attached “Package Dimensions”.  
Figure 1.3  
Pin Assignment (top view)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 7 of 115  
R32C/156 Group  
1. Overview  
Table 1.4  
Pin Characteristics (1/4)  
Pin Control  
Interrupt  
LIN /  
CAN Module Pin  
Analog  
Pin  
Port  
Timer Pin  
UART Pin  
TXD4  
Intelligent I/O Pin  
No.  
Pin  
Pin  
1
P9_6  
P9_5  
P9_4  
P9_3  
P9_2  
P9_1  
P9_0  
CAN1OUT  
ANEX1  
2
CLK4  
CAN1IN/CAN1WU ANEX0  
3
TB4IN  
TB3IN  
TB2IN  
TB1IN  
TB0IN  
CTS4/RTS4  
CTS3/RTS3  
TXD3  
DA1  
4
LIN3IN  
DA0  
5
LIN3OUT  
LIN2IN  
6
RXD3  
7
CLK3  
LIN2OUT  
8
P14_6 INT8  
P14_5 INT7  
P14_4 INT6  
P14_3  
9
10  
11  
12 VDC0  
13  
P14_1  
14 VDC1  
15 NSD  
16 CNVSS  
17 XCIN  
P8_7  
18 XCOUT P8_6  
19 RESET  
20 XOUT  
21 VSS  
22 XIN  
23 VCC  
24  
25  
26  
P8_5 NMI  
P8_4 INT2  
P8_3 INT1  
CAN0IN/CAN0WU/  
CAN1IN/CAN1WU  
27  
P8_2 INT0  
CAN0OUT/  
CAN1OUT  
28  
29  
30  
31  
32  
33  
34  
P8_1  
P8_0  
P7_7  
P7_6  
P7_5  
P7_4  
P7_3  
TA4IN/U  
CTS3/RTS3  
IIO1_5/UD0B/UD1B LIN1OUT  
UD0A/UD1A LIN1IN  
TA4OUT/U RXD3  
TA3IN  
CLK3  
TXD3  
RXD4  
IIO1_4/UD0B/UD1B CAN0IN/CAN0WU  
TA3OUT  
TA2IN/W  
IIO1_3/UD0A/UD1A CAN0OUT  
IIO1_2  
IIO1_1  
LIN0IN  
TA2OUT/W TXD4  
LIN0OUT  
TA1IN/V  
CTS2/RTS2/SS2/ IIO1_0  
SCS2  
35  
36  
P7_2  
P7_1  
TA1OUT/V CLK2/SSCK2  
TA0IN/  
TB5IN  
RXD2/SCL2/  
STXD2/SSI2  
IIO1_7  
IIO1_6  
37  
P7_0  
TA0OUT  
TXD2/SDA2/  
SRXD2/SSO2  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 8 of 115  
R32C/156 Group  
1. Overview  
Table 1.5  
Pin Characteristics (2/4)  
Pin Control  
Interrupt  
LIN /  
CAN Module Pin  
Analog  
Pin  
Port  
Timer Pin  
UART Pin  
Intelligent I/O Pin  
No.  
Pin  
Pin  
38  
P6_7  
TXD1/SDA1/  
SRXD1/SSO1  
39 VCC  
40  
P6_6  
RXD1/SCL1/  
STXD1/SSI1  
41 VSS  
42  
43  
P6_5  
P6_4  
CLK1/SSCK1  
CTS1/RTS1/SS1/  
SCS1  
44  
45  
P6_3  
P6_2  
TB5IN  
TB2IN  
TXD0/SDA0/  
SRXD0/SSO0  
RXD0/SCL0/  
STXD0/SSI0  
46  
47  
P6_1  
P6_0  
TB1IN  
TB0IN  
CLK0/SSCK0  
CTS0/RTS0/SS0/  
SCS0  
48  
P13_7 INT7  
P13_6 INT6  
P13_5 INT5  
P13_4 INT4  
P5_7  
IIO3_7  
IIO3_6  
IIO3_5  
IIO3_4  
IIO0_7  
IIO0_6  
IIO0_5  
IIO0_4  
IIO3_3  
49  
50  
51  
52  
SCS2  
SSI2  
53  
P5_6  
54  
P5_5  
SSCK2  
SSO2  
55  
P5_4  
56  
P13_3 INT3  
57 VSS  
58  
P13_2 INT2  
IIO3_2  
59 VCC  
60  
P13_1 INT1  
P13_0 INT0  
IIO3_1  
IIO3_0  
IIO0_3  
IIO0_2  
IIO0_1  
IIO0_0  
IIO2_7  
IIO2_6  
IIO2_5  
IIO1_7  
IIO1_6  
IIO1_5  
IIO1_4  
61  
62 CLKOUT P5_3  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
P5_2  
P5_1  
P5_0  
P12_7  
P12_6  
P12_5  
P4_7  
P4_6  
P4_5  
P4_4  
SCS0  
SSI0  
SSCK0  
SCS1  
SSI1  
LIN1IN  
LIN1OUT  
LIN0IN  
SSCK1  
SSO1  
LIN0OUT  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 9 of 115  
R32C/156 Group  
1. Overview  
Table 1.6  
Pin Characteristics (3/4)  
Pin Control  
Interrupt  
LIN /  
CAN Module Pin  
Analog  
Pin  
Port  
Timer Pin  
UART Pin  
TXD3  
Intelligent I/O Pin  
IIO1_3  
No.  
Pin  
Pin  
73  
P4_3  
74 VCC  
75  
P4_2  
RXD3  
IIO1_2  
76 VSS  
77  
78  
79  
P4_1  
P4_0  
P3_7  
CLK3  
IIO1_1  
IIO1_0  
CTS3/RTS3  
CTS4/RTS4  
TA4IN/  
TB1IN/U  
80  
81  
P3_6  
P3_5  
TA4OUT/U TXD4  
TA2IN/  
RXD4  
TB0IN/W  
82  
P3_4  
TA2OUT/W CLK4  
TA1IN/V  
TA1OUT/V  
TA3OUT  
SSO0  
83  
P3_3  
LIN0IN/LIN1IN  
LIN0OUT/LIN1OUT  
LIN0IN  
84  
P3_2  
85  
P3_1  
UD0B/UD1B  
IIO2_4  
86  
P12_4  
P12_3  
P12_2  
P12_1  
P12_0  
87  
SCS1  
IIO2_3  
88  
SSI1  
IIO2_2  
89  
SSCK1  
IIO2_1  
90  
SSO1  
IIO2_0  
91 VCC  
92  
P3_0  
TA0OUT  
UD0A/UD1A  
LIN0OUT  
93 VSS  
94  
P2_7  
P2_6  
P2_5  
P2_4  
P2_3  
P2_2  
P2_1  
P2_0  
AN2_7  
AN2_6  
AN2_5  
AN2_4  
AN2_3  
AN2_2  
AN2_1  
AN2_0  
AN15_7  
AN15_6  
AN15_5  
AN15_4  
AN15_3  
AN15_2  
AN15_1  
95  
96  
97  
98  
99  
100  
101  
102  
103  
104  
105  
106  
107  
108  
P1_7 INT5  
P1_6 INT4  
P1_5 INT3  
P1_4  
IIO0_7/IIO1_7  
IIO0_6/IIO1_6  
IIO0_5/IIO1_5  
IIO0_4/IIO1_4  
IIO0_3/IIO1_3  
IIO0_2/IIO1_2  
IIO0_1/IIO1_1  
TB0IN  
SCS0  
SSI0  
P1_3  
P1_2  
P1_1  
SSCK0  
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Aug 07, 2013  
Page 10 of 115  
R32C/156 Group  
1. Overview  
Table 1.7  
Pin Characteristics (4/4)  
Pin Control  
Interrupt  
LIN /  
CAN Module Pin  
Analog  
Pin  
Port  
Timer Pin  
UART Pin  
SSO0  
Intelligent I/O Pin  
IIO0_0/IIO1_0  
No.  
109  
110  
111  
112  
113  
114  
115  
116  
117  
118  
119  
120  
121  
122  
123  
124  
125  
126  
127  
128  
129  
Pin  
Pin  
P1_0  
AN15_0  
AN0_7  
AN0_6  
AN0_5  
AN0_4  
P0_7  
P0_6  
P0_5  
P0_4  
P11_4  
P11_3  
P11_2  
P11_1  
P11_0  
P0_3  
TB3IN  
IIO1_3  
IIO1_2  
IIO1_1  
IIO1_0  
AN0_3  
P0_2  
AN0_2  
P0_1  
AN0_1  
P0_0  
AN0_0  
P15_7  
P15_6  
P15_5  
P15_4  
P15_3  
P15_2  
P15_1  
CTS4/RTS4  
CLK4  
IIO0_7  
IIO0_6  
IIO0_5  
IIO0_4  
IIO0_3  
IIO0_2  
IIO0_1  
AN15_7  
AN15_6  
AN15_5  
AN15_4  
AN15_3  
AN15_2  
AN15_1  
RXD4  
TXD4  
CTS3/RTS3  
RXD3  
CLK3  
130 VSS  
131  
P15_0  
TXD3  
IIO0_0  
AN15_0  
132 VCC  
133  
P10_7 KI3  
P10_6 KI2  
P10_5 KI1  
P10_4 KI0  
P10_3  
AN_7  
AN_6  
AN_5  
AN_4  
AN_3  
AN_2  
AN_1  
134  
135  
136  
137  
138  
P10_2  
139  
P10_1  
140 AVSS  
141  
P10_0  
P9_7  
AN_0  
142 VREF  
143 AVCC  
144  
TB2IN  
RXD4  
ADTRG  
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Aug 07, 2013  
Page 11 of 115  
R32C/156 Group  
1. Overview  
1.5  
Pin Definitions and Functions  
Table 1.8 to Table 1.10 show the pin definitions and functions.  
Table 1.8  
Function  
Pin Definitions and Functions (1/3)  
Symbol  
VCC, VSS  
I/O  
I
Description  
Power supply  
Applicable as follows: VCC = 3.0 to 5.5 V, VSS = 0 V  
Analog power  
supply  
AVCC, AVSS  
Power supply for the A/D converter. AVCC and AVSS  
should be connected to VCC and VSS, respectively  
I
Connecting pins VDC0, VDC1  
for decoupling  
A decoupling capacitor for internal voltage should be  
connected between VDC0 and VDC1  
capacitor  
Reset input  
CNVSS  
RESET  
CNVSS  
NSD  
I
I
The MCU is reset when this pin is driven low  
This pin should be connected to VSS via a resistor  
Debug port  
This pin is to communicate with a debugger. It should be  
connected to VCC via a resistor of 1 to 4.7 k  
I/O  
Main clock input XIN  
Input/output for the main clock oscillator. A crystal, or a  
ceramic resonator should be connected between pins  
XIN and XOUT. An external clock should be input at the  
XIN while leaving the XOUT open  
I
Main clock output XOUT  
O
I
Sub clock input  
Sub clock output XCOUT  
Clock output CLKOUT  
XCIN  
Input/output for the sub clock oscillator. A crystal  
oscillator should be connected between pins XCIN and  
XCOUT. An external clock should be input at the XCIN  
while leaving the XCOUT open  
O
O
Output of the clock with the same frequency as low  
speed clocks, f8, or f32  
External interrupt INT0 to INT8  
input  
Input for external interrupts  
I
NMI input  
P8_5/NMI  
I
I
Input for NMI  
Key input interrupt KI0 to KI3  
Input for the key input interrupt  
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Aug 07, 2013  
Page 12 of 115  
R32C/156 Group  
1. Overview  
Table 1.9  
Function  
I/O ports  
Pin Definitions and Functions (2/3)  
Symbol  
I/O  
Description  
P0_0 to P0_7,  
P1_0 to P1_7,  
P2_0 to P2_7,  
P3_0 to P3_7,  
P4_0 to P4_7,  
P5_0 to P5_7,  
P6_0 to P6_7,  
P7_0 to P7_7,  
P8_0 to P8_4,  
P8_6, P8_7,  
I/O ports in CMOS. Each port can be programmed to  
input or output under the control of the direction register.  
Pull-up resistors are selected for the following 4-pin  
units:Pi_0 to Pi_3 and Pi_4 to Pi_7 (i = 0 to 15); however,  
they are enabled only for the input pins  
I/O  
P9_0 to P9_7,  
P10_0 to P10_7,  
P11_0 to P11_4,  
P12_0 to P12_7,  
P13_0 to P13_7,  
P14_3 to P14_6,  
P15_0 to P15_7  
Input port  
Timer A  
P14_1  
Input port in CMOS. Pull-up resistors are selectable for  
P14_1 and P14_3  
I
TA0OUT to TA4OUT I/O Timers A0 to A4 input/output  
TA0IN to TA4IN  
TB0IN to TB5IN  
U, U, V, V, W, W  
I
I
Timers A0 to A4 input  
Timer B  
Timers B0 to B5 input  
Three-phase  
motor control  
timer output  
Three-phase motor control timer output  
O
Serial interface  
CTS0 to CTS4  
RTS0 to RTS4  
CLK0 to CLK4  
RXD0 to RXD4  
TXD0 to TXD4  
SDA0 to SDA2  
SCL0 to SCL2  
STXD0 to STXD2  
SRXD0 to SRXD2  
SS0 to SS2  
I
Handshake input  
Handshake output  
O
I/O Transmit/receive clock input/output  
I
Serial data input  
Serial data output  
O
2
I/O Serial data input/output  
I C-bus  
(simplified)  
I/O Transmit/receive clock input/output  
Serial interface  
special functions  
O
I
Serial data output in slave mode  
Serial data input in slave mode  
I
Input to control serial interface special functions  
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Aug 07, 2013  
Page 13 of 115  
R32C/156 Group  
1. Overview  
Table 1.10  
Function  
Pin Definitions and Functions (3/3)  
Symbol  
I/O  
Description  
A/D converter  
AN_0 to AN_7,  
Analog input for the A/D converter  
AN0_0 to AN0_7,  
AN2_0 to AN2_7,  
AN15_0 to AN15_7  
I
ADTRG  
I
External trigger input for the A/D converter  
ANEX0  
Expanded analog input for the A/D converter and output  
in external op-amp connection mode  
I/O  
ANEX1  
I
Expanded analog input for the A/D converter  
Output for the D/A converter  
D/A converter  
DA0, DA1  
O
Referencevoltage VREF  
input  
Reference voltage input for the A/D converter and D/A  
converter  
I
Intelligent I/O  
IIO0_0 to IIO0_7  
Input/output for Intelligent I/O group 0. Either input  
capture or output compare is selectable  
I/O  
I/O  
I/O  
I/O  
I
IIO1_0 to IIO1_7  
IIO2_0 to IIO2_7  
IIO3_0 to IIO3_7  
Input/output for Intelligent I/O group 1. Either input  
capture or output compare is selectable  
Input/output for Intelligent I/O group 2. Either input  
capture or output compare is selectable  
Input/output for Intelligent I/O group 3. Either input  
capture or output compare is selectable  
UD0A, UD1A,  
UD0B, UD1B  
Input for the two-phase encoder  
Serial bus  
interface  
SSO0 to SSO2  
Serial data output. Functions as serial data input/output  
in 4-wire serial bus mode  
I/O  
I/O  
SSI0 to SSI2  
Serial data input. Functions as serial data input/output in  
4-wire serial bus mode  
SSCK0 to SSCK2  
I/O Transmit/receive clock input/output  
SCS0 to SCS2  
I/O Input/output to control the synchronous serial interface  
LIN module  
LIN0OUT to  
LIN3OUT  
Transmit data output for the LIN communications  
O
LIN0IN to LIN3IN  
CAN0IN, CAN1IN  
I
I
Receive data input for the LIN communications  
Receive data input for the CAN communications  
Transmit data output for the CAN communications  
CAN module  
CAN0OUT,  
CAN1OUT  
O
I
CAN0WU, CAN1WU  
Input for the CAN wake-up interrupt  
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R32C/156 Group  
2. Central Processing Unit (CPU)  
2. Central Processing Unit (CPU)  
The CPU contains the registers shown below. There are two register banks each consisting of registers  
R2R0, R3R1, R6R4, R7R5, A0 to A3, SB, and FB.  
General purpose  
registers  
b31  
b23  
b15  
b7  
b0  
R2R0  
R3R1  
R6R4  
R7R5  
R2H  
R2L  
R3L  
R0H  
R1H  
R0L  
R1L  
R3H  
Data registers (1)  
R6  
R7  
R4  
R5  
A0  
A1  
A2  
A3  
SB  
FB  
Address registers (1)  
Static base register (1)  
Frame base register (1)  
USP  
ISP  
User stack pointer  
Interrupt stack pointer  
Interrupt vector table base register  
Program counter  
INTB  
PC  
FLG  
Flag register  
b31  
b24 b23  
b16 b15  
b8 b7  
b0  
RND  
IPL  
U I O B S Z D C  
DP  
FU  
FO  
Blank spaces are reserved.  
b31  
b31  
b0  
Fast interrupt  
registers  
SVF  
SVP  
VCT  
Save flag register  
Save PC register  
Vector register  
b23  
b0  
DMAC-associated  
registers (2)  
DMD0  
DMA mode register  
DCT0  
DMA terminal count register  
DMA terminal count reload register  
DMA source address register  
DMA source address reload register  
DMA destination address register  
DCR0  
DSA0  
DSR0  
DDA0  
DDR0  
DMA destination address reload register  
Notes:  
1.There are two banks of these registers.  
2.There are four identical sets of DMAC-associated registers.  
Figure 2.1  
CPU Registers  
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R32C/156 Group  
2. Central Processing Unit (CPU)  
2.1  
2.1.1  
General Purpose Registers  
Data Registers (R2R0, R3R1, R6R4, and R7R5)  
These 32-bit registers are primarily used for transfers and arithmetic/logic operations.  
Each of the registers can be divided into upper and lower 16-bit registers, e.g. R2R0 can be divided into  
R2 and R0, R3R1 can be divided into R3 and R1, etc.  
Moreover, data registers R2R0 and R3R1 can be divided into four 8-bit data registers: upper (R2H and  
R3H), mid-upper (R2L and R3L), mid-lower (R0H and R1H), and lower (R0L and R1L).  
2.1.2  
Address Registers (A0, A1, A2, and A3)  
These 32-bit registers have functions similar to data registers. They are also used for address register  
indirect addressing and address register relative addressing.  
2.1.3  
Static Base Register (SB)  
This 32-bit register is used for SB relative addressing.  
2.1.4  
Frame Base Register (FB)  
This 32-bit register is used for FB relative addressing.  
2.1.5  
Program Counter (PC)  
This 32-bit counter indicates the address of the instruction to be executed next.  
2.1.6  
Interrupt Vector Table Base Register (INTB)  
This 32-bit register indicates the start address of a relocatable vector table.  
2.1.7  
User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)  
Two types of 32-bit stack pointers (SPs) are provided: user stack pointer (USP) and interrupt stack  
pointer (ISP).  
Use the stack pointer select flag (U flag) to select either the user stack pointer (USP) or the interrupt  
stack pointer (ISP). The U flag is bit 7 in the flag register (FLG). Refer to 2.1.8 “Flag Register (FLG)” for  
details.  
To minimize the overhead of interrupt sequence due to less memory access, set the user stack pointer  
(USP) or the interrupt stack pointer (ISP) to a multiple of 4.  
2.1.8  
Flag Register (FLG)  
This 32-bit register indicates the CPU status.  
2.1.8.1  
Carry Flag (C flag)  
This flag retains a carry, borrow, or shifted-out bit generated by the arithmetic logic unit (ALU).  
2.1.8.2  
Debug Flag (D flag)  
This flag is only for debugging. Only set this bit to 0.  
2.1.8.3  
Zero Flag (Z flag)  
This flag becomes 1 when the result of an operation is 0; otherwise it is 0.  
2.1.8.4  
Sign Flag (S flag)  
This flag becomes 1 when the result of an operation is a negative value; otherwise it is 0.  
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R32C/156 Group  
2. Central Processing Unit (CPU)  
2.1.8.5  
Register Bank Select Flag (B flag)  
This flag selects a register bank. It indicates 0 when register bank 0 is selected, and 1 when register  
bank 1 is selected.  
2.1.8.6  
Overflow Flag (O flag)  
This flag becomes 1 when the result of an operation overflows; otherwise it is 0.  
2.1.8.7  
Interrupt Enable Flag (I flag)  
This flag enables maskable interrupts. To disable maskable interrupts, set this flag to 0. To enable  
them, set this flag to 1. When an interrupt is accepted, the flag becomes 0.  
2.1.8.8  
Stack Pointer Select Flag (U flag)  
To select the interrupt stack pointer (ISP), set this flag to 0. To select the user stack pointer (USP), set  
this flag to 1.  
It becomes 0 when a hardware interrupt is accepted or when an INT instruction designated by a  
software interrupt number from 0 to 127 is executed.  
2.1.8.9  
Floating-point Underflow Flag (FU flag)  
This flag becomes 1 when an underflow occurs in a floating-point operation; otherwise it is 0. It also  
becomes 1 when the operand contains invalid numbers (subnormal numbers).  
2.1.8.10 Floating-point Overflow Flag (FO flag)  
This flag becomes 1 when an overflow occurs in a floating-point operation; otherwise it is 0. It also  
becomes 1 when the operand contains invalid numbers (subnormal numbers).  
2.1.8.11 Processor Interrupt Priority Level (IPL)  
The processor interrupt priority level (IPL), consisting of 3 bits, selects a processor interrupt priority  
level from level 0 to 7. An interrupt is enabled when the interrupt request level is higher than the  
selected IPL.  
When the processor interrupt priority level (IPL) is set to 111b (level 7), all interrupts are disabled.  
2.1.8.12 Fixed-point Radix Point Designation Bit (DP bit)  
This bit designates the radix point. It also specifies which portion of the fixed-point multiplication result  
to extract. It is used for the MULX instruction.  
2.1.8.13 Floating-point Rounding Mode (RND)  
The 2-bit floating-point rounding mode selects a rounding mode for floating-point calculation results.  
2.1.8.14 Reserved  
Only set this bit to 0. The read value is undefined.  
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Aug 07, 2013  
Page 17 of 115  
R32C/156 Group  
2. Central Processing Unit (CPU)  
2.2  
Fast Interrupt Registers  
The following three registers are provided to minimize the overhead of the interrupt sequence.  
2.2.1  
Save Flag Register (SVF)  
This 32-bit register is used to save the flag register when a fast interrupt occurs.  
2.2.2  
Save PC Register (SVP)  
This 32-bit register is used to save the program counter when a fast interrupt occurs.  
2.2.3  
Vector Register (VCT)  
This 32-bit register is used to indicate a jump address when a fast interrupt occurs.  
2.3  
DMAC-associated Registers  
There are seven types of DMAC-associated registers.  
2.3.1  
DMA Mode Registers (DMD0, DMD1, DMD2, and DMD3)  
These 32-bit registers are used to set DMA transfer mode, bit rate, etc.  
2.3.2  
DMA Terminal Count Registers (DCT0, DCT1, DCT2, and DCT3)  
These 24-bit registers are used to set the number of DMA transfers.  
2.3.3  
DMA Terminal Count Reload Registers (DCR0, DCR1, DCR2, and DCR3)  
These 24-bit registers are used to set the reloaded values for DMA terminal count registers.  
2.3.4  
DMA Source Address Registers (DSA0, DSA1, DSA2, and DSA3)  
These 32-bit registers are used to set DMA source addresses.  
2.3.5  
DMA Source Address Reload Registers (DSR0, DSR1, DSR2, and DSR3)  
These 32-bit registers are used to set the reloaded values for DMA source address registers.  
2.3.6  
DMA Destination Address Registers (DDA0, DDA1, DDA2, and DDA3)  
These 32-bit registers are used to set DMA destination addresses.  
2.3.7  
DMA Destination Address Reload Registers (DDR0, DDR1, DDR2, and  
DDR3)  
These 32-bit registers are used to set reloaded values for DMA destination address registers.  
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Page 18 of 115  
R32C/156 Group  
3. Memory  
3. Memory  
Figure 3.1 shows the memory map of the R32C/156 Group.  
The R32C/156 Group provides a 4-Gbyte address space from 00000000h to FFFFFFFFh.  
The internal ROM is mapped from address FFFFFFFFh in the inferior direction. For example, the 512-Kbyte  
internal ROM is mapped from FFF80000h to FFFFFFFFh.  
The fixed interrupt vector table contains the start address of interrupt handlers and is mapped from  
FFFFFFDCh to FFFFFFFFh.  
The internal RAM is mapped from address 00000400h in the superior direction. For example, the 32-Kbyte  
internal RAM is mapped from 00000400h to 000083FFh. Besides being used for data storage, the internal  
RAM functions as a stack(s) for subroutine calls and/or interrupt handlers.  
Special function registers (SFRs), which are control registers for peripheral functions, are mapped from  
00000000h to 000003FFh, and from 00040000h to 0004FFFFh. Unoccupied SFR locations are reserved,  
and no access is allowed.  
00000000h  
SFR1  
00000400h  
Internal RAM  
Internal RAM  
XXXXXXXXh  
Capacity XXXXXXXXh  
20 Kbytes 00005400h  
24 Kbytes 00006400h  
32 Kbytes 00008400h  
Reserved  
00040000h  
00050000h  
00060000h  
SFR2  
Reserved  
Internal ROM  
(Data space) (1)  
FFFFFFDCh  
Undefined instruction  
Overflow  
00062000h  
Internal ROM  
Capacity YYYYYYYYh  
256 Kbytes FFFC0000h  
384 Kbytes FFFA0000h  
512 Kbytes FFF80000h  
BRK instruction  
Reserved  
Reserved  
Reserved  
Watchdog timer (2)  
Reserved  
YYYYYYYYh  
FFFFFFFFh  
NMI  
Internal ROM  
Reset  
FFFFFFFFh  
Notes:  
1. The flash memory version provides two additional 4-Kbyte spaces (blocks A and B) for storing data.  
2. The watchdog timer interrupt shares a vector with the oscillator stop detection interrupt and low voltage  
detection interrupt.  
Figure 3.1  
Memory Map  
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R32C/156 Group  
4. Special Function Registers (SFRs)  
4. Special Function Registers (SFRs)  
SFRs are memory-mapped peripheral registers that control the operation of peripherals. Table 4.1 SFR List  
(1) to Table 4.58 SFR List (58) list the SFR details.  
Table 4.1  
Address  
000000h  
000001h  
000002h  
000003h  
SFR List (1)  
Register  
Symbol  
Reset Value  
000004h Clock Control Register  
000005h  
CCR  
0001 1000b  
000006h Flash Memory Control Register  
000007h Protect Release Register  
FMCR  
PRR  
0000 0001b  
00h  
000008h  
000009h  
00000Ah  
00000Bh  
00000Ch  
00000Dh  
00000Eh  
00000Fh  
000010h  
000011h  
000012h  
000013h  
000014h  
000015h  
000016h  
000017h  
000018h  
000019h  
00001Ah  
00001Bh  
00001Ch Flash Memory Rewrite Bus Control Register  
00001Dh  
00001Eh Peripheral Bus Control Register  
FEBC  
PBC  
0000h  
0504h  
00001Fh  
000020h to  
00005Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
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Page 20 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.2  
Address  
SFR List (2)  
Register  
Symbol  
Reset Value  
XXXX X000b  
XXXX X000b  
000060h  
000061h Timer B5 Interrupt Control Register  
000062h  
000063h UART2 Receive/ACK Interrupt Control Register  
TB5IC  
S2RIC  
000064h  
000065h  
000066h  
000067h  
000068h DMA0 Transfer Complete Interrupt Control Register  
000069h UART0 START Condition/STOP Condition Detection Interrupt BCN0IC  
Control Register  
DM0IC  
XXXX X000b  
XXXX X000b  
00006Ah DMA2 Transfer Complete Interrupt Control Register  
00006Bh A/D Converter 0 Convert Completion Interrupt Control Register  
00006Ch Timer A0 Interrupt Control Register  
00006Dh Intelligent I/O Interrupt Control Register 0  
00006Eh Timer A2 Interrupt Control Register  
00006Fh Intelligent I/O Interrupt Control Register 2  
000070h Timer A4 Interrupt Control Register  
000071h Intelligent I/O Interrupt Control Register 4  
000072h UART0 Receive/ACK Interrupt Control Register  
000073h Intelligent I/O Interrupt Control Register 6  
000074h UART1 Receive/ACK Interrupt Control Register  
000075h Intelligent I/O Interrupt Control Register 8  
000076h Timer B1 Interrupt Control Register  
000077h Intelligent I/O Interrupt Control Register 10  
000078h Timer B3 Interrupt Control Register  
000079h  
DM2IC  
AD0IC  
TA0IC  
IIO0IC  
TA2IC  
IIO2IC  
TA4IC  
IIO4IC  
S0RIC  
IIO6IC  
S1RIC  
IIO8IC  
TB1IC  
IIO10IC  
TB3IC  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
00007Ah INT5 Interrupt Control Register  
00007Bh CAN0 Wake-up Interrupt Control Register  
00007Ch INT3 Interrupt Control Register  
00007Dh  
INT5IC  
C0WIC  
INT3IC  
XX00 X000b  
XXXX X000b  
XX00 X000b  
00007Eh INT1 Interrupt Control Register  
00007Fh LIN Low Detection Interrupt Control Register  
000080h  
INT1IC  
LLDIC  
XX00 X000b  
XXXX X000b  
000081h UART2 Transmit/NACK Interrupt Control Register  
000082h  
000083h  
000084h  
000085h  
S2TIC  
XXXX X000b  
XXXX X000b  
000086h  
000087h UART2 START Condition/STOP Condition Detection Interrupt BCN2IC  
Control Register  
X: Undefined  
Blanks are reserved. No access is allowed.  
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R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.3  
SFR List (3)  
Address  
Register  
Symbol  
DM1IC  
Reset Value  
XXXX X000b  
000088h DMA1 Transfer Complete Interrupt Control Register  
000089h UART1 START Condition/STOP Condition Detection Interrupt BCN1IC  
Control Register  
XXXX X000b  
00008Ah DMA3 Transfer Complete Interrupt Control Register  
00008Bh Key Input Interrupt Control Register  
00008Ch Timer A1 Interrupt Control Register  
00008Dh Intelligent I/O Interrupt Control Register 1  
00008Eh Timer A3 Interrupt Control Register  
00008Fh Intelligent I/O Interrupt Control Register 3  
000090h UART0 Transmit/NACK Interrupt Control Register  
000091h Intelligent I/O Interrupt Control Register 5  
000092h UART1 Transmit/NACK Interrupt Control Register  
000093h Intelligent I/O Interrupt Control Register 7  
000094h Timer B0 Interrupt Control Register  
000095h Intelligent I/O Interrupt Control Register 9  
000096h Timer B2 Interrupt Control Register  
000097h Intelligent I/O Interrupt Control Register 11  
000098h Timer B4 Interrupt Control Register  
000099h  
DM3IC  
KUPIC  
TA1IC  
IIO1IC  
TA3IC  
IIO3IC  
S0TIC  
IIO5IC  
S1TIC  
IIO7IC  
TB0IC  
IIO9IC  
TB2IC  
IIO11IC  
TB4IC  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
00009Ah INT4 Interrupt Control Register  
00009Bh CAN1 Wake-up Interrupt Control Register  
00009Ch INT2 Interrupt Control Register  
00009Dh  
INT4IC  
C1WIC  
INT2IC  
XX00 X000b  
XXXX X000b  
XX00 X000b  
00009Eh INT0 Interrupt Control Register  
00009Fh  
INT0IC  
XX00 X000b  
0000A0h Intelligent I/O Interrupt Request Register 0  
0000A1h Intelligent I/O Interrupt Request Register 1  
0000A2h Intelligent I/O Interrupt Request Register 2  
0000A3h Intelligent I/O Interrupt Request Register 3  
0000A4h Intelligent I/O Interrupt Request Register 4  
0000A5h Intelligent I/O Interrupt Request Register 5  
0000A6h Intelligent I/O Interrupt Request Register 6  
0000A7h Intelligent I/O Interrupt Request Register 7  
0000A8h Intelligent I/O Interrupt Request Register 8  
0000A9h Intelligent I/O Interrupt Request Register 9  
0000AAh Intelligent I/O Interrupt Request Register 10  
0000ABh Intelligent I/O Interrupt Request Register 11  
0000ACh  
IIO0IR  
IIO1IR  
IIO2IR  
IIO3IR  
IIO4IR  
IIO5IR  
IIO6IR  
IIO7IR  
IIO8IR  
IIO9IR  
IIO10IR  
IIO11IR  
0000 0XX1b  
0000 0XX1b  
0000 0X01b  
0000 XXX1b  
000X XXX1b  
0000 XXX1b  
0000 XXX1b  
000X XXX1b  
000X XXX1b  
0X00 XXX1b  
0X00 XXX1b  
0X0X XXX1b  
0000ADh  
0000AEh  
0000AFh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 22 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.4  
SFR List (4)  
Address  
Register  
Symbol  
Reset Value  
0000B0h Intelligent I/O Interrupt Enable Register 0  
0000B1h Intelligent I/O Interrupt Enable Register 1  
0000B2h Intelligent I/O Interrupt Enable Register 2  
0000B3h Intelligent I/O Interrupt Enable Register 3  
0000B4h Intelligent I/O Interrupt Enable Register 4  
0000B5h Intelligent I/O Interrupt Enable Register 5  
0000B6h Intelligent I/O Interrupt Enable Register 6  
0000B7h Intelligent I/O Interrupt Enable Register 7  
0000B8h Intelligent I/O Interrupt Enable Register 8  
0000B9h Intelligent I/O Interrupt Enable Register 9  
0000BAh Intelligent I/O Interrupt Enable Register 10  
0000BBh Intelligent I/O Interrupt Enable Register 11  
IIO0IE  
IIO1IE  
IIO2IE  
IIO3IE  
IIO4IE  
IIO5IE  
IIO6IE  
IIO7IE  
IIO8IE  
IIO9IE  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
IIO10IE  
IIO11IE  
0000BCh  
0000BDh  
0000BEh  
0000BFh  
0000C0h Serial Bus Interface 0 Interrupt Control Register  
0000C1h CAN0 Transmit Interrupt Control Register  
0000C2h Serial Bus Interface 2 Interrupt Control Register  
0000C3h CAN0 Error Interrupt Control Register  
SS0IC  
C0TIC  
SS2IC  
C0EIC  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
0000C4h  
0000C5h CAN1 Receive Interrupt Control Register  
C1RIC  
XXXX X000b  
0000C6h  
0000C7h  
0000C8h  
0000C9h  
0000CAh  
0000CBh  
0000CCh  
0000CDh  
0000CEh  
0000CFh  
0000D0h CAN0 Transmit FIFO Interrupt Control Register  
0000D1h  
0000D2h CAN1 Transmit FIFO Interrupt Control Register  
C0FTIC  
C1FTIC  
XXXX X000b  
XXXX X000b  
0000D3h  
0000D4h  
0000D5h LIN0 Interrupt Control Register  
0000D6h  
L0IC  
XXXX X000b  
0000D7h LIN2 Interrupt Control Register  
L2IC  
E2FIC  
XXXX X000b  
XXXX X000b  
E2dataFlash Interrupt Control Register  
0000D8h  
0000D9h  
0000DAh  
0000DBh  
0000DCh  
0000DDh UART3 Transmit Interrupt Control Register  
0000DEh INT7 Interrupt Control Register  
0000DFh UART4 Transmit Interrupt Control Register  
X: Undefined  
S3TIC  
INT7IC  
S4TIC  
XXXX X000b  
XX00 X000b  
XXXX X000b  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 23 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.5  
SFR List (5)  
Address  
Register  
Symbol  
SS1IC  
Reset Value  
XXXX X000b  
0000E0h Serial Bus Interface 1 Interrupt Control Register  
0000E1h CAN0 Receive Interrupt Control Register  
0000E2h  
0000E3h CAN1 Transmit Interrupt Control Register  
0000E4h  
C0RIC  
C1TIC  
C1EIC  
XXXX X000b  
XXXX X000b  
XXXX X000b  
0000E5h CAN1 Error Interrupt Control Register  
0000E6h  
0000E7h  
0000E8h  
0000E9h  
0000EAh  
0000EBh  
0000ECh  
0000EDh  
0000EEh  
0000EFh  
0000F0h CAN0 Receive FIFO Interrupt Control Register  
0000F1h  
0000F2h CAN1 Receive FIFO Interrupt Control Register  
C0FRIC  
C1FRIC  
XXXX X000b  
XXXX X000b  
0000F3h  
0000F4h  
0000F5h LIN1 Interrupt Control Register  
0000F6h  
0000F7h LIN3 Interrupt Control Register  
0000F8h  
L1IC  
L3IC  
XXXX X000b  
XXXX X000b  
0000F9h  
0000FAh  
0000FBh  
0000FCh INT8 Interrupt Control Register  
0000FDh UART3 Receive Interrupt Control Register  
0000FEh INT6 Interrupt Control Register  
0000FFh UART4 Receive Interrupt Control Register  
INT8IC  
S3RIC  
INT6IC  
S4RIC  
XX00 X000b  
XXXX X000b  
XX00 X000b  
XXXX X000b  
XXXXh  
000100h Group 1 Time Measurement/Waveform Generation Register 0 G1TM0/G1PO0  
000101h  
000102h Group 1 Time Measurement/Waveform Generation Register 1 G1TM1/G1PO1  
000103h  
000104h Group 1 Time Measurement/Waveform Generation Register 2 G1TM2/G1PO2  
000105h  
XXXXh  
XXXXh  
XXXXh  
000106h Group 1 Time Measurement/Waveform Generation Register 3 G1TM3/G1PO3  
000107h  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 24 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.6  
SFR List (6)  
Address  
Register  
Symbol  
Reset Value  
XXXXh  
000108h Group 1 Time Measurement/Waveform Generation Register 4 G1TM4/G1PO4  
000109h  
00010Ah Group 1 Time Measurement/Waveform Generation Register 5 G1TM5/G1PO5  
00010Bh  
00010Ch Group 1 Time Measurement/Waveform Generation Register 6 G1TM6/G1PO6  
00010Dh  
00010Eh Group 1 Time Measurement/Waveform Generation Register 7 G1TM7/G1PO7  
00010Fh  
XXXXh  
XXXXh  
XXXXh  
000110h Group 1 Waveform Generation Control Register 0  
000111h Group 1 Waveform Generation Control Register 1  
000112h Group 1 Waveform Generation Control Register 2  
000113h Group 1 Waveform Generation Control Register 3  
000114h Group 1 Waveform Generation Control Register 4  
000115h Group 1 Waveform Generation Control Register 5  
000116h Group 1 Waveform Generation Control Register 6  
000117h Group 1 Waveform Generation Control Register 7  
000118h Group 1 Time Measurement Control Register 0  
000119h Group 1 Time Measurement Control Register 1  
00011Ah Group 1 Time Measurement Control Register 2  
00011Bh Group 1 Time Measurement Control Register 3  
00011Ch Group 1 Time Measurement Control Register 4  
00011Dh Group 1 Time Measurement Control Register 5  
00011Eh Group 1 Time Measurement Control Register 6  
00011Fh Group 1 Time Measurement Control Register 7  
000120h Group 1 Base Timer Register  
000121h  
G1POCR0  
G1POCR1  
G1POCR2  
G1POCR3  
G1POCR4  
G1POCR5  
G1POCR6  
G1POCR7  
G1TMCR0  
G1TMCR1  
G1TMCR2  
G1TMCR3  
G1TMCR4  
G1TMCR5  
G1TMCR6  
G1TMCR7  
G1BT  
0000 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
XXXXh  
000122h Group 1 Base Timer Control Register 0  
000123h Group 1 Base Timer Control Register 1  
000124h Group 1 Time Measurement Prescaler Register 6  
000125h Group 1 Time Measurement Prescaler Register 7  
000126h Group 1 Function Enable Register  
000127h Group 1 Function Select Register  
000128h  
G1BCR0  
G1BCR1  
G1TPR6  
G1TPR7  
G1FE  
0000 0000b  
0000 0000b  
00h  
00h  
00h  
G1FS  
00h  
000129h  
00012Ah  
00012Bh  
00012Ch  
00012Dh  
00012Eh  
00012Fh  
000130h to  
00013Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 25 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.7  
SFR List (7)  
Address  
Register  
Symbol  
Reset Value  
XXXXh  
000140h Group 2 Time Measurement/Waveform Generation Register 0 G2TM0/G2PO0  
000141h  
000142h Group 2 Time Measurement/Waveform Generation Register 1 G2TM1/G2PO1  
000143h  
000144h Group 2 Time Measurement/Waveform Generation Register 2 G2TM2/G2PO2  
000145h  
000146h Group 2 Time Measurement/Waveform Generation Register 3 G2TM3/G2PO3  
000147h  
000148h Group 2 Time Measurement/Waveform Generation Register 4 G2TM4/G2PO4  
000149h  
00014Ah Group 2 Time Measurement/Waveform Generation Register 5 G2TM5/G2PO5  
00014Bh  
00014Ch Group 2 Time Measurement/Waveform Generation Register 6 G2TM6/G2PO6  
00014Dh  
00014Eh Group 2 Time Measurement/Waveform Generation Register 7 G2TM7/G2PO7  
00014Fh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
000150h Group 2 Waveform Generation Control Register 0  
000151h Group 2 Waveform Generation Control Register 1  
000152h Group 2 Waveform Generation Control Register 2  
000153h Group 2 Waveform Generation Control Register 3  
000154h Group 2 Waveform Generation Control Register 4  
000155h Group 2 Waveform Generation Control Register 5  
000156h Group 2 Waveform Generation Control Register 6  
000157h Group 2 Waveform Generation Control Register 7  
000158h Group 2 Time Measurement Control Register 0  
000159h Group 2 Time Measurement Control Register 1  
00015Ah Group 2 Time Measurement Control Register 2  
00015Bh Group 2 Time Measurement Control Register 3  
00015Ch Group 2 Time Measurement Control Register 4  
00015Dh Group 2 Time Measurement Control Register 5  
00015Eh Group 2 Time Measurement Control Register 6  
00015Fh Group 2 Time Measurement Control Register 7  
000160h Group 2 Base Timer Register  
000161h  
G2POCR0  
G2POCR1  
G2POCR2  
G2POCR3  
G2POCR4  
G2POCR5  
G2POCR6  
G2POCR7  
G2TMCR0  
G2TMCR1  
G2TMCR2  
G2TMCR3  
G2TMCR4  
G2TMCR5  
G2TMCR6  
G2TMCR7  
G2BT  
0000 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
XXXXh  
000162h Group 2 Base Timer Control Register 0  
000163h Group 2 Base Timer Control Register 1  
000164h Group 2 Time Measurement Prescaler Register 6  
000165h Group 2 Time Measurement Prescaler Register 7  
000166h Group 2 Function Enable Register  
000167h Group 2 Function Select Register  
000168h  
G2BCR0  
G2BCR1  
G2TPR6  
G2TPR7  
G2FE  
0000 0000b  
0000 0000b  
00h  
00h  
00h  
G2FS  
00h  
000169h  
00016Ah  
00016Bh  
00016Ch  
00016Dh  
00016Eh  
00016Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 26 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.8  
Address  
000170h  
000171h  
000172h  
000173h  
000174h  
000175h  
000176h  
000177h  
000178h  
000179h  
00017Ah  
00017Bh  
00017Ch  
00017Dh  
00017Eh  
00017Fh  
SFR List (8)  
Register  
Symbol  
Reset Value  
000180h Group 0 Time Measurement/Waveform Generation Register 0 G0TM0/G0PO0  
XXXXh  
000181h  
000182h Group 0 Time Measurement/Waveform Generation Register 1 G0TM1/G0PO1  
000183h  
000184h Group 0 Time Measurement/Waveform Generation Register 2 G0TM2/G0PO2  
000185h  
000186h Group 0 Time Measurement/Waveform Generation Register 3 G0TM3/G0PO3  
000187h  
000188h Group 0 Time Measurement/Waveform Generation Register 4 G0TM4/G0PO4  
000189h  
00018Ah Group 0 Time Measurement/Waveform Generation Register 5 G0TM5/G0PO5  
00018Bh  
00018Ch Group 0 Time Measurement/Waveform Generation Register 6 G0TM6/G0PO6  
00018Dh  
00018Eh Group 0 Time Measurement/Waveform Generation Register 7 G0TM7/G0PO7  
00018Fh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
000190h Group 0 Waveform Generation Control Register 0  
000191h Group 0 Waveform Generation Control Register 1  
000192h Group 0 Waveform Generation Control Register 2  
000193h Group 0 Waveform Generation Control Register 3  
000194h Group 0 Waveform Generation Control Register 4  
000195h Group 0 Waveform Generation Control Register 5  
000196h Group 0 Waveform Generation Control Register 6  
000197h Group 0 Waveform Generation Control Register 7  
000198h Group 0 Time Measurement Control Register 0  
000199h Group 0 Time Measurement Control Register 1  
00019Ah Group 0 Time Measurement Control Register 2  
00019Bh Group 0 Time Measurement Control Register 3  
00019Ch Group 0 Time Measurement Control Register 4  
00019Dh Group 0 Time Measurement Control Register 5  
00019Eh Group 0 Time Measurement Control Register 6  
00019Fh Group 0 Time Measurement Control Register 7  
X: Undefined  
G0POCR0  
G0POCR1  
G0POCR2  
G0POCR3  
G0POCR4  
G0POCR5  
G0POCR6  
G0POCR7  
G0TMCR0  
G0TMCR1  
G0TMCR2  
G0TMCR3  
G0TMCR4  
G0TMCR5  
G0TMCR6  
G0TMCR7  
0000 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 27 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.9  
SFR List (9)  
Address  
Register  
Symbol  
Reset Value  
XXXXh  
0001A0h Group 0 Base Timer Register  
G0BT  
0001A1h  
0001A2h Group 0 Base Timer Control Register 0  
0001A3h Group 0 Base Timer Control Register 1  
0001A4h Group 0 Time Measurement Prescaler Register 6  
0001A5h Group 0 Time Measurement Prescaler Register 7  
G0BCR0  
G0BCR1  
G0TPR6  
G0TPR7  
G0FE  
0000 0000b  
0000 0000b  
00h  
00h  
00h  
0001A6h Group 0 Function Enable Register  
0001A7h Group 0 Function Select Register  
G0FS  
00h  
0001A8h  
0001A9h  
0001AAh  
0001ABh  
0001ACh  
0001ADh  
0001AEh  
0001AFh  
0001B0h  
0001B1h  
0001B2h  
0001B3h  
0001B4h  
0001B5h  
0001B6h  
0001B7h  
0001B8h  
0001B9h  
0001BAh  
0001BBh  
0001BCh  
0001BDh  
0001BEh  
0001BFh  
0001C0h  
0001C1h  
0001C2h  
0001C3h  
0001C4h  
0001C5h  
0001C6h  
0001C7h  
0001C8h  
0001C9h  
0001CAh  
0001CBh  
0001CCh  
0001CDh  
0001CEh  
0001CFh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 28 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.10  
Address  
SFR List (10)  
Register  
Symbol  
Reset Value  
0001D0h  
0001D1h  
0001D2h  
0001D3h  
0001D4h  
0001D5h  
0001D6h  
0001D7h  
0001D8h  
0001D9h  
0001DAh  
0001DBh  
0001DCh  
0001DDh  
0001DEh  
0001DFh  
0001E0h UART3 Transmit/Receive Mode Register  
U3MR  
00h  
0001E1h UART3 Bit Rate Register  
0001E2h UART3 Transmit Buffer Register  
U3BRG  
U3TB  
XXh  
XXXXh  
0001E3h  
0001E4h UART3 Transmit/Receive Control Register 0  
0001E5h UART3 Transmit/Receive Control Register 1  
0001E6h UART3 Receive Buffer Register  
U3C0  
U3C1  
U3RB  
00X0 1000b  
XXXX 0010b  
XXXXh  
0001E7h  
0001E8h UART4 Transmit/Receive Mode Register  
0001E9h UART4 Bit Rate Register  
0001EAh UART4 Transmit Buffer Register  
U4MR  
U4BRG  
U4TB  
00h  
XXh  
XXXXh  
0001EBh  
0001ECh UART4 Transmit/Receive Control Register 0  
0001EDh UART4 Transmit/Receive Control Register 1  
0001EEh UART4 Receive Buffer Register  
U4C0  
U4C1  
U4RB  
00X0 1000b  
XXXX 0010b  
XXXXh  
0001EFh  
0001F0h UART3, UART4 Transmit/Receive Control Register 2  
U34CON  
X000 0000b  
0001F1h  
0001F2h  
0001F3h  
0001F4h  
0001F5h  
0001F6h  
0001F7h  
0001F8h  
0001F9h  
0001FAh  
0001FBh  
0001FCh  
0001FDh  
0001FEh  
0001FFh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 29 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.11  
SFR List (11)  
Address  
Register  
Symbol  
G0SDR  
Reset Value  
000200h Group0 Phase Shift Waveform Output Mode Clock Division  
Setting Register  
00h  
000201h Group0 Phase Shift Waveform Output Mode Control Register G0PSCR  
00h  
00h  
000202h Group1 Phase Shift Waveform Output Mode Clock Division  
Setting Register  
G1SDR  
000203h Group1 Phase Shift Waveform Output Mode Control Register G1PSCR  
00h  
00h  
000204h Group2 Phase Shift Waveform Output Mode Clock Division  
Setting Register  
G2SDR  
000205h Group2 Phase Shift Waveform Output Mode Control Register G2PSCR  
00h  
00h  
000206h Group3 Phase Shift Waveform Output Mode Clock Division  
Setting Register  
G3SDR  
000207h Group3 Phase Shift Waveform Output Mode Control Register G3PSCR  
00h  
000208h Timer B Event Clock Select Register  
TBECKS  
0000 0000b  
000209h  
00020Ah  
00020Bh  
00020Ch  
00020Dh  
00020Eh  
00020Fh  
000210h IIO0_7 Digital Debounce Register  
000211h IIO1_7 Digital Debounce Register  
000212h IIO2_7 Digital Debounce Register  
000213h IIO3_7 Digital Debounce Register  
IC07DDR  
IC17DDR  
IC27DDR  
IC37DDR  
FFh  
FFh  
FFh  
FFh  
000214h  
000215h  
000216h  
000217h  
000218h  
000219h  
00021Ah  
00021Bh  
00021Ch  
00021Dh  
00021Eh  
00021Fh  
000220h Timer A1 Mirror Register  
000221h  
000222h Timer A1-1 Mirror Register  
000223h  
000224h Timer A2 Mirror Register  
000225h  
000226h Timer A2-1 Mirror Register  
000227h  
TA1M  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
TA11M  
TA2M  
TA21M  
TA4M  
000228h Timer A4 Mirror Register  
000229h  
00022Ah Timer A4-1 Mirror Register  
TA41M  
00022Bh  
00022Ch  
00022Dh  
00022Eh  
00022Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 30 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.12  
SFR List (12)  
Address  
000230h to  
00023F  
Register  
Symbol  
Reset Value  
000240h Group 3 Time Measurement/Waveform Generation Register 0 G3TM0/G3PO0  
XXXXh  
000241h  
000242h Group 3 Time Measurement/Waveform Generation Register 1 G3TM1/G3PO1  
000243h  
000244h Group 3 Time Measurement/Waveform Generation Register 2 G3TM2/G3PO2  
000245h  
000246h Group 3 Time Measurement/Waveform Generation Register 3 G3TM3/G3PO3  
000247h  
000248h Group 3 Time Measurement/Waveform Generation Register 4 G3TM4/G3PO4  
000249h  
00024Ah Group 3 Time Measurement/Waveform Generation Register 5 G3TM5/G3PO5  
00024Bh  
00024Ch Group 3 Time Measurement/Waveform Generation Register 6 G3TM6/G3PO6  
00024Dh  
00024Eh Group 3 Time Measurement/Waveform Generation Register 7 G3TM7/G3PO7  
00024Fh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
000250h Group 3 Waveform Generation Control Register 0  
000251h Group 3 Waveform Generation Control Register 1  
000252h Group 3 Waveform Generation Control Register 2  
000253h Group 3 Waveform Generation Control Register 3  
000254h Group 3 Waveform Generation Control Register 4  
000255h Group 3 Waveform Generation Control Register 5  
000256h Group 3 Waveform Generation Control Register 6  
000257h Group 3 Waveform Generation Control Register 7  
000258h Group 3 Time Measurement Control Register 0  
000259h Group 3 Time Measurement Control Register 1  
00025Ah Group 3 Time Measurement Control Register 2  
00025Bh Group 3 Time Measurement Control Register 3  
00025Ch Group 3 Time Measurement Control Register 4  
00025Dh Group 3 Time Measurement Control Register 5  
00025Eh Group 3 Time Measurement Control Register 6  
00025Fh Group 3 Time Measurement Control Register 7  
000260h Group 3 Base Timer Register  
000261h  
G3POCR0  
G3POCR1  
G3POCR2  
G3POCR3  
G3POCR4  
G3POCR5  
G3POCR6  
G3POCR7  
G3TMCR0  
G3TMCR1  
G3TMCR2  
G3TMCR3  
G3TMCR4  
G3TMCR5  
G3TMCR6  
G3TMCR7  
G3BT  
0000 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
0X00 X000b  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
XXXXh  
000262h Group 3 Base Timer Control Register 0  
000263h Group 3 Base Timer Control Register 1  
000264h Group 3 Time Measurement Prescaler Register 6  
000265h Group 3 Time Measurement Prescaler Register 7  
000266h Group 3 Function Enable Register  
000267h Group 3 Function Select Register  
000268h  
G3BCR0  
G3BCR1  
G3TPR6  
G3TPR7  
G3FE  
0000 0000b  
0000 0000b  
00h  
00h  
00h  
G3FS  
00h  
000269h  
00026Ah  
00026Bh  
00026Ch  
00026Dh  
00026Eh  
00026Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 31 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.13  
SFR List (13)  
Address  
000270h to  
0002BFh  
Register  
Symbol  
Reset Value  
0002C0h X0 Register/Y0 Register  
0002C1h  
X0R/Y0R  
XXXXh  
0002C2h X1 Register/Y1 Register  
0002C3h  
0002C4h X2 Register/Y2 Register  
0002C5h  
0002C6h X3 Register/Y3 Register  
0002C7h  
0002C8h X4 Register/Y4 Register  
0002C9h  
0002CAh X5 Register/Y5 Register  
0002CBh  
0002CCh X6 Register/Y6 Register  
0002CDh  
0002CEh X7 Register/Y7 Register  
0002CFh  
0002D0h X8 Register/Y8 Register  
0002D1h  
0002D2h X9 Register/Y9 Register  
0002D3h  
0002D4h X10 Register/Y10 Register  
0002D5h  
0002D6h X11 Register/Y11 Register  
0002D7h  
0002D8h X12 Register/Y12 Register  
0002D9h  
0002DAh X13 Register/Y13 Register  
0002DBh  
0002DCh X14 Register/Y14 Register  
0002DDh  
0002DEh X15 Register/Y15 Register  
0002DFh  
0002E0h X-Y Control Register  
0002E1h  
X1R/Y1R  
X2R/Y2R  
X3R/Y3R  
X4R/Y4R  
X5R/Y5R  
X6R/Y6R  
X7R/Y7R  
X8R/Y8R  
X9R/Y9R  
X10R/Y10R  
X11R/Y11R  
X12R/Y12R  
X13R/Y13R  
X14R/Y14R  
X15R/Y15R  
XYC  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXX XX00b  
0002E2h  
0002E3h  
0002E4h UART1 Special Mode Register 4  
0002E5h UART1 Special Mode Register 3  
0002E6h UART1 Special Mode Register 2  
0002E7h UART1 Special Mode Register  
0002E8h UART1 Transmit/Receive Mode Register  
0002E9h UART1 Bit Rate Register  
0002EAh UART1 Transmit Buffer Register  
0002EBh  
U1SMR4  
U1SMR3  
U1SMR2  
U1SMR  
U1MR  
00h  
00h  
00h  
00h  
00h  
XXh  
XXXXh  
U1BRG  
U1TB  
0002ECh UART1 Transmit/Receive Control Register 0  
0002EDh UART1 Transmit/Receive Control Register 1  
0002EEh UART1 Receive Buffer Register  
0002EFh  
U1C0  
U1C1  
U1RB  
0000 1000b  
0000 0010b  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 32 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.14  
Address  
SFR List (14)  
Register  
Symbol  
Reset Value  
0002F0h  
0002F1h  
0002F2h  
0002F3h  
0002F4h  
0002F5h  
0002F6h  
0002F7h  
0002F8h  
0002F9h  
0002FAh  
0002FBh  
0002FCh  
0002FDh  
0002FEh  
0002FFh  
000300h Count Start Register for Timers B3, B4, and B5  
000301h  
000302h Timer A1-1 Register  
000303h  
000304h Timer A2-1 Register  
000305h  
000306h Timer A4-1 Register  
TBSR  
TA11  
TA21  
TA41  
000X XXXXb  
XXXXh  
XXXXh  
XXXXh  
000307h  
000308h Three-phase PWM Control Register 0  
000309h Three-phase PWM Control Register 1  
00030Ah Three-phase Output Buffer Register 0  
00030Bh Three-phase Output Buffer Register 1  
INVC0  
INVC1  
IDB0  
IDB1  
DTT  
00h  
00h  
XX11 1111b  
XX11 1111b  
XXh  
00030Ch Dead Time Timer  
00030Dh Timer B2 Interrupt Generating Frequency Set Counter  
ICTB2  
XXh  
00030Eh  
00030Fh  
000310h Timer B3 Register  
000311h  
000312h Timer B4 Register  
000313h  
TB3  
TB4  
TB5  
XXXXh  
XXXXh  
XXXXh  
000314h Timer B5 Register  
000315h  
000316h  
000317h  
000318h  
000319h  
00031Ah  
00031Bh Timer B3 Mode Register  
00031Ch Timer B4 Mode Register  
00031Dh Timer B5 Mode Register  
00031Eh  
TB3MR  
TB4MR  
TB5MR  
00XX 0000b  
00XX 0000b  
00XX 0000b  
00031Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 33 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.15  
Address  
000320h  
000321h  
000322h  
000323h  
000324h  
000325h  
000326h  
000327h  
000328h  
000329h  
00032Ah  
00032Bh  
00032Ch  
00032Dh  
00032Eh  
00032Fh  
000330h  
000331h  
000332h  
000333h  
SFR List (15)  
Register  
Symbol  
Reset Value  
000334h UART2 Special Mode Register 4  
000335h UART2 Special Mode Register 3  
000336h UART2 Special Mode Register 2  
000337h UART2 Special Mode Register  
000338h UART2 Transmit/Receive Mode Register  
000339h UART2 Bit Rate Register  
00033Ah UART2 Transmit Buffer Register  
00033Bh  
U2SMR4  
00h  
00h  
00h  
00h  
00h  
XXh  
U2SMR3  
U2SMR2  
U2SMR  
U2MR  
U2BRG  
U2TB  
XXXXh  
00033Ch UART2 Transmit/Receive Control Register 0  
00033Dh UART2 Transmit/Receive Control Register 1  
00033Eh UART2 Receive Buffer Register  
00033Fh  
U2C0  
U2C1  
U2RB  
0000 1000b  
0000 0010b  
XXXXh  
000340h Count Start Register  
000341h Clock Prescaler Reset Register  
000342h One-shot Start Register  
000343h Trigger Select Register  
000344h Increment/Decrement Select Register  
000345h  
TABSR  
CPSRF  
ONSF  
TRGSR  
UDF  
0000 0000b  
0XXX XXXXb  
0000 0000b  
0000 0000b  
0000 0000b  
000346h Timer A0 Register  
000347h  
000348h Timer A1 Register  
000349h  
00034Ah Timer A2 Register  
00034Bh  
00034Ch Timer A3 Register  
00034Dh  
TA0  
TA1  
TA2  
TA3  
TA4  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
XXXXh  
00034Eh Timer A4 Register  
00034Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 34 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.16  
SFR List (16)  
Address  
000350h Timer B0 Register  
000351h  
000352h Timer B1 Register  
000353h  
000354h Timer B2 Register  
000355h  
Register  
Symbol  
Reset Value  
XXXXh  
TB0  
TB1  
TB2  
XXXXh  
XXXXh  
000356h Timer A0 Mode Register  
000357h Timer A1 Mode Register  
000358h Timer A2 Mode Register  
000359h Timer A3 Mode Register  
00035Ah Timer A4 Mode Register  
00035Bh Timer B0 Mode Register  
00035Ch Timer B1 Mode Register  
00035Dh Timer B2 Mode Register  
TA0MR  
TA1MR  
TA2MR  
TA3MR  
TA4MR  
TB0MR  
TB1MR  
TB2MR  
TB2SC  
TCSPR  
0000 0000b  
0000 0000b  
0000 0000b  
0000 0000b  
0000 0000b  
00XX 0000b  
00XX 0000b  
00XX 0000b  
XXXX XXX0b  
0000 0000b  
00035Eh Timer B2 Special Mode Register  
00035Fh Count Source Prescaler Register  
000360h  
000361h  
000362h  
000363h  
000364h UART0 Special Mode Register 4  
000365h UART0 Special Mode Register 3  
000366h UART0 Special Mode Register 2  
000367h UART0 Special Mode Register  
U0SMR4  
U0SMR3  
U0SMR2  
U0SMR  
U0MR  
00h  
00h  
00h  
00h  
000368h UART0 Transmit/Receive Mode Register  
00h  
000369h UART0 Bit Rate Register  
00036Ah UART0 Transmit Buffer Register  
U0BRG  
U0TB  
XXh  
XXXXh  
00036Bh  
00036Ch UART0 Transmit/Receive Control Register 0  
00036Dh UART0 Transmit/Receive Control Register 1  
00036Eh UART0 Receive Buffer Register  
U0C0  
U0C1  
U0RB  
0000 1000b  
0000 0010b  
XXXXh  
00036Fh  
000370h  
000371h  
000372h  
000373h  
000374h  
000375h  
000376h  
000377h  
000378h  
000379h  
00037Ah  
00037Bh  
00037Ch CRC Data Register  
00037Dh  
00037Eh CRC Input Register  
00037Fh  
CRCD  
CRCIN  
XXXXh  
XXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 35 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.17  
SFR List (17)  
Address  
000380h A/D0 Register 0  
000381h  
000382h A/D0 Register 1  
000383h  
000384h A/D0 Register 2  
000385h  
000386h A/D0 Register 3  
000387h  
000388h A/D0 Register 4  
000389h  
00038Ah A/D0 Register 5  
00038Bh  
00038Ch A/D0 Register 6  
00038Dh  
Register  
Symbol  
Reset Value  
00XXh  
AD00  
AD01  
AD02  
AD03  
AD04  
AD05  
AD06  
AD07  
00XXh  
00XXh  
00XXh  
00XXh  
00XXh  
00XXh  
00XXh  
00038Eh A/D0 Register 7  
00038Fh  
000390h  
000391h  
000392h A/D0 Control Register 4  
000393h A/D0 Control Register 5  
000394h A/D0 Control Register 2  
000395h A/D0 Control Register 3  
000396h A/D0 Control Register 0  
000397h A/D0 Control Register 1  
000398h D/A Register 0  
000399h  
AD0CON4  
AD0CON5  
AD0CON2  
AD0CON3  
AD0CON0  
AD0CON1  
DA0  
XXXX 00XXb  
00h  
X00X X000b  
XXXX X000b  
00h  
00h  
XXh  
00039Ah D/A Register 1  
00039Bh  
DA1  
XXh  
00039Ch D/A Control Register  
00039Dh  
DACON  
XXXX XX00b  
00039Eh  
00039Fh  
0003A0h  
0003A1h  
0003A2h  
0003A3h  
0003A4h  
0003A5h  
0003A6h  
0003A7h  
0003A8h  
0003A9h  
0003AAh  
0003ABh  
0003ACh  
0003ADh  
0003AEh  
0003AFh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 36 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.18  
Address  
SFR List (18)  
Register  
Symbol  
Reset Value  
0003B0h  
0003B1h  
0003B2h  
0003B3h  
0003B4h  
0003B5h  
0003B6h  
0003B7h  
0003B8h  
0003B9h  
0003BAh  
0003BBh  
0003BCh  
0003BDh  
0003BEh  
0003BFh  
0003C0h Port P0 Register  
0003C1h Port P1 Register  
P0  
P1  
XXh  
XXh  
0003C2h Port P0 Direction Register  
0003C3h Port P1 Direction Register  
0003C4h Port P2 Register  
PD0  
PD1  
P2  
0000 0000b  
0000 0000b  
XXh  
0003C5h Port P3 Register  
P3  
XXh  
0003C6h Port P2 Direction Register  
0003C7h Port P3 Direction Register  
0003C8h Port P4 Register  
PD2  
PD3  
P4  
0000 0000b  
0000 0000b  
XXh  
0003C9h Port P5 Register  
P5  
XXh  
0003CAh Port P4 Direction Register  
0003CBh Port P5 Direction Register  
0003CCh Port P6 Register  
PD4  
PD5  
P6  
0000 0000b  
0000 0000b  
XXh  
0003CDh Port P7 Register  
P7  
XXh  
0003CEh Port P6 Direction Register  
0003CFh Port P7 Direction Register  
0003D0h Port P8 Register  
PD6  
PD7  
P8  
0000 0000b  
0000 0000b  
XXh  
0003D1h Port P9 Register  
P9  
XXh  
0003D2h Port P8 Direction Register  
0003D3h Port P9 Direction Register  
0003D4h Port P10 Register  
PD8  
PD9  
P10  
P11  
PD10  
PD11  
P12  
P13  
PD12  
PD13  
P14  
P15  
PD14  
PD15  
00X0 0000b  
0000 0000b  
XXh  
0003D5h Port P11 Register  
XXh  
0003D6h Port P10 Direction Register  
0003D7h Port P11 Direction Register  
0003D8h Port P12 Register  
0000 0000b  
XXX0 0000b  
XXh  
0003D9h Port P13 Register  
XXh  
0003DAh Port P12 Direction Register  
0003DBh Port P13 Direction Register  
0003DCh Port P14 Register  
0000 0000b  
0000 0000b  
XXh  
0003DDh Port P15 Register  
XXh  
0003DEh Port P14 Direction Register  
0003DFh Port P15 Direction Register  
X: Undefined  
X000 0X0Xb  
0000 0000b  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 37 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.19  
Address  
SFR List (19)  
Register  
Symbol  
Reset Value  
0003E0h  
0003E1h  
0003E2h  
0003E3h  
0003E4h  
0003E5h  
0003E6h  
0003E7h  
0003E8h  
0003E9h  
0003EAh  
0003EBh  
0003ECh  
0003EDh  
0003EEh  
0003EFh  
0003F0h Pull-up Control Register 0  
0003F1h Pull-up Control Register 1  
0003F2h Pull-up Control Register 2  
0003F3h Pull-up Control Register 3  
PUR0  
PUR1  
PUR2  
PUR3  
PUR4  
0000 0000b  
XXXX 0000b  
0000 0000b  
0000 0000b  
XXXX 0000b  
0003F4h Pull-up Control Register 4  
0003F5h  
0003F6h  
0003F7h  
0003F8h  
0003F9h  
0003FAh  
0003FBh  
0003FCh  
0003FDh  
0003FEh  
0003FFh Port Control Register  
PCR  
XXXX XXX0b  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 38 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.20  
SFR List (20)  
Address  
Register  
Symbol  
Reset Value  
0X01 XX00b  
040000h Flash Memory Control Register 0  
FMR0  
040001h Flash Memory Status Register 0  
FMSR0  
1000 0000b  
040002h  
040003h  
040004h  
040005h  
040006h  
040007h  
040008h Flash Register Protection Unlock Register 0  
040009h Flash Memory Control Register 1  
04000Ah Block Protect Bit Monitor Register 0  
04000Bh Block Protect Bit Monitor Register 1  
FPR0  
00h  
FMR1  
FBPM0  
FBPM1  
0000 0010b  
??X? ????b (1)  
XXX? ????b (1)  
04000Ch  
04000Dh  
04000Eh  
04000Fh  
040010h  
040011h  
040012h  
040013h  
040014h  
040015h  
040016h  
040017h  
040018h  
040019h  
04001Ah  
04001Bh  
04001Ch  
04001Dh  
04001Eh  
04001Fh  
040020h PLL Control Register 0  
040021h PLL Control Register 1  
PLC0  
PLC1  
0000 0001b  
0001 1111b  
040022h  
040023h  
040024h PLL Status Register  
PLS  
1XXX XX00b  
040025h  
040026h  
040027h  
040028h  
040029h  
04002Ah  
04002Bh  
04002Ch  
04002Dh  
04002Eh  
04002Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
Note:  
1. The reset value reflects the value of the protect bit for each block in the flash memory.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 39 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.21  
SFR List (21)  
Address  
040030h to  
04003Fh  
040040h  
040041h  
040042h  
040043h  
Register  
Symbol  
Reset Value  
040044h  
040045h  
PM0  
1000 0000b  
Processor Mode Register 0  
040046h System Clock Control Register 0  
040047h System Clock Control Register 1  
040048h Processor Mode Register 3  
CM0  
CM1  
PM3  
0000 1000b  
0010 0000b  
00h  
040049h  
04004Ah Protect Register  
PRCR  
XXXX X000b  
04004Bh  
04004Ch Protect Register 3  
04004Dh Oscillator Stop Detection Register  
PRCR3  
CM2  
0000 0000b  
00h  
04004Eh  
04004Fh  
040050h  
040051h  
040052h  
040053h Processor Mode Register 2  
040054h  
040055h  
040056h  
040057h  
040058h  
040059h  
PM2  
CM3  
00h  
04005Ah Low Speed Mode Clock Control Register  
XXXX XX00b  
04005Bh  
04005Ch  
04005Dh  
04005Eh  
04005Fh  
040060h Voltage Regulator Control Register  
040061h  
040062h Low Voltage Detector Control Register  
040063h  
VRCR  
LVDC  
DVCR  
0000 0000b  
0000 XX00b  
0000 XXXXb  
040064h Detection Voltage Configuration Register  
040065h  
040066h  
040067h  
040068h to  
040093h  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 40 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.22  
Address  
SFR List (22)  
Register  
Symbol  
Reset Value  
040094h  
040095h  
040096h  
040097h Three-phase Output Buffer Control Register  
040098h Input Function Select Register 0  
040099h Input Function Select Register 1  
04009Ah Input Function Select Register 2  
04009Bh  
IOBC  
IFS0  
IFS1  
IFS2  
0XXX XX0Xb  
0000 0000b  
XXX0 X0X0b  
0000 0000b  
04009Ch  
04009Dh Input Function Select Register 5  
04009Eh Input Function Select Register 6  
04009Fh Input Function Select Register 7  
0400A0h Port P0_0 Function Select Register  
0400A1h Port P1_0 Function Select Register  
0400A2h Port P0_1 Function Select Register  
0400A3h Port P1_1 Function Select Register  
0400A4h Port P0_2 Function Select Register  
0400A5h Port P1_2 Function Select Register  
0400A6h Port P0_3 Function Select Register  
0400A7h Port P1_3 Function Select Register  
0400A8h Port P0_4 Function Select Register  
0400A9h Port P1_4 Function Select Register  
0400AAh Port P0_5 Function Select Register  
0400ABh Port P1_5 Function Select Register  
0400ACh Port P0_6 Function Select Register  
0400ADh Port P1_6 Function Select Register  
0400AEh Port P0_7 Function Select Register  
0400AFh Port P1_7 Function Select Register  
0400B0h Port P2_0 Function Select Register  
0400B1h Port P3_0 Function Select Register  
0400B2h Port P2_1 Function Select Register  
0400B3h Port P3_1 Function Select Register  
0400B4h Port P2_2 Function Select Register  
0400B5h Port P3_2 Function Select Register  
0400B6h Port P2_3 Function Select Register  
0400B7h Port P3_3 Function Select Register  
0400B8h Port P2_4 Function Select Register  
0400B9h Port P3_4 Function Select Register  
0400BAh Port P2_5 Function Select Register  
0400BBh Port P3_5 Function Select Register  
0400BCh Port P2_6 Function Select Register  
0400BDh Port P3_6 Function Select Register  
0400BEh Port P2_7 Function Select Register  
0400BFh Port P3_7 Function Select Register  
X: Undefined  
IFS5  
IFS6  
IFS7  
XXX0 0000b  
XXXX 0000b  
XXXX XXX0b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
P0_0S  
P1_0S  
P0_1S  
P1_1S  
P0_2S  
P1_2S  
P0_3S  
P1_3S  
P0_4S  
P1_4S  
P0_5S  
P1_5S  
P0_6S  
P1_6S  
P0_7S  
P1_7S  
P2_0S  
P3_0S  
P2_1S  
P3_1S  
P2_2S  
P3_2S  
P2_3S  
P3_3S  
P2_4S  
P3_4S  
P2_5S  
P3_5S  
P2_6S  
P3_6S  
P2_7S  
P3_7S  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 41 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.23  
SFR List (23)  
Address  
Register  
Symbol  
P4_0S  
Reset Value  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
0400C0h Port P4_0 Function Select Register  
0400C1h Port P5_0 Function Select Register  
0400C2h Port P4_1 Function Select Register  
0400C3h Port P5_1 Function Select Register  
0400C4h Port P4_2 Function Select Register  
0400C5h Port P5_2 Function Select Register  
0400C6h Port P4_3 Function Select Register  
0400C7h Port P5_3 Function Select Register  
0400C8h Port P4_4 Function Select Register  
0400C9h Port P5_4 Function Select Register  
0400CAh Port P4_5 Function Select Register  
0400CBh Port P5_5 Function Select Register  
0400CCh Port P4_6 Function Select Register  
0400CDh Port P5_6 Function Select Register  
0400CEh Port P4_7 Function Select Register  
0400CFh Port P5_7 Function Select Register  
0400D0h Port P6_0 Function Select Register  
0400D1h Port P7_0 Function Select Register  
0400D2h Port P6_1 Function Select Register  
0400D3h Port P7_1 Function Select Register  
0400D4h Port P6_2 Function Select Register  
0400D5h Port P7_2 Function Select Register  
0400D6h Port P6_3 Function Select Register  
0400D7h Port P7_3 Function Select Register  
0400D8h Port P6_4 Function Select Register  
0400D9h Port P7_4 Function Select Register  
0400DAh Port P6_5 Function Select Register  
0400DBh Port P7_5 Function Select Register  
0400DCh Port P6_6 Function Select Register  
0400DDh Port P7_6 Function Select Register  
0400DEh Port P6_7 Function Select Register  
0400DFh Port P7_7 Function Select Register  
0400E0h Port P8_0 Function Select Register  
0400E1h Port P9_0 Function Select Register  
0400E2h Port P8_1 Function Select Register  
0400E3h Port P9_1 Function Select Register  
0400E4h Port P8_2 Function Select Register  
0400E5h Port P9_2 Function Select Register  
0400E6h Port P8_3 Function Select Register  
0400E7h Port P9_3 Function Select Register  
0400E8h Port P8_4 Function Select Register  
0400E9h Port P9_4 Function Select Register  
0400EAh  
P5_0S  
P4_1S  
P5_1S  
P4_2S  
P5_2S  
P4_3S  
P5_3S  
P4_4S  
P5_4S  
P4_5S  
P5_5S  
P4_6S  
P5_6S  
P4_7S  
P5_7S  
P6_0S  
P7_0S  
P6_1S  
P7_1S  
P6_2S  
P7_2S  
P6_3S  
P7_3S  
P6_4S  
P7_4S  
P6_5S  
P7_5S  
P6_6S  
P7_6S  
P6_7S  
P7_7S  
P8_0S  
P9_0S  
P8_1S  
P9_1S  
P8_2S  
P9_2S  
P8_3S  
P9_3S  
P8_4S  
P9_4S  
0400EBh Port P9_5 Function Select Register  
0400ECh Port P8_6 Function Select Register  
0400EDh Port P9_6 Function Select Register  
0400EEh Port P8_7 Function Select Register  
0400EFh Port P9_7 Function Select Register  
X: Undefined  
P9_5S  
P8_6S  
P9_6S  
P8_7S  
P9_7S  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
XXXX X000b  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 42 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.24  
SFR List (24)  
Address  
Register  
Symbol  
P10_0S  
Reset Value  
0XXX X000b  
0400F0h Port P10_0 Function Select Register  
0400F1h Port P11_0 Function Select Register  
0400F2h Port P10_1 Function Select Register  
0400F3h Port P11_1 Function Select Register  
0400F4h Port P10_2 Function Select Register  
0400F5h Port P11_2 Function Select Register  
0400F6h Port P10_3 Function Select Register  
0400F7h Port P11_3 Function Select Register  
0400F8h Port P10_4 Function Select Register  
0400F9h Port P11_4 Function Select Register  
0400FAh Port P10_5 Function Select Register  
0400FBh  
P11_0S  
P10_1S  
P11_1S  
P10_2S  
P11_2S  
P10_3S  
P11_3S  
P10_4S  
P11_4S  
P10_5S  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
0400FCh Port P10_6 Function Select Register  
0400FDh  
0400FEh Port P10_7 Function Select Register  
0400FFh  
P10_6S  
P10_7S  
0XXX X000b  
0XXX X000b  
040100h Port P12_0 Function Select Register  
040101h Port P13_0 Function Select Register  
040102h Port P12_1 Function Select Register  
040103h Port P13_1 Function Select Register  
040104h Port P12_2 Function Select Register  
040105h Port P13_2 Function Select Register  
040106h Port P12_3 Function Select Register  
040107h Port P13_3 Function Select Register  
040108h Port P12_4 Function Select Register  
040109h Port P13_4 Function Select Register  
04010Ah Port P12_5 Function Select Register  
04010Bh Port P13_5 Function Select Register  
04010Ch Port P12_6 Function Select Register  
04010Dh Port P13_6 Function Select Register  
04010Eh Port P12_7 Function Select Register  
04010Fh Port P13_7 Function Select Register  
040110h  
P12_0S  
P13_0S  
P12_1S  
P13_1S  
P12_2S  
P13_2S  
P12_3S  
P13_3S  
P12_4S  
P13_4S  
P12_5S  
P13_5S  
P12_6S  
P13_6S  
P12_7S  
P13_7S  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
XXXX X000b  
040111h Port P15_0 Function Select Register  
040112h  
040113h Port P15_1 Function Select Register  
040114h  
P15_0S  
P15_1S  
0XXX X000b  
0XXX X000b  
040115h Port P15_2 Function Select Register  
040116h Port P14_3 Function Select Register  
040117h Port P15_3 Function Select Register  
040118h Port P14_4 Function Select Register  
040119h Port P15_4 Function Select Register  
04011Ah Port P14_5 Function Select Register  
04011Bh Port P15_5 Function Select Register  
04011Ch Port P14_6 Function Select Register  
04011Dh Port P15_6 Function Select Register  
04011Eh  
P15_2S  
P14_3S  
P15_3S  
P14_4S  
P15_4S  
P14_5S  
P15_5S  
P14_6S  
P15_6S  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
XXXX X000b  
0XXX X000b  
04011Fh Port P15_7 Function Select Register  
P15_7S  
0XXX X000b  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 43 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.25  
SFR List (25)  
Address  
040120h to  
04403Fh  
044040h  
044041h  
044042h  
044043h  
044044h  
044045h  
044046h  
044047h  
044048h  
044049h  
04404Ah  
04404Bh  
Register  
Symbol  
Reset Value  
04404Ch Protect Register 4  
PRCR4  
0000 0000b  
04404Dh Watchdog Timer Clock Control Register  
04404Eh Watchdog Timer Start Register  
04404Fh Watchdog Timer Control Register  
WDK  
WDTS  
WDC  
0000 0000b  
XXXX XXXXb  
000X XXXXb  
044050h  
044051h  
044052h  
044053h  
044054h  
044055h  
044056h  
044057h  
044058h  
044059h  
04405Ah  
04405Bh  
04405Ch  
04405Dh  
04405Eh  
04405Fh Protect Register 2  
PRCR2  
0XXX XXXXb  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 44 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.26  
Address  
044060h  
044061h  
044062h  
044063h  
044064h  
044065h  
044066h  
044067h  
044068h  
044069h  
04406Ah  
04406Bh  
04406Ch  
SFR List (26)  
Register  
Symbol  
Reset Value  
04406Dh External Interrupt Request Source Select Register 1  
04406Eh  
04406Fh External Interrupt Request Source Select Register 0  
044070h DMA0 Request Source Select Register 2  
044071h DMA1 Request Source Select Register 2  
044072h DMA2 Request Source Select Register 2  
044073h DMA3 Request Source Select Register 2  
IFSR1  
IFSR0  
DM0SL2  
DM1SL2  
DM2SL2  
DM3SL2  
XXXX X000b  
0000 0000b  
XX00 0000b  
XX00 0000b  
XX00 0000b  
XX00 0000b  
044074h  
044075h  
044076h  
044077h  
044078h DMA0 Request Source Select Register  
044079h DMA1 Request Source Select Register  
04407Ah DMA2 Request Source Select Register  
04407Bh DMA3 Request Source Select Register  
DM0SL  
DM1SL  
DM2SL  
DM3SL  
XXX0 0000b  
XXX0 0000b  
XXX0 0000b  
XXX0 0000b  
04407Ch  
04407Dh Wake-up IPL Setting Register 2  
RIPL2  
XX0X 0000b  
04407Eh  
04407Fh Wake-up IPL Setting Register 1  
044080h External Interrupt Input Filter Select Register 0  
RIPL1  
INTF0  
XX0X 0000b  
0000 0000b  
044081h  
044082h External Interrupt Input Filter Select Register 1  
044083h  
044084h External Interrupt Input Filter Select Register 2  
INTF1  
INTF2  
0000 0000b  
0000 0000b  
044085h  
044086h  
044087h  
044088h External Interrupt Input Pin Select Register  
INTSR  
0000 0000b  
044089h  
04408Ah  
04408Bh  
04408Ch  
04408Dh  
04408Eh  
04408Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 45 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.27  
SFR List (27)  
Address  
044090h to  
044DFFh  
Register  
Symbol  
Reset Value  
044E00h LIN Channel Window Select/Input Signal Low Detection Status LCW  
Register  
0000 0000b  
044E01h LIN Baud Rate Generator Control Register  
044E02h LIN Baud Rate Prescaler 0  
044E03h LIN Baud Rate Prescaler 1  
044E04h LIN Mode Register 0  
044E05h LIN Mode Register 1  
044E06h LIN Wake-up Setting Register  
044E07h  
LBRG  
0000 0000b  
00h  
00h  
0000 0000b  
00h  
00h  
LBRP0  
LBRP1  
LMD0  
LMD1  
LWUP  
044E08h LIN Break Field Setting Register  
044E09h LIN Space Setting Register  
044E0Ah LIN Response Field Setting Register  
044E0Bh LIN ID Buffer Register  
044E0Ch LIN Status Control Register  
044E0Dh LIN Transmission Control Register  
044E0Eh LIN Status Register  
044E0Fh LIN Error Status Register  
044E10h LIN Data 1 Buffer Register  
044E11h LIN Data 2 Buffer Register  
044E12h LIN Data 3 Buffer Register  
044E13h LIN Data 4 Buffer Register  
044E14h LIN Data 5 Buffer Register  
044E15h LIN Data 6 Buffer Register  
044E16h LIN Data 7 Buffer Register  
044E17h LIN Data 8 Buffer Register  
044E18h  
LBRK  
LSPC  
LRFC  
LIDB  
LSC  
0000 0000b  
0000 0000b  
0000 0000b  
00h  
0000 0000b  
0000 0000b  
0000 0000b  
0000 0000b  
00h  
00h  
00h  
00h  
00h  
LTC  
LST  
LEST  
LDB1  
LDB2  
LDB3  
LDB4  
LDB5  
LDB6  
LDB7  
LDB8  
00h  
00h  
00h  
044E19h  
044E1Ah  
044E1Bh  
044E1Ch  
044E1Dh  
044E1Eh  
044E1Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 46 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.28  
SFR List (28)  
Address  
044E20h to  
044EFFh  
044F00h  
044F01h  
044F02h  
044F03h  
044F04h  
044F05h  
Register  
Symbol  
Reset Value  
044F06h SS0 Receive Data Register  
SS0RDR  
FFh  
FFh  
00h  
0111 1101b  
0001 0000b  
00h  
00h  
00h  
FFh  
FFh  
044F07h SS0 Receive Data Register (H)  
044F08h SS0 Control Register H  
044F09h SS0 Control Register L  
044F0Ah SS0 Mode Register  
044F0Bh SS0 Enable Register  
044F0Ch SS0 Status Register  
044F0Dh SS0 Mode Register 2  
044F0Eh SS0 Transmit Data Register  
044F0Fh SS0 Transmit Data Register (H)  
044F10h  
SS0RDR (H)  
SS0CRH  
SS0CRL  
SS0MR  
SS0ER  
SS0SR  
SS0MR2  
SS0TDR  
SS0TDR (H)  
044F11h  
044F12h  
044F13h  
044F14h  
044F15h  
044F16h SS1 Receive Data Register  
044F17h SS1 Receive Data Register (H)  
044F18h SS1 Control Register H  
044F19h SS1 Control Register L  
044F1Ah SS1 Mode Register  
044F1Bh SS1 Enable Register  
044F1Ch SS1 Status Register  
044F1Dh SS1 Mode Register 2  
044F1Eh SS1 Transmit Data Register  
044F1Fh SS1 Transmit Data Register (H)  
044F20h  
SS1RDR  
SS1RDR (H)  
SS1CRH  
SS1CRL  
SS1MR  
SS1ER  
SS1SR  
SS1MR2  
SS1TDR  
SS1TDR (H)  
FFh  
FFh  
00h  
0111 1101b  
0001 0000b  
00h  
00h  
00h  
FFh  
FFh  
044F21h  
044F22h  
044F23h  
044F24h  
044F25h  
044F26h SS2 Receive Data Register  
044F27h SS2 Receive Data Register (H)  
X: Undefined  
SS2RDR  
SS2RDR (H)  
FFh  
FFh  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 47 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.29  
SFR List (29)  
Address  
Register  
Symbol  
SS2CRH  
SS2CRL  
SS2MR  
SS2ER  
SS2SR  
SS2MR2  
SS2TDR  
SS2TDR (H)  
Reset Value  
044F28h SS2 Control Register H  
044F29h SS2 Control Register L  
044F2Ah SS2 Mode Register  
044F2Bh SS2 Enable Register  
044F2Ch SS2 Status Register  
044F2Dh SS2 Mode Register 2  
00h  
0111 1101b  
0001 0000b  
00h  
00h  
00h  
FFh  
FFh  
044F2Eh SS2 Transmit Data Register  
044F2Fh SS2 Transmit Data Register (H)  
044F30h  
044F31h  
044F32h  
044F33h  
044F34h  
044F35h  
044F36h  
044F37h  
044F38h  
044F39h  
044F3Ah  
044F3Bh  
044F3Ch  
044F3Dh  
044F3Eh  
044F3Fh  
044F40h  
044F41h  
044F42h  
044F43h  
044F44h  
044F45h  
044F46h  
044F47h  
044F48h  
044F49h  
044F4Ah  
044F4Bh  
044F4Ch  
044F4Dh  
044F4Eh  
044F4Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 48 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.30  
SFR List (30)  
Address  
044F50h to  
044FDFh  
Register  
Symbol  
Reset Value  
E2dataFlash Address Register  
044FE0h  
044FE1h  
044FE2h  
044FE3h  
044FE4h  
044FE5h  
044FE6h  
044FE7h  
044FE8h  
044FE9h  
044FEAh  
044FEBh  
044FECh  
044FEDh  
044FEEh  
044FEFh  
044FF0h  
044FF1h  
044FF2h  
044FF3h  
044FF4h  
044FF5h  
044FF6h  
044FF7h  
044FF8h  
044FF9h  
044FFAh  
044FFBh  
044FFCh  
044FFDh  
044FFEh  
044FFFh  
045000h  
045001h  
E2FA  
XXXX 0000h  
E2dataFlash Instruction Register  
E2dataFlash Data Register  
E2FI  
XX00h  
XXXXh  
E2FD  
E2dataFlash Mode Register  
E2dataFlash Control Register  
E2dataFlash Status Register 1  
E2FM  
E2FC  
0000 0000b  
XXXX XXX0b  
XXXX XXX0b  
E2FS1  
E2dataFlash Status Register 0  
E2FS0  
XXXX XXXXb  
045002h  
045003h  
045004h  
045005h  
045006h  
045007h  
045008h to  
045FFFh  
046000h to  
0467FFh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 49 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.31  
SFR List (31)  
Address  
046800h to  
0477FFh  
Register  
Symbol  
Reset Value  
047800h CAN1 Mailbox 0: Message Identifier  
C1MB0  
XXXX XXXXh  
047801h  
047802h  
047803h  
047804h  
047805h CAN1 Mailbox 0: Data Length  
XXh  
047806h CAN1 Mailbox 0: Data Field  
047807h  
XXXX XXXX  
XXXX XXXXh  
047808h  
047809h  
04780Ah  
04780Bh  
04780Ch  
04780Dh  
04780Eh CAN1 Mailbox 0: Time Stamp  
XXXXh  
04780Fh  
047810h CAN1 Mailbox 1: Message Identifier  
C1MB1  
XXXX XXXXh  
047811h  
047812h  
047813h  
047814h  
047815h CAN1 Mailbox 1: Data Length  
XXh  
047816h CAN1 Mailbox 1: Data Field  
047817h  
XXXX XXXX  
XXXX XXXXh  
047818h  
047819h  
04781Ah  
04781Bh  
04781Ch  
04781Dh  
04781Eh CAN1 Mailbox 1: Time Stamp  
XXXXh  
04781Fh  
047820h CAN1 Mailbox 2: Message Identifier  
C1MB2  
XXXX XXXXh  
047821h  
047822h  
047823h  
047824h  
047825h CAN1 Mailbox 2: Data Length  
XXh  
047826h CAN1 Mailbox 2: Data Field  
047827h  
XXXX XXXX  
XXXX XXXXh  
047828h  
047829h  
04782Ah  
04782Bh  
04782Ch  
04782Dh  
04782Eh CAN1 Mailbox 2: Time Stamp  
04782Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 50 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.32  
SFR List (32)  
Address  
Register  
Symbol  
C1MB3  
Reset Value  
XXXX XXXXh  
047830h CAN1 Mailbox 3: Message Identifier  
047831h  
047832h  
047833h  
047834h  
047835h CAN1 Mailbox 3: Data Length  
XXh  
047836h CAN1 Mailbox 3: Data Field  
047837h  
XXXX XXXX  
XXXX XXXXh  
047838h  
047839h  
04783Ah  
04783Bh  
04783Ch  
04783Dh  
04783Eh CAN1 Mailbox 3: Time Stamp  
XXXXh  
04783Fh  
047840h CAN1 Mailbox 4: Message Identifier  
C1MB4  
XXXX XXXXh  
047841h  
047842h  
047843h  
047844h  
047845h CAN1 Mailbox 4: Data Length  
XXh  
047846h CAN1 Mailbox 4: Data Field  
047847h  
XXXX XXXX  
XXXX XXXXh  
047848h  
047849h  
04784Ah  
04784Bh  
04784Ch  
04784Dh  
04784Eh CAN1 Mailbox 4: Time Stamp  
XXXXh  
04784Fh  
047850h CAN1 Mailbox 5: Message Identifier  
C1MB5  
XXXX XXXXh  
047851h  
047852h  
047853h  
047854h  
047855h CAN1 Mailbox 5: Data Length  
XXh  
047856h CAN1 Mailbox 5: Data Field  
047857h  
XXXX XXXX  
XXXX XXXXh  
047858h  
047859h  
04785Ah  
04785Bh  
04785Ch  
04785Dh  
04785Eh CAN1 Mailbox 5: Time Stamp  
04785Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 51 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.33  
SFR List (33)  
Address  
Register  
Symbol  
C1MB6  
Reset Value  
XXXX XXXXh  
047860h CAN1 Mailbox 6: Message Identifier  
047861h  
047862h  
047863h  
047864h  
047865h CAN1 Mailbox 6: Data Length  
XXh  
047866h CAN1 Mailbox 6: Data Field  
047867h  
XXXX XXXX  
XXXX XXXXh  
047868h  
047869h  
04786Ah  
04786Bh  
04786Ch  
04786Dh  
04786Eh CAN1 Mailbox 6: Time Stamp  
XXXXh  
04786Fh  
047870h CAN1 Mailbox 7: Message Identifier  
C1MB7  
XXXX XXXXh  
047871h  
047872h  
047873h  
047874h  
047875h CAN1 Mailbox 7: Data Length  
XXh  
047876h CAN1 Mailbox 7: Data Field  
047877h  
XXXX XXXX  
XXXX XXXXh  
047878h  
047879h  
04787Ah  
04787Bh  
04787Ch  
04787Dh  
04787Eh CAN1 Mailbox 7: Time Stamp  
XXXXh  
04787Fh  
047880h CAN1 Mailbox 8: Message Identifier  
C1MB8  
XXXX XXXXh  
047881h  
047882h  
047883h  
047884h  
047885h CAN1 Mailbox 8: Data Length  
XXh  
047886h CAN1 Mailbox 8: Data Field  
047887h  
XXXX XXXX  
XXXX XXXXh  
047888h  
047889h  
04788Ah  
04788Bh  
04788Ch  
04788Dh  
04788Eh CAN1 Mailbox 8: Time Stamp  
04788Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 52 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.34  
SFR List (34)  
Address  
Register  
Symbol  
C1MB9  
Reset Value  
XXXX XXXXh  
047890h CAN1 Mailbox 9: Message Identifier  
047891h  
047892h  
047893h  
047894h  
047895h CAN1 Mailbox 9: Data Length  
XXh  
047896h CAN1 Mailbox 9: Data Field  
047897h  
XXXX XXXX  
XXXX XXXXh  
047898h  
047899h  
04789Ah  
04789Bh  
04789Ch  
04789Dh  
04789Eh CAN1 Mailbox 9: Time Stamp  
XXXXh  
04789Fh  
0478A0h CAN1 Mailbox 10: Message Identifier  
C1MB10  
XXXX XXXXh  
0478A1h  
0478A2h  
0478A3h  
0478A4h  
0478A5h CAN1 Mailbox 10: Data Length  
XXh  
0478A6h CAN1 Mailbox 10: Data Field  
0478A7h  
XXXX XXXX  
XXXX XXXXh  
0478A8h  
0478A9h  
0478AAh  
0478ABh  
0478ACh  
0478ADh  
0478AEh CAN1 Mailbox 10: Time Stamp  
XXXXh  
0478AFh  
0478B0h CAN1 Mailbox 11: Message Identifier  
C1MB11  
XXXX XXXXh  
0478B1h  
0478B2h  
0478B3h  
0478B4h  
0478B5h CAN1 Mailbox 11: Data Length  
XXh  
0478B6h CAN1 Mailbox 11: Data Field  
0478B7h  
XXXX XXXX  
XXXX XXXXh  
0478B8h  
0478B9h  
0478BAh  
0478BBh  
0478BCh  
0478BDh  
0478BEh CAN1 Mailbox 11: Time Stamp  
0478BFh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 53 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.35  
SFR List (35)  
Address  
Register  
Symbol  
C1MB12  
Reset Value  
XXXX XXXXh  
0478C0h CAN1 Mailbox 12: Message Identifier  
0478C1h  
0478C2h  
0478C3h  
0478C4h  
0478C5h CAN1 Mailbox 12: Data Length  
XXh  
0478C6h CAN1 Mailbox 12: Data Field  
0478C7h  
XXXX XXXX  
XXXX XXXXh  
0478C8h  
0478C9h  
0478CAh  
0478CBh  
0478CCh  
0478CDh  
0478CEh CAN1 Mailbox 12: Time Stamp  
XXXXh  
0478CFh  
0478D0h CAN1 Mailbox 13: Message Identifier  
C1MB13  
XXXX XXXXh  
0478D1h  
0478D2h  
0478D3h  
0478D4h  
0478D5h CAN1 Mailbox 13: Data Length  
XXh  
0478D6h CAN1 Mailbox 13: Data Field  
0478D7h  
XXXX XXXX  
XXXX XXXXh  
0478D8h  
0478D9h  
0478DAh  
0478DBh  
0478DCh  
0478DDh  
0478DEh CAN1 Mailbox 13: Time Stamp  
XXXXh  
0478DFh  
0478E0h CAN1 Mailbox 14: Message Identifier  
C1MB14  
XXXX XXXXh  
0478E1h  
0478E2h  
0478E3h  
0478E4h  
0478E5h CAN1 Mailbox 14: Data Length  
XXh  
0478E6h CAN1 Mailbox 14: Data Field  
0478E7h  
XXXX XXXX  
XXXX XXXXh  
0478E8h  
0478E9h  
0478EAh  
0478EBh  
0478ECh  
0478EDh  
0478EEh CAN1 Mailbox 14: Time Stamp  
0478EFh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 54 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.36  
SFR List (36)  
Address  
Register  
Symbol  
C1MB15  
Reset Value  
XXXX XXXXh  
0478F0h CAN1 Mailbox 15: Message Identifier  
0478F1h  
0478F2h  
0478F3h  
0478F4h  
0478F5h CAN1 Mailbox 15: Data Length  
XXh  
0478F6h CAN1 Mailbox 15: Data Field  
0478F7h  
XXXX XXXX  
XXXX XXXXh  
0478F8h  
0478F9h  
0478FAh  
0478FBh  
0478FCh  
0478FDh  
0478FEh CAN1 Mailbox 15: Time Stamp  
XXXXh  
0478FFh  
047900h CAN1 Mailbox 16: Message Identifier  
C1MB16  
XXXX XXXXh  
047901h  
047902h  
047903h  
047904h  
047905h CAN1 Mailbox 16: Data Length  
XXh  
047906h CAN1 Mailbox 16: Data Field  
047907h  
XXXX XXXX  
XXXX XXXXh  
047908h  
047909h  
04790Ah  
04790Bh  
04790Ch  
04790Dh  
04790Eh CAN1 Mailbox 16: Time Stamp  
XXXXh  
04790Fh  
047910h CAN1 Mailbox 17: Message Identifier  
C1MB17  
XXXX XXXXh  
047911h  
047912h  
047913h  
047914h  
047915h CAN1 Mailbox 17: Data Length  
XXh  
047916h CAN1 Mailbox 17: Data Field  
047917h  
XXXX XXXX  
XXXX XXXXh  
047918h  
047919h  
04791Ah  
04791Bh  
04791Ch  
04791Dh  
04791Eh CAN1 Mailbox 17: Time Stamp  
04791Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 55 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.37  
SFR List (37)  
Address  
Register  
Symbol  
C1MB18  
Reset Value  
XXXX XXXXh  
047920h CAN1 Mailbox 18: Message Identifier  
047921h  
047922h  
047923h  
047924h  
047925h CAN1 Mailbox 18: Data Length  
XXh  
047926h CAN1 Mailbox 18: Data Field  
047927h  
XXXX XXXX  
XXXX XXXXh  
047928h  
047929h  
04792Ah  
04792Bh  
04792Ch  
04792Dh  
04792Eh CAN1 Mailbox18: Time Stamp  
XXXXh  
04792Fh  
047930h CAN1 Mailbox 19: Message Identifier  
C1MB19  
XXXX XXXXh  
047931h  
047932h  
047933h  
047934h  
047935h CAN1 Mailbox 19: Data Length  
XXh  
047936h CAN1 Mailbox 19: Data Field  
047937h  
XXXX XXXX  
XXXX XXXXh  
047938h  
047939h  
04793Ah  
04793Bh  
04793Ch  
04793Dh  
04793Eh CAN1 Mailbox 19: Time Stamp  
XXXXh  
04793Fh  
047940h CAN1 Mailbox 20: Message Identifier  
C1MB20  
XXXX XXXXh  
047941h  
047942h  
047943h  
047944h  
047945h CAN1 Mailbox 20: Data Length  
XXh  
047946h CAN1 Mailbox 20: Data Field  
047947h  
XXXX XXXX  
XXXX XXXXh  
047948h  
047949h  
04794Ah  
04794Bh  
04794Ch  
04794Dh  
04794Eh CAN1 Mailbox 20: Time Stamp  
04794Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 56 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.38  
SFR List (38)  
Address  
Register  
Symbol  
C1MB21  
Reset Value  
XXXX XXXXh  
047950h CAN1 Mailbox 21: Message Identifier  
047951h  
047952h  
047953h  
047954h  
047955h CAN1 Mailbox 21: Data Length  
XXh  
047956h CAN1 Mailbox 21: Data Field  
047957h  
XXXX XXXX  
XXXX XXXXh  
047958h  
047959h  
04795Ah  
04795Bh  
04795Ch  
04795Dh  
04795Eh CAN1 Mailbox 21: Time Stamp  
XXXXh  
04795Fh  
047960h CAN1 Mailbox 22: Identifier  
C1MB22  
XXXX XXXXh  
047961h  
047962h  
047963h  
047964h  
047965h CAN1 Mailbox 22: Data Length  
XXh  
047966h CAN1 Mailbox 22: Data Field  
047967h  
XXXX XXXX  
XXXX XXXXh  
047968h  
047969h  
04796Ah  
04796Bh  
04796Ch  
04796Dh  
04796Eh CAN1 Mailbox 22: Time Stamp  
XXXXh  
04796Fh  
047970h CAN1 Mailbox 23: Message Identifier  
C1MB23  
XXXX XXXXh  
047971h  
047972h  
047973h  
047974h  
047975h CAN1 Mailbox 23: Data Length  
XXh  
047976h CAN1 Mailbox 23: Data Field  
047977h  
XXXX XXXX  
XXXX XXXXh  
047978h  
047979h  
04797Ah  
04797Bh  
04797Ch  
04797Dh  
04797Eh CAN1 Mailbox 23: Time Stamp  
04797Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 57 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.39  
SFR List (39)  
Address  
Register  
Symbol  
C1MB24  
Reset Value  
XXXX XXXXh  
047980h CAN1 Mailbox 24: Message Identifier  
047981h  
047982h  
047983h  
047984h  
047985h CAN1 Mailbox 24: Data Length  
XXh  
047986h CAN1 Mailbox 24: Data Field  
047987h  
XXXX XXXX  
XXXX XXXXh  
047988h  
047989h  
04798Ah  
04798Bh  
04798Ch  
04798Dh  
04798Eh CAN1 Mailbox 24: Time Stamp  
XXXXh  
04798Fh  
047990h CAN1 Mailbox 25: Message Identifier  
C1MB25  
XXXX XXXXh  
047991h  
047992h  
047993h  
047994h  
047995h CAN1 Mailbox 25: Data Length  
XXh  
047996h CAN1 Mailbox 25: Data Field  
047997h  
XXXX XXXX  
XXXX XXXXh  
047998h  
047999h  
04799Ah  
04799Bh  
04799Ch  
04799Dh  
04799Eh CAN1 Mailbox 25: Time Stamp  
XXXXh  
04799Fh  
0479A0h CAN1 Mailbox 26: Message Identifier  
C1MB26  
XXXX XXXXh  
0479A1h  
0479A2h  
0479A3h  
0479A4h  
0479A5h CAN1 Mailbox 26: Data Length  
XXh  
0479A6h CAN1 Mailbox 26: Data Field  
0479A7h  
XXXX XXXX  
XXXX XXXXh  
0479A8h  
0479A9h  
0479AAh  
0479ABh  
0479ACh  
0479ADh  
0479AEh CAN1 Mailbox 26: Time Stamp  
0479AFh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 58 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.40  
SFR List (40)  
Address  
Register  
Symbol  
C1MB27  
Reset Value  
XXXX XXXXh  
0479B0h CAN1 Mailbox 27: Message Identifier  
0479B1h  
0479B2h  
0479B3h  
0479B4h  
0479B5h CAN1 Mailbox 27: Data Length  
XXh  
0479B6h CAN1 Mailbox 27: Data Field  
0479B7h  
XXXX XXXX  
XXXX XXXXh  
0479B8h  
0479B9h  
0479BAh  
0479BBh  
0479BCh  
0479BDh  
0479BEh CAN1 Mailbox 27: Time Stamp  
XXXXh  
0479BFh  
0479C0h CAN1 Mailbox 28: Message Identifier  
C1MB28  
XXXX XXXXh  
0479C1h  
0479C2h  
0479C3h  
0479C4h  
0479C5h CAN1 Mailbox 28: Data Length  
XXh  
0479C6h CAN1 Mailbox 28: Data Field  
0479C7h  
XXXX XXXX  
XXXX XXXXh  
0479C8h  
0479C9h  
0479CAh  
0479CBh  
0479CCh  
0479CDh  
0479CEh CAN1 Mailbox 28: Time Stamp  
XXXXh  
0479CFh  
0479D0h CAN1 Mailbox 29: Message Identifier  
C1MB29  
XXXX XXXXh  
0479D1h  
0479D2h  
0479D3h  
0479D4h  
0479D5h CAN1 Mailbox 29: Data Length  
XXh  
0479D6h CAN1 Mailbox 29: Data Field  
0479D7h  
XXXX XXXX  
XXXX XXXXh  
0479D8h  
0479D9h  
0479DAh  
0479DBh  
0479DCh  
0479DDh  
0479DEh CAN1 Mailbox 29: Time Stamp  
0479DFh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 59 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.41  
SFR List (41)  
Address  
Register  
Symbol  
C1MB30  
Reset Value  
XXXX XXXXh  
0479E0h CAN1 Mailbox 30: Message Identifier  
0479E1h  
0479E2h  
0479E3h  
0479E4h  
0479E5h CAN1 Mailbox 30: Data Length  
XXh  
0479E6h CAN1 Mailbox 30: Data Field  
0479E7h  
XXXX XXXX  
XXXX XXXXh  
0479E8h  
0479E9h  
0479EAh  
0479EBh  
0479ECh  
0479EDh  
0479EEh CAN1 Mailbox 30: Time Stamp  
XXXXh  
0479EFh  
0479F0h CAN1 Mailbox 31: Message Identifier  
C1MB31  
XXXX XXXXh  
0479F1h  
0479F2h  
0479F3h  
0479F4h  
0479F5h CAN1 Mailbox 31: Data Length  
XXh  
0479F6h CAN1 Mailbox 31: Data Field  
0479F7h  
XXXX XXXX  
XXXX XXXXh  
0479F8h  
0479F9h  
0479FAh  
0479FBh  
0479FCh  
0479FDh  
0479FEh CAN1 Mailbox 31: Time Stamp  
XXXXh  
0479FFh  
047A00h CAN1 Mask Register 0  
047A01h  
047A02h  
047A03h  
047A04h CAN1 Mask Register 1  
047A05h  
047A06h  
047A07h  
047A08h CAN1 Mask Register 2  
047A09h  
047A0Ah  
047A0Bh  
C1MKR0  
C1MKR1  
C1MKR2  
C1MKR3  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
047A0Ch CAN1 Mask Register 3  
047A0Dh  
047A0Eh  
047A0Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 60 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.42  
SFR List (42)  
Address  
047A10h CAN1 Mask Register 4  
Register  
Symbol  
C1MKR4  
Reset Value  
XXXX XXXXh  
047A11h  
047A12h  
047A13h  
047A14h CAN1 Mask Register 5  
047A15h  
047A16h  
047A17h  
047A18h CAN1 Mask Register 6  
047A19h  
047A1Ah  
047A1Bh  
C1MKR5  
C1MKR6  
C1MKR7  
C1FIDCR0  
C1FIDCR1  
C1MKIVLR  
C1MIER  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
047A1Ch CAN1 Mask Register 7  
047A1Dh  
047A1Eh  
047A1Fh  
047A20h CAN1 FIFO Received ID Compare Register 0  
047A21h  
047A22h  
047A23h  
047A24h CAN1 FIFO Received ID Compare Register 1  
047A25h  
047A26h  
047A27h  
047A28h CAN1 Mask Invalid Register  
047A29h  
047A2Ah  
047A2Bh  
047A2Ch CAN1 Mailbox Interrupt Enable Register  
047A2Dh  
047A2Eh  
047A2Fh  
047A30h  
047A31h  
047A32h  
047A33h  
047A34h  
047A35h  
047A36h  
047A37h  
047A38h  
047A39h  
047A3Ah  
047A3Bh  
047A3Ch  
047A3Dh  
047A3Eh  
047A3Fh  
047A40h to  
047B1Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 61 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.43  
SFR List (43)  
Address  
Register  
Symbol  
C1MCTL0  
Reset Value  
047B20h CAN1 Message Control Register 0  
047B21h CAN1 Message Control Register 1  
047B22h CAN1 Message Control Register 2  
047B23h CAN1 Message Control Register 3  
047B24h CAN1 Message Control Register 4  
047B25h CAN1 Message Control Register 5  
047B26h CAN1 Message Control Register 6  
047B27h CAN1 Message Control Register 7  
047B28h CAN1 Message Control Register 8  
047B29h CAN1 Message Control Register 9  
047B2Ah CAN1 Message Control Register 10  
047B2Bh CAN1 Message Control Register 11  
047B2Ch CAN1 Message Control Register 12  
047B2Dh CAN1 Message Control Register 13  
047B2Eh CAN1 Message Control Register 14  
047B2Fh CAN1 Message Control Register 15  
047B30h CAN1 Message Control Register 16  
047B31h CAN1 Message Control Register 17  
047B32h CAN1 Message Control Register 18  
047B33h CAN1 Message Control Register 19  
047B34h CAN1 Message Control Register 20  
047B35h CAN1 Message Control Register 21  
047B36h CAN1 Message Control Register 22  
047B37h CAN1 Message Control Register 23  
047B38h CAN1 Message Control Register 24  
047B39h CAN1 Message Control Register 25  
047B3Ah CAN1 Message Control Register 26  
047B3Bh CAN1 Message Control Register 27  
047B3Ch CAN1 Message Control Register 28  
047B3Dh CAN1 Message Control Register 29  
047B3Eh CAN1 Message Control Register 30  
047B3Fh CAN1 Message Control Register 31  
X: Undefined  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
C1MCTL1  
C1MCTL2  
C1MCTL3  
C1MCTL4  
C1MCTL5  
C1MCTL6  
C1MCTL7  
C1MCTL8  
C1MCTL9  
C1MCTL10  
C1MCTL11  
C1MCTL12  
C1MCTL13  
C1MCTL14  
C1MCTL15  
C1MCTL16  
C1MCTL17  
C1MCTL18  
C1MCTL19  
C1MCTL20  
C1MCTL21  
C1MCTL22  
C1MCTL23  
C1MCTL24  
C1MCTL25  
C1MCTL26  
C1MCTL27  
C1MCTL28  
C1MCTL29  
C1MCTL30  
C1MCTL31  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 62 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.44  
SFR List (44)  
Address  
047B40h CAN1 Control Register  
047B41h  
047B42h CAN1 Status Register  
047B43h  
047B44h CAN1 Bit Configuration Register  
047B45h  
Register  
Symbol  
C1CTLR  
Reset Value  
0000 0101b  
0000 0000b  
0000 0101b  
0000 0000b  
00 0000h  
C1STR  
C1BCR  
047B46h  
047B47h CAN1 Clock Select Register  
047B48h CAN1 Receive FIFO Control Register  
047B49h CAN1 Receive FIFO Pointer Control Register  
047B4Ah CAN1 Transmit FIFO Control Register  
047B4Bh CAN1 Transmit FIFO Pointer Control Register  
047B4Ch CAN1 Error Interrupt Enable Register  
047B4Dh CAN1 Error Interrupt Factor Judge Register  
047B4Eh CAN1 Receive Error Count Register  
047B4Fh CAN1 Transmit Error Count Register  
047B50h CAN1 Error Code Store Register  
047B51h CAN1 Channel Search Support Register  
047B52h CAN1 Mailbox Search Status Register  
047B53h CAN1 Mailbox Search Mode Register  
047B54h CAN1 Time Stamp Register  
047B55h  
C1CLKR  
C1RFCR  
C1RFPCR  
C1TFCR  
C1TFPCR  
C1EIER  
000X 0000b  
1000 0000b  
XXh  
1000 0000b  
XXh  
00h  
00h  
00h  
00h  
00h  
XXh  
1000 0000b  
0000 0000b  
0000h  
C1EIFR  
C1RECR  
C1TECR  
C1ECSR  
C1CSSR  
C1MSSR  
C1MSMR  
C1TSR  
047B56h CAN1 Acceptance Filter Support Register  
047B57h  
047B58h CAN1 Test Control Register  
047B59h  
C1AFSR  
C1TCR  
XXXXh  
00h  
047B5Ah  
047B5Bh  
047B5Ch  
047B5Dh  
047B5Eh  
047B5Fh  
047B60h to  
047BFFh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 63 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.45  
SFR List (45)  
Address  
Register  
Symbol  
C0MB0  
Reset Value  
XXXX XXXXh  
047C00h CAN0 Mailbox 0: Message Identifier  
047C01h  
047C02h  
047C03h  
047C04h  
047C05h CAN0 Mailbox 0: Data Length  
XXh  
047C06h CAN0 Mailbox 0: Data Field  
047C07h  
XXXX XXXX  
XXXX XXXXh  
047C08h  
047C09h  
047C0Ah  
047C0Bh  
047C0Ch  
047C0Dh  
047C0Eh CAN0 Mailbox 0: Time Stamp  
XXXXh  
047C0Fh  
047C10h CAN0 Mailbox 1: Message Identifier  
C0MB1  
XXXX XXXXh  
047C11h  
047C12h  
047C13h  
047C14h  
047C15h CAN0 Mailbox 1: Data Length  
XXh  
047C16h CAN0 Mailbox 1: Data Field  
047C17h  
XXXX XXXX  
XXXX XXXXh  
047C18h  
047C19h  
047C1Ah  
047C1Bh  
047C1Ch  
047C1Dh  
047C1Eh CAN0 Mailbox 1: Time Stamp  
XXXXh  
047C1Fh  
047C20h CAN0 Mailbox 2: Message Identifier  
C0MB2  
XXXX XXXXh  
047C21h  
047C22h  
047C23h  
047C24h  
047C25h CAN0 Mailbox 2: Data Length  
XXh  
047C26h CAN0 Mailbox 2: Data Field  
047C27h  
XXXX XXXX  
XXXX XXXXh  
047C28h  
047C29h  
047C2Ah  
047C2Bh  
047C2Ch  
047C2Dh  
047C2Eh CAN0 Mailbox 2: Time Stamp  
047C2Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 64 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.46  
SFR List (46)  
Address  
Register  
Symbol  
C0MB3  
Reset Value  
XXXX XXXXh  
047C30h CAN0 Mailbox 3: Message Identifier  
047C31h  
047C32h  
047C33h  
047C34h  
047C35h CAN0 Mailbox 3: Data Length  
XXh  
047C36h CAN0 Mailbox 3: Data Field  
047C37h  
XXXX XXXX  
XXXX XXXXh  
047C38h  
047C39h  
047C3Ah  
047C3Bh  
047C3Ch  
047C3Dh  
047C3Eh CAN0 Mailbox 3: Time Stamp  
XXXXh  
047C3Fh  
047C40h CAN0 Mailbox 4: Message Identifier  
C0MB4  
XXXX XXXXh  
047C41h  
047C42h  
047C43h  
047C44h  
047C45h CAN0 Mailbox 4: Data Length  
XXh  
047C46h CAN0 Mailbox 4: Data Field  
047C47h  
XXXX XXXX  
XXXX XXXXh  
047C48h  
047C49h  
047C4Ah  
047C4Bh  
047C4Ch  
047C4Dh  
047C4Eh CAN0 Mailbox 4: Time Stamp  
XXXXh  
047C4Fh  
047C50h CAN0 Mailbox 5: Message Identifier  
C0MB5  
XXXX XXXXh  
047C51h  
047C52h  
047C53h  
047C54h  
047C55h CAN0 Mailbox 5: Data Length  
XXh  
047C56h CAN0 Mailbox 5: Data Field  
047C57h  
XXXX XXXX  
XXXX XXXXh  
047C58h  
047C59h  
047C5Ah  
047C5Bh  
047C5Ch  
047C5Dh  
047C5Eh CAN0 Mailbox 5: Time Stamp  
047C5Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 65 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.47  
SFR List (47)  
Address  
Register  
Symbol  
C0MB6  
Reset Value  
XXXX XXXXh  
047C60h CAN0 Mailbox 6: Message Identifier  
047C61h  
047C62h  
047C63h  
047C64h  
047C65h CAN0 Mailbox 6: Data Length  
XXh  
047C66h CAN0 Mailbox 6: Data Field  
047C67h  
XXXX XXXX  
XXXX XXXXh  
047C68h  
047C69h  
047C6Ah  
047C6Bh  
047C6Ch  
047C6Dh  
047C6Eh CAN0 Mailbox 6: Time Stamp  
XXXXh  
047C6Fh  
047C70h CAN0 Mailbox 7: Message Identifier  
C0MB7  
XXXX XXXXh  
047C71h  
047C72h  
047C73h  
047C74h  
047C75h CAN0 Mailbox 7: Data Length  
XXh  
047C76h CAN0 Mailbox 7: Data Field  
047C77h  
XXXX XXXX  
XXXX XXXXh  
047C78h  
047C79h  
047C7Ah  
047C7Bh  
047C7Ch  
047C7Dh  
047C7Eh CAN0 Mailbox 7: Time Stamp  
XXXXh  
047C7Fh  
047C80h CAN0 Mailbox 8: Message Identifier  
C0MB8  
XXXX XXXXh  
047C81h  
047C82h  
047C83h  
047C84h  
047C85h CAN0 Mailbox 8: Data Length  
XXh  
047C86h CAN0 Mailbox 8: Data Field  
047C87h  
XXXX XXXX  
XXXX XXXXh  
047C88h  
047C89h  
047C8Ah  
047C8Bh  
047C8Ch  
047C8Dh  
047C8Eh CAN0 Mailbox 8: Time Stamp  
047C8Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 66 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.48  
SFR List (48)  
Address  
Register  
Symbol  
C0MB9  
Reset Value  
XXXX XXXXh  
047C90h CAN0 Mailbox 9: Message Identifier  
047C91h  
047C92h  
047C93h  
047C94h  
047C95h CAN0 Mailbox 9: Data Length  
XXh  
047C96h CAN0 Mailbox 9: Data Field  
047C97h  
XXXX XXXX  
XXXX XXXXh  
047C98h  
047C99h  
047C9Ah  
047C9Bh  
047C9Ch  
047C9Dh  
047C9Eh CAN0 Mailbox 9: Time Stamp  
XXXXh  
047C9Fh  
047CA0h CAN0 Mailbox 10: Message Identifier  
C0MB10  
XXXX XXXXh  
047CA1h  
047CA2h  
047CA3h  
047CA4h  
047CA5h CAN0 Mailbox 10: Data Length  
XXh  
047CA6h CAN0 Mailbox 10: Data Field  
047CA7h  
XXXX XXXX  
XXXX XXXXh  
047CA8h  
047CA9h  
047CAAh  
047CABh  
047CACh  
047CADh  
047CAEh CAN0 Mailbox 10: Time Stamp  
XXXXh  
047CAFh  
047CB0h CAN0 Mailbox 11: Message Identifier  
C0MB11  
XXXX XXXXh  
047CB1h  
047CB2h  
047CB3h  
047CB4h  
047CB5h CAN0 Mailbox 11: Data Length  
XXh  
047CB6h CAN0 Mailbox 11: Data Field  
047CB7h  
XXXX XXXX  
XXXX XXXXh  
047CB8h  
047CB9h  
047CBAh  
047CBBh  
047CBCh  
047CBDh  
047CBEh CAN0 Mailbox 11: Time Stamp  
047CBFh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 67 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.49  
SFR List (49)  
Address  
Register  
Symbol  
C0MB12  
Reset Value  
XXXX XXXXh  
047CC0h CAN0 Mailbox 12: Message Identifier  
047CC1h  
047CC2h  
047CC3h  
047CC4h  
047CC5h CAN0 Mailbox 12: Data Length  
XXh  
047CC6h CAN0 Mailbox 12: Data Field  
047CC7h  
XXXX XXXX  
XXXX XXXXh  
047CC8h  
047CC9h  
047CCAh  
047CCBh  
047CCCh  
047CCDh  
047CCEh CAN0 Mailbox 12: Time Stamp  
XXXXh  
047CCFh  
047CD0h CAN0 Mailbox 13: Message Identifier  
C0MB13  
XXXX XXXXh  
047CD1h  
047CD2h  
047CD3h  
047CD4h  
047CD5h CAN0 Mailbox 13: Data Length  
XXh  
047CD6h CAN0 Mailbox 13: Data Field  
047CD7h  
XXXX XXXX  
XXXX XXXXh  
047CD8h  
047CD9h  
047CDAh  
047CDBh  
047CDCh  
047CDDh  
047CDEh CAN0 Mailbox 13: Time Stamp  
XXXXh  
047CDFh  
047CE0h CAN0 Mailbox 14: Message Identifier  
C0MB14  
XXXX XXXXh  
047CE1h  
047CE2h  
047CE3h  
047CE4h  
047CE5h CAN0 Mailbox 14: Data Length  
XXh  
047CE6h CAN0 Mailbox 14: Data Field  
047CE7h  
XXXX XXXX  
XXXX XXXXh  
047CE8h  
047CE9h  
047CEAh  
047CEBh  
047CECh  
047CEDh  
047CEEh CAN0 Mailbox 14: Time Stamp  
047CEFh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 68 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.50  
SFR List (50)  
Address  
Register  
Symbol  
C0MB15  
Reset Value  
XXXX XXXXh  
047CF0h CAN0 Mailbox 15: Message Identifier  
047CF1h  
047CF2h  
047CF3h  
047CF4h  
047CF5h CAN0 Mailbox 15: Data Length  
XXh  
047CF6h CAN0 Mailbox 15: Data Field  
047CF7h  
XXXX XXXX  
XXXX XXXXh  
047CF8h  
047CF9h  
047CFAh  
047CFBh  
047CFCh  
047CFDh  
047CFEh CAN0 Mailbox 15: Time Stamp  
XXXXh  
047CFFh  
047D00h CAN0 Mailbox 16: Message Identifier  
C0MB16  
XXXX XXXXh  
047D01h  
047D02h  
047D03h  
047D04h  
047D05h CAN0 Mailbox 16: Data Length  
XXh  
047D06h CAN0 Mailbox 16: Data Field  
047D07h  
XXXX XXXX  
XXXX XXXXh  
047D08h  
047D09h  
047D0Ah  
047D0Bh  
047D0Ch  
047D0Dh  
047D0Eh CAN0 Mailbox 16: Time Stamp  
XXXXh  
047D0Fh  
047D10h CAN0 Mailbox 17: Message Identifier  
C0MB17  
XXXX XXXXh  
047D11h  
047D12h  
047D13h  
047D14h  
047D15h CAN0 Mailbox 17: Data Length  
XXh  
047D16h CAN0 Mailbox 17: Data Field  
047D17h  
XXXX XXXX  
XXXX XXXXh  
047D18h  
047D19h  
047D1Ah  
047D1Bh  
047D1Ch  
047D1Dh  
047D1Eh CAN0 Mailbox 17: Time Stamp  
047D1Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 69 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.51  
SFR List (51)  
Address  
Register  
Symbol  
C0MB18  
Reset Value  
XXXX XXXXh  
047D20h CAN0 Mailbox 18: Message Identifier  
047D21h  
047D22h  
047D23h  
047D24h  
047D25h CAN0 Mailbox 18: Data Length  
XXh  
047D26h CAN0 Mailbox 18: Data Field  
047D27h  
XXXX XXXX  
XXXX XXXXh  
047D28h  
047D29h  
047D2Ah  
047D2Bh  
047D2Ch  
047D2Dh  
047D2Eh CAN0 Mailbox 18: Time Stamp  
XXXXh  
047D2Fh  
047D30h CAN0 Mailbox 19: Message Identifier  
C0MB19  
XXXX XXXXh  
047D31h  
047D32h  
047D33h  
047D34h  
047D35h CAN0 Mailbox 19: Data Length  
XXh  
047D36h CAN0 Mailbox 19: Data Field  
047D37h  
XXXX XXXX  
XXXX XXXXh  
047D38h  
047D39h  
047D3Ah  
047D3Bh  
047D3Ch  
047D3Dh  
047D3Eh CAN0 Mailbox 19: Time Stamp  
XXXXh  
047D3Fh  
047D40h CAN0 Mailbox 20: Message Identifier  
C0MB20  
XXXX XXXXh  
047D41h  
047D42h  
047D43h  
047D44h  
047D45h CAN0 Mailbox 20: Data Length  
XXh  
047D46h CAN0 Mailbox 20: Data Field  
047D47h  
XXXX XXXX  
XXXX XXXXh  
047D48h  
047D49h  
047D4Ah  
047D4Bh  
047D4Ch  
047D4Dh  
047D4Eh CAN0 Mailbox 20: Time Stamp  
047D4Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 70 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.52  
SFR List (52)  
Address  
Register  
Symbol  
C0MB21  
Reset Value  
XXXX XXXXh  
047D50h CAN0 Mailbox 21: Message Identifier  
047D51h  
047D52h  
047D53h  
047D54h  
047D55h CAN0 Mailbox 21: Data Length  
XXh  
047D56h CAN0 Mailbox 21: Data Field  
047D57h  
XXXX XXXX  
XXXX XXXXh  
047D58h  
047D59h  
047D5Ah  
047D5Bh  
047D5Ch  
047D5Dh  
047D5Eh CAN0 Mailbox 21: Time Stamp  
XXXXh  
047D5Fh  
047D60h CAN0 Mailbox 22: Message Identifier  
C0MB22  
XXXX XXXXh  
047D61h  
047D62h  
047D63h  
047D64h  
047D65h CAN0 Mailbox 22: Data Length  
XXh  
047D66h CAN0 Mailbox 22: Data Field  
047D67h  
XXXX XXXX  
XXXX XXXXh  
047D68h  
047D69h  
047D6Ah  
047D6Bh  
047D6Ch  
047D6Dh  
047D6Eh CAN0 Mailbox 22: Time Stamp  
XXXXh  
047D6Fh  
047D70h CAN0 Mailbox 23: Message Identifier  
C0MB23  
XXXX XXXXh  
047D71h  
047D72h  
047D73h  
047D74h  
047D75h CAN0 Mailbox 23: Data Length  
XXh  
047D76h CAN0 Mailbox 23: Data Field  
047D77h  
XXXX XXXX  
XXXX XXXXh  
047D78h  
047D79h  
047D7Ah  
047D7Bh  
047D7Ch  
047D7Dh  
047D7Eh CAN0 Mailbox 23: Time Stamp  
047D7Fh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 71 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.53  
SFR List (53)  
Address  
Register  
Symbol  
C0MB24  
Reset Value  
XXXX XXXXh  
047D80h CAN0 Mailbox 24: Message Identifier  
047D81h  
047D82h  
047D83h  
047D84h  
047D85h CAN0 Mailbox 24: Data Length  
XXh  
047D86h CAN0 Mailbox 24: Data Field  
047D87h  
XXXX XXXX  
XXXX XXXXh  
047D88h  
047D89h  
047D8Ah  
047D8Bh  
047D8Ch  
047D8Dh  
047D8Eh CAN0 Mailbox 24: Time Stamp  
XXXXh  
047D8Fh  
047D90h CAN0 Mailbox 25: Message Identifier  
C0MB25  
XXXX XXXXh  
047D91h  
047D92h  
047D93h  
047D94h  
047D95h CAN0 Mailbox 25: Data Length  
XXh  
047D96h CAN0 Mailbox 25: Data Field  
047D97h  
XXXX XXXX  
XXXX XXXXh  
047D98h  
047D99h  
047D9Ah  
047D9Bh  
047D9Ch  
047D9Dh  
047D9Eh CAN0 Mailbox 25: Time Stamp  
XXXXh  
047D9Fh  
047DA0h CAN0 Mailbox 26: Message Identifier  
C0MB26  
XXXX XXXXh  
047DA1h  
047DA2h  
047DA3h  
047DA4h  
047DA5h CAN0 Mailbox 26: Data Length  
XXh  
047DA6h CAN0 Mailbox 26: Data Field  
047DA7h  
XXXX XXXX  
XXXX XXXXh  
047DA8h  
047DA9h  
047DAAh  
047DABh  
047DACh  
047DADh  
047DAEh CAN0 Mailbox 26: Time Stamp  
047DAFh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 72 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.54  
SFR List (54)  
Address  
Register  
Symbol  
C0MB27  
Reset Value  
XXXX XXXXh  
047DB0h CAN0 Mailbox 27: Message Identifier  
047DB1h  
047DB2h  
047DB3h  
047DB4h  
047DB5h CAN0 Mailbox 27: Data Length  
XXh  
047DB6h CAN0 Mailbox 27: Data Field  
047DB7h  
XXXX XXXX  
XXXX XXXXh  
047DB8h  
047DB9h  
047DBAh  
047DBBh  
047DBCh  
047DBDh  
047DBEh CAN0 Mailbox 27: Time Stamp  
XXXXh  
047DBFh  
047DC0h CAN0 Mailbox 28: Message Identifier  
C0MB28  
XXXX XXXXh  
047DC1h  
047DC2h  
047DC3h  
047DC4h  
047DC5h CAN0 Mailbox 28: Data Length  
XXh  
047DC6h CAN0 Mailbox 28: Data Field  
047DC7h  
XXXX XXXX  
XXXX XXXXh  
047DC8h  
047DC9h  
047DCAh  
047DCBh  
047DCCh  
047DCDh  
047DCEh CAN0 Mailbox 28: Time Stamp  
XXXXh  
047DCFh  
047DD0h CAN0 Mailbox 29: Message Identifier  
C0MB29  
XXXX XXXXh  
047DD1h  
047DD2h  
047DD3h  
047DD4h  
047DD5h CAN0 Mailbox 29: Data Length  
XXh  
047DD6h CAN0 Mailbox 29: Data Field  
047DD7h  
XXXX XXXX  
XXXX XXXXh  
047DD8h  
047DD9h  
047DDAh  
047DDBh  
047DDCh  
047DDDh  
047DDEh CAN0 Mailbox 29: Time Stamp  
047DDFh  
XXXXh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 73 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.55  
SFR List (55)  
Address  
Register  
Symbol  
C0MB30  
Reset Value  
XXXX XXXXh  
047DE0h CAN0 Mailbox 30: Message Identifier  
047DE1h  
047DE2h  
047DE3h  
047DE4h  
047DE5h CAN0 Mailbox 30: Data Length  
XXh  
047DE6h CAN0 Mailbox 30: Data Field  
047DE7h  
XXXX XXXX  
XXXX XXXXh  
047DE8h  
047DE9h  
047DEAh  
047DEBh  
047DECh  
047DEDh  
047DEEh CAN0 Mailbox 30: Time Stamp  
XXXXh  
047DEFh  
047DF0h CAN0 Mailbox 31: Message Identifier  
C0MB31  
XXXX XXXXh  
047DF1h  
047DF2h  
047DF3h  
047DF4h  
047DF5h CAN0 Mailbox 31: Data Length  
XXh  
047DF6h CAN0 Mailbox 31: Data Field  
047DF7h  
XXXX XXXX  
XXXX XXXXh  
047DF8h  
047DF9h  
047DFAh  
047DFBh  
047DFCh  
047DFDh  
047DFEh CAN0 Mailbox 31: Time Stamp  
XXXXh  
047DFFh  
047E00h CAN0 Mask Register 0  
047E01h  
047E02h  
047E03h  
047E04h CAN0 Mask Register 1  
047E05h  
047E06h  
047E07h  
047E08h CAN0 Mask Register 2  
047E09h  
047E0Ah  
047E0Bh  
C0MKR0  
C0MKR1  
C0MKR2  
C0MKR3  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
047E0Ch CAN0 Mask Register 3  
047E0Dh  
047E0Eh  
047E0Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 74 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.56  
SFR List (56)  
Address  
047E10h CAN0 Mask Register 4  
Register  
Symbol  
C0MKR4  
Reset Value  
XXXX XXXXh  
047E11h  
047E12h  
047E13h  
047E14h CAN0 Mask Register 5  
047E15h  
047E16h  
047E17h  
047E18h CAN0 Mask Register 6  
047E19h  
047E1Ah  
047E1Bh  
C0MKR5  
C0MKR6  
C0MKR7  
C0FIDCR0  
C0FIDCR1  
C0MKIVLR  
C0MIER  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
XXXX XXXXh  
047E1Ch CAN0 Mask Register 7  
047E1Dh  
047E1Eh  
047E1Fh  
047E20h CAN0 FIFO Receive ID Compare Register 0  
047E21h  
047E22h  
047E23h  
047E24h CAN0 FIFO Receive ID Compare Register 1  
047E25h  
047E26h  
047E27h  
047E28h CAN0 Mask Invalid Register  
047E29h  
047E2Ah  
047E2Bh  
047E2Ch CAN0 Mailbox Interrupt Enable Register  
047E2Dh  
047E2Eh  
047E2Fh  
047E30h  
047E31h  
047E32h  
047E33h  
047E34h  
047E35h  
047E36h  
047E37h  
047E38h  
047E39h  
047E3Ah  
047E3Bh  
047E3Ch  
047E3Dh  
047E3Eh  
047E3Fh  
047E40h to  
047F1Fh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 75 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.57  
SFR List (57)  
Address  
Register  
Symbol  
C0MCTL0  
Reset Value  
047F20h CAN0 Message Control Register 0  
047F21h CAN0 Message Control Register 1  
047F22h CAN0 Message Control Register 2  
047F23h CAN0 Message Control Register 3  
047F24h CAN0 Message Control Register 4  
047F25h CAN0 Message Control Register 5  
047F26h CAN0 Message Control Register 6  
047F27h CAN0 Message Control Register 7  
047F28h CAN0 Message Control Register 8  
047F29h CAN0 Message Control Register 9  
047F2Ah CAN0 Message Control Register 10  
047F2Bh CAN0 Message Control Register 11  
047F2Ch CAN0 Message Control Register 12  
047F2Dh CAN0 Message Control Register 13  
047F2Eh CAN0 Message Control Register 14  
047F2Fh CAN0 Message Control Register 15  
047F30h CAN0 Message Control Register 16  
047F31h CAN0 Message Control Register 17  
047F32h CAN0 Message Control Register 18  
047F33h CAN0 Message Control Register 19  
047F34h CAN0 Message Control Register 20  
047F35h CAN0 Message Control Register 21  
047F36h CAN0 Message Control Register 22  
047F37h CAN0 Message Control Register 23  
047F38h CAN0 Message Control Register 24  
047F39h CAN0 Message Control Register 25  
047F3Ah CAN0 Message Control Register 26  
047F3Bh CAN0 Message Control Register 27  
047F3Ch CAN0 Message Control Register 28  
047F3Dh CAN0 Message Control Register 29  
047F3Eh CAN0 Message Control Register 30  
047F3Fh CAN0 Message Control Register 31  
X: Undefined  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
00h  
C0MCTL1  
C0MCTL2  
C0MCTL3  
C0MCTL4  
C0MCTL5  
C0MCTL6  
C0MCTL7  
C0MCTL8  
C0MCTL9  
C0MCTL10  
C0MCTL11  
C0MCTL12  
C0MCTL13  
C0MCTL14  
C0MCTL15  
C0MCTL16  
C0MCTL17  
C0MCTL18  
C0MCTL19  
C0MCTL20  
C0MCTL21  
C0MCTL22  
C0MCTL23  
C0MCTL24  
C0MCTL25  
C0MCTL26  
C0MCTL27  
C0MCTL28  
C0MCTL29  
C0MCTL30  
C0MCTL31  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 76 of 115  
R32C/156 Group  
4. Special Function Registers (SFRs)  
Table 4.58  
SFR List (58)  
Address  
047F40h CAN0 Control Register  
047F41h  
047F42h CAN0 Status Register  
047F43h  
047F44h CAN0 Bit Configuration Register  
047F45h  
Register  
Symbol  
C0CTLR  
Reset Value  
0000 0101b  
0000 0000b  
0000 0101b  
0000 0000b  
00 0000h  
C0STR  
C0BCR  
047F46h  
047F47h CAN0 Clock Select Register  
047F48h CAN0 Receive FIFO Control Register  
047F49h CAN0 Receive FIFO Pointer Control Register  
047F4Ah CAN0 Transmit FIFO Control Register  
047F4Bh CAN0 Transmit FIFO Pointer Control Register  
047F4Ch CAN0 Error Interrupt Enable Register  
047F4Dh CAN0 Error Interrupt Factor Judge Register  
047F4Eh CAN0 Receive Error Count Register  
047F4Fh CAN0 Transmit Error Count Register  
047F50h CAN0 Error Code Store Register  
047F51h CAN0 Channel Search Support Register  
047F52h CAN0 Mailbox Search Status Register  
047F53h CAN0 Mailbox Search Mode Register  
047F54h CAN0 Time Stamp Register  
047F55h  
C0CLKR  
C0RFCR  
C0RFPCR  
C0TFCR  
C0TFPCR  
C0EIER  
000X 0000b  
1000 0000b  
XXh  
1000 0000b  
XXh  
00h  
00h  
00h  
00h  
00h  
XXh  
1000 0000b  
0000 0000b  
0000h  
C0EIFR  
C0RECR  
C0TECR  
C0ECSR  
C0CSSR  
C0MSSR  
C0MSMR  
C0TSR  
047F56h CAN0 Acceptance Filter Support Register  
047F57h  
047F58h CAN0 Test Control Register  
047F59h  
C0AFSR  
C0TCR  
XXXXh  
00h  
047F5Ah  
047F5Bh  
047F5Ch  
047F5Dh  
047F5Eh  
047F5Fh  
047F60h to  
047FFFh  
048000h to  
04FFFFh  
X: Undefined  
Blanks are reserved. No access is allowed.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 77 of 115  
R32C/156 Group  
5. Electrical Characteristics  
5. Electrical Characteristics  
(1)  
Table 5.1  
Absolute Maximum Ratings  
Symbol  
Characteristic  
Condition  
Value  
Unit  
V
V
Supply voltage  
Analog supply voltage  
V
= AV  
-0.3 to 6.0  
-0.3 to 6.0  
CC  
CC  
CC  
CC  
AV  
V
= AV  
V
CC  
CC  
V
Input  
XIN, RESET, CNVSS, NSD, V  
,
I
REF  
voltage  
P0_0 to P0_7, P1_0 to P1_7,  
P2_0 to P2_7, P3_0 to P3_7,  
P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7,  
P8_0 to P8_7, P9_0 to P9_7,  
-0.3 to V + 0.3  
V
CC  
P10_0 to P10_7, P11_0 to P11_4,  
P12_0 to P12_7, P13_0 to P13_7,  
P14_1, P14_3 to P14_6,  
P15_0 to P15_7  
V
Output  
voltage  
XOUT, P0_0 to P0_7, P1_0 to P1_7,  
P2_0 to P2_7, P3_0 to P3_7,  
P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7,  
P8_0 to P8_4, P8_6, P8_7,  
P9_0 to P9_7, P10_0 to P10_7,  
P11_0 to P11_4, P12_0 to P12_7,  
P13_0 to P13_7, P14_3 to P14_6,  
P15_0 to P15_7  
O
-0.3 to V + 0.3  
V
CC  
P
T
Power consumption  
T = 25°C  
a
500  
mW  
°C  
d
Operating temperature range  
Storage temperature range  
-40 to 125  
-65 to 150  
°C  
stg  
Note:  
1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to  
the device. This is a stress rating only and functional operation of the device at these or any other  
conditions above those indicated in the operational sections of this specification is not implied.  
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 78 of 115  
R32C/156 Group  
5. Electrical Characteristics  
(1)  
Table 5.2  
Operating Conditions (1/6)  
Value  
Unit  
Symbol  
Characteristic  
Min.  
3.0  
Typ.  
5.0  
Max.  
5.5  
V
Digital supply voltage  
V
V
CC  
V
AV  
V
Analog supply voltage  
Reference voltage  
CC  
CC  
V
3.0  
V
REF  
SS  
CC  
V
Digital ground voltage  
Analog ground voltage  
0
0
V
AV  
V
SS  
dV /dt V ramp up rate (V < 2.0 V)  
0.05  
V/ms  
V
CC  
CC  
CC  
V
High level  
input  
voltage  
XIN, RESET, CNVSS, NSD  
0.8 × V  
V
IH  
CC  
CC  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7  
P9_0 to P9_7, P10_0 to P10_7,  
(2)  
,
0.7 × V  
V
V
V
V
CC  
CC  
P11_0 to P11_4, P12_0 to P12_7,  
P13_0 to P13_7, P14_1, P14_3 to P14_6,  
P15_0 to P15_7  
V
Low level  
input  
voltage  
XIN, RESET, CNVSS, NSD  
0.2 × V  
0
0
IL  
CC  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7  
P9_0 to P9_7, P10_0 to P10_7,  
(2)  
,
0.3 × V  
CC  
P11_0 to P11_4, P12_0 to P12_7,  
P13_0 to P13_7, P14_1, P14_3 to P14_6,  
P15_0 to P15_7  
T
Operating  
temperature  
range  
J version  
L version  
K version  
-40  
-40  
-40  
85  
°C  
°C  
°C  
opr  
105  
125  
Notes:  
1. The device is operationally guaranteed under these operating conditions.  
2. and V for P8_7 are specified for P8_7 as a programmable port. These values are not applicable  
V
IH  
IL  
for P8_7 as XCIN.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 79 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Table 5.3  
Operating Conditions (2/6)  
(1)  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
(2)  
Value  
Min. Typ. Max.  
Symbol  
Characteristic  
Unit  
C
Decoupling capacitance for voltage  
regulator  
Inter-pin voltage: 1.5 V  
VDC  
2.4  
10.0 µF  
Notes:  
1. The device is operationally guaranteed under these operating conditions.  
2. This value should be met with due consideration to the following conditions: operating temperature,  
DC bias, aging, etc.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 80 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Table 5.4  
Operating Conditions (3/6)  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
(1)  
CC  
SS  
a
opr  
Value  
Typ.  
Symbol  
Characteristic  
High level P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
Unit  
Min.  
Max.  
I
I
I
I
OH  
(peak)  
peak  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4, P8_6,  
P8_7, P9_0 to P9_7, P10_0 to P10_7,  
output  
current  
-10.0 mA  
(2)  
P11_0 to P11_4, P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
High level P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
average P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
OH  
(avg)  
output  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4, P8_6,  
P8_7, P9_0 to P9_7, P10_0 to P10_7,  
P11_0 to P11_4, P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
-5.0  
mA  
(3)  
current  
Low level P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
OL  
(peak)  
(avg)  
peak  
output  
current  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4, P8_6,  
P8_7, P9_0 to P9_7, P10_0 to P10_7,  
P11_0 to P11_4, P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
10.0 mA  
(2)  
Low level P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
average P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
OL  
output  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4, P8_6,  
P8_7, P9_0 to P9_7, P10_0 to P10_7,  
5.0  
mA  
(3)  
current  
P11_0 to P11_4, P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
Notes:  
1. The device is operationally guaranteed under these operating conditions.  
2. The following conditions should be satisfied:  
• The sum of I  
• The sum of I  
• The sum of I  
• The sum of I  
• The sum of I  
• The sum of I  
of ports P0, P1, P2, P8_6, P8_7, P9, P10, P11, P14, and P15 is 80 mA or less.  
of ports P3, P4, P5, P6, P7, P8_0 to P8_4, P12, and P13 is 80 mA or less.  
of ports P0, P1, P2, and P11 is -40 mA or less.  
OL(peak)  
OL(peak)  
OH(peak)  
OH(peak)  
OH(peak)  
OH(peak)  
of ports P8_6, P8_7, P9, P10, P14, and P15 is -40 mA or less.  
of ports P3, P4, P5, P12, and P13 is -40 mA or less.  
of ports P6, P7, and P8_0 to P8_4 is -40 mA or less.  
3. Average value within 100 ms.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 81 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Table 5.5  
Operating Conditions (4/6)  
(1)  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Typ.  
Symbol  
Characteristic  
Unit  
Min.  
4
Max.  
8
f
f
f
f
t
f
t
f
t
f
f
Main clock oscillator frequency  
Reference clock frequency  
PLL clock oscillator frequency  
Base clock frequency  
MHz  
MHz  
MHz  
MHz  
ns  
(XIN)  
2
4
(XRef)  
(PLL)  
96  
144  
64  
(Base)  
c(Base)  
(CPU)  
Base clock cycle time  
15.625  
15.625  
31.25  
CPU operating frequency  
CPU clock cycle time  
64  
32  
MHz  
ns  
(CPU)  
c
Peripheral bus clock operating frequency  
Peripheral bus clock cycle time  
Peripheral clock source frequency  
Sub clock oscillator frequency  
MHz  
ns  
(BCLK)  
(BCLK)  
c
32  
50  
MHz  
kHz  
(PER)  
32.768  
(XCIN)  
Note:  
1. The device is operationally guaranteed under these operating conditions.  
tc(Base)  
Base clock  
(internal signal)  
tc(CPU)  
CPU clock  
(internal signal)  
tc(BCLK)  
Peripheral bus clock  
(internal signal)  
Figure 5.1  
Clock Cycle Time  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 82 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Table 5.6  
Operating Conditions (5/6)  
(1, 2)  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Measurement  
Condition  
Symbol  
Characteristic  
Unit  
mA  
Min. Typ. Max.  
I
High input  
injection  
current  
P0_0 to P0_7, P1_0 to P1_7,  
P2_0 to P2_7, P3_0 to P3_7,  
P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_5, P7_7,  
P8_0 to P8_5, P9_1, P9_3 to P9_6,  
P10_0 to P10_7, P11_0 to P11_4,  
P12_0 to P12_7, P13_0 to P13_7,  
P14_1, P14_3 to P14_6,  
IC(H)  
V > V  
2
I
CC  
P15_0 to P15_7  
I
Low input  
injection  
current  
P0_0 to P0_7, P1_0 to P1_7,  
P2_0 to P2_7, P3_0 to P3_7,  
P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_5, P7_7,  
P8_0 to P8_5, P9_1, P9_3 to P9_6,  
P10_0 to P10_7, P11_0 to P11_4,  
P12_0 to P12_7, P13_0 to P13_7,  
P14_1, P14_3 to P14_6,  
IC(L)  
V < V  
-2  
mA  
I
SS  
P15_0 to P15_7  
|I |  
Total injection current  
20 mA  
IC  
Notes:  
1. The device is operationally guaranteed under these operating conditions.  
2. These conditions are applicable when each port is designated as input.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 83 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Table 5.7  
Operating Conditions (6/6)  
(1)  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Symbol  
Characteristic  
Unit  
Min.  
Typ. Max.  
0.5  
V
Allowable ripple voltage  
V
V
V
V
= 5.0 V  
= 3.0 V  
= 5.0 V  
= 3.0 V  
Vp-p  
Vp-p  
r(VCC)  
CC  
CC  
CC  
CC  
0.3  
dV  
/dt Ripple voltage gradient  
±0.3 V/ms  
±0.3 V/ms  
r(VCC)  
f
Allowable ripple frequency  
10  
kHz  
r(VCC)  
Note:  
1. The device is operationally guaranteed under these operating conditions.  
1 / fr(VCC)  
VCC  
Vr(VCC)  
Figure 5.2  
Ripple Waveform  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 84 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Table 5.8  
Electrical Characteristics of Flash Memory  
(V = 3.0 to 5.5 V, V = 0 V, and Ta = T , unless otherwise noted)  
CC  
SS  
opr  
Value  
Symbol  
Characteristic  
Unit  
Min.  
1000  
Typ. Max.  
(1)  
Program area  
Data area  
Cycles  
Program/erase cycles  
4-word program time  
Lock bit program time  
Block erasure time  
10000  
Cycles  
Program area  
Data area  
150  
300 1700  
70 500  
140 1000  
900  
µs  
µs  
µs  
µs  
s
Program area  
Data area  
4-Kbyte block  
32-Kbyte block  
64-Kbyte block  
0.12  
0.17  
0.20  
3.0  
3.0  
3.0  
s
s
(2)  
(3, 4)  
Data retention  
T = 55°C  
a
20  
Years  
Notes:  
1. Program/erase definition  
This value represents the number of erasures per block.  
When the number of program/erase cycles is n, each block can be erased n times.  
For example, if a 4-word write is performed in 512 different addresses in the 4-Kbyte block A and  
then the block is erased, this is counted as a single program/erase operation.  
However, the same address cannot be written to more than once per erasure (overwrite disabled).  
2. Data retention includes periods when no supply voltage is applied and no clock is provided.  
3. This data retention includes 3000 hours in T = 125°C and 7000 hours in T = 85°C.  
a
a
4. Contact a Renesas Electronics sales office for data retention times other than the above condition.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 85 of 115  
R32C/156 Group  
5. Electrical Characteristics  
2
Table 5.9  
Electrical Characteristics of E dataFlash  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Typ.  
Symbol  
Characteristic  
Unit  
Min.  
Max.  
(1)  
100000  
Cycles  
µs  
Program/erase cycles  
Word program time  
Block erasure time  
100  
15  
2000  
200  
50  
32 byte block  
ms  
t
Flash memory circuit start-up stabilization time  
35  
µs  
PS  
(2)  
(3, 4)  
Data retention  
T = 55°C  
a
20  
Years  
Notes:  
1. Program/erase definition  
This value represents the number of erasure per block.  
When the number of program/erase cycles is n, each block can be erased n times.  
For example, if a word write is performed in 16 different addresses in a block and then the block is  
erased, this is counted as a single program/erase operation. However, the same address cannot  
be written to more than once per erasure (overwrite disabled).  
2. Data retention includes periods when no supply voltage is applied and no clock is provided.  
3. This data retention includes 3000 hours in T = 125°C and 7000 hours in T = 85°C.  
a
a
4. Contact a Renesas Electronics sales office for data retention times other than the above condition.  
Table 5.10  
Power Supply Circuit Timing Characteristics  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Measurement  
Condition  
Symbol  
Characteristic  
Unit  
ms  
Min. Typ. Max.  
t
Internal power supply start-up stabilization  
time after the main power supply is turned on  
d(P-R)  
2
td(P-R)  
Recommended  
Internal power supply start-up  
stabilization time after the main  
power supply is turned on  
VCC  
operating voltage  
td(P-R)  
Supply voltage for  
internal logic  
PLL oscillator-  
output waveform  
Figure 5.3  
Power Supply Circuit Timing  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 86 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Table 5.11  
Electrical Characteristics of Voltage Regulator for Internal Logic  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Min. Typ. Max.  
1.5  
Measurement  
Condition  
Symbol  
Characteristics  
Unit  
V
V
Output voltage  
VDC1  
Table 5.12  
Electrical Characteristics of Low Voltage Detector  
(V = 4.2 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Measurement  
Condition  
Symbol  
Characteristics  
Unit  
Min. Typ. Max.  
Vdet  
Detected voltage error  
±0.2  
V
V
Vdet(R)-Vdet(F) Hysteresis width  
Self-consuming current  
0
V
= 5.0 V, low voltage  
CC  
4
µA  
µs  
detector enabled  
t
Operation start time of low voltage detector  
150  
d(E-A)  
Table 5.13  
Electrical Characteristics of Oscillator  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Measurement  
Condition  
Symbol  
Characteristics  
Unit  
Min. Typ. Max.  
f
PLL clock self-oscillation frequency  
50  
MHz  
%
35  
65  
2
SO(PLL)  
(1)  
|f  
|f  
t
|
Lock detection  
LOCK  
(1)  
|
2
%
Unlock detection  
UNLOCK  
(2, 3)  
f
= 4MHz  
1
ms  
ns  
PLL lock time  
LOCK(PLL)  
jitter(p-p)  
(OCO)  
(XRef)  
t
f
PLL jitter period (p-p)  
2.0  
On-chip oscillator frequency  
94  
125 156 kHz  
Notes:  
1. This value is the deviation from target frequency.  
2. This value is applicable only when the main clock oscillation is stable.  
3. This value is the time until the PLF1 bit in the PLS register becomes 1.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 87 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Table 5.14  
Electrical Characteristics of Clock Circuitry  
(V = 3.0 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Measurement  
Condition  
Symbol  
Characteristics  
Unit  
Min. Typ. Max.  
t
t
Recovery time from wait mode to low power mode  
225 µs  
225 µs  
rec(WAIT)  
(1)  
Recovery time from stop mode  
rec(STOP)  
Note:  
1. The recovery time from stop mode does not include the main clock oscillation stabilization time. The  
CPU starts operating before the oscillator is stabilized.  
trec(WAIT)  
Interrupt for exiting  
wait mode  
Recovery time from wait mode  
to low power mode  
Sub clock oscillator  
output  
On-chip oscillator  
output  
CPU clock  
trec(WAIT)  
trec(STOP)  
Interrupt for exiting  
stop mode  
Recovery time from stop mode  
Main clock oscillator  
output  
On-chip oscillator  
output  
CPU clock  
trec(STOP)  
Figure 5.4  
Clock Circuit Timing  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 88 of 115  
R32C/156 Group  
5. Electrical Characteristics  
Timing Requirements (V = 3.0 to 5.5 V, V = 0 V, and Ta = T , unless otherwise noted)  
CC  
SS  
opr  
Table 5.15  
Flash Memory CPU Rewrite Mode Timing  
Value  
Min. Max.  
Symbol  
Characteristics  
Unit  
t
Read cycle time  
200  
200  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
cR  
t
Chip-select setup time before read  
Chip-select hold time after read  
Address setup time before read  
Address hold time after read  
Read pulse width  
su(S-R)  
t
h(R-S)  
t
200  
0
su(A-R)  
t
h(R-A)  
t
100  
200  
0
w(R)  
t
Write cycle time  
cW  
t
Chip-select setup time before write  
Chip-select hold time after write  
Address setup time before write  
Address hold time after write  
Write pulse width  
su(S-W)  
t
30  
0
h(W-S)  
t
su(A-W)  
t
30  
50  
h(W-A)  
t
w(W)  
tcR  
Read cycle  
tsu(S-R)  
th(R-S)  
Chip select  
Address  
RD  
tsu(A-R)  
th(R-A)  
tw(R)  
tcW  
Write cycle  
tsu(S-W)  
th(W-S)  
Chip select  
Address  
WR  
tsu(A-W)  
th(W-A)  
tw(W)  
Figure 5.5  
Flash Memory CPU Rewrite Mode Timing  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 89 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Table 5.16  
Electrical Characteristics (1/3)  
(V = 4.2 to 5.5 V, V = 0 V, T = T , and f = 64 MHz, unless otherwise noted)  
(CPU)  
CC  
SS  
a
opr  
Value  
Typ. Max.  
Measurement  
Condition  
Symbol  
Characteristic  
Unit  
Min.  
V
High  
level  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
OH  
output P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4,  
voltage P8_6, P8_7, P9_0 to P9_7,  
P10_0 to P10_7, P11_0 to P11_4,  
I
= -5 mA  
V
- 2.0  
V
V
OH  
CC  
CC  
P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4,  
P8_6, P8_7, P9_0 to P9_7,  
P10_0 to P10_7, P11_0 to P11_4,  
P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
I
= -200 µA V - 0.3  
V
V
V
V
OH  
CC  
CC  
V
Low  
level  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
output P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4,  
voltage P8_6, P8_7, P9_0 to P9_7,  
P10_0 to P10_7, P11_0 to P11_4,  
OL  
I
= 5 mA  
2.0  
OL  
P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4,  
P8_6, P8_7, P9_0 to P9_7,  
I
= 200 µA  
0.45  
OL  
P10_0 to P10_7, P11_0 to P11_4,  
P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 90 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Table 5.17  
Electrical Characteristics (2/3)  
(V = 4.2 to 5.5 V, V = 0 V, T = T , and f = 64 MHz, unless otherwise noted)  
(CPU)  
CC  
SS  
a
opr  
Value  
Measurement  
Condition  
Symbol  
Characteristic  
Unit  
Min. Typ. Max.  
V
- V Hysteresis NMI, INT0 to INT8, KI0 to KI3,  
T+  
T-  
TA0IN to TA4IN, TA0OUT to TA4OUT,  
TB0IN to TB5IN, CTS0 to CTS4,  
CLK0 to CLK4, RXD0 to RXD4,  
SCL0 to SCL2, SDA0 to SDA2, SS0 to SS2,  
SRXD0 to SRXD2, ADTRG, IIO0_0 to IIO0_7,  
IIO1_0 to IIO1_7, IIO2_0 to IIO2_7,  
IIO3_0 to IIO3_7, UD0A, UD0B, UD1A,  
UD1B, SCS0 to SCS2, SSCK0 to SSCK2,  
SSI0 to SSI2, SSO0 to SSO2,  
0.2  
0.2  
1.0  
1.8  
V
V
LIN0IN to LIN3IN, CAN0IN, CAN1IN,  
CAN0WU, CAN1WU  
RESET  
I
High level XIN, RESET, CNVSS, NSD,  
IH  
input  
current  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7,  
P9_0 to P9_7, P10_0 to P10_7,  
V = 5 V  
1.0 µA  
I
P11_0 to P11_4, P12_0 to P12_7,  
P13_0 to P13_7, P14_1, P14_3 to P14_6,  
P15_0 to P15_7  
I
Low level XIN, RESET, CNVSS, NSD,  
IL  
input  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
current  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7,  
P9_0 to P9_7, P10_0 to P10_7,  
V = 0 V  
-1.0 µA  
I
P11_0 to P11_4, P12_0 to P12_7,  
P13_0 to P13_7, P14_1, P14_3 to P14_6,  
P15_0 to P15_7  
R
Pull-up  
resistor  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4,  
P8_6, P8_7, P9_0 to P9_7, P10_0 to P10_7,  
P11_0 to P11_4, P12_0 to P12_7,  
PULLUP  
V = 0 V  
30  
50 170 k  
I
P13_0 to P13_7, P14_1, P14_3 to P14_6,  
P15_0 to P15_7  
R
R
Feedback XIN  
resistor  
XIN  
f
1.5  
15  
M  
M  
Feedback XCIN  
resistor  
XCIN  
f
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 91 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Table 5.18  
Electrical Characteristics (3/3)  
(V = 4.2 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Characterist  
ic  
Symbol  
ICC  
Measurement Condition  
Unit  
mA  
Min. Typ. Max.  
Power supply In single-chip mode,  
current output pins are left open  
f(CPU) = 64 MHz, f(BCLK) = 32 MHz,  
f(XIN) = 8 MHz,  
37  
7
60  
and others are  
connected to V  
Active: XIN, PLL,  
Stopped: XCIN, OCO  
SS  
f(CPU) = fSO(PLL)/24 MHz,  
XIN-XOUT  
Drive strength: low  
mA  
mA  
Active: PLL (self-oscillation),  
Stopped: XIN, XCIN, OCO  
f(CPU) = f(BCLK) = f(XIN)/256 MHz,  
f(XIN) = 8 MHz,  
XCIN-XCOUT  
Drive strength: low  
1.2  
Active: XIN,  
Stopped: PLL, XCIN, OCO  
f(CPU) = f(BCLK) = 32.768 kHz,  
Active: XCIN,  
Stopped: XIN, PLL, OCO,  
Main regulator: shutdown  
220  
230  
µA  
µA  
f(CPU) = f(BCLK) = f(OCO)/4 kHz,  
Active: OCO,  
Stopped: XIN, PLL, XCIN,  
Main regulator: shutdown  
f(CPU) = f(BCLK) = f(XIN)/256 MHz,  
f(XIN) = 8 MHz,  
960 1600 µA  
Active: XIN,  
Stopped: PLL, XCIN, OCO,  
Ta = 25°C, Wait mode  
f(CPU) = f(BCLK) = 32.768 kHz,  
Active: XCIN,  
Stopped: XIN, PLL, OCO,  
Main regulator: shutdown,  
Ta = 25°C, Wait mode  
8
140  
150  
µA  
µA  
f
(CPU) = f(BCLK) = f(OCO)/4 kHz,  
Active: OCO,  
Stopped: XIN, PLL, XCIN,  
Main regulator: shutdown,  
Ta = 25°C, Wait mode  
10  
5
Stopped: all clocks,  
Main regulator: shutdown,  
Ta = 25°C  
70  
µA  
µA  
Stopped: all clocks,  
Main regulator: shutdown,  
Ta = 85°C  
400  
Stopped: all clocks,  
Main regulator: shutdown,  
Ta = 105°C  
1200 µA  
2000 µA  
Stopped: all clocks,  
Main regulator: shutdown,  
Ta = 125°C  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 92 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Table 5.19  
A/D Conversion Characteristics (V = AV = V  
= 4.2 to 5.5 V, V = AV = 0 V,  
CC  
CC  
REF SS SS  
T = T , and f = 32 MHz, unless otherwise noted)  
(BCLK)  
a
opr  
Value  
Min. Typ. Max.  
Symbol  
Characteristic  
Measurement Condition  
Unit  
Resolution  
V
V
= V  
CC  
10 Bits  
REF  
REF  
Absolute error  
= V = 5 V  
AN_0 to AN_7,  
CC  
AN0_0 to AN0_7,  
AN2_0 to AN2_7,  
AN15_0 to AN15_7,  
ANEX0, ANEX1  
±3 LSB  
External op-amp  
connection mode  
±7 LSB  
±3 LSB  
INL  
Integral non-linearity  
error  
V
= V = 5 V  
AN_0 to AN_7,  
REF  
CC  
AN0_0 to AN0_7,  
AN2_0 to AN2_7,  
AN15_0 to AN15_7,  
ANEX0, ANEX1  
External op-amp  
connection mode  
±7 LSB  
±1 LSB  
DNL  
Differential non-linearity  
error  
Offset error  
Gain error  
±3 LSB  
±3 LSB  
R
t
Resistor ladder  
V
= V  
4
20  
k  
LADDER  
REF  
CC  
Conversion time  
(10 bits)  
= 16 MHz, with sample and hold  
AD  
CONV  
CONV  
SAMP  
2.06  
µs  
function  
= 16 MHz, without sample and hold  
AD  
3.69  
1.75  
µs  
µs  
µs  
function  
= 16 MHz, with sample and hold  
AD  
t
Conversion time  
(8 bits)  
function  
= 16 MHz, without sample and hold  
AD  
3.06  
function  
= 16 MHz  
AD  
t
Sampling time  
0.188  
µs  
V
V
Analog input voltage  
V
REF  
0
0.25  
1
IA  
Operating clock  
frequency  
Without sample and hold function  
With sample and hold function  
16 MHz  
16 MHz  
AD  
R
Pull-up resistor for open-  
circuit detection  
PU(AST)  
5
5
10  
10  
15  
15  
k  
k  
R
Pull-down resistor for  
open-circuit detection  
PD(AST)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 93 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Table 5.20  
D/A Conversion Characteristics (V = AV = V  
= 4.2 to 5.5 V, V = AV = 0 V,  
CC  
CC  
REF SS SS  
and T = T , unless otherwise noted)  
a
opr  
Value  
Symbol  
Characteristic  
Measurement Condition  
Unit  
Min. Typ. Max.  
Resolution  
8
1.0  
3
Bits  
%
Absolute precision  
Settling time  
t
µs  
S
R
Output resistance  
4
10  
20  
k  
O
I
Reference input current  
See Note 1  
1.5 mA  
VREF  
Note:  
1. One D/A converter is used. The DAi register (i = 0, 1) of the other unused converter is set to 00h. The  
resistor ladder for the A/D converter is not considered.  
Even when the VCUT bit in the AD0CON1 register is set to 0 (V  
disconnected), I  
is supplied.  
REF  
VREF  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 94 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Timing Requirements (V = 4.2 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.21  
External Clock Input  
Value  
Min.  
Symbol  
t
Characteristic  
Unit  
Max.  
250  
External clock input period  
125  
50  
ns  
ns  
ns  
ns  
ns  
%
(X)  
c
t
t
t
t
External clock input high level pulse width  
External clock input low level pulse width  
External clock input rise time  
w(XH)  
w(XL)  
50  
5
5
(X)  
r
External clock input fall time  
(X)  
f
t
/ t  
External clock input duty  
40  
60  
w
c
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 95 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Timing Requirements (V = 4.2 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.22  
Timer A Input (counting input in event counter mode)  
Value  
Min. Max.  
Symbol  
t
Characteristic  
Unit  
TAiIN input clock cycle time  
200  
80  
ns  
ns  
ns  
(TA)  
c
t
TAiIN input high level pulse width  
TAiIN input low level pulse width  
(TAH)  
(TAL)  
w
w
t
80  
Table 5.23  
Timer A Input (gating input in timer mode)  
Value  
Symbol  
t
Characteristic  
Unit  
Min.  
400  
Max.  
Max.  
Max.  
TAiIN input clock cycle time  
ns  
ns  
ns  
(TA)  
c
t
TAiIN input high level pulse width  
TAiIN input low level pulse width  
180  
180  
(TAH)  
(TAL)  
w
w
t
Table 5.24  
Timer A Input (external trigger input in one-shot timer mode)  
Value  
Symbol  
t
Characteristic  
Unit  
Min.  
200  
TAiIN input clock cycle time  
ns  
ns  
ns  
(TA)  
c
t
TAiIN input high level pulse width  
TAiIN input low level pulse width  
80  
80  
(TAH)  
(TAL)  
w
w
t
Table 5.25  
Timer A Input (external trigger input in pulse-width modulation mode)  
Value  
Symbol  
t
Characteristic  
Unit  
Min.  
80  
TAiIN input high level pulse width  
TAiIN input low level pulse width  
ns  
ns  
(TAH)  
(TAL)  
w
w
t
80  
Table 5.26  
Timer A Input (increment/decrement switching input in event counter mode)  
Value  
Symbol  
t
Characteristic  
Unit  
Min.  
Max.  
TAiOUT input clock cycle time  
TAiOUT input high level pulse width  
TAiOUT input low level pulse width  
TAiOUT input setup time  
2000  
ns  
ns  
ns  
ns  
ns  
(UP)  
c
t
t
t
t
1000  
1000  
400  
(UPH)  
w
w
su  
(UPL)  
(UP-TIN)  
TAiOUT input hold time  
400  
(TIN-UP)  
h
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 96 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Timing Requirements (V = 4.2 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.27  
Timer B Input (counting input in event counter mode)  
Value  
Min. Max.  
Symbol  
Characteristic  
Unit  
t
TBiIN input clock cycle time (one edge counting)  
TBiIN input high level pulse width (one edge counting)  
TBiIN input low level pulse width (one edge counting)  
TBiIN input clock cycle time (both edges counting)  
TBiIN input high level pulse width (both edges counting)  
TBiIN input low level pulse width (both edges counting)  
200  
80  
ns  
ns  
ns  
ns  
ns  
ns  
c(TB)  
t
(TBH)  
(TBL)  
w
t
t
t
t
80  
w
200  
80  
(TB)  
c
(TBH)  
(TBL)  
w
w
80  
Table 5.28  
Timer B Input (pulse period measure mode)  
Value  
Max.  
Symbol  
Characteristic  
Unit  
Min.  
400  
t
TBiIN input clock cycle time  
ns  
ns  
ns  
c(TB)  
t
TBiIN input high level pulse width  
TBiIN input low level pulse width  
180  
180  
(TBH)  
(TBL)  
w
t
w
Table 5.29  
Timer B Input (pulse-width measure mode)  
Value  
Max.  
Symbol  
Characteristic  
Unit  
Min.  
400  
t
TBiIN input clock cycle time  
ns  
ns  
ns  
c(TB)  
t
TBiIN input high level pulse width  
TBiIN input low level pulse width  
180  
180  
(TBH)  
(TBL)  
w
t
w
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 97 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Timing Requirements (V = 4.2 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.30  
Serial Interface  
Value  
Min. Max.  
Symbol  
t
Characteristic  
Unit  
CLKi input clock cycle time  
CLKi input high level pulse width  
CLKi input low level pulse width  
RXDi input setup time  
200  
80  
80  
80  
ns  
ns  
ns  
ns  
ns  
(CK)  
c
t
t
t
t
(CKH)  
w
w
su  
(CKL)  
(D-C)  
RXDi input hold time  
90  
(C-D)  
h
Table 5.31  
A/D Trigger Input  
Value  
Symbol  
t
Characteristic  
ADTRG input high level pulse width  
Unit  
Min.  
Max.  
3
(ADH)  
w
---------  
ns  
ns  
Hardware trigger input high level pulse width  
AD  
t
ADTRG input low level pulse width  
Hardware trigger input high level pulse width  
(ADL)  
w
125  
Table 5.32  
External Interrupt INTi Input  
Value  
Min.  
250  
+ 200  
Symbol  
t
Characteristic  
Unit  
Max.  
(1)  
Edge sensitive  
Level sensitive  
Edge sensitive  
Level sensitive  
INTi input high level pulse width  
ns  
ns  
ns  
ns  
(INH)  
w
t
t
(CPU)  
c
c
(1)  
t
INTi input low level pulse width  
250  
+ 200  
(INL)  
w
(CPU)  
Note:  
1. The values are applied in case the filtering function is disabled.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 98 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Timing Requirements (V = 4.2 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.33  
Serial Bus Interface  
Value  
Symbol  
Characteristic  
SSCKi frequency  
Unit  
Min.  
250  
Max.  
4
f
MHz  
ns  
ns  
ns  
µs  
µs  
ns  
ns  
ns  
ns  
ns  
ns  
(SSCK)  
t
SSCKi clock cycle time  
SSCKi input high level pulse width  
SSCKi input low level pulse width  
SSCKi input rising time  
SSCKi input falling time  
SCSi input setup time  
SCSi input hold time  
c(SSCK)  
t
0.35 × t  
0.6 × t  
c(SSCK)  
w(SSCKH)  
c(SSCK)  
0.6 × t  
c(SSCK) c(SSCK)  
t
0.35 × t  
w(SSCKL)  
t
1
r(SSCK)  
t
1
f(SSCK)  
t
t
+ 50  
su(SCS-SSCK)  
c(BCLK)  
t
t
+ 50  
c(BCLK)  
h(SSCK-SCS)  
t
SSI input setup time  
80  
su(SSI-SSCK)  
t
SSI input hold time  
10  
80  
20  
h(SSCK-SSI)  
t
SSO input setup time  
su(SSO-SSCK)  
t
SSO input hold time  
h(SSCK-SSO)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 99 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 5 V  
Switching Characteristics (V = 4.2 to 5.5 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.34  
Serial Interface  
Value  
Max.  
Measurement  
Condition  
Symbol  
t
Characteristic  
Unit  
Min.  
TXDi output delay time  
TXDi output hold time  
80  
ns  
ns  
(C-Q)  
d
h
Refer to  
Figure 5.6  
t
0
(C-Q)  
Table 5.35  
Serial Bus Interface  
Value  
Measurement  
Condition  
Symbol  
Characteristic  
Unit  
Min.  
Max.  
t
SSCKi output high level pulse width  
SSCKi output low level pulse width  
SSCKi output rising time  
0.35 × t  
0.6 × t  
c(SSCK)  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
w(SSCKH)  
c(SSCK)  
t
0.35 × t  
0.6 × t  
c(SSCK)  
w(SSCKL)  
c(SSCK)  
t
20  
r(SSCK)  
t
SSCKi output falling time  
20  
f(SSCK)  
t
SSCKi output delay time for SCSi  
SCSi output delay time for SSCKi  
SSOi output enable time  
0.5 × t  
+ 20  
d(SCS-SSCK)  
c(SSCK)  
t
0.5 × t  
- 20  
c(SSCK)  
d(SSCK-SCS)  
t
Refer to  
Figure 5.6  
1.5 × t  
1.5 × t  
1.5 × t  
1.5 × t  
+ 100  
+ 100  
+ 100  
+ 100  
en(SCS-SSO)  
c(BCLK)  
c(BCLK)  
c(BCLK)  
t
SSOi output disable time  
dis(SCS-SSO)  
t
SSIi output enable time  
en(SCS-SSI)  
t
SSIi output disable time  
dis(SCS-SSI)  
c(BCLK)  
t
SSOi output delay time for SSCKi  
SSIi output delay time for SSCKi  
30  
d(SSCK-SSO)  
t
85  
d(SSCK-SSI)  
t
SCSi output high level period in  
continuous transmission  
rec(SCS)  
0.625 × t  
ns  
c(SSCK)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 100 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Table 5.36  
Electrical Characteristics (1/3) (V = 3.0 to 3.6 V, V = 0 V, T = T , and  
CC  
SS  
a
opr  
f
= 64 MHz, unless otherwise noted)  
(CPU)  
Value  
Measurement  
Condition  
Symbol  
Characteristic  
Unit  
V
Min.  
Typ. Max.  
V
High  
level  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
output P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4,  
voltage P8_6, P8_7, P9_0 to P9_7,  
P10_0 to P10_7, P11_0 to P11_4,  
OH  
I
= -1 mA  
V
- 0.6  
V
OH  
CC  
CC  
P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
V
Low  
level  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
OL  
output P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4,  
voltage P8_6, P8_7, P9_0 to P9_7,  
P10_0 to P10_7, P11_0 to P11_4,  
I
= 1 mA  
0.5  
V
OL  
P12_0 to P12_7, P13_0 to P13_7,  
P14_3 to P14_6, P15_0 to P15_7  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 101 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Table 5.37  
Electrical Characteristics (2/3) (V = 3.0 to 3.6 V, V = 0 V, T = T , and  
CC SS a opr  
f
= 64 MHz, unless otherwise noted)  
(CPU)  
Value  
Min. Typ. Max.  
Measurement  
Condition  
Symbol  
Characteristic  
Unit  
V
- V  
Hysteresis NMI, INT0 to INT8, KI0 to KI3,  
TA0IN to TA4IN, TA0OUT to TA4OUT,  
TB0IN to TB5IN, CTS0 to CTS4,  
T+  
T-  
CLK0 to CLK4, RXD0 to RXD4,  
SCL0 to SCL2, SDA0 to SDA2, SS0 to SS2,  
SRXD0 to SRXD2, ADTRG,  
IIO0_0 to IIO0_7, IIO1_0 to IIO1_7,  
IIO2_0 to IIO2_7, IIO3_0 to IIO3_7, UD0A,  
UD0B, UD1A, UD1B, SCS0 to SCS2,  
SSCK0 to SSCK2, SSI0 to SSI2,  
SSO0 to SSO2, LIN0IN to LIN3IN, CAN0IN,  
CAN1IN, CAN0WU, CAN1WU  
RESET  
0.2  
0.2  
1.0  
V
1.8  
1.0  
V
I
High level XIN, RESET, CNVSS, NSD,  
IH  
input  
current  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7,  
P9_0 to P9_7, P10_0 to P10_7,  
V = 3.3 V  
µA  
I
P11_0 to P11_4, P12_0 to P12_7,  
P13_0 to P13_7, P14_1, P14_3 to P14_6,  
P15_0 to P15_7  
I
Low level XIN, RESET, CNVSS, NSD,  
IL  
input  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
current  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7,  
P9_0 to P9_7, P10_0 to P10_7,  
V = 0 V  
-1.0 µA  
I
P11_0 to P11_4, P12_0 to P12_7,  
P13_0 to P13_7, P14_1, P14_3 to P14_6,  
P15_0 to P15_7  
R
Pull-up  
resistor  
P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7,  
P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7,  
P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_4,  
P8_6, P8_7, P9_0 to P9_7,  
PULLUP  
V = 0 V  
50 100 500 k  
I
P10_0 to P10_7, P11_0 to P11_4,  
P12_0 to P12_7, P13_0 to P13_7, P14_1,  
P14_3 to P14_6, P15_0 to P15_7  
R
R
Feedback XIN  
resistor  
XIN  
f
3
M  
M  
Feedback XCIN  
resistor  
XCIN  
f
25  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 102 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Table 5.38  
Electrical Characteristics (3/3)  
(V = 3.0 to 3.6 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Value  
Characte  
ristic  
Symbol  
ICC  
Measurement Condition  
Unit  
mA  
Min. Typ. Max.  
Power  
supply  
current  
In single-chip mode,  
f(CPU) = 64 MHz, f(BCLK) = 32 MHz,  
output pins are left open  
and others are  
f(XIN) = 8 MHz,  
37  
7
60  
Active: XIN, PLL,  
connected to VSS  
Stopped: XCIN, OCO  
f(CPU) = fSO(PLL)/24 MHz,  
XIN-XOUT  
Drive strength: low  
mA  
µA  
Active: PLL (self-oscillation),  
Stopped: XIN, XCIN, OCO  
XCIN-XCOUT  
Drive strength: low  
f(CPU) = f(BCLK) = f(XIN)/256 MHz,  
f(XIN) = 8 MHz,  
670  
Active: XIN,  
Stopped: PLL, XCIN, OCO  
f(CPU) = f(BCLK) = 32.768 kHz,  
Active: XCIN,  
Stopped: XIN, PLL, OCO,  
Main regulator: shutdown  
180  
190  
µA  
µA  
f(CPU) = f(BCLK) = f(OCO)/4 kHz,  
Active: OCO,  
Stopped: XIN, PLL, XCIN,  
Main regulator: shutdown  
f(CPU) = f(BCLK) = f(XIN)/256 MHz,  
f(XIN) = 8 MHz,  
500 900  
µA  
µA  
µA  
Active: XIN,  
Stopped: PLL, XCIN, OCO,  
Ta = 25°C, Wait mode  
f(CPU) = f(BCLK) = 32.768 kHz,  
Active: XCIN,  
Stopped: XIN, PLL, OCO,  
Main regulator: shutdown,  
Ta = 25°C, Wait mode  
8
140  
150  
f(CPU) = f(BCLK) = f(OCO)/4 kHz,  
Active: OCO,  
Stopped: XIN, PLL, XCIN,  
Main regulator: shutdown,  
Ta = 25°C, Wait mode  
10  
5
Stopped: all clocks,  
Main regulator: shutdown,  
Ta = 25°C  
70  
µA  
µA  
Stopped: all clocks,  
Main regulator: shutdown,  
Ta = 85°C  
400  
Stopped: all clocks,  
Main regulator: shutdown,  
Ta = 105°C  
1200 µA  
2000 µA  
Stopped: all clocks,  
Main regulator: shutdown,  
Ta = 125°C  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 103 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Table 5.39  
A/D Conversion Characteristics (V = AV = V  
= 3.0 to 3.6 V, V = AV = 0 V,  
CC  
CC  
REF SS SS  
T = T , and f = 32 MHz, unless otherwise noted)  
(BCLK)  
a
opr  
Value  
Symbol  
Characteristic  
Measurement Condition  
Unit  
Bits  
Min. Typ. Max.  
10  
Resolution  
V
= V  
CC  
REF  
REF  
Absolute error  
V
V
V
= V = 3.3 V AN_0 to AN_7,  
CC  
AN0_0 to AN0_7,  
AN2_0 to AN2_7,  
AN15_0 to AN15_7,  
ANEX0, ANEX1  
±5  
±7  
±5  
LSB  
LSB  
LSB  
External op-amp  
connection mode  
INL  
Integral non-linearity  
error  
= V = 3.3 V AN_0 to AN_7,  
REF  
CC  
AN0_0 to AN0_7,  
AN2_0 to AN2_7,  
AN15_0 to AN15_7,  
ANEX0, ANEX1  
External op-amp  
connection mode  
±7  
±1  
LSB  
LSB  
DNL  
Differential non-  
linearity error  
= V = 3.3 V  
REF  
CC  
Offset error  
Gain error  
±3  
±3  
LSB  
LSB  
k  
R
t
Resistor ladder  
V
= V  
4
20  
LADDER  
REF  
CC  
Conversion time  
(10 bits)  
= 10 MHz,  
CONV  
CONV  
SAMP  
AD  
3.3  
µs  
with sample and hold function  
= 10 MHz,  
AD  
t
t
Conversion time  
(8 bits)  
2.8  
0.3  
µs  
µs  
with sample and hold function  
= 10 MHz  
AD  
Sampling time  
V
Analog input voltage  
V
0
0.25  
1
V
IA  
REF  
Operating clock  
frequency  
Without sample and hold function  
With sample and hold function  
10  
MHz  
MHz  
AD  
10  
R
Pull-up resistor for  
open-circuit detection  
PU(AST)  
5
5
10  
10  
15  
15  
k  
k  
R
Pull-down resistor for  
open-circuit detection  
PD(AST)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 104 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Table 5.40  
D/A Conversion Characteristics (V = AV = V  
= 3.0 to 3.6 V, V = AV = 0 V,  
CC  
CC  
REF SS SS  
and T = T , unless otherwise noted)  
a
opr  
Value  
Symbol  
Characteristic  
Measurement Condition  
Unit  
Min. Typ. Max.  
Resolution  
8
1.0  
3
Bits  
%
Absolute precision  
Settling time  
t
µs  
S
R
Output resistance  
4
10  
20  
k  
O
I
Reference input current  
See Note 1  
1.0  
mA  
VREF  
Note:  
1. One D/A converter is used. The DAi register (i = 0, 1) of the other unused converter is set to 00h. The  
resistor ladder for the A/D converter is not considered.  
Even when the VCUT bit in the AD0CON1 register is set to 0 (V  
disconnected), I  
is supplied.  
REF  
VREF  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 105 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Timing Requirements (V = 3.0 to 3.6 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.41  
External Clock Input  
Value  
Min.  
Symbol  
t
Characteristic  
Unit  
Max.  
250  
External clock input period  
125  
50  
ns  
ns  
ns  
ns  
ns  
%
(X)  
c
t
t
t
t
External clock input high level pulse width  
External clock input low level pulse width  
External clock input rise time  
w(XH)  
w(XL)  
r(X)  
50  
5
5
External clock input fall time  
(X)  
f
t
/ t  
External clock input duty  
40  
60  
w
c
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 106 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Timing Requirements (V = 3.0 to 3.6 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.42  
Timer A Input (counting input in event counter mode)  
Value  
Min. Max.  
Symbol  
Characteristic  
Unit  
t
TAiIN input clock cycle time  
200  
80  
ns  
ns  
ns  
c(TA)  
t
TAiIN input high level pulse width  
TAiIN input low level pulse width  
w(TAH)  
t
80  
w(TAL)  
Table 5.43  
Timer A Input (gating input in timer mode)  
Value  
Symbol  
Characteristic  
Unit  
Min.  
400  
180  
180  
Max.  
Max.  
Max.  
t
TAiIN input clock cycle time  
ns  
ns  
ns  
c(TA)  
t
TAiIN input high level pulse width  
TAiIN input low level pulse width  
w(TAH)  
t
w(TAL)  
Table 5.44  
Timer A Input (external trigger input in one-shot timer mode)  
Value  
Symbol  
Characteristic  
Unit  
Min.  
200  
80  
t
TAiIN input clock cycle time  
ns  
ns  
ns  
c(TA)  
t
TAiIN input high level pulse width  
TAiIN input low level pulse width  
w(TAH)  
t
80  
w(TAL)  
Table 5.45  
Timer A Input (external trigger input in pulse-width modulation mode)  
Value  
Symbol  
Characteristic  
Unit  
Min.  
80  
t
TAiIN input high level pulse width  
TAiIN input low level pulse width  
ns  
ns  
w(TAH)  
t
80  
(TAL)  
w
Table 5.46  
Timer A Input (increment/decrement switching input in event counter mode)  
Value  
Symbol  
Characteristic  
Unit  
Min.  
2000  
1000  
1000  
400  
Max.  
t
TAiOUT input clock cycle time  
TAiOUT input high level pulse width  
TAiOUT input low level pulse width  
TAiOUT input setup time  
ns  
ns  
ns  
ns  
ns  
c(UP)  
t
w(UPH)  
t
w(UPL)  
t
su(UP-TIN)  
t
TAiOUT input hold time  
400  
h(TIN-UP)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 107 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Timing Requirements (V = 3.0 to 3.6 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.47  
Timer B Input (counting input in event counter mode)  
Value  
Min. Max.  
Symbol  
Characteristic  
Unit  
t
TBiIN input clock cycle time (one edge counting)  
TBiIN input high level pulse width (one edge counting)  
TBiIN input low level pulse width (one edge counting)  
TBiIN input clock cycle time (both edges counting)  
TBiIN input high level pulse width (both edges counting)  
TBiIN input low level pulse width (both edges counting)  
200  
80  
ns  
ns  
ns  
ns  
ns  
ns  
c(TB)  
t
w(TBH)  
t
80  
w(TBL)  
t
200  
80  
c(TB)  
t
w(TBH)  
t
80  
w(TBL)  
Table 5.48  
Timer B Input (pulse period measure mode)  
Value  
Max.  
Symbol  
Characteristic  
Unit  
Min.  
400  
180  
180  
t
TBiIN input clock cycle time  
ns  
ns  
ns  
c(TB)  
t
TBiIN input high level pulse width  
TBiIN input low level pulse width  
w(TBH)  
t
w(TBL)  
Table 5.49  
Timer B Input (pulse-width measure mode)  
Value  
Max.  
Symbol  
Characteristic  
Unit  
Min.  
400  
180  
180  
t
TBiIN input clock cycle time  
ns  
ns  
ns  
c(TB)  
t
TBiIN input high level pulse width  
TBiIN input low level pulse width  
w(TBH)  
t
w(TBL)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 108 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Timing Requirements (V = 3.0 to 3.6 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.50  
Serial Interface  
Value  
Min. Max.  
Symbol  
Characteristic  
Unit  
t
CLKi input clock cycle time  
CLKi input high level pulse width  
CLKi input low level pulse width  
RXDi input setup time  
200  
80  
80  
80  
ns  
ns  
ns  
ns  
ns  
c(CK)  
t
w(CKH)  
t
w(CKL)  
t
su(D-C)  
t
RXDi input hold time  
90  
h(C-D)  
Table 5.51  
A/D Trigger Input  
Value  
Symbol  
Characteristic  
ADTRG input high level pulse width  
Unit  
ns  
Min.  
Max.  
t
3
w(ADH)  
---------  
Hardware trigger input high level pulse width  
AD  
t
ADTRG input low level pulse width  
Hardware trigger input high level pulse width  
w(ADL)  
125  
ns  
Table 5.52  
External Interrupt INTi Input  
Value  
Min.  
250  
+ 200  
Symbol  
Characteristic  
Unit  
Max.  
(1)  
t
Edge sensitive  
Level sensitive  
Edge sensitive  
Level sensitive  
ns  
ns  
ns  
ns  
INTi input high level pulse width  
w(INH)  
t
t
(CPU)  
c
c
(1)  
t
INTi input low level pulse width  
250  
+ 200  
(INL)  
w
(CPU)  
Note:  
1. The values are applied in case filtering function is disabled.  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 109 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Timing Requirements (V = 3.0 to 3.6 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.53  
Serial Bus Interface  
Value  
Symbol  
Characteristic  
Unit  
Min.  
250  
Max.  
4
f
SSCKi frequency  
MHz  
ns  
ns  
ns  
µs  
µs  
ns  
ns  
ns  
ns  
ns  
ns  
(SSCK)  
t
SSCKi clock cycle time  
SSCKi input high level pulse width  
SSCKi input low level pulse width  
SSCKi input rising time  
SSCKi input falling time  
SCSi input setup time  
SCSi input hold time  
c(SSCK)  
t
0.35 × t  
0.6 × t  
c(SSCK)  
w(SSCKH)  
c(SSCK)  
0.6 × t  
c(SSCK) c(SSCK)  
t
0.35 × t  
w(SSCKL)  
t
1
r(SSCK)  
t
1
f(SSCK)  
t
t
+ 50  
su(SCS-SSCK)  
c(BCLK)  
t
t
+ 50  
c(BCLK)  
h(SSCK-SCS)  
t
SSI input setup time  
100  
su(SSI-SSCK)  
t
SSI input hold time  
10  
100  
20  
h(SSCK-SSI)  
t
SSO input setup time  
su(SSO-SSCK)  
t
SSO input hold time  
h(SSCK-SSO)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 110 of 115  
R32C/156 Group  
5. Electrical Characteristics  
VCC = 3.3 V  
Switching Characteristics (V = 3.0 to 3.6 V, V = 0 V, and T = T , unless otherwise noted)  
CC  
SS  
a
opr  
Table 5.54  
Serial Interface  
Value  
Max.  
Measurement  
Condition  
Symbol  
t
Characteristic  
Unit  
Min.  
TXDi output delay time  
TXDi output hold time  
80  
ns  
ns  
(C-Q)  
d
h
Refer to  
Figure 5.6  
t
0
(C-Q)  
Table 5.55  
Serial Bus Interface  
Value  
Measurement  
Condition  
Symbol  
Characteristic  
Unit  
Min.  
Max.  
t
t
SSCKi output high level pulse  
width  
w(SSCKH)  
0.35 × t  
0.6 × t  
ns  
ns  
c(SSCK)  
c(SSCK)  
c(SSCK)  
SSCKi output low level pulse  
width  
w(SSCKL)  
0.35 × t  
0.6 × t  
c(SSCK)  
t
t
t
t
t
t
t
t
t
t
t
SSCKi output rising time  
35  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
r(SSCK)  
SSCKi output falling time  
35  
f(SSCK)  
SSCKi output delay time for SCSi  
SCSi output delay time for SSCKi  
SSOi output enable time  
0.5 × t  
+ 40  
d(SCS-SSCK)  
d(SSCK-SCS)  
en(SCS-SSO)  
dis(SCS-SSO)  
en(SCS-SSI)  
dis(SCS-SSI)  
d(SSCK-SSO)  
d(SSCK-SSI)  
rec(SCS)  
c(SSCK)  
0.5 × t  
- 40  
c(SSCK)  
Refer to  
Figure 5.6  
1.5 × t  
1.5 × t  
1.5 × t  
1.5 × t  
+ 100  
+ 100  
+ 100  
+ 100  
c(BCLK)  
c(BCLK)  
c(BCLK)  
SSOi output disable time  
SSIi output enable time  
SSIi output disable time  
c(BCLK)  
SSOi output delay time for SSCKi  
SSIi output delay time for SSCKi  
50  
120  
SCSi output high level period in  
continuous transmission  
0.625 × t  
ns  
c(SSCK)  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 111 of 115  
R32C/156 Group  
5. Electrical Characteristics  
MCU  
Pin to be  
measured  
30 pF  
Figure 5.6  
Switching Characteristic Measurement Circuit  
tc(X)  
XIN  
tw(XH)  
tw(XL)  
tr(X)  
tf(X)  
Figure 5.7  
External Clock Input Timing  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 112 of 115  
R32C/156 Group  
5. Electrical Characteristics  
tc(TA)  
tw(TAL)  
tw(TAH)  
TAiIN input  
tc(UP)  
tw(UPL)  
tw(UPH)  
TAiOUT input  
In event counter mode  
TAiOUT input (input for increment/  
decrement switching)  
tsu(UP-TIN)  
th(TIN-UP)  
TAiIN input (in falling edge counting)  
TAiIN input (in rising edge counting)  
tc(TB)  
tw(TBH)  
tw(TBL)  
TBiIN input  
tc(CK)  
tw(CKH)  
tw(CKL)  
CLKi  
TXDi  
RXDi  
td(C-Q)  
th(C-Q)  
tsu(D-C)  
th(C-D)  
tw(ADL)  
tw(ADH)  
ADTRG input  
INTi input  
tw(INL)  
tw(INH)  
Two CPU clock cycles +  
300 ns or more  
Two CPU clock cycles +  
300 ns or more  
NMI input  
Figure 5.8  
Timing of Peripherals  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 113 of 115  
R32C/156 Group  
5. Electrical Characteristics  
tc(SSCK)  
SSCKi  
tw(SSCKH)  
tw(SSCKL)  
tr(SSCK)  
tf(SSCK)  
SCSi (output)  
trec(SCS)  
td(SCS-SSCK)  
td(SSCK-SCS)  
SSCKi (output)  
CPOS = 1  
CPOS = 0  
ten(SCS-SSO)  
tdis(SCS-SSO)  
SSOi (output)  
SCSi (input)  
tsu(SCS-SSCK)  
th(SSCK-SCS)  
SSCKi (input)  
CPOS = 1  
CPOS = 0  
ten(SCS-SSI)  
tdis(SCS-SSI)  
SSIi (output)  
SSCKi  
CPOS = 1  
CPOS = 0  
td(SSCK-SSI)  
td(SSCK-SSO)  
SSIi / SSOi (output)  
CPHS = 1  
td(SSCK-SSI)  
td(SSCK-SSO)  
CPHS = 0  
tsu(SSI-SSCK)  
tsu(SSO-SSCK)  
th(SSCK-SSI)  
th(SSCK-SSO)  
SSIi / SSOi (input)  
CPHS = 1  
tsu(SSI-SSCK)  
tsu(SSO-SSCK)  
th(SSCK-SSI)  
th(SSCK-SSO)  
CPHS = 0  
Figure 5.9  
Timing of Serial Bus Interface  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 114 of 115  
R32C/156 Group  
Appendix 1. Package Dimensions  
Appendix 1. Package Dimensions  
JEITA Package Code  
RENESAS Code  
PLQP0144KA-A  
Previous Code  
MASS[Typ.]  
1.2g  
P-LQFP144-20x20-0.50  
144P6Q-A / FP-144L / FP-144LV  
HD  
*1  
D
108  
73  
NOTE)  
1. DIMENSIONS "*1" AND "*2"  
DO NOT INCLUDE MOLD FLASH.  
2. DIMENSION "*3" DOES NOT  
INCLUDE TRIM OFFSET.  
109  
72  
bp  
b1  
Dimension in Millimeters  
Reference  
Symbol  
Min Nom Max  
Terminal cross section  
D
E
19.9 20.0 20.1  
19.9 20.0 20.1  
1.4  
A2  
HD  
HE  
A
21.8 22.0 22.2  
21.8 22.0 22.2  
1.7  
144  
37  
A1  
bp  
b1  
c
0.1  
0.05  
0.15  
1
ZD  
36  
0.17 0.22 0.27  
0.20  
Index mark  
F
0.09  
0.20  
0.145  
0.125  
S
c1  
L
L1  
0°  
8°  
*3  
e
x
0.5  
bp  
e
y
S
x
Detail F  
0.08  
0.10  
y
ZD  
ZE  
L
1.25  
1.25  
0.5  
0.35  
0.65  
L1  
1.0  
R01DS0075EJ0120 Rev.1.20  
Aug 07, 2013  
Page 115 of 115  
Revision History  
R32C/156 Group Datasheet  
Description  
Summary  
Rev.  
Date  
Page  
0.30  
1.02  
Feb 14, 2008  
Nov 30, 2009  
Initial release  
Second edition released  
Chapter 1. Overview  
1
• Made minor text modifications to this chapter  
• Added “(MCUs)” to line 1 of 1.1  
3
• Changed the following expressions in Table 1.2: “erase/program” to  
“program/erase”, “Read protection” to “Security protection”, “ID code  
check” to “ID code protect”, and “on-board flash re-programming” to  
“on-board flash programming”  
5
6
7
• Deleted hyphen before ROM number in Figure 1.1  
• Changed Figure 1.2  
• Modified “K13” to “K10” for pins 133 to 136 in Figure 1.3 to “Kl3” to  
Kl0”  
10  
• Corrected a typo “LIN // CAN Module Pin” in Table 1.6 to “LIN / CAN  
Module Pin”  
12-14 • Changed descriptions “Functional Category” and “Function” in Tables  
1.8 to 1.10 to “Function” and “Description”, respectively  
Chapter 2. Central Processing Unit  
• Made major text modifications to this chapter  
15, 16 • Changed description “Interrupt table register” in Figure 2.1 and 2.1.6  
to “Interrupt vector table base register”  
Chapter 3. Memory  
• Made major text modifications to this chapter  
Chapter 4. Special Function Registers  
20  
• Changed hexadecimal format of reset values for registers CCR and  
FMCR in Table 4.1 to binary  
21-22 • Changed the following expressions “DMAi Interrupt” and “Start/Stop  
Condition” in Tables 4.2 to 4.3 to “DMAi Transfer Complete Interrupt”  
and “Start Condition/Stop Condition”, respectively  
26  
29  
• Deleted “6” from register name for register G2FS in Table 4.7  
• Changed binary format of reset values for U3RB and U4RB in Table  
4.10 to hexadecimal  
31  
32  
• Changed register symbols “G3TMi/G0POj” in Table 4.12 to “G3TMi/  
G3POj”  
• Changed expression of register name “Xi Register Yi Register” and  
symbol “XiR, YiR” in Table 4.13 to “Xi Register/Yi Register” and “XiR/  
YiR”, respectively  
37  
• Changed hexadecimal format of reset values for registers PDi in Table  
4.18 to binary  
39  
41  
• Modified reset value for register PLS in Table 4.20 to “1XXX XX00b”  
• Modified reset value for register IFS7 in Table 4.22 to “XXXX XXX0b”  
41-43 • Modified register name “Port Pi_j Port Function Select Register” in  
Tables 4.22 to 4.24 to “Port Pi_j Function Select Register”  
A- 1  
Revision History  
R32C/156 Group Datasheet  
Description  
Rev.  
Date  
Page  
45  
Summary  
• Modified the following register names in Table 4.26: “DMAi Source  
Select Register 2” to “DMAi Request Source Select Register 2” and  
“DMAi Source Select Register 1” to “DMAi Request Source Select  
Register”; Changed expression “Wake-up/Interrupt Priority Level  
Control Register” to “Wake-up IPL Setting Register”  
46  
• Changed expressions in Table 4.27: “LIN0” in register names to “LIN”  
and register symbols starting from “L0” to “L”; Modified “X” in reset  
values for unassigned bits to “0” for the following registers: LCW,  
LBRG, LMD0, LBRK, LSPC, LRFC, LSC, LTC, LST, and LEST  
63, 77 • Modified reset value “00h” for C1CLKR in Table 4.44 and C0CLKR in  
Table 4.58 to “000X 0000b”  
77  
• Added addresses “047F60h to 047FFFh” and “048000h to 04FFFFh”  
to Table 4.58  
Chapter 5. Electrical Characteristics  
• Added initially  
1.10  
Nov 09, 2010  
Third edition released  
This manual in general  
• Applied new Renesas templates and formats to the manual  
• Changed company name to “Renesas Electronics Corporation” and  
changed related descriptions due to business merger of Renesas  
Technology Corporation and NEC Electronics Corporation (under  
Chapters 1 and 5)  
• Modified expressions “version J”, “version L”, and “version K” to “J  
version”, “L version”, and “K version”, respectively (under Chapters 1  
and 5)  
Chapter 1. Overview  
2
4
• Modified “re-oscillation detection” in Table 1.1 to “restart detection”  
• Completed all “under development” phases in Table 1.3  
• Revised Figure 1.3  
7
12  
• Modified expression “fC” in Table 1.8 to “low speed clocks”  
Chapter 2. CPU  
• Modified wording and enhanced description in this chapter  
Chapter 4. SFRs  
25, 28, • Changed register name “Group i Timer Measurement Prescaler  
31  
32  
34  
Register” in Tables 4.6, 4.9, and 4.12 to “Group i Time Measurement  
Prescaler Register”  
• Modified expression “XY Control Register” in Table 4.13 to “X-Y  
Control Register”  
• Changed register name “UART2 Transmission/Receive Mode  
Register” in Table 4.15 to “UART2 Transmit/Receive Mode Register”;  
Changed hexadecimal format of reset values for registers TABSR,  
ONSF, and TRGSR to binary  
45  
• Changed register name “External Interrupt Source Select Register i” in  
Table 4.26 to “External Interrupt Request Source Select Register i”  
A- 2  
Revision History  
R32C/156 Group Datasheet  
Description  
Summary  
Rev.  
Date  
Page  
63, 77 • Modified register names “CANi Reception Error Count Register” and  
“CANi Transmission Error Count Register” in Tables 4.44 and 4.58 to  
“CANi Receive Error Count Register” and “CANi Transmit Error Count  
Register”, respectively  
Chapter 5. Electrical Characteristics  
• Changed expression “clock period” to “clock cycle time”  
• Added values for “|f  
|” and “|f  
|” in Table 5.13; Added  
87  
LOCK  
UNLOCK  
Note 1  
89  
• Changed expressions “CS0” and “A23 to A0, BC3 to BC0” in Figure  
5.5 to “Chip select” and “Address”, respectively  
Appendix 1. Package Dimensions  
115  
• Added a seating plane to the drawing of package dimension  
Fourth edition released  
1.20  
Aug 07, 2013  
This manual in general  
• Changed document number “REJ03B0233-0110” to  
“R01DS0075EJ0120”  
Chapter 1. Overview  
1
• Modified wording and enhanced description in this chapter  
2
2
• Modified expression “I C” in line 9 of 1.1 to “I C-bus interface”  
• Modified expressions “calculation transfer” and “chained transfer” in  
Table 1.1 to “calculation result transfer” and “chain transfer”,  
respectively  
2
8, 10  
13  
• Changed the order of timer pins for pin no. 36 in Table 1.4 and pin nos.  
79 and 81 in Table 1.6  
2
2
• Modified expression “I C bus” in Table 1.9 to “I C-bus”  
Chapter 2. CPU  
• Modified wording and enhanced description in this chapter  
• Corrected a typo “R3R0” in line 3 of 2.1.1 to “R3R1”  
Chapter 3. Memory  
16  
• Modified wording and enhanced description in this chapter  
Chapter 4. SFRs  
25, 26, • Changed hexadecimal format of reset values for registers GiBCR0 in  
28, 31  
34  
Tables 4.6, 4.7, 4.9 and 4.12 to binary  
• Changed register name “Increment/Decrement Counting Select  
Register” in Table 4.15 to “Increment/Decrement Select Register”  
60, 61, • Changed register name “CANi Acceptance Mask Register k” in Tables  
74, 75 4.41, 4.42, 4.55 and 4.56 to “CANi Mask Register k”  
63, 77 • Corrected reset value “XXXX XX00b” for CiMSMR register in Tables  
4.44 and 4.58 to “0000 0000b”  
Chapter 5. Electrical Characteristics  
• Modified wording and enhanced description in this chapter  
85, 86 • Changed expression “Programming and erasure endurance of flash  
memory” in Tables 5.8 and 5.9 to “Program/erase cycles”; Changed  
its unit “times” to “Cycles”  
A- 3  
Revision History  
R32C/156 Group Datasheet  
Description  
Summary  
Rev.  
Date  
Page  
92, 103 • Modified description “Drive power” in Tables 5.18 and 5.38 to “Drive  
strength”  
All trademarks and registered trademarks are the property of their respective owners.  
A- 4  
General Precautions in the Handling of MPU/MCU Products  
The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the  
products covered by this document, refer to the relevant sections of the document as well as any technical updates that  
have been issued for the products.  
1. Handling of Unused Pins  
Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual.  
The input pins of CMOS products are generally in the high-impedance state. In operation with an  
unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of LSI, an  
associated shoot-through current flows internally, and malfunctions occur due to the false  
recognition of the pin state as an input signal become possible. Unused pins should be handled as  
described under Handling of Unused Pins in the manual.  
2. Processing at Power-on  
The state of the product is undefined at the moment when power is supplied.  
The states of internal circuits in the LSI are indeterminate and the states of register settings and  
pins are undefined at the moment when power is supplied.  
In a finished product where the reset signal is applied to the external reset pin, the states of pins  
are not guaranteed from the moment when power is supplied until the reset process is completed.  
In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function  
are not guaranteed from the moment when power is supplied until the power reaches the level at  
which resetting has been specified.  
3. Prohibition of Access to Reserved Addresses  
Access to reserved addresses is prohibited.  
The reserved addresses are provided for the possible future expansion of functions. Do not access  
these addresses; the correct operation of LSI is not guaranteed if they are accessed.  
4. Clock Signals  
After applying a reset, only release the reset line after the operating clock signal has become stable.  
When switching the clock signal during program execution, wait until the target clock signal has  
stabilized.  
When the clock signal is generated with an external resonator (or from an external oscillator)  
during a reset, ensure that the reset line is only released after full stabilization of the clock signal.  
Moreover, when switching to a clock signal produced with an external resonator (or by an external  
oscillator) while program execution is in progress, wait until the target clock signal is stable.  
5. Differences between Products  
Before changing from one product to another, i.e. to a product with a different part number, confirm  
that the change will not lead to problems.  
The characteristics of an MPU or MCU in the same group but having a different part number may  
differ in terms of the internal memory capacity, layout pattern, and other factors, which can affect  
the ranges of electrical characteristics, such as characteristic values, operating margins, immunity  
to noise, and amount of radiated noise. When changing to a product with a different part number,  
implement a system-evaluation test for the given product.  
SALES OFFICES  
http://www.renesas.com  
Refer to "http://www.renesas.com/" for the latest and detailed information.  
Renesas Electronics America Inc.  
2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A.  
Tel: +1-408-588-6000, Fax: +1-408-588-6130  
Renesas Electronics Canada Limited  
1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada  
Tel: +1-905-898-5441, Fax: +1-905-898-3220  
Renesas Electronics Europe Limited  
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K  
Tel: +44-1628-651-700, Fax: +44-1628-651-804  
Renesas Electronics Europe GmbH  
Arcadiastrasse 10, 40472 Düsseldorf, Germany  
Tel: +49-211-65030, Fax: +49-211-6503-1327  
Renesas Electronics (China) Co., Ltd.  
7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China  
Tel: +86-10-8235-1155, Fax: +86-10-8235-7679  
Renesas Electronics (Shanghai) Co., Ltd.  
Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China  
Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898  
Renesas Electronics Hong Kong Limited  
Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong  
Tel: +852-2886-9318, Fax: +852 2886-9022/9044  
Renesas Electronics Taiwan Co., Ltd.  
13F, No. 363, Fu Shing North Road, Taipei, Taiwan  
Tel: +886-2-8175-9600, Fax: +886 2-8175-9670  
Renesas Electronics Singapore Pte. Ltd.  
80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre Singapore 339949  
Tel: +65-6213-0200, Fax: +65-6213-0300  
Renesas Electronics Malaysia Sdn.Bhd.  
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia  
Tel: +60-3-7955-9390, Fax: +60-3-7955-9510  
Renesas Electronics Korea Co., Ltd.  
11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea  
Tel: +82-2-558-3737, Fax: +82-2-558-5141  
© 2013 Renesas Electronics Corporation. All rights reserved.  
Colophon 2.2  

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