RJE0618JSP-00-J0 [RENESAS]

TRANSISTOR POWER, FET, FET General Purpose Power;
RJE0618JSP-00-J0
型号: RJE0618JSP-00-J0
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

TRANSISTOR POWER, FET, FET General Purpose Power

文件: 总8页 (文件大小:216K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Preliminary Datasheet  
RJE0618JSP  
–60V, –10A, P Channel Thermal FET  
Power Switching  
R07DS1147EJ0200  
Rev.2.00  
Jun 26, 2014  
Description  
This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in  
over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of  
high junction temperature like applying over power consumption, over current etc..  
Features  
For Automotive applications  
Built-in the over temperature shut-down circuit.  
High endurance capability against to the short circuit.  
Latch type shut down operation (need 0 voltage recovery).  
Built-in the current limitation circuit.  
High density mounting  
AEC-Q101 compliant  
Outline  
RENESAS Package code: PRSP0008DD-D  
(Package name: SOP-8)  
5
6
D
D
D
D
7
8
5
6
7
8
4
3
2
1
1, 2, 3  
4
5, 6, 7, 8 Drain  
Source  
Gate  
4
Current  
Limitation  
Circuit  
G
Gate Resistor  
Temperature  
Sensing  
Circuit  
Gate  
Shut-down  
Circuit  
Latch  
Circuit  
1
2
3
S
S
S
Absolute Maximum Ratings  
(Ta = 25°C)  
Item  
Drain to source voltage  
Gate to source voltage  
Symbol  
VDSS  
VGSS  
Ratings  
–60  
–16  
2.5  
–10  
Unit  
V
V
V
A
VGSS  
Note3  
Drain current  
ID  
Body-drain diode reverse drain current  
Avalanche current  
Avalanche energy  
Channel dissipation  
Channel temperature  
Storage temperature  
IDR  
–10  
–5.4  
125  
2.5  
150  
A
A
mJ  
W
°C  
°C  
Note 2  
IAP  
EAR  
Note 2  
Pch Note 1  
Tch  
Tstg  
–55 to +150  
Notes: 1 When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW 10 s  
2. Tch = 25°C, Rg 50 Ω  
3. It provides by the current limitation lower bound value.  
R07DS1147EJ0200 Rev.2.00  
Jun 26, 2014  
Page 1 of 7  
RJE0618JSP  
Preliminary  
Typical Operation Characteristics  
(Ta = 25°C)  
Item  
Symbol  
VIH  
Min  
–3.5  
Typ  
Max  
Unit  
V
Test Conditions  
Input voltage  
Input current  
VIL  
–1.2  
–100  
–50  
–10  
V
IIH1  
μA  
μA  
μA  
mA  
mA  
°C  
V
Vi = –8 V, VDS = 0  
(Gate non shut down)  
IIH2  
Vi = –3.5 V, VDS = 0  
Vi = –1.2 V, VDS = 0  
Vi = –8 V, VDS = 0  
Vi = –3.5 V, VDS = 0  
IIL  
Input current  
IIH(sd)1  
IIH(sd)2  
Tsd  
Vop  
ID limt  
–0.8  
–0.35  
175  
(Gate shut down)  
Shut down temperature  
Gate operation voltage  
Channel temperature  
–3.5  
–10  
–12  
Drain current  
A
VGS = –12 V, VDS = –10 V Note 4  
(Current limitation value)  
Notes; 4. Pulse test  
Electrical Characteristics  
(Ta = 25°C)  
Item  
Symbol  
ID1  
Min  
Typ  
Max  
–16  
–10  
Unit  
Test Conditions  
VGS = –3.5 V, VDS = –10 V  
VGS = –1.2 V, VDS = –10 V  
VGS = –12 V, VDS = –10 V Note 5  
ID = –10 mA, VGS = 0  
Drain current  
A
mA  
A
ID2  
ID3  
–10  
–60  
Drain to source breakdown  
voltage  
V(BR)DSS  
V
Gate to source breakdown  
voltage  
V(BR)GSS  
V(BR)GSS  
IGSS1  
–16  
2.5  
V
IG = –800 μA, VDS = 0  
IG = 100 μA, VDS = 0  
VGS = –8 V, VDS = 0  
VGS = –3.5 V, VDS = 0  
VGS = –1.2 V, VDS = 0  
VGS = 2.4 V, VDS = 0  
VGS = –8 V, VDS = 0  
VGS = –3.5 V, VDS = 0  
VDS = –60 V, VGS = 0  
V
Gate to source leak current  
–100  
–50  
–10  
100  
μA  
μA  
μA  
μA  
mA  
mA  
μA  
μA  
IGSS2  
IGSS3  
IGSS4  
Input current (shut down)  
IGS(OP)1  
IGS(OP)2  
IDSS1  
–0.8  
–0.35  
Zero gate voltage drain current  
Zero gate voltage drain current  
–10  
–10  
IDSS2  
VDS = –48 V, VGS = 0,  
Ta = 125°C  
Gate to source cutoff voltage  
Forward transfer admittance  
VGS(off)  
|yfs|  
–1.0  
5
8.4  
–2.1  
V
S
VDS = –10 V, ID = –1 mA  
ID = –5 mA, VDS = –10 V Note 5  
ID = –5 A, VGS = –6 V Note 5  
ID = –5 A, VGS = –10 V Note 5  
VDS = –10 V, VGS = 0, f = 1MHz  
VGS = –10 V, ID= –5 A,  
RL = 6 Ω  
Static drain to source on state  
resistance  
RDS(on)  
RDS(on)  
Coss  
td(on)  
tr  
134  
98  
180  
120  
mΩ  
mΩ  
pF  
μs  
μs  
μs  
μs  
V
Output capacitance  
Turn-on delay time  
Rise time  
444  
2.6  
10.9  
2.2  
Turn-off delay time  
Fall time  
td(off)  
tf  
3.4  
Body-drain diode forward  
voltage  
VDF  
–0.92  
IF = –10 A, VGS = 0 Note 5  
Body-drain diode reverse  
recovery time  
trr  
100  
ns  
IF = –10 A, VGS = 0  
diF/dt = 50 A/μs  
Over load shut down  
operation time Note 6  
tos1  
tos2  
2.54  
1.35  
ms  
ms  
VGS = –5 V, VDD = –16 V  
VGS = –5 V, VDD = –24 V  
Notes: 5. Pulse test  
6. Including the junction temperature rise of the over loaded condition.  
R07DS1147EJ0200 Rev.2.00  
Jun 26, 2014  
Page 2 of 7  
RJE0618JSP  
Preliminary  
Main Characteristics  
Power vs. Temperature Derating  
Maximum Safe Operation Area  
100  
10  
4.0  
3.0  
2.0  
1.0  
0
Thermal shut down  
operation area  
Ta = 25°C  
Test condition.  
When using the glass epoxy board.  
(FR4 40 x 40 x 1.6 mm), (PW ≤ 10s)  
1  
0.1  
Operation  
in this area  
is limited RDS(on)  
0.01  
0
50  
100  
150  
200  
0.01  
0.1  
1  
10  
100  
Drain to Source Voltage VDS (V)  
Ambient Temperature Ta (°C)  
Note 7:  
When using the glass epoxy board.  
(FR4 40 x 40 x 1.6 mm)  
Typical Output Characteristics  
Typical Transfer Characteristics  
10  
8  
10  
8  
4.0 V  
5.0 V  
V
DS = 10 V  
Pulse Test  
8.0 V  
10.0 V  
VGS = 3.5 V  
6  
6  
4  
4  
Tc = 150°C  
2  
2  
25°C  
40°C  
3  
Pulse Test  
0
0  
1  
2  
4  
5  
2  
4  
6  
8  
10  
Drain to Source Voltage VDS (V)  
Gate to Source Voltage VGS (V)  
Drain Source Saturation Voltage vs.  
Gate to Source Voltage  
Static Drain to Source On State Resistance  
vs. Drain Current  
1000  
2000  
1600  
1200  
800  
Pulse Test  
Pulse Test  
V
GS = 4 V  
10 V  
I
D = 5 A  
100  
10  
2 A  
1 A  
400  
0  
16  
0 2 4 6 8 10 12 14  
0.1  
1  
10  
Gate to Source Voltage VGS (V)  
Drain Current ID (A)  
R07DS1147EJ0200 Rev.2.00  
Jun 26, 2014  
Page 3 of 7  
RJE0618JSP  
Preliminary  
Body-Drain Diode Reverse  
Recovery Time  
Static Drain to Source On State Resistance  
vs. Temperature  
250  
200  
150  
1000  
I
D = 5 A  
Pulse Test  
2 A  
1 A  
VGS = 4 V  
100  
10  
5 A  
100  
50  
ID = 1 A, 2 A  
VGS = 10 V  
di / dt = 50 A / μs  
VGS = 0, Ta = 25°C  
0
50 25  
0
25 50 75 100 125 150  
0.1  
1  
10  
Case Temperature Tc (°C)  
Reverse Drain Current IDR (A)  
Reverse Drain Current vs.  
Source to Drain Voltage  
Switching Characteristics  
4  
3  
2  
1  
100  
10  
1
VGS = 5 V  
t
t
f
d(off)  
t
r
VGS = 0 V, 5 V  
t
d(on)  
V
GS = 10 V, VDD = 30 V  
PW = 300 μs, duty ≤ 1 %  
Pulse Test  
1.6  
0.1  
0
0.4  
0.8  
1.2  
2.0  
0.1  
1  
10  
Drain Current ID (A)  
Source to Drain Voltage VSD (V)  
Typical Capacitance vs.  
Drain to Source Voltage  
Forward transfer admittance vs.  
Drain Current  
100  
10000  
1000  
100  
VGS = 0  
f = 1 MHz  
Ta = 40°C  
25°C  
10  
1
150°C  
VDS = –10 V  
Pulse Test  
0.1  
10  
–0.1  
–1  
–10  
0 10 20 30 40 50 60  
Drain to Source Voltage VDS (V)  
Drain Current ID (A)  
R07DS1147EJ0200 Rev.2.00  
Jun 26, 2014  
Page 4 of 7  
RJE0618JSP  
Preliminary  
Shutdown Case Temperature vs.  
Gate to Source Voltage  
Gate to Source Voltage vs.  
Shutdown Time of Load-Short Test  
200  
180  
160  
140  
16  
14  
12  
10  
8  
VDD = 16 V  
24 V  
6  
4  
2  
0  
120  
100  
ID = 0.5 A  
0
2  
4  
6  
8  
10  
0.1  
1
10  
Gate to Source Voltage VGS (V)  
Shutdown Time of Load-Short Test PW (ms)  
Normalized Transient Thermal Impedance vs. Pulse Width  
10  
1
D = 1  
0.5  
0.1  
0.1  
θch f(t) = γs (t) • θch f  
θch f = 83.3 °C/ W, Ta = 25°C  
When using the glass epoxy board  
(FR4 40 × 40 × 1.6 mm)  
0.01  
PW  
T
P
DM  
D =  
0.001  
PW  
T
0.0001  
100 µ 1 m  
10 m 100 m  
1
10  
100  
1000 10000  
10 µ  
R07DS1147EJ0200 Rev.2.00  
Jun 26, 2014  
Page 5 of 7  
RJE0618JSP  
Preliminary  
Switching Time Test Circuit  
Waveform  
Vout  
Monitor  
Vin  
Vin Monitor  
10%  
D.U.T.  
Rg  
RL  
90%  
90%  
VDD  
= –30 V  
Vin  
–10 V  
90%  
10%  
10%  
Vout  
t
t
t
f
d(off)  
d(on)  
t
r
Avalanche Test Circuit  
Avalanche Waveform  
L
VDSS  
VDSS – VDD  
1
2
VDS  
Monitor  
2
EAR  
=
L · IAP ·  
IAP  
Monitor  
0
Rg  
VDD  
VDD  
D. U. T  
Vin  
–10 V  
ID  
VDS  
IAP  
V(BR)DSS  
R07DS1147EJ0200 Rev.2.00  
Jun 26, 2014  
Page 6 of 7  
RJE0618JSP  
Preliminary  
Package Dimensions  
Package Name  
SOP-8  
JEITA Package Code  
RENESAS Code  
PRSP0008DD-D  
Previous Code  
FP-8DAV  
MASS[Typ.]  
0.085g  
P-SOP8-3.95 × 4.9-1.27  
1
D
*
bp  
5
8
1
Index mark  
NOTE)  
4
Terminal cross section  
(Ni/Pd/Au plating)  
1. DIMENSIONS "*1(Nom)" AND "*2"  
DO NOT INCLUDE MOLD FLASH.  
2. DIMENSION "*3" DOES NOT  
INCLUDE TRIM OFFSET.  
Z
3
bp  
*
M
x
e
Dimension in Millimeters  
Reference  
Symbol  
Min Nom Max  
D
E
4.90  
3.95  
5.3  
L1  
A2  
A1  
A
0.10  
0.14 0.25  
1.75  
0.34 0.40 0.46  
bp  
b1  
c
0.15 0.20 0.25  
c1  
L
0° 8°  
5.80 6.10 6.20  
1.27  
y
HE  
e
Detail F  
x
0.25  
y
0.1  
0.75  
Z
L
L1  
0.40 0.60 1.27  
1.08  
Ordering Information  
Part No.  
Quantity  
Shipping Container  
RJE0618JSP-00-J0  
2500 pcs  
Taping  
R07DS1147EJ0200 Rev.2.00  
Jun 26, 2014  
Page 7 of 7  
Notice  
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