RJK03F8DNS-00-J5 [RENESAS]
Silicon N Channel Power MOS FET Power Switching; 硅N通道功率MOS FET电源开关
| 型号： | RJK03F8DNS-00-J5 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Silicon N Channel Power MOS FET Power Switching |
| 文件： | 总7页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Datasheet
RJK03F8DNS
Silicon N Channel Power MOS FET
Power Switching
REJ03G1918-0100
Rev.1.00
Apr 21, 2010
Features
High speed switching
Capable of 4.5 V gate drive
Low drive current
High density mounting
Low on-resistance
RDS(on) = 7 m typ. (at VGS = 8 V)
Pb-free
Halogen-free
Outline
RENESAS Package code: PWSN0008JB-A
(Package name: HWSON-8)
5
6
7 8
D D D D
8
7
6
5
1, 2, 3
4
5, 6, 7, 8 Drain
Source
Gate
4
G
1
2
3
4
S
1
S S
2
3
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Symbol
VDSS
VGSS
ID
Ratings
30
Unit
V
V
±12
16
A
Note1
Drain peak current
ID(pulse)
64
A
Body-drain diode reverse drain current
Avalanche current
IDR
16
A
Note 2
IAP
10
A
Note 2
Avalanche energy
EAR
10
mJ
W
Channel dissipation
Pch Note3
ch-c Note3
Tch
12.5
10.0
150
Channel to case thermal impedance
Channel temperature
Storage temperature
C/W
C
C
Tstg
–55 to +150
Notes: 1. PW 10 s, duty cycle 1%
2. Value at Tch = 25C, Rg 50
3. Tc = 25C
REJ03G1918-0100 Rev.1.00
Apr 21, 2010
Page 1 of 6
RJK03F8DNS
Preliminary
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
V(BR)DSS
IGSS
Min
30
—
—
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
Max
—
Unit
V
Test Conditions
Drain to source breakdown voltage
Gate to source leak current
Zero gate voltage drain current
Gate to source cutoff voltage
ID = 10 mA, VGS = 0
VGS = ±12 V, VDS = 0
VDS = 30 V, VGS = 0
VDS = 10 V, I D = 1 mA
ID = 8 A, VGS = 8 V Note4
ID = 8 A, VGS = 4.5 V Note4
ID = 8 A, VDS = 5 V Note4
VDS = 10 V
—
±0.1
1
A
A
V
IDSS
—
VGS(off)
RDS(on)
RDS(on)
|yfs|
—
2.5
8.4
10.4
—
Static drain to source on state
resistance
7
m
m
S
8.3
40
Forward transfer admittance
Input capacitance
Ciss
Coss
Crss
Rg
1500
162
104
0.7
11.3
3.5
4.6
12.8
8.0
38.1
6.8
0.85
21
2100
—
pF
pF
pF
V
GS = 0
f = 1 MHz
Output capacitance
Reverse transfer capacitance
Gate Resistance
—
1.9
—
Total gate charge
Qg
nC
nC
nC
ns
ns
ns
ns
V
VDD = 10 V
GS = 4.5 V
ID = 16 A
V
Gate to source charge
Gate to drain charge
Turn-on delay time
Rise time
Qgs
Qgd
td(on)
tr
—
—
—
VGS = 8 V, ID = 8 A
VDD 10 V
RL = 1.25
—
Turn-off delay time
Fall time
td(off)
tf
—
Rg = 4.7
—
Body–drain diode forward voltage
VDF
1.11
—
IF = 16 A, VGS = 0 Note4
Body–drain diode reverse recovery
time
trr
ns
IF =16 A, VGS = 0
diF/ dt = 100 A/ s
Notes: 4. Pulse test
REJ03G1918-0100 Rev.1.00
Apr 21, 2010
Page 2 of 6
RJK03F8DNS
Preliminary
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
20
15
10
5
100
10
1
PW = 10 ms
Operation in
this area is
limited by RDS(on)
0.1
Tc = 25 °C
1 shot Pulse
0.01
0
0.1
1
10
100
50
100
150
200
Drain to Source Voltage VDS (V)
Case Temperature Tc (°C)
Typical Output Characteristics
Typical Transfer Characteristics
20
16
12
8
20
16
12
8
Pulse Test
2.8 V
4.5 V
8 V
VDS = 5 V
Pulse Test
2.9 V
2.7 V
25°C
4
4
Tc = 75°C
V
GS = 2.5 V
–25°C
0
0
5
1
2
3
4
2
4
6
8 10
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V)
Static Drain to Source on State Resistance
vs. Drain Current
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
100
320
Pulse Test
Pulse Test
240
160
80
30
VGS = 4.5 V
8 V
10
ID = 10 A
3
1
5 A
2 A
0
3
6
9
12
1
3
10
30
100
Gate to Source Voltage VGS (V)
Drain Current ID (A)
REJ03G1918-0100 Rev.1.00
Apr 21, 2010
Page 3 of 6
RJK03F8DNS
Preliminary
Static Drain to Source on State Resistance
vs. Temperature
Typical Capacitance vs.
Drain to Source Voltage
40
32
24
16
10000
3000
1000
Pulse Test
Ciss
300
100
ID = 2 A, 5 A, 10 A
Coss
Crss
VGS = 4.5 V
8 V
8
0
30
10
VGS = 0
f = 1 MHz
2 A, 5 A, 10 A
0
10
20
30
–25
0
25
50 75 100 125 150
Case Temperature Tc (°C)
Drain to Source Voltage VDS (V)
Reverse Drain Current vs.
Source to Drain Voltage
Dynamic Input Characteristics
ID = 16 A
20
16
12
8
50
40
30
20
10
0
20
16
12
8
10 V
Pulse Test
5 V
VGS
VDD = 25 V
10 V
VDS
VGS = 0, –5 V
4
4
VDD = 25 V
10 V
0
25
0
0.4
0.8
1.2
1.6
2.0
0
5
10
15
20
Source to Drain Voltage VSD (V)
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
20
IAP = 10 A
VDD = 15 V
16
12
8
duty < 0.1%
Rg 50
4
0
25
50
75
100
125
150
Channel Temperature Tch (°C)
REJ03G1918-0100 Rev.1.00
Apr 21, 2010
Page 4 of 6
RJK03F8DNS
Preliminary
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
D = 1
0.5
0.3
0.1
θch − c(t) = γs (t) • θch − c
θch − c = 10.0°C/W, Tc = 25°C
PW
T
P
DM
D =
0.03
0.01
PW
T
10 μ
100 μ
1 m
10 m
100 m
1
10
Pulse Width PW (S)
Avalanche Test Circuit
Avalanche Waveform
VDSS
1
2
EAR
=
L • IAP
•
L
VDSS – VDD
2
VDS
Monitor
IAP
Monitor
V(BR)DSS
IAP
Rg
VDS
VDD
D. U. T
ID
Vin
15 V
50 Ω
VDD
0
Switching Time Test Circuit
Switching Time Waveform
90%
Vout
Monitor
Vin Monitor
Rg
D.U.T.
10%
10%
Vin
RL
Vout
10%
VDS
= 10 V
Vin
10 V
90%
90%
t
t
t
t
f
d(on)
r
d(off)
REJ03G1918-0100 Rev.1.00
Apr 21, 2010
Page 5 of 6
RJK03F8DNS
Preliminary
Package Dimensions
Package Name
HWSON-8
JEITA Package Code
RENESAS Code
PWSN0008JB-A
Previous Code
⎯
MASS[Typ.]
0.022g
P-HWSON8-2.9x3.1-0.65
3.3 ± 0.1
2.25 ± 0.2
0.8 Max
(2.55)
0.32 ± 0.08
0.575 Typ
0.22 Typ
0.65 Typ
3.1 ± 0.1
Ordering Information
Part No.
Quantity
Shipping Container
RJK03F8DNS-00-J5
5000 pcs
Taping
REJ03G1918-0100 Rev.1.00
Apr 21, 2010
Page 6 of 6
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Colophon 1.0
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