UPD78F9211FH(T)2A2-A [RENESAS]
IC,MICROCONTROLLER,8-BIT,UPD78K0 CPU,CMOS,BGA,16PIN,PLASTIC;
| 型号： | UPD78F9211FH(T)2A2-A |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | IC,MICROCONTROLLER,8-BIT,UPD78K0 CPU,CMOS,BGA,16PIN,PLASTIC 时钟 微控制器 光电二极管 外围集成电路 |
| 文件： | 总38页 (文件大小：417K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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ELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
µPD78F9210FH, 78F9211FH, 78F9212FH
8-BIT SINGLE-CHIP MICROCONTROLLER
The µ78F9210FH, 78F9211FH, and 78F9212FH are products of the 78K0S/KY1+ in the 78K/0S series.
These microcontrollers feature Single-voltage and Self-programming Flash memory and peripherals that is suitable
for your application.
The functions of these microcontrollers are described in the following user's manuals. Refer to these
manuals when designing a system based on any of these microcontrollers.
78K0S/KY1+ User's Manual
:
:
U16994E
U11047E
78K/0S Series User's Manual, Instruction
FEATURES
• 78K/0S CPU core, 8-bit CISC architecture
• ROM and RAM capacities
Item
Program memory
(Flash EEPROM)
Data memory
Product name
(High-speed RAM)
128 bytes
µPD78F9210FH
µPD78F9211FH
µPD78F9212FH
1 Kbytes
2 Kbytes
4 Kbytes
128 bytes
128 bytes
• I/O port: 14
CMOS I/O: 13
• Minimum instruction execution time
Minimum instruction execution time selectable from
high speed (0.2 µs) to low speed (3.2 µs) (with CPU
clock of 10 MHz)
CMOS Input: 1
• On-chip A/D Converter
10-bit resolution A/D converter: 4 ch (2.7 to 5.5 V)
• System clock
• Timer/Counter
16-bit Timer: 1 ch
High-speed internal oscillator: 8 MHz (TYP.)
Ceramic/crystal oscillator: 1 MHz to 10 MHz
• WDT clock
8-bit Timer: 1 ch
• Watchdog Timer: 1 ch
Low-speed internal oscillator: 240 kHz (TYP.)
• Operation Voltage: 2.0 V to 5.5 V
• Package: 16-pin WLCSP (1.93 x 2.24 x thickness of 0.4
mm, 0.5 mm pitch)
• Interrupt
External: 2 sources Internal: 5 sources
APPLICATION FIELDS
Household electrical appliances, Toys, Mobile device
The information contained in this document is being issued in advance of the production cycle for the
product. The parameters for the product may change before final production or NEC Electronics
Corporation, at its own discretion, may withdraw the product prior to its production.
Not all products and/or types are availabe in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. U17798EJ1V0PM00 (1st edition)
Date Published December 2005 NS CP(K)
Printed in Japan
© NEC Electronics Cororation 2005
µPD78F9210FH, 78F9211FH, 78F9212FH
ORDERING INFORMATION
Part Number
µPD78F9210FH-2A2-A
µPD78F9211FH-2A2-A
µPD78F9212FH-2A2-A
Package
16-pin WLCSP (1.93x2.24x0.4 mm in thickness, 0.5 mm pitch)
16-pin WLCSP (1.93x2.24x0.4 mm in thickness, 0.5 mm pitch)
16-pin WLCSP (1.93x2.24x0.4 mm in thickness, 0.5 mm pitch)
Remark Products with -A at the end of the part number are lead-free products.
Preliminary Product Information U17798EJ1V0PM
2
µPD78F9210FH, 78F9211FH, 78F9212FH
OVERVIEW OF FUNCTIONS
Item
µPD78F9210FH
1 KB
µPD78F9211FH
2 KB
µPD78F9212FH
4 KB
Internal memory
Memory space
Flash memory
High-speed RAMNote 1
128 bytes
64 KB
X1 input clock (oscillation frequency)
Crystal/ceramic oscillation, external system clock input
10 MHz: VDD = 2.0 to 5.5 V
Internal oscillation High-speed
Internal oscillation: 8 MHz (TYP.)
Internal oscillation: 240 kHz (TYP.)
8 bits × 8 registers
clock
Low-speed
General-purpose registers
Instruction execution time
I/O ports
0.2 µs/0.4 µs/0.8 µs/1.6 µs/3.2 µs/ (X1 input clock: @ fX = 10 MHz operation)
Total:
14
13
1
CMOS I/O:
CMOS Input
Timers
• 16-bit timer/event counter: 1 channel
• 8-bit timer(Timer H1):
• Watchdog timer:
1 channel
1 channel
Timer outputs
A/D converter
2 (PWM output: 1)
10-bit resolution × 4 channels
Vectored interrupt External
2
sources
Internal
5
Reset
• Reset using RESET pin
• Internal reset by watchdog timer
• Internal reset by power-on-clear
• Internal reset by low-voltage detector
Power supply voltage
Operating ambient temperature
Package
VDD = 2.0 to 5.5 VNote
TA = −40 to +85°C
16-pin WLCSP
Note Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on-
clear(POC) circuit is 2.1 V 0.1 V.
Preliminary Product Information U17798EJ1V0PM
3
µPD78F9210FH, 78F9211FH, 78F9212FH
CONTENTS
1. PIN CONFIGURATION..................................................................................................................... 5
2. BLOCK DIAGRAM........................................................................................................................... 6
3. PIN FUNCTIONS.............................................................................................................................. 7
3.1 Port Pins.................................................................................................................................................7
3.2 Non-Port Pins.........................................................................................................................................8
3.3 Pin I/O Circuits and Recommended Connection of Unused Pins .....................................................9
4. MEMORY SPACE ........................................................................................................................... 11
4.1 Memory Space.......................................................................................................................................11
4.2 Memory Configuration..........................................................................................................................14
5. OPTION BYTE................................................................................................................................. 15
5.1 Functions of Option Byte.....................................................................................................................15
5.2 Format of Option Byte..........................................................................................................................16
6. SOURCE CLOCK OF EACH TIMER .............................................................................................. 18
7. ELECTRICAL SPECIFICATIONS (TARGET VALUES)................................................................. 19
8. PACKAGE DRAWING (PRELIMINARY)........................................................................................ 31
APPENDIX A RELATED DOCUMENTS ............................................................................................ 32
Preliminary Product Information U17798EJ1V0PM
4
µPD78F9210FH, 78F9211FH, 78F9212FH
1. PIN CONFIGURATION
•
16-pin WLCSP (1.93x2.24x0.4 mm in thickness, 0.5 mm pitch)
Top View
Bottom View
D
C
B
A
4 3 2 1
1 2 3 4
Index Mark
Pin No.
A1
Pin Name
Pin No.
Pin Name
P20/ANI0/TI000/TOH1
C1
C2
C3
C4
D1
D2
D3
D4
P42
P43
Note1
VSS
A2
A3
A4
B1
B2
B3
B4
P47
P34/RESET
P23/X1/ANI3
P41
P45
P21/ANI1/TI010/TO000/INTP0
P40
P32/INTP1
P44
Note2
VDD
P46
P22/X2/ANI2
ANI0 to ANI3:
INTP0, INTP1:
P20 to P23:
P32, P34:
Analog input
TI000, TI010:
Timer input
External interrupt input
TO00, TOH1:
Timer output
Note2
Port 2
Port 3
Port 4
Reset
VDD
VSS
:
:
Power supply
Note1
Ground
P40 to P47:
RESET:
X1, X2:
Crystal oscillator (X1 input clock)
Notes 1. VSS functions alternately as the ground potential of the A/D converter. Be sure to connect VSS to a
stabilized GND (= 0 V).
2. VDD functions alternately as the A/D converter reference voltage input. When using the A/D converter,
stabilize VDD at the supply voltage used (2.7 to 5.5 V).
Preliminary Product Information U17798EJ1V0PM
5
µPD78F9210FH, 78F9211FH, 78F9212FH
2. BLOCK DIAGRAM
TO00/TI010/P21
4
PORT 2
PORT 3
P20-P23
16-bit TIMER/
EVENT COUNTER 00
TI000/P20
TOH1/P20
P32
P34
78K0S
CPU
CORE
8-bit TIMER H1
FLASH
MEMORY
PORT 4Note1
8
P40-P47
LOW-SPEED
INTERNAL
OSCILLATOR
POWER ON CLEAR/
LOW VOLTAGE
INDICATOR
POC/LVI
CONTROL
ANI0/P20-
ANI3/P23
A/D CONVERTER
4
INTERNAL
HIGH-SPEED
RAM
RESET CONTROL
INTP0/P21
INTP1/P32
INTERRUPT
CONTROL
RESET/P34
X1/P23
SYSTEM
CONTROL
X2/P22
HIGH-SPEED
INTERNAL
OSCILLATOR
Note2
DDNote1 VSS
V
Notes 1. VDD functions alternately as the A/D converter reference voltage input. When using the A/D converter,
stabilize VDD at the supply voltage used (2.7 to 5.5 V).
2. VSS functions alternately as the ground potential of the A/D converter. Be sure to connect VSS to a
stabilized GND (= 0 V).
Preliminary Product Information U17798EJ1V0PM
6
µPD78F9210FH, 78F9211FH, 78F9212FH
3. PIN FUNCTIONS
3.1 Port Pins
Pin Name
I/O
Function
After Reset Alternate-Function
Pin
P20
I/O
Port 2.
Input
ANI0/TI000/TOH1
4-bit I/O port.
P21
ANI1/TI010/
TO00/INTP0
Can be set to input or output mode in 1-bit units.
An on-chip pull-up resistor can be connected by setting
software.
P22Note
P23Note
P32
X2/ANI2Note
X1/ANI3Note
INTP1
I/O
Port 3
Can be set to input or output mode in
1-bit units.
Input
An on-chip pull-up resistor can be
connected by setting software.
P34Note
RESETNote
Input
I/O
Input only
Input
Input
P40 to P47
Port 4.
−
8-bit I/O port.
Can be set to input or output mode in 1-bit units.
An on-chip pull-up resistor can be connected by setting
software.
Note For the setting method for pin functions, see 5. OPTION BYTE.
Caution The P22/X2/ANI2 and P23/X1/ANI3 pins are pulled down during reset.
Preliminary Product Information U17798EJ1V0PM
7
µPD78F9210FH, 78F9211FH, 78F9212FH
3.2 Non-Port Pins
Pin Name
I/O
Function
After Reset
Input
Alternate-
Function Pin
INTP0
Input
Input
External interrupt input for which the valid edge (rising edge,
falling edge, or both rising and falling edges) can be specified
P21/ANI1/TI010/
TO00
INTP1
TI000
P32
External count clock input to 16-bit timer/event counter 00.
Capture trigger input to capture registers (CR000 and CR010) of
16-bit timer/event counter 00
Input
P20/ANI0/TOH1
TI010
TO00
Capture trigger input to capture register (CR000) of 16-bit
timer/event counter 00
P21/ANI1/TO00/
INTP0
Output
16-bit timer/event counter 00 output
Input
P21/ANI1/TI010/
INTP0
TOH1
ANI0
ANI1
Output
Input
8-bit timer H1 output
Input
Input
P20/ANI0/TI000
P20/TI000/TOH1
Analog input of A/D converter
P21/TI010/TO00/
INTP0
ANI2Note
ANI3Note
RESET Note
X1Note
P22/X2Note
P23/X1Note
P34Note
Input
Input
System reset input
Input
P23/ANI3Note
Connection of crystal/ceramic oscillator for system clock
oscillation.
−
External clock input.
X2Note
P22/ANI2Note
−
Connection of crystal/ceramic oscillator for system clock
oscillation.
−
VDD
VSS
−
−
Positive power supply
Ground potential
−
−
−
−
Note For the setting method for pin functions, see 5. OPTION BYTE.
Caution The P22/X2/ANI2 and P23/X1/ANI3 pins are pulled down during reset.
Preliminary Product Information U17798EJ1V0PM
8
µPD78F9210FH, 78F9211FH, 78F9212FH
3.3 Pin I/O Circuits and Recommended Connection of Unused Pins
The input/output circuit type of each pin and recommended connection of unused pins is shown in Table 3-1.
For the input/output circuit configuration of each type, refer to Figure 3-1.
Table 3-1. Type of I/O Circuit for Each Pin and Connection of Unused Pins
Pin Name
P20/ANI0/TI000/TOH1
P21/ANI1/TI010/TO00/
INTP0
I/O Circuit Type
11
I/O
Recommended Connection of Unused Pin
I/O
Input: Individually connect to VDD or VSS via resistor.
Output: Leave open.
P22/ANI2/X2
36
Input: Individually connect to VSS via resistor.
Output: Leave open.
P23/ANI3/X1
P32/INTP1
8-A
Input: Individually connect to VDD or VSS via resistor.
Output: Leave open.
P34/RESET
P40 to P47
2
Input
I/O
Connect to VDD via resistor.
8-A
Input: Individually connect to VDD or VSS via resistor.
Output: Leave open.
Preliminary Product Information U17798EJ1V0PM
9
µPD78F9210FH, 78F9211FH, 78F9212FH
Figure 3-1. Pin Input/Output Circuits
Type 36
Type 2
feedback
cut-off
IN
P-ch
Schmitt-triggered input with hysteresis characteristics
OSC
enable
X1,
X2,
IN/OUT
IN/OUT
V
DD
Type 8-A
pullup
enable
V
DD
P-ch
V
DD
Pull up
enable
P-ch
data
P-ch
VDD
output
N-ch
disable
Data
VSS
P-ch
Comparator
P-ch
N-ch
IN/OUT
+
-
Output
disable
N-ch
V
SS
Comparison
voltage
V
DD
pullup
enable
P-ch
VDD
Type 11
data
V
DD
P-ch
Pull up
enable
P-ch
output
disable
N-ch
VDD
V
SS
Data
Comparator
P-ch
P-ch
N-ch
+
IN/OUT
-
VSS
Output
disable
N-ch
Comparison
voltage
VSS
Comparator
P-ch
N-ch
+
-
VSS
Comparison
voltage
Input
enable
Preliminary Product Information U17798EJ1V0PM
10
µPD78F9210FH, 78F9211FH, 78F9212FH
4. MEMORY SPACE
4.1 Memory Space
Products in the µPD78F9210FH, 78F9211FH, and 78F9212FH can access up to 64 Kbytes of memory space.
Figures 4-1 to 4-3 show the memory maps.
Figure 4-1. Memory Map (µPD78F9210FH)
F F F F H
Special function registers
(SFR)
256 × 8 bits
F F 0 0 H
F E F F H
Internal high-speed RAM
128 × 8 bits
F E 8 0 H
F E 7 F H
Use prohibited
Data memory
space
0 3 F F H
0 4 0 0 H
0 3 F F H
Program area
0 0 8 2 H
0 0 8 1 H
0 0 8 0 H
0 0 7 F H
Protect byte area
Option byte area
Program memory
space
Flash memory
1,024 × 8 bits
CALLT table area
0 0 4 0 H
0 0 3 F H
Program area
0 0 1 4 H
0 0 1 3 H
Vector table area
0 0 0 0 H
0 0 0 0 H
Remark
The option byte and protect byte are 1 byte each.
Preliminary Product Information U17798EJ1V0PM
11
µPD78F9210FH, 78F9211FH, 78F9212FH
Figure 4-2. Memory Map (µPD78F9211FH)
F F F F H
Special function registers
(SFR)
256 × 8 bits
F F 0 0 H
F E F F H
Internal high-speed RAM
128 × 8 bits
F E 8 0 H
F E 7 F H
Use prohibited
Data memory
space
0 7 F F H
0 8 0 0 H
0 7 F F H
Program area
0 0 8 2 H
0 0 8 1 H
0 0 8 0 H
0 0 7 F H
Protect byte area
Option byte area
Flash memory
2,048 × 8 bits
Program memory
space
CALLT table area
0 0 4 0 H
0 0 3 F H
Program area
0 0 1 4 H
0 0 1 3 H
Vector table area
0 0 0 0 H
0 0 0 0 H
Remark
The option byte and protect byte are 1 byte each.
Preliminary Product Information U17798EJ1V0PM
12
µPD78F9210FH, 78F9211FH, 78F9212FH
Figure 4-3. Memory Map (µPD78F9212FH)
F F F F H
Special function registers
(SFR)
256 × 8 bits
F F 0 0 H
F E F F H
Internal high-speed RAM
128 × 8 bits
F E 8 0 H
F E 7 F H
Use prohibited
Data memory
space
0 F F F H
1 0 0 0 H
0 F F F H
Program area
0 0 8 2 H
0 0 8 1 H
0 0 8 0 H
0 0 7 F H
Protect byte area
Option byte area
Flash memory
4,096 × 8 bits
Program memory
space
CALLT table area
0 0 4 0 H
0 0 3 F H
Program area
0 0 1 4 H
0 0 1 3 H
Vector table area
0 0 0 0 H
0 0 0 0 H
Remark
The option byte and protect byte are 1 byte each.
Preliminary Product Information U17798EJ1V0PM
13
µPD78F9210FH, 78F9211FH, 78F9212FH
4.2 Memory Configuration
The 1/2/4 KB internal flash memory area is divided into 4/8/16 blocks and can be programmed/erased in block units.
All the blocks can also be erased at once, by using a dedicated flash programmer.
Figure 4-4. Flash Memory Mapping
µ
PD78F9212FH
0FFFH
Block 15 (256 bytes)
Block 14 (256 bytes)
0F00H
0EFFH
0E00H
0DFFH
FFFFH
Block 13 (256 bytes)
Block 12 (256 bytes)
Block 11 (256 bytes)
Block 10 (256 bytes)
0D00H
0CFFH
Special function resister
(256 byte)
0C00H
0BFFH
FF00H
FEFFH
0B00H
0AFFH
Internal high-speed RAM
(128 byte)
0A00H
09FFH
FE80H
FE7FH
Block 9 (256 bytes)
Block 8 (256 bytes)
0900H
08FFH
µ
PD78F9211FH
0800H
07FFH
Block 7 (256 bytes)
Block 6 (256 bytes)
Block 7 (256 bytes)
Block 6 (256 bytes)
Use prohibited
0700H
06FFH
0600H
05FFH
Block 5 (256 bytes)
Block 4 (256 bytes)
Block 3 (256 bytes)
Block 2 (256 bytes)
Block 5 (256 bytes)
Block 4 (256 bytes)
Block 3 (256 bytes)
Block 2 (256 bytes)
0500H
04FFH
µ
PD78F9210FH
0400H
03FFH
Block 3 (256 bytes)
Block 2 (256 bytes)
Block 1 (256 bytes)
0300H
02FFH
Flash memory
(1/2/4 KB)
0200H
01FFH
Block 1 (256 bytes)
Block 1 (256 bytes)
0100H
00FFH
Block 0 (256 bytes)
1 KB
Block 0 (256 bytes)
2 KB
Block 0 (256 bytes)
4 KB
0000H
0000H
Preliminary Product Information U17798EJ1V0PM
14
µPD78F9210FH, 78F9211FH, 78F9212FH
5. OPTION BYTE
5.1 Functions of Option Byte
The address 0080H of the flash memory of the µPD78F9210FH, 78F9211FH, and 78F9212FH is an option byte
area. When power is supplied or when starting after a reset, the option byte is automatically referenced, and settings
for the specified functions are performed. When using the product, be sure to set the following functions by using the
option byte.
(1) Selection of system clock source
• High-speed internal oscillation clock
• Crystal/ceramic oscillation clock
• External clock input
(2) Low-speed internal oscillation clock oscillation
• Cannot be stopped.
• Can be stopped by software.
(3) Control of RESET pin
• Used as RESET pin
• RESET pin is used as an input port pin (P34).
(4) Oscillation stabilization time on power application or after reset release
• 210/fX
• 212/fX
• 215/fX
• 217/fX
Figure 5-1. Positioning of Option Byte
03FFH/
07FFH/
0FFFH
Flash memory
(1024/2048/4096 × 8 bits)
0080H
Option byte
DEF
DEF
1
1
RMCE OSCSEL1 OSCSEL0 LIOCP
OSTS1 OSTS0
0000H
Preliminary Product Information U17798EJ1V0PM
15
µPD78F9210FH, 78F9211FH, 78F9212FH
5.2 Format of Option Byte
Format of option bytes is shown below.
Figure 5-2. Format of Option Byte (1/2)
Address: 0080H
7
6
5
4
1
3
2
1
0
1
DEFOSTS1 DEFOSTS0
RMCE
OSCSEL1
OSCSEL0
LIOCP
DEFOSTS1 DEFOSTS0
Oscillation stabilization time on power application or after reset release
210/fx (102.4 µs)
0
0
1
1
0
1
0
1
212/fx (409.6 µs)
215/fx (3.27 ms)
217/fx (13.1 ms)
Caution The setting of this option is valid only when the crystal/ceramic oscillation clock is selected
as the system clock source. No wait time elapses if the high-speed internal oscillation clock
or external clock input is selected as the system clock source.
RMCE
Control of RESET pin
1
0
Used as RESET pin.
RESET pin is used as input port pin (P34).
Caution Because the option byte is referenced after reset release, if a low level is input to the RESET
pin before the option byte is referenced, then the reset state is not released.
Also, when setting 0 to RMCE, connect the pull-up resistor.
OSCSEL1
OSCSEL0
Selection of system clock source
Crystal/ceramic oscillation clock
0
0
1
0
1
×
External clock input
High-speed internal oscillation clock
Caution Because the X1 and X2 pins are also used as the P23/ANI3 and P22/ANI2 pins, the conditions
under which the X1 and X2 pins can be used differ depending on the selected system clock
source.
(1) Crystal/ceramic oscillation clock is selected
The X1 and X2 pins cannot be used as I/O port pins or analog input pins of A/D converter
because they are used as clock input pins.
(2) External clock input is selected
Because the X1 pin is used as an external clock input pin, P23/ANI3 cannot be used as
an I/O port pin or an analog input pin of A/D converter.
(3) High-speed internal oscillation clock is selected
P23/ANI3 and P22/ANI2 pins can be used as I/O port pins or analog input pins of A/D
converter.
Remark × : don’t care
Preliminary Product Information U17798EJ1V0PM
16
µPD78F9210FH, 78F9211FH, 78F9212FH
Figure 5-2. Format of Option Byte (2/2)
LIOCP
Low-speed internal oscillates
1
0
Cannot be stopped (oscillation does not stop even if 1 is written to the LSRSTOP bit)
Can be stopped by software (oscillation stops when 1 is written to the LSRSTOP bit)
Cautions 1. If it is selected that low-speed internal oscillator cannot be stopped, the count clock to
the watchdog timer (WDT) is fixed to low-speed internal oscillation clock.
2. If it is selected that low-speed internal oscillator can be stopped by software, supply of
the count clock to WDT is stopped in the HALT/STOP mode, regardless of the setting of
bit 0 (LSRSTOP) of the low-speed internal oscillation mode register (LSRCM). Similarly,
clock supply is also stopped when a clock other than the low-speed internal oscillation
clock is selected as a count clock to WDT.
While the low-speed internal oscillator is operating (LSRSTOP = 0), the clock can be
supplied to the 8-bit timer H1 even in the STOP mode.
Remarks 1. ( ): fX = 10 MHz
2. For the oscillation stabilization time of the resonator, refer to the characteristics of the resonator
to be used.
3. An example of software coding for setting the option bytes is shown below.
OPB CSEG AT 0080H
DB 10010001B
; Set to option byte
; Low-speed internal oscillator cannot be stopped
; The system clock is a crystal or ceramic resonator.
; The RESET pin is used as an input-only port pin (P34).
; Minimum oscillation stabilization time (210/fX
)
4. For details on the timing at which the option byte is referenced, see the chapter of the reset
function 78K0S/KY1+ User's Manual (U16994E)
Preliminary Product Information U17798EJ1V0PM
17
µPD78F9210FH, 78F9211FH, 78F9212FH
6. SOURCE CLOCK OF EACH TIMER
(1) Count clock selection by 16-bit timer/event counter 00 (TM00)
fXP (10 MHz)
fXP/22 (2.5 MHz)
fXP/28 (39.06 kHz)
TI000 pin valid edgeNote
Note The external clock requires a pulse longer than two cycles of the internal count clock (fXP).
Remarks 1. fXP: Oscillation frequency of clock supplied to peripheral hardware
2. ( ): fXP = 10 MHz
(2) Count clock selection by 8-bit timer/event counter H1 (TMH1)
fXP(10 MHz)
fXP/22(2.5 MHz)
fXP/24(625 kHz)
fXP/26(156.25 kHz)
fXP/212(2.44 kHz)
fRL/27(1.88 kHz (TYP.))
Remarks 1. fXP: Oscillation frequency of clock to peripheral hardware
2. fRL: Low-speed internal oscillation clock oscillation frequency
3. Figures in parentheses apply to operation at fXP = 10 MHz, fRL = 240 kHz (TYP.).
(3) Overflow time setting by watchdog timer
Overflow time setting
During Low-Speed Internal oscillation Clock Operation
211/fRL (4.27 ms)
During System Clock Operation
213/fX (819.2 µs)
212/fRL (8.53 ms)
214/fX (1.64 ms)
215/fX (3.28 ms)
216/fX (6.55 ms)
217/fX (13.11 ms)
218/fX (26.21 ms)
219/fX (52.43 ms)
220/fX (104.86 ms)
213/fRL (17.07 ms)
214/fRL (34.13 ms)
215/fRL (68.27 ms)
216/fRL (136.53 ms)
217/fRL (273.07 ms)
218/fRL (546.13 ms)
Remarks 1. fRL: Low-speed internal oscillation clock oscillation frequency
2. fX: System clock oscillation frequency
3. Figures in parentheses apply to operation at fRL = 480 kHz (MAX.), fX = 10 MHz.
Preliminary Product Information U17798EJ1V0PM
18
µPD78F9210FH, 78F9211FH, 78F9212FH
7. ELECTRICAL SPECIFICATIONS (TARGET VALUES)
Caution These specifications show target values, which may change after device evaluation. The
operating voltage range may also change.
Absolute Maximum Ratings (TA = 25°C)
Parameter
Supply voltage
Symbol
Conditions
Ratings
−0.3 to +6.5
−0.3 to +0.3
−0.3 to VDD + 0.3Note
−0.3 to VDD + 0.3Note
−0.3 to VDD + 0.3Note
−10.0
Unit
V
VDD
VSS
VI
V
Input voltage
P20 to P23, P32, P34, P40 to P47
V
Output voltage
VO
VAN
IOH
V
Analog input voltage
Output current, high
V
Per pin
mA
mA
mA
mA
°C
°C
°C
°C
Total of P20 to P23, P32, P40 to P47
Per pin
−44.0
Output current, low
IOL
TA
20.0
Total of P20 to P23, P32, P40 to P47
In normal operation mode
During flash memory programming
Flash memory blank status
Flash memory programming already performed
44.0
Operating ambient
temperature
−40 to +85
Storage temperature
Tstg
−65 to +150
−40 to +125
Note Must be 6.5 V or lower
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the
verge of suffering physical damage, and therefore the product must be used under conditions that
ensure that the absolute maximum ratings are not exceeded.
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins.
19
Preliminary Product Information U17798EJ1V0PM
µPD78F9210FH, 78F9211FH, 78F9212FH
X1 Oscillator Characteristics (TA = −40 to +85°C, VDD = 2.0 to 5.5 VNote 1, VSS = 0 V)
Resonator Recommended Circuit Parameter Conditions
Oscillation
frequency (f
MIN.
1
TYP. MAX.
10.0
Unit
VSS X1
C1
X2
Ceramic
MHz
Note 2
)
resonator
X
C2
VSS X1
X2
Crystal
Oscillation
frequency (fX)Note 2
1
10.0
MHz
resonator
C1
C2
External
clock
X1 input
2.7 V ≤ VDD ≤ 5.5 V
1
1
10.0
5.0
MHz
X1
frequency (fX)Note 2
2.0 V ≤ VDD < 2.7 V
2.7 V ≤ VDD ≤ 5.5 V
X1 input high-
/low-level width
(tXH, tXL)
0.045
0.5
µs
2.0 V ≤ VDD < 2.7 V
0.09
0.5
Notes 1. Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on
clear (POC) circuit is 2.1 V 0.1 V.
2. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time.
Caution When using the X1 oscillator, wire as follows in the area enclosed by the broken lines in the above
figures to avoid an adverse effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating current flows.
• Always make the ground point of the oscillator capacitor the same potential as VSS
.
• Do not ground the capacitor to a ground pattern through which a high current flows.
• Do not fetch signals from the oscillator.
Remark For the resonator selection and oscillator constant, users are required to either evaluate the oscillation
themselves or apply to the resonator manufacturer for evaluation.
Preliminary Product Information U17798EJ1V0PM
20
µPD78F9210FH, 78F9211FH, 78F9212FH
High-Speed Internal Oscillator Characteristics (TA = −40 to +85°C, VDD = 2.0 to 5.5 VNote 1, VSS = 0 V)
Resonator
Parameter
Conditions
2.7 V ≤ VDD ≤ 5.5 V TA = −10 to +70°C
TA = −40 to +85°C
MIN.
TYP. MAX.
Unit
%
High-speed internal Oscillation frequency (fX = 8
3
5
oscillator
MHzNote 2) deviation
%
Oscillation frequency (fX)Note 2
2.0 V ≤ VDD < 2.7 V
5.5
MHz
Notes 1. Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on-
clear (POC) circuit is 2.1 V 0.1 V.
2. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time.
Low-Speed Internal Oscillator Characteristics (TA = −40 to +85°C, VDD = 2.0 to 5.5 VNote, VSS = 0 V)
Resonator
Parameter
Conditions
MIN.
120
TYP. MAX.
240 480
Unit
kHz
Low-speed internal oscillator
Oscillation frequency (fRL)
Note Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on clear
(POC) circuit is 2.1 V 0.1 V.
21
Preliminary Product Information U17798EJ1V0PM
µPD78F9210FH, 78F9211FH, 78F9212FH
DC Characteristics (TA = −40 to +85°C, VDD = 2.0 to 5.5 VNote, VSS = 0 V) (1/2)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
–5
Unit
mA
mA
mA
mA
mA
mA
V
Output current, high
IOH
Per pin
2.0 V ≤ VDD ≤ 5.5 V
4.0 V ≤ VDD ≤ 5.5 V
2.0 V ≤ VDD < 4.0 V
2.0 V ≤ VDD ≤ 5.5 V
4.0 V ≤ VDD ≤ 5.5 V
2.0 V ≤ VDD < 4.0 V
Total of all pins
–25
–15
10
Output current, low
Input voltage, high
IOL
Per pin
Total of all pins
30
15
VIH1
VIH2
VIL1
VIL2
VOH
P23 in external clock mode and pins other than
P20 and P21
0.8VDD
0.7VDD
0
VDD
P23 in other than external clock mode, P20 and
P21
VDD
V
V
V
V
Input voltage, low
P23 in external clock mode and pins other than
P20 and P21
0.2VDD
0.3VDD
P23 in other than external clock mode, P20 and
P21
0
Output voltage, high
Output voltage, low
Total of output pins
IOH = –15 mA
4.0 V ≤ VDD ≤ 5.5 V
IOH = –5 mA
VDD – 1.0
VDD – 0.5
IOH = –100 µA
Total of output pins
IOL = 30 mA
2.0 V ≤ VDD < 4.0 V
IOL = 400 µA
VI = VDD
2.0 V ≤ VDD < 4.0 V
4.0 V ≤ VDD ≤ 5.5 V
IOL = 10 mA
V
V
VOL
1.3
0.4
V
Input leakage current, high
Input leakage current, low
ILIH
ILIL
Pins other than X1
3
–3
3
µA
µA
µA
VI = 0 V
Pins other than X1
Pins other than X2
Pins other than X2
Output leakage current, high ILOH
VO = VDD
Output leakage current, low
Pull-up resistance value
Pull-down resistance value
ILOL
RPU
RPD
VO = 0 V
VI = 0 V
–3
µA
kΩ
kΩ
10
10
30
30
100
100
P22, P23, reset status
Note Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on clear
(POC) circuit is 2.1 V 0.1 V.
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins.
Preliminary Product Information U17798EJ1V0PM
22
µPD78F9210FH, 78F9211FH, 78F9212FH
DC Characteristics (TA = −40 to +85°C, VDD = 2.0 to 5.5 VNote 1, VSS = 0 V) (2/2)
Parameter
Supply
currentNote 2
Symbol
Conditions
MIN. TYP. MAX. Unit
6.1 12.2 mA
7.6 15.2
Note 3
IDD1
Crystal/ceramic fX = 10 MHz
When A/D converter is stopped
When A/D converter is operating
When A/D converter is stopped
When A/D converter is operating
When A/D converter is stopped
When A/D converter is operating
When peripheral functions are stopped
When peripheral functions are operating
When peripheral functions are stopped
When peripheral functions are operating
When peripheral functions are stopped
When peripheral functions are operating
When A/D converter is stopped
When A/D converter is operating
oscillation,
VDD = 5.0 V 10%Note 4
external clock
input oscillation
operating
fX = 6 MHz
5.5 11.0 mA
14.0
VDD = 5.0 V 10%Note 4
modeNote 6
fX = 5 MHz
3.0
4.5
1.7
6.0
9.0
3.8
6.7
3.0
6.0
1
mA
mA
mA
mA
VDD = 3.0 V 10%Note 5
IDD2
Crystal/ceramic fX = 10 MHz
oscillation,
external clock
input HALT
modeNote 6
VDD = 5.0 V 10%Note 4
fX = 6 MHz
1.3
VDD = 5.0 V 10%Note 4
fX = 5 MHz
0.48
VDD = 3.0 V 10%Note 5
2.1
Note 3
IDD3
High-speed
fX = 8 MHz
5.0 10.0 mA
6.5 13.0
internal oscillation VDD = 5.0 V 10%Note 4
operating
modeNote 7
IDD4
High-speed
fX = 8 MHz
When peripheral functions are stopped
When peripheral functions are operating
1.4
3.2
5.9
mA
internal oscillation VDD = 5.0 V 10%Note 4
HALT modeNote 7
IDD5
STOP mode
VDD = 5.0 V 10%
When low-speed internal oscillation
is stopped
3.5 35.5 µA
17.5 63.5
When low-speed internal oscillation
is operating
VDD = 3.0 V 10%
When low-speed internal oscillation
is stopped
3.5 15.5 µA
11.0 30.5
When low-speed internal oscillation
is operating
Notes 1. Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on
clear (POC) circuit is 2.1 V 0.1 V.
2. Total current flowing through the internal power supply (VDD). However, the current that flows through the
pull-up resistors of ports is not included.
3. IDD1 and IDD3 includ peripheral operation current.
4. When the processor clock control register (PCC) is set to 00H.
5. When the processor clock control register (PCC) is set to 02H.
6. When crystal/ceramic oscillation clock, external clock input is selected as the system clock source using
the option byte.
7. When high-speed internal oscillation clock is selected as the system clock source using the option byte.
23
Preliminary Product Information U17798EJ1V0PM
µPD78F9210FH, 78F9211FH, 78F9212FH
AC Characteristics
Basic operation (TA = −40 to +85°C, VDD = 2.0 to 5.5 VNote 1, VSS = 0 V)
Parameter
Symbol
Conditions
MIN.
0.2
TYP.
MAX.
16
Unit
µs
µs
µs
µs
µs
µs
µs
µs
Cycle time (minimum
TCY
Crystal/ceramic oscillation
4.0 V ≤ VDD ≤ 5.5 V
3.0 V ≤ VDD < 4.0 V
2.7 V ≤ VDD < 3.0 V
2.0 V ≤ VDD < 2.7 V
4.0 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.0 V
2.0 V ≤ VDD < 2.7 V
instruction execution time)
clock, external clock input
0.33
0.4
16
16
1
16
High-speed internal
oscillation clock
0.23
0.47
0.95
4.22
4.22
4.22
TI000/TI010 input high-level tTIH,
4.0 V ≤ VDD ≤ 5.5 V
2.0 V ≤ VDD < 4.0 V
2/fsam+
0.1Note 2
width, low-level width
tTIL
2/fsam+
0.2Note 2
µs
µs
Interrupt input high-level
width, low-level width
tINTH,
tINTL
tRSL
1
RESET input low-level
width
2
µs
Notes 1. Use this product in a voltage range of 2.2 to 5.5 V because the detection voltage (VPOC) of the power-on
clear (POC) circuit is 2.1 V 0.1 V.
2. Selection of fsam = fXP, fXP/4, or fXP/256 is possible using bits 0 and 1 (PRM000, PRM001) of prescaler
mode register 00 (PRM00). Note that when selecting the TI000/TI010 valid edge as the count clock, fsam =
fXP.
Preliminary Product Information U17798EJ1V0PM
24
µPD78F9210FH, 78F9211FH, 78F9212FH
TCY vs. VDD (Crystal/Ceramic Oscillation Clock, External Clock Input)
60
16
10
µ
Guaranteed
operation range
1.0
0.4
0.33
0.1
1
2
3
4
5
6
2.7
Supply voltage VDD [V]
5.5
TCY vs. VDD (High-speed internal oscillator Clock)
60
10
µ
4.22
Guaranteed
operation range
1.0
0.95
0.47
0.23
0.1
1
2
3
4
5
6
2.7
Supply voltage VDD [V]
5.5
25
Preliminary Product Information U17798EJ1V0PM
µPD78F9210FH, 78F9211FH, 78F9212FH
AC Timing Test Points (Excluding X1 Input)
0.8VDD
0.2VDD
0.8VDD
Test points
0.2VDD
Clock Timing
1/f
X
t
XL
t
XH
X1 input
TI000 Timing
tTIL
tTIH
TI000
Interrupt Input Timing
t
INTL
t
INTH
INTP0, INTP1
RESET Input Timing
tRSL
RESET
Preliminary Product Information U17798EJ1V0PM
26
µPD78F9210FH, 78F9211FH, 78F9212FH
A/D Converter Characteristics (TA = −40 to +85°C, 2.7 V ≤ VDD ≤ 5.5 VNote 1, VSS = 0 VNote 2
)
(1) A/D converter basic characteristics
Parameter
Symbol
Conditions
MIN.
10
TYP.
10
MAX.
10
Unit
bit
µs
µs
µs
µs
V
Resolution
Conversion time
tCONV
4.5 V ≤ VDD ≤ 5.5 V
4.0 V ≤ VDD < 4.5 V
2.85 V ≤ VDD < 4.0 V
2.7 V ≤ VDD < 2.85 V
3.0
100
100
100
100
VDD
4.8
6.0
14.0
Note 2
VSS
Analog input voltage
VAIN
(2) A/D Converter Characteristics (high-speed internal oscillation clock)
Parameter
Overall errorNotes 3, 4
Zero-scale errorNotes 3, 4
Symbol
AINL
Ezs
Conditions
MIN.
TYP.
MAX.
Unit
−0.1 to +0.2Note 5 −0.35 to +0.45 %FSR
−0.1 to +0.2Note 5 −0.35 to +0.45 %FSR
−0.1 to +0.2Note 5 −0.35 to +0.40 %FSR
Full-scale errorNotes 3, 4
Efs
Integral non-linearity errorNote 3
Differential non-linearity errorNote 3
ILE
1Note 5
1Note 5
3
LSB
LSB
DLE
1.5
(3) A/D Converter Characteristics (Crystal/Ceramic Oscillation Clock, External Clock)
Parameter
Overall errorNotes 1, 2
Symbol
AINL
Conditions
MIN.
TYP.
MAX.
Unit
4.0 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.0 V
4.0 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.0 V
4.0 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.0 V
4.0 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.0 V
4.0 V ≤ VDD ≤ 5.5 V
2.7 V ≤ VDD < 4.0 V
−
−
−
0.20 to +0.35Note 5 −0.35 to +0.65 %FSR
0.25Note 5
−0.35 to +0.55 %FSR
0.20 to +0.35Note 5 −0.35 to +0.65 %FSR
0.25Note 5
−0.35 to +0.55 %FSR
0.20 to +0.35Note 5 −0.35 to +0.55 %FSR
Zero-scale errorNotes 3, 4
Ezs
Efs
Full-scale errorNotes 3, 4
0.25Note 5
1.5Note 5
1.5Note 5
1.0Note 5
1.0Note 5
−0.35 to +0.50 %FSR
Integral non-linearity errorNote 3
Differential non-linearity errorNote 3
ILE
DLE
3.0
4.0
2.5
2.5
LSB
LSB
LSB
LSB
Notes 1. In the µPD78F9210FH, 78F9211FH, 78F9212FH, VDD functions alternately as the A/D converter reference
voltage input. When using the A/D converter, stabilize VDD at the supply voltage used (2.7 to 5.5 V).
2. In the µPD78F9210FH, 78F9211FH, 78F9212FH, VSS functions alternately as the ground potential of the
A/D converter. Be sure to connect VSS to a stabilized GND (= 0 V).
3. Excludes quantization error ( 1/2 LSB).
4. This value is indicated as a ratio (%FSR) to the full-scale value.
5. A value when HALT mode is set by an instruction immediately after A/D conversion starts.
Caution The conversion accuracy may be degraded if the level of a port that is not used for A/D conversion is
changed during A/D conversion.
27
Preliminary Product Information U17798EJ1V0PM
µPD78F9210FH, 78F9211FH, 78F9212FH
POC Circuit Characteristics (TA = −40 to +85°C)
Parameter
Detection voltage
Symbol
VPOC
Conditions
MIN.
2.0
TYP.
2.1
MAX.
2.2
Unit
V
Power supply rise time
tPTH
VDD: 0 V → 2.1 V
1.5
µs
Response delay time 1Note 1
tPTHD
When power supply rises, after reaching
detection voltage (MAX.)
3.0
1.0
ms
Response delay time 2Note 2
Minimum pulse width
tPD
ms
ms
When power supply falls
tPW
0.2
Notes 1. Time required from voltage detection to internal reset release.
2. Time required from voltage detection to internal reset signal generation.
POC Circuit Timing
Supply voltage
(VDD
)
Detection voltage (MAX.)
Detection voltage (TYP.)
Detection voltage (MIN.)
t
PW
t
PTH
t
PTHD
t
PD
Time
Preliminary Product Information U17798EJ1V0PM
28
µPD78F9210FH, 78F9211FH, 78F9212FH
LVI Circuit Characteristics (TA = −40 to +85°C)
Parameter
Detection voltage
Symbol
VLVI0
VLVI1
VLVI2
VLVI3
VLVI4
VLVI5
VLVI6
VLVI7
VLVI8
VLVI9
tLD
Conditions
MIN.
4.1
TYP.
4.3
MAX.
4.5
Unit
V
3.9
4.1
4.3
V
3.7
3.9
4.1
V
3.5
3.7
3.9
V
3.3
3.5
3.7
V
3.15
2.95
2.7
3.3
3.45
3.25
3.0
V
3.1
V
2.85
2.6
V
2.5
2.7
V
2.25
2.35
0.2
2.45
2.0
V
Response timeNote 1
ms
ms
ms
Minimum pulse width
tLW
0.2
Operation stabilization wait timeNote 2 tLWAIT
0.1
0.2
Notes 1. Time required from voltage detection to interrupt output or internal reset signal generation.
2. Time required from setting LVION to 1 to operation stabilization.
Remarks 1. VLVI0 > VLVI1 > VLVI2 > VLVI3 > VLVI4 > VLVI5 > VLVI6 > VLVI7 > VLVI8 > VLVI9
2. VPOC < VLVIm (m = 0 to 9)
LVI Circuit Timing
Supply voltage
(VDD
)
Detection voltage (MAX.)
Detection voltage (TYP.)
Detection voltage (MIN.)
tLW
t
LWAIT
tLD
LVION
1
Time
Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (TA = −40 to +85°C)
Parameter
Symbol
VDDDR
tSREL
Conditions
MIN.
2.0
0
TYP.
MAX.
5.5
Unit
V
Data retention supply voltage
Release signal set time
µs
29
Preliminary Product Information U17798EJ1V0PM
µPD78F9210FH, 78F9211FH, 78F9212FH
Flash Memory Programming Characteristics (TA = –40 to +85°C, 2.7 V ≤ VDD ≤ 5.5 V, VSS = 0 V)
Parameter
Symbol
IDD
Conditions
MIN.
TYP.
MAX.
7.0
Unit
mA
Supply current
VDD = 5.5 V
Erasure countNote
(per 1 block)
NERASE
TA = −40 to +85°C
1000
Times
Chip erase time
TCERASE
TA = −10 to +85°C,
NERASE ≤ 100
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
2.7 V ≤ VDD < 3.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
2.7 V ≤ VDD < 3.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
2.7 V ≤ VDD < 3.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
2.7 V ≤ VDD < 3.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
2.7 V ≤ VDD < 3.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
2.7 V ≤ VDD < 3.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
2.7 V ≤ VDD < 3.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
2.7 V ≤ VDD < 3.5 V
0.8
1.0
1.2
4.8
5.2
6.1
1.6
1.8
2.0
9.1
10.1
12.3
0.4
0.5
0.6
2.6
2.8
3.3
0.9
1.0
1.1
4.9
5.4
6.6
150
6.8
27
s
s
s
TA = −10 to +85°C,
NERASE ≤ 1000
s
s
s
TA = −40 to +85°C,
NERASE ≤ 100
s
s
s
TA = −40 to +85°C,
NERASE ≤ 1000
s
s
s
Block erase time
TBERASE
TA = −10 to +85°C,
NERASE ≤ 100
s
s
s
TA = −10 to +85°C,
NERASE ≤ 1000
s
s
s
TA = −40 to +85°C,
NERASE ≤ 100
s
s
s
TA = −40 to +85°C,
NERASE ≤ 1000
s
s
s
Byte write time
Internal verify
TWRITE
TVERIFY
TA = −40 to +85°C, NERASE ≤ 1000
Per 1 block
µs
ms
µs
µs
Years
Per 1 byte
Blank check
TBLKCHK
Per 1 block
480
Retention years
TA = 85°CNote 2, NERASE ≤ 1000
10
Notes 1. Depending on the erasure count (NERASE), the erase time varies. Refer to the chip erase time and block
erase time parameters.
2. When the average temperature when operating and not operating is 85°C.
Remark When a product is first written after shipment, “erase → write” and “write only” are both taken as one rewrite.
Preliminary Product Information U17798EJ1V0PM
30
µPD78F9210FH, 78F9211FH, 78F9212FH
8. PACKAGE DRAWING (PRELIMINARY)
16-PIN FBGA (WAFER LEVEL CSP) (1.93x2.24)
A
SD
D
w S
A
ZE
ZD
4
3
2
1
B
E
SE
x4
D
C
B
A
w
S B
v
INDEX MARK
A
(UNIT:mm)
y1 S
A2
ITEM DIMENSIONS
D
E
v
2.24
1.93
0.15
0.20
S
w
A
0.48 0.04
0.08 0.02
0.40
y
S
e
A1
AB
A1
A2
e
b
φ
x M S
0.50
SD
SE
0.25
0.25
b
x
0.25 0.05
0.05
y
0.08
y1
ZD
ZE
0.20
0.37
0.215
P16FH-50-2A2
31
Preliminary Product Information U17798EJ1V0PM
µPD78F9210FH, 78F9211FH, 78F9212FH
APPENDIX A. RELATED DOCUMENTS
The related document indicated in this publication may include preliminary versions. However, preliminary versions
are not marked as such.
Documents Related to Devices
Document Name
µPD78F9210FH, 78F9211FH, 78F9212FH Preliminary Product Information
78K0S/KY1+ User’s Manual
Document No.
This manual
U16994E
U12326E
78K/0S Series Instructions User’s Manual
Documents Related to Development Tools (Software) (User’s Manuals)
Document Name
Document No.
RA78K0S Ver. 1.50 Assembler Package
Operation
U17391E
U17390E
U17389E
U17416E
U17415E
U17246E
U17247E
Language
Structured Assembly Language
Operation
CC78K0S Ver. 1.60 C Compiler
SM+ System Simulator
Language
Operation
External Part User Open Interface
Specifications
ID78K0S-QB Ver. 2.81 Integrated Debugger
PM+ Ver. 5.20
Operation
U17287E
U16934E
Documents Related to Development Tools (Hardware) (User’s Manuals)
Document Name
IE-78K0S-NS In-Circuit Emulator
Document No.
U13549E
U15207E
U17272E
IE-78K0S-NS-A In-Circuit Emulator
QB-78K0SKX1H In-Circuit Emulator
Documents Related to Flash Memory Programming
Document Name
PG-FP4 Flash Memory Programmer User’s Manual
PG-FPL2 Flash Memory Programmer User’s Manual
Document No.
U15260E
U17307E
Caution The related documents listed above are subject to change without notice. Be sure to use the latest
version of each document when designing.
Preliminary Product Information U17798EJ1V0PM
32
µPD78F9210FH, 78F9211FH, 78F9212FH
Other Documents
Document Name
Document No.
X13769X
SEMICONDUCTOR SELECTION GUIDE − Products and Packages −
Semiconductor Device Mount Manual
Note
Quality Grades on NEC Semiconductor Devices
C11531E
C10983E
C11892E
NEC Semiconductor Device Reliability/Quality Control System
Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD)
Note See the “Semiconductor Device Mount Manual” website (http://www.necel.com/pkg/en/mount/index.html).
Caution The related documents listed above are subject to change without notice. Be sure to use the latest
version of each document when designing.
33
Preliminary Product Information U17798EJ1V0PM
µPD78F9210FH, 78F9211FH, 78F9212FH
NOTES FOR CMOS DEVICES
1
VOLTAGE APPLICATION WAVEFORM AT INPUT PIN
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the
CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may
malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed,
and also in the transition period when the input level passes through the area between VIL (MAX) and
V
IH (MIN).
HANDLING OF UNUSED INPUT PINS
2
Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is
possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed
high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND
via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must
be judged separately for each device and according to related specifications governing the device.
3
PRECAUTION AGAINST ESD
A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as
much as possible, and quickly dissipate it when it has occurred. Environmental control must be
adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that
easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static
container, static shielding bag or conductive material. All test and measurement tools including work
benches and floors should be grounded. The operator should be grounded using a wrist strap.
Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for
PW boards with mounted semiconductor devices.
4
STATUS BEFORE INITIALIZATION
Power-on does not necessarily define the initial status of a MOS device. Immediately after the power
source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does
not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the
reset signal is received. A reset operation must be executed immediately after power-on for devices
with reset functions.
5
POWER ON/OFF SEQUENCE
In the case of a device that uses different power supplies for the internal operation and external
interface, as a rule, switch on the external power supply after switching on the internal power supply.
When switching the power supply off, as a rule, switch off the external power supply and then the
internal power supply. Use of the reverse power on/off sequences may result in the application of an
overvoltage to the internal elements of the device, causing malfunction and degradation of internal
elements due to the passage of an abnormal current.
The correct power on/off sequence must be judged separately for each device and according to related
specifications governing the device.
6
INPUT OF SIGNAL DURING POWER OFF STATE
Do not input signals or an I/O pull-up power supply while the device is not powered. The current
injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and
the abnormal current that passes in the device at this time may cause degradation of internal elements.
Input of signals during the power off state must be judged separately for each device and according to
related specifications governing the device.
Preliminary Product Information U17798EJ1V0PM
34
µPD78F9210FH, 78F9211FH, 78F9212FH
SuperFlash is a registered trademark of Silicon Storage Technology, Inc. in several countries including the
United States and Japan.
Caution: This product uses SuperFlash® technology licensed from Silicon Storage Technology, Inc.
•
The information contained in this document is being issued in advance of the production cycle for the
product. The parameters for the product may change before final production or NEC Electronics
Corporation, at its own discretion, may withdraw the product prior to its production.
• Not all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without the prior written consent
of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document.
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
patents, copyrights or other intellectual property rights of NEC Electronics or others.
•
•
Descriptions of circuits, software and other related information in this document are provided for illustrative purposes
in semiconductor product operation and application examples. The incorporation of these circuits, software and
information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC
Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of
these circuits, software and information.
While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products,
customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and
anti-failure features.
NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific".
The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-designated
"quality assurance program" for a specific application. The recommended applications of an NEC Electronics
products depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC
Electronics product before using it in a particular application.
•
•
•
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and
visual equipment, home electronic appliances, machine tools, personal electronic equipment and
industrial robots.
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life
support).
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support
systems and medical equipment for life support, etc.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications
not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to
determine NEC Electronics' willingness to support a given application.
(Note)
(1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
M5D 02. 11-1
35
Preliminary Product Information U14880EJ1V0PM00
µPD78F9210FH, 78F9211FH, 78F9212FH
For further information,
please contact:
NEC Electronics Corporation
1753, Shimonumabe, Nakahara-ku,
Kawasaki, Kanagawa 211-8668,
Japan
Tel: 044-435-5111
http://www.necel.com/
[Asia & Oceania]
[America]
[Europe]
NEC Electronics (China) Co., Ltd
NEC Electronics America, Inc.
2880 Scott Blvd.
Santa Clara, CA 95050-2554, U.S.A.
Tel: 408-588-6000
NEC Electronics (Europe) GmbH
Arcadiastrasse 10
40472 Düsseldorf, Germany
Tel: 0211-65030
7th Floor, Quantum Plaza, No. 27 ZhiChunLu Haidian
District, Beijing 100083, P.R.China
TEL: 010-8235-1155
http://www.cn.necel.com/
800-366-9782
http://www.eu.necel.com/
http://www.am.necel.com/
NEC Electronics Shanghai Ltd.
Room 2509-2510, Bank of China Tower,
200 Yincheng Road Central,
Hanover Office
Podbielskistrasse 164
30177 Hannover
Pudong New Area, Shanghai P.R. China P.C:200120
Tel: 021-5888-5400
Tel: 0 511 33 40 2-0
http://www.cn.necel.com/
Munich Office
Werner-Eckert-Strasse 9
81829 München
Tel: 0 89 92 10 03-0
NEC Electronics Hong Kong Ltd.
12/F., Cityplaza 4,
12 Taikoo Wan Road, Hong Kong
Tel: 2886-9318
http://www.hk.necel.com/
Stuttgart Office
Industriestrasse 3
70565 Stuttgart
Seoul Branch
Tel: 0 711 99 01 0-0
11F., Samik Lavied’or Bldg., 720-2,
Yeoksam-Dong, Kangnam-Ku,
Seoul, 135-080, Korea
Tel: 02-558-3737
United Kingdom Branch
Cygnus House, Sunrise Parkway
Linford Wood, Milton Keynes
MK14 6NP, U.K.
NEC Electronics Taiwan Ltd.
7F, No. 363 Fu Shing North Road
Taipei, Taiwan, R. O. C.
Tel: 02-2719-2377
Tel: 01908-691-133
Succursale Française
9, rue Paul Dautier, B.P. 52180
78142 Velizy-Villacoublay Cédex
France
NEC Electronics Singapore Pte. Ltd.
238A Thomson Road,
#12-08 Novena Square,
Singapore 307684
Tel: 6253-8311
http://www.sg.necel.com/
Tel: 01-3067-5800
Sucursal en España
Juan Esplandiu, 15
28007 Madrid, Spain
Tel: 091-504-2787
Tyskland Filial
Täby Centrum
Entrance S (7th floor)
18322 Täby, Sweden
Tel: 08 638 72 00
Filiale Italiana
Via Fabio Filzi, 25/A
20124 Milano, Italy
Tel: 02-667541
Branch The Netherlands
Limburglaan 5
5616 HR Eindhoven
The Netherlands
Tel: 040 265 40 10
G05.11-1A
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