ZSSC3170EA2R [RENESAS]
Automotive Sensor Signal Conditioner with LIN and PWM Interface;型号: | ZSSC3170EA2R |
厂家: | RENESAS TECHNOLOGY CORP |
描述: | Automotive Sensor Signal Conditioner with LIN and PWM Interface |
文件: | 总31页 (文件大小:1087K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Automotive Sensor Signal Conditioner
with LIN and PWM Interface
ZSSC3170
Datasheet
Brief Description
Benefits
The ZSSC3170 is a CMOS integrated circuit for highly
accurate amplification and sensor specific correction
of bridge sensor signals. Featuring a maximum analog
gain of 420, as well as extended offset compensation
capabilities, the ZSSC3170 is adjustable to nearly all
resistive bridge sensor types.
Measurement and temperature signal available via
one output pin
Compatible with nearly all resistive bridge inputs
No external trimming components required
Single-pass calibration minimizes calibration costs
End-of-line calibration using sensor output
Digital compensation of offset, sensitivity, temperature
drift, and nonlinearity is accomplished via a 16-bit
RISC microcontroller. Conditioning coefficients are
stored in an EEPROM certified for automotive appli-
cations.
Optimized for automotive environments with
special protection circuitry, excellent electro-
magnetic compatibility, and numerous diagnostic
features; AEC-Q100-qualified
Measured values are provided by one of the digital
LIN or PWM interfaces. Each interface can support
end-of-line calibration using the sensor output. Noise
sensitivity is greatly reduced because the calibration
equipment and the ZSSC3170 are mated digitally.
Available Support
Evaluation Kit
Application Notes
Calculation Tools
For quick and easy evaluation and support for
calibrating prototypes, IDT offers the ZSSC3170 SSC
Evaluation Kit, which includes evaluation hardware,
SSOP20 samples, and software.
Physical Characteristics
Supply voltage: 7 to 18 V
Current consumption in Sleep Mode: ≤ 100μA
Input span: 1.8 to 267 mV/V
Features
ADC resolution: 13 to 14 bit
Complies with LIN specifications 1.3 / 2.0 / 2.1
Configurable LIN publisher frame content
Output resolution: up to 12-bit (LIN and PWM)
Operating temperature range: -40 to 125°C
Extended operating temperature range: ≤150°C
Data conversion rate of up to 430Hz fully utilizes
the maximum LIN channel capacity of 20kbit/s
RoHS-compliant delivery form options:
SSOP20, DFN20, or die
PWM high-side and low-side switches, support for
LIN communication for end-of-line calibration
Digital compensation of offset, gain, temperature
effects up to 2nd order, and nonlinearity up to 3rd
order. Compensation of temperature sensor offset,
gain, and nonlinearity up to 2nd order.
ZSSC3170 Basic Circuit
LIN
GND
Internal or external temperature reference
Media temperature sensing by diode or RTD
Load dump protection of the LIN pin up to ±40V
VBAT
Accuracy
±0.25% FSO @ -20 to 85°C
±0.50% FSO @ -40 to 125°C
±1.00% FSO @ -40 to 150°C
3 EEPROM words available for optional user data
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May 30, 2016
Automotive Sensor Signal Conditioner
with LIN and PWM Interface
ZSSC3170
Datasheet
VDDA
SCL
SDA
Ext. Temp.
Diode
VBR_T
Sensor
Bridge
I2CTM
*
Control Registers
ZSSC3170
Block Diagram
HOUT
LOUT
Temp. Sens.
Select
Gain
Factor
Offset
Shift
ADC
Mode
RAM
PWM
LIN
VTN1
VBN
MUX
PGA
ADC
CMC
LIN
VBP
Analog Front-End (AFE)
EEPROM
Protection &
Power
Management
VB
VTN2
Internal
Temp.
Sensor
VSSE
VBR_B
VSSA
Digital Block
Interfaces
ZSSC3170
* I2C™ is a trademark of NXP.
Applications
LIN Pressure Sensor with Temperature Sensor
LIN
C3
220pF
11 LIN
10
9
8
7
6
5
4
3
2
1
VSS
VSSE
VB
Sensor Bridge
With Integrated
12
13
14
15
16
17
18
19
20
LOUT
n.c.
GND
Temperature Diode
VBAT
C2
220nF
R1
10W
VBN
HOUT
VDD
SCL
VBR_B
VBP
SCL
SDA
RTD Media
Temperature
Sensor
VTN 1
SDA
VSSA
VDDA
n.c.
VBR_T
VTN2
n.c.
R2
C1
100nF
Ordering Information (See section 7 in the data sheet for additional options.)
Product Sales Code
ZSSC3170FE1B
ZSSC3170FE1C
ZSSC3170FE2
Description
Package
ZSSC3170 Die Revision F — Temperature range: -40°C to +150°C
ZSSC3170 Die Revision F — Temperature range: -40°C to +150°C
Unsawn on Wafer, 2450 pcs.
Sawn on Wafer Frame, 2450 pcs.
ZSSC3170 SSOP20 Revision F — Temperature range: -40°C to +150°C
Add R for 13” reel, 2000 pcs. Add T for tube, 660 pcs.
ZSSC3170EE1B
ZSSC3170EE1C
ZSSC3170EE2
ZSSC3170EE3R
ZSSC3170 Die Revision E — Temperature range: -40°C to +150°C
ZSSC3170 Die Revision E — Temperature range: -40°C to +150°C
ZSSC3170 SSOP20 Revision E — Temperature range: -40°C to +150°C
ZSSC3170 DFN20 Revision E — Temperature Range -40°C to +150°C
Unsawn on Wafer, 2450 pcs.
Sawn on Wafer Frame, 2450 pcs.
Add R for 13” reel, 2000 pcs. Add T for tube, 660 pcs.
13” Reel, 4500 pcs
ZSSC3170EA1B
ZSSC3170EA1C
ZSSC3170EA3R
ZSSC3170 Die Revision E — Temperature range: -40°C to +125°C
ZSSC3170 Die Revision E — Temperature range: -40°C to +125°C
ZSSC3170 DFN20 Revision E — Temperature Range -40°C to +125°C
Unsawn on Wafer, 2450 pcs.
Sawn on Wafer Frame, 2450 pcs.
13” Reel, 4500 pcs
ZSSC3170KIT
ZSSC3170 Evaluation Kit and 5 SSOP20 samples
Kit
.
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May 30, 2016
Contents
1
ZSSC3170 Characteristics ............................................................................................................ 5
1.1 Absolute Maximum Ratings..................................................................................................... 5
1.2 Operating Conditions............................................................................................................... 6
1.3 Electrical Parameters .............................................................................................................. 6
1.4 Interface Characteristics........................................................................................................ 11
1.5 EEPROM .............................................................................................................................. 11
2
Circuit Description ....................................................................................................................... 12
2.1 Signal Flow and Block Diagram............................................................................................. 12
2.2 Application Modes................................................................................................................. 13
2.3 Analog Front End (AFE) ........................................................................................................ 14
2.3.1 Programmable Gain Amplifier (PGA)............................................................................... 14
2.3.2 Offset Compensation....................................................................................................... 14
2.3.3 Analog-to-Digital Converter ............................................................................................. 15
2.4 Temperature Measurement................................................................................................... 17
2.5 System Control and Conditioning Calculation........................................................................ 18
2.5.1 Operating Modes............................................................................................................. 18
2.5.2 Start-Up Phase................................................................................................................ 18
2.5.3 Measurement Cycle......................................................................................................... 19
2.5.4 Conditioning Calculation.................................................................................................. 20
2.6 Signal Outputs....................................................................................................................... 20
2.6.1 PWM Outputs HOUT and LOUT...................................................................................... 20
2.6.2 LIN Output....................................................................................................................... 21
2.7 Digital Test and Calibration Interface..................................................................................... 21
2.8 Diagnostic and Failsafe Features, Watchdog, and Error Detection........................................ 21
2.9 High Voltage, Reverse Polarity, and Short Circuit Protection................................................. 21
3
4
Application Circuit Examples and External Components ............................................................. 22
3.1 Application Circuit Examples................................................................................................. 22
3.2 Dimensioning of External Components.................................................................................. 23
Pinout and Package Options....................................................................................................... 24
4.1 Die Pad Definitions and Configuration................................................................................... 24
4.2 SSOP20 Package ................................................................................................................. 25
4.3 DFN20 Package.................................................................................................................... 25
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May 30, 2016
5
6
7
8
9
ESD Protection and EMC Specification....................................................................................... 26
Reliability and RoHS Conformity ................................................................................................. 26
Ordering Information ................................................................................................................... 26
Related Documents..................................................................................................................... 27
Glossary...................................................................................................................................... 27
10 Document Revision History ......................................................................................................... 29
List of Figures
Figure 2.1 Block Diagram of ZSSC3170........................................................................................... 12
Figure 2.2 Measurement Cycle ........................................................................................................ 19
Figure 3.1 Application Circuit in PWM Mode with Low-Side Switch.................................................. 22
Figure 3.2 Application Circuit in PWM Mode with High-Side Switch ................................................. 22
Figure 3.3 Application Circuit in LIN Mode........................................................................................ 23
List of Tables
Table 1.1 Absolute Maximum Ratings............................................................................................... 5
Table 1.2 Operating Conditions......................................................................................................... 6
Table 1.3 Electrical Parameters ........................................................................................................ 6
Table 1.4 Interface Characteristics.................................................................................................. 11
Table 1.5 EEPROM ........................................................................................................................ 11
Table 2.1 Configuration for Application Modes................................................................................ 13
Table 2.2 Adjustable Gain Stages, Corresponding Sensor Signal Spans, and Common Mode Ranges
........................................................................................................................................ 14
Table 2.3 Bridge Sensor Offset Shift Ranges.................................................................................. 15
Table 2.4 A/D Resolution and Conversion Time in PWM Modes..................................................... 16
Table 2.5 A/D Resolution and Conversion Time in LIN Modes........................................................ 16
Table 3.1 Dimensioning of External Components for Application Examples.................................... 23
Table 4.1 Die Pad Definitions for ZSSC3170 .................................................................................. 24
Table 4.2 Pin Definition of SSOP20 Package.................................................................................. 25
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May 30, 2016
1 ZSSC3170 Characteristics
1.1 Absolute Maximum Ratings
The absolute maximum ratings are stress ratings only. The device might not function or be operable above the
recommended operating conditions given in section 1.2. Stresses exceeding the absolute maximum ratings might
also damage the device. In addition, extended exposure to stresses above the recommended operating
conditions might affect device reliability. IDT does not recommend designing to the “Absolute Maximum Ratings.”
Parameters are valid without time limit unless otherwise noted.
Table 1.1 Absolute Maximum Ratings
No.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
External Supply Voltage —
PWM Mode
VBATPWM
To VSSE (external GND)
-18
18
V
1.1.1
1), 2)
Supply Voltage on VB Pin—
PWM Mode
VBPWM
VBATLIN
VBLIN
To VSSE
-0.3
-18
-0.3
-18
18
40
40
18
V
V
V
V
1.1.2
1.1.3
1.1.4
1.1.5
1), 2)
External Supply Voltage —
To VSS (external GND)
To VSS
1), 2)
LIN Mode
Supply Voltage on VB Pin—
2)
LIN Mode 1)
,
Voltage at HOUT and
VHOUT,
VLOUT
To VSSE
2)
LOUT Pins 1)
,
2)
Voltage at LIN pin 1)
,
VLIN
VDDA
VDD
To VSS
-40
-0.3
-0.3
40
6.5
6.5
V
V
V
1.1.6
1.1.7
1.1.8
Analog Supply Voltage 3)
Digital Supply Voltage 3)
To VSSA
To VSSA
Voltage at all other Analog or
Digital Pins 3)
VAIO
VDIO
,
VDDA
+0.3
To VSSA
-0.3
V
1.1.9
Storage Temperature
TSTOR
-40
-40
150
170
1.1.10
1.1.11
C
C
Extended Storage Temperature TSTRG_EXT
t < 10h
1)
2)
3)
Refer to the ZSSC3170 High Voltage Protection Description for detailed specifications.
Refer to section 3.1 for the application circuit.
No measurement in mass production; parameter is guaranteed by design and/or quality monitoring.
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May 30, 2016
1.2 Operating Conditions
Parameters are valid for the full operating temperature range without time limit unless otherwise noted.
Table 1.2 Operating Conditions
No.
1.2.1
1.2.2
1.2.3
Parameter
Supply Voltage 1)
Supply Voltage - LIN Mode 1)
Symbol
VB
Conditions
Min
8.2
7
Typ
12
Max
16.5
18
Unit
V
Voltage at pin VB to VSSE
Voltage at pin VB to VSS
VBLIN
TAMB
12
V
Ambient Temperature
-40
125
C
Extended Ambient Temperature
(ZSSC3170EExx only)
1.2.4
TAMB_EXT 1000h @ +150°C
125
150
C
Ambient Temperature
EEPROM Programming
1.2.5
1.2.6
TAMB_EEP See section 1.5.
RBR
-40
2
150
25
C
Bridge Resistance 2)
kW
1)
2)
Refer to the ZSSC3170 High Voltage Protection Description for detailed specifications.
No measurement in mass production; parameter is guaranteed by design and / or quality monitoring.
1.3 Electrical Parameters
If not otherwise specified, all parameter limits are valid within operating conditions defined in section 1.2 and with-
out time limit. All voltages are related to VSSA, if not otherwise specified.
Note: Refer to the important notes at the end of the table (page 10).
Table 1.3 Electrical Parameters
No.
1.3.1
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Supply Current and Internal Supply Voltages
Excluding bridge supply
current; excluding PWM
current; oscillator adjusted
(typical 2 MHz)
1.3.1.1
1.3.1.2
Supply Current
IS
7
mA
LIN Sleep Mode without
current over LIN wire; PWM
output pins not connected;
VBLIN = 14.4V for max. value
VLIN=VBLIN
Supply Current
LIN Sleep Mode
IS_LINSLP
40
5
100
µA
V
VVDA = VVDDA - VVSSA
at RBR ≥ 2kW (see 1.2.6)
Internal Supply Voltage
(generated internally)
1.3.1.3
1.3.1.4
VVDA
4.3
6
Supply Voltage Sensor
Bridge (internally at VDDA
and VSSA)
VVBR = VVBR_T - VVBR B
_
VVDA –
0.3V
VVBR
VVDA
at RBR ≥ 2kW (see 1.2.6)
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May 30, 2016
No.
1.3.2
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Analog Front End (see section 2.3)
1.3.2.1
1.3.2.2
Input Voltage Range
VIN_SPAN
Analog gain: 2.8 to 420
1
275
388
mV/V
Maximum Bridge Sensor
Offset Compensation
Depending on selected gain
(see Table 2.3)
%
VIN_SPAN
OC
Bridge Input Current
Difference 1)
1.3.2.3
1.3.2.4
IIN_DIFF
TAMB = -25°C to 85°C
-2
2
nA
Dependent on selected gain,
XZC off (see Table 2.2);
see 1.3.1.4 for VVBR
Common Mode Input
Voltage Range
VIN_CM
0.29
0.65
VVBR
1.3.3
Temperature Measurement (see section 2.4)
External Temperature
Diode Channel Gain
ppm
FS/mV
1.3.3.1
ATSED
ITSED
FS = Full Scale
300
10
0
1300
40
External Temperature
Diode Bias Current
1.3.3.2
1.3.3.3
20
A
External Temperature
Diode Input Range 1)
VTSED
Relative to VVBR_T
1.5
V
ppm
FS/
(mV/V)
External Temperature
Resistor Channel Gain
1.3.3.4
1.3.3.5
ATSER
1200
4500
External Temperature
Resistor Input Range 1)
70%
100%
VTSER
STTSI
Relative to VVDDA-VVSSA
V
VVDDA-VVSSA
VVDDA-VVSSA
Internal Temperature
Diode Sensitivity
Raw values, without
conditioning calculation
Sensor Diagnostic Tasks 2)
ppm
FS/K
1.3.3.6
1.3.4
700
20
2700
100
Sensor Connection Loss
Resistance Threshold
1.3.4.1
RSCCTH
CSCC
kW
Maximum: 10nF + 20%
If Sensor Short Check is
enabled, the Sensor
Connection Check High-
Capacitances Mode must
also be enabled.
Maximum Input
Capacitance for
Sensor Connection Check
1.3.4.2
12
nF
(Also see 1.3.4.3.)
Maximum Input
Maximum: 1nF + 20%
Capacitance for Sensor
Connection Check with
Sensor Short Check and
Sensor Aging Check
Enabled
For using Sensor Short
Check and Sensor Aging
Check at the same time.
1.3.4.3
1.3.4.4
CSCCSSC/SAC
1.2
nF
Sensor Input Short
Resistance Threshold
RSSCTH
50
1000
W
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May 30, 2016
No.
1.3.5
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
A/D Conversion (see section 2.3.3)
1.3.5.1
ADC Resolution 1)
DNL 1)
rADC
14
Bit
rADC = 14-bit, fOSC = 2MHz,
1.3.5.2
1.3.5.3
DNLADC
best fit, complete AFE;
see 1.3.5.4 for ADCINP_R
0.95
LSB
.
rADC = 14-bit, fOSC = 2MHz,
best fit, complete AFE;
INL
INLADC
8
LSB
see 1.3.5.4 for ADCINP_R
.
%
VVBR
1.3.5.4
1.3.6
ADC Input Range
ADCINP_R
See 1.3.1.4 for VVBR
.
10
4
90
PWM Output (Pins HOUT and LOUT) 2)
ISOURCE = 15mA,
VB 8.8V to VSSE
Output High Level – HSS;
HOUT Pin
1.3.6.1
VHSS_H
V
V
Output Low Level – LSS;
LOUT Pin
1.3.6.2
1.3.6.3
VLSS_L
ISINK = 12mA to VSSE
0.5V
50
Leakage Current
LOUT Pin
ILEAK_LOUT
Sink; high level at LOUT
µA
1.3.6.4
1.3.6.5
1.3.6.6
1.3.6.7
Rise Time HSS 1)
Slew Rate HSS 1)
tHSS_RISE
SRHSS
tLSS_FALL
SRLSS
VHOUT = 0.5V4V
VHOUT = 0.5V4V
VLOUT = 4V0.5V
VLOUT = 4V0.5V
15
2
µs
V/µs
µs
1)
Fall Time LSS
15
1)
Slew Rate LSS
-2
V/µs
PWM Full-Scale
Resolution 1)
1.3.6.8
rPWM_FS
D = 1% to 99 %
11
Bit
%
Adjustable with 8-bit
resolution
1.3.6.9
Duty Cycle 1)
D
1
99
LIN Interface – Main Parameters 3)
(All voltages related to VSS; RVBAT_LIN Power Supply Line Resistance = 500Ω)
1.3.7
Output Low Level
Transmitter
1.3.7.1
1.3.7.2
VLIN_L
VLIN_H
0.6
0.9
1.2
2.0
1
V
Output High Level
Transmitter
Driver off
VB
1.3.7.3
1.3.7.4
Output Current
ILIN_L
Sink; driver on
40
20
90
30
200
47
mA
Pull-Up Resistance
RLIN_PU
In series with diode to VB
kW
-40°C ≤ TAMB ≤ 125°C;
VLIN VB; 7V VB 18V;
7V VLIN 18V; driver off
3
3
20
50
µA
µA
Input Current LIN
Recessive,
Overvoltage at LIN
1.3.7.5
ILINPASrec
125°C ≤ TAMB ≤ 150°C;
VLIN VB; 7V VB 18V;
7V VLIN 18V; driver off
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May 30, 2016
No.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input Current LIN
Dominant
VLIN = 0V; VB = 12V;
driver off
1.3.7.6
ILINPASdom
-1
mA
Input Current LIN
Recessive,
No GND for Bus
0V VLIN 18V;
1.3.7.7
ILIN_NOGND
-1
1
mA
µA
VGND = VVB; VB = 12V
-40°C ≤ TAMB ≤ 125°C;
VGND = VSUP = 0V;
0V VLIN 18V
3
20
50
Input Current LIN
No GND for Bus
1.3.7.8
1.3.7.9
ILIN_LOSTVB
125°C ≤ TAMB ≤ 150°C;
VGND = VSUP = 0V;
0V VLIN 18V
3
µA
Rising and falling edges,
transmit and receive
Slew Rate 3)
SRLIN
0.5
1.3
3
V/µs
1.3.7.10
1.3.7.11
1.3.7.12
Input Low Level Receiver
Input High Level Receiver
Input Hysteresis Receiver
VRECL
VRECH
0.4
VB
VB
VB
0.6
VRECHYS
VRECHYS = VRECH - VRECL
0.08
0.12
Input Center Point
Receiver
1.3.7.13
VBUS_CNT
VBUS_CNT = (VRECL + VRECH)/2
0.475
0.5
0.525
VB
THRec(max) = 0.744 * VB;
THDom(max) = 0.581 * VB;
VB = 7.0 to 18V; tBit = 50µs;
D1 = tBUS_rec(min)/(2 * tBit)
1.3.7.14
Duty Cycle 1
Duty Cycle 2
Duty Cycle 3
D1
0.396
-
(See ZSSC3170 LIN
Interface Description
for details.)
THRec(min) = 0.422 * VB;
THDom(min) = 0.284 * VB;
VB = 7.6 to 18V; tBit = 50µs;
D1 = tBUS_rec(max)/(2 * tBit)
1.3.7.15
1.3.7.16
D2
D3
0.581
-
-
(See ZSSC3170 LIN
Interface Description
for details.)
THRec(max) = 0.778 * VB;
THDom(max) = 0.616 * VB;
VB = 7.0 to 18V; tBit = 96µs;
D3 = tBUS_rec(min)/(2 * tBit)
0.417
(See ZSSC3170 LIN
Interface Description
for details.)
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May 30, 2016
No.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
THRec(min) = 0.389 * VB;
THDom(min) = 0.251 * VB;
VB = 7.6 to 18V; tBit = 96µs;
D4 = tBUS_rec(max)/(2 * tBit)
1.3.7.17
Duty Cycle 4
D4
0.590
-
(See ZSSC3170 LIN
Interface Description
for details.)
1.3.8
System Response
Until first valid output;
fOSC = 2MHz
1.3.8.1
Start-Up Time 1)
tSTART
30
ms
ms
Response Time
LIN_Mode;
fOSC = 2.2MHz; 14-bit
resolution; LIN Mode;
100% final value
tRESP_
LIN_2_14_5
1.3.8.2
3.6
Typical LIN
Configuration 4)
(see Table 2.5)
fOSC = 1.8MHz; 14-bit
resolution; PWM Mode;
100% final value
Response Time PWM
Mode; Typical PWM
Configuration 5)
tRESP_
PWM_2_14_2
1.3.8.3
1.3.8.4
20
ms
(see Table 2.4)
Overall Error AFE 6), 7)
FAFE_85
FAFE_125
FAFE_150
TAMB: -20°C to 85°C
TAMB: -40°C to 125°C
TAMB: -40°C to 150°C
0.25
0.5
%FS
%FS
%FS
(fOSC = 2MHz, XZC off;
no sensor related errors;
relative to digital value)
1.0
1)
2)
No measurement in mass production; parameter is guaranteed by design and/or quality observation.
In PWM Mode with Low-Side Switch (LSS) and PWM Mode with High-Side Switch (HSS), the sensor connection check (SCC) and the sensor short
check (SSC) diagnostics are available only for ZSSC3170 silicon revision “F” and any subsequent revisions
3)
4)
5)
6)
7)
For complete specification, see the ZSSC3170 LIN Interface Description.
2-step A/D conversion (ADCORD=1), 14-bit resolution (ADCRES=1), resolution 2nd conversion step 5-bit (ADCMODE=11)
2-step A/D conversion (ADCORD=1), 14-bit resolution (ADCRES=1), resolution 2nd conversion step 2-bit (ADCMODE=00)
Deviation from ideal line including INL, gain, offset, and temperature errors.
With XZC active: additional total error of max. 25ppm/K at XZC = 31. Error decreases linearly at XZC < 31.
10
May 30, 2016
1.4 Interface Characteristics
Table 1.4 Interface Characteristics
No.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
I2C™ Interface
1.4.1
1)
VI2C_IN_H
VI2C_IN_L
Input High Level
0.8
VDDA
VDDA
1.4.1.1
1.4.1.2
1.4.1.3
Input Low Level 1)
Output Low Level 1)
0.2
VI2C_OUT_L
Open drain output current:
< 2mA
0.15
VDDA
SDA Load Capacity 1)
400
400
100
pF
kHz
kW
CSDA
fSCL
1.4.1.4
1.4.1.5
SCL Clock Frequency 1)
Internal Pull-Up Resistor 1)
RI2C
25
1.4.1.6
1.4.2
One-Wire Interface at HOUT and LOUT (LIN Protocol)
Input Low Level 1)
Input High Level 1)
Start Window 1)
1
V
V
VOWI_IN_L
1.4.2.1
1.4.2.2
1.4.2.3
VOWI_IN_H
4
tSTART_WIN
At fOSC = 2MHz
30
ms
1)
No measurement in mass production; parameter is guaranteed by design and/or quality observation.
1.5 EEPROM
Table 1.5 EEPROM
No.
Parameter
Symbol
Conditions
Min
Typ
Max
1000
100
Unit
nEEP_WRI_85 TAMB < 85°C
nEEP_WRI_150 TAMB < 150°C
nEEP_RD
Write Cycles
Read Cycles
1.5.1
8
108
1.5.2
1.5.3
*
100000h@55°C
+ 27000h@125°C
+ 3000h@150°C
Data Retention
tEEP_RET
15
a
Per written word,
at fOSC = 2MHz
Programming Time
tEEP_WRI
12
ms
1.5.4
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May 30, 2016
2 Circuit Description
2.1 Signal Flow and Block Diagram
The signal path of the ZSSC3170 consists of the analog front end (AFE), the digital signal processing block, and
interfaces including protection circuitry. Based on a differential structure, the bridge inputs VBP and VBN are
handled by two signal lines each with a dynamic range symmetrical to the common mode potential (analog
ground equal to VDDA/2). Therefore it is possible to amplify positive and negative input signals within the
common mode range of the signal input.
Figure 2.1 Block Diagram of ZSSC3170
VDDA
SCL
I2CTM*
Ext. Temp.
Diode
Control Registers
SDA
VBR_T
Sensor
Bridge
HOUT
LOUT
Temp. Sens.
Select
Gain
Factor
Offset
Shift
ADC
Mode
RAM
PWM
LIN
VTN1
VBN
MUX
PGA
ADC
CMC
LIN
VBP
Analog Front-End (AFE)
EEPROM
Protection &
Power
Management
VB
VTN2
Internal
Temp.
Sensor
VSSE
VBR_B
VSSA
Digital Block
Interfaces
ZSSC3170
* I2C™ is a trademark of NXP.
The multiplexer (MUX) transmits the signals from either the bridge sensor or the selected temperature sensors to
the analog-to-digital converter (ADC) in a defined sequence. The temperature sensor can either be an external or
internal diode or an external thermistor (RTD), selected by EEPROM configuration. In LIN Mode, temperature
output is available. For this temperature measurement, the same temperature sensor can be used as for
calibration temperature, or a second temperature sensor input can be selected. The differential signal from the
bridge sensor is pre-amplified by the programmable gain amplifier (PGA). The ADC converts bridge sensor and
temperature signals into digital values.
The digital signal conditioning takes place in the calibration microcontroller (CMC) using a ROM-resident
conditioning formula and sensor-specific coefficients stored in the EEPROM during calibration. The configuration
data and the correction parameters can be programmed into the EEPROM by digital communication at the output
pins or at the I2C™ interface. Depending on the programmed output configuration, the corrected sensor signal is
output as a PWM signal (high-side switch or low-side switch) or as a digital value within a LIN frame. During the
calibration procedure, the I2C™ interface can provide measurement values as well.
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May 30, 2016
2.2 Application Modes
For each application, a configuration set must be established (generally prior to calibration) by programming the
on-chip EEPROM for the following modes:
Table 2.1 Configuration for Application Modes
Bridge Sensor Channel
Select gain stage of the AFE with respect to the maximum sensor signal span and
the zero point of the ADC.
Input Voltage Range
Bridge Sensor Offset
Compensation (XZC)
Activate the analog sensor offset compensation if required; e.g., if the sensor offset
voltage is close to or larger than the sensor span.
Select appropriate resolution of the ADC. Settings will influence sampling rate, signal
integration time, and therefore sensitivity to noise and disturbances.
Resolution/Response Time
Temperature Measurement
Temperature Measurement for the
Correction of the Bridge Signal
Select temperature sensor to calibrate temperature related errors.
Select temperature sensor for temperature measurement.
Temperature Measurement for the
Temperature Output in LIN Mode
Output Signal
Output Mode
LIN Mode
Select PWM or LIN according to application requirements.
Select LIN compatibility to specification package LIN2.1, LIN2.0, or LIN1.3.
Select switch type: high-side switch (HSS) or low-side switch (LSS).
PWM Mode
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May 30, 2016
2.3 Analog Front End (AFE)
The analog front end (AFE) consists of the signal multiplexer (MUX), the programmable gain amplifier (PGA) and
the analog-to-digital converter (ADC).
2.3.1
Programmable Gain Amplifier (PGA)
Table 2.2 shows the adjustable gains, corresponding sensor signal spans, and common mode range limits. See
section 2.3.2 for details for XZC.
Table 2.2 Adjustable Gain Stages, Corresponding Sensor Signal Spans, and Common Mode Ranges
Overall
Gain
Maximum Input
Voltage Range
VIN_SPAN [mV/V] 1)
Gain
Gain
Gain
Input Common Mode Range
VIN_CM [%VDDA] 2)
Amp1
Amp2
Amp3
aIN
XZC off
XZC on
420
280
210
140
105
70
1.8
2.7
30
30
15
15
7.5
7.5
3.75
3.75
3.75
1
7
4.66
7
2
2
2
2
2
2
2
2
2
2
2
2
2
29 to 65
29 to 65
29 to 65
29 to 65
29 to 65
29 to 65
29 to 65
29 to 65
29 to 65
29 to 65
29 to 65
29 to 65
32 to 57
45 to 55
45 to 55
45 to 55
45 to 55
45 to 55
45 to 55
45 to 55
45 to 55
45 to 55
45 to 55
45 to 55
45 to 55
Not applicable
3.6
5.4
4.66
7
7.1
10.7
14.3
21.4
28.5
53.75
80
4.66
7
52.5
35
4.66
3.5
7
26.3
14
9.3
7
1
4.66
3.5
1.4
107
267
1
2.8
1
1)
2)
Recommended internal signal range: maximum 80% supply voltage. Range is defined by 80% of supply voltage divided by selected gain.
At maximum input signal (with XZC: +300% offset).
2.3.2
Offset Compensation
The ZSSC3170 supports two methods of sensor offset compensation:
Digital offset correction is processed during the digital signal conditioning by the calibration microcontroller
(CMC).
Bridge sensor offset compensation (XZC) is achieved by adding a compensation voltage at the analog
signal path that removes coarse offset. XZC is needed for large offset values that would otherwise
overdrive the analog signal path, and it can be adjusted by 6 EEPROM bits. Depending on the gain
adjustment, XZC can handle offset values of up to 300% of the sensor signal range.
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May 30, 2016
Table 2.3 Bridge Sensor Offset Shift Ranges
Maximum Input
Overall Gain
Offset Shift
per Step
Approximate
Maximum Offset Shift Maximum Offset Shift
Approximate
Voltage Range
aIN
VIN_SPAN (mV/V)
(%Full Span)
12.5
7.6
(mV/V)
(%VIN_SPAN
)
420
280
210
140
105
70
1.8
2.7
7.8
388
7.1
237
3.6
12.5
7.6
15.5
14.2
31
388
5.4
237
7.1
12.5
7.6
388
10.7
14.3
21.4
28.5
53.6
80
28
237
52.5
35
12.5
7.6
62
388
57
237
26.3
14
5.2
52
161
12.5
7.6
233
207
194
78
388
10
237
7
107
267
5.2
161
2.8
0.83
26
2.3.3
Analog-to-Digital Converter
The analog-to-digital converter (ADC) is designed in full differential switched capacitor technology with a
selectable resolution of 13 or 14 bits. The ADC can operate in first or second order configuration. The conversion
is largely insensitive to short-term and long-term instabilities of the clock frequency.
MSB segment conversion: In this first step of the A/D conversion, the measurement value is integrated
over the complete conversion time ensuring a high degree of noise suppression. To extend the integration
phase to the maximum, this fraction of the complete conversion time is selected to be as long as possible
corresponding to the time available.
LSB segment conversion: To achieve a higher resolution, the residual value of the first step is converted
in a subsequent step by a second converter. In first-order configuration, the second step is skipped (single-
step conversion).
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May 30, 2016
Table 2.4 A/D Resolution and Conversion Time in PWM Modes
Mode
A/D Resolution
Total
A/D Resolution
MSB Segment
Conversion
A/D Resolution
LSB Segment
Conversion
A/D Conversion
Mode
ADC MODE 1)
PWM Cycle Time
(fOSC = 1.8MHz)
(bit)
(ms)
(bit)
12
11
10
9
(bit)
14
14
14
14
13
13
13
13
14
13
2
00
01
10
11
00
01
10
11
n/a
n/a
19.9
10.8
6.3
3
4
PWM /
ADC
5
4.0
2 step1)
11
10
9
2
10.8
6.3
3
4
4.0
8
5
2.8
PWM /
ADC
1 step
14
13
n/a
n/a
37.5
19.3
1)
See the ZSSC3170 Functional Description for details.
Table 2.5 A/D Resolution and Conversion Time in LIN Modes
Mode
A/D Resolution
Total
A/D Resolution
MSB Segment
Conversion
A/D Resolution
LSB Segment
Conversion
A/D Conversion
Mode
ADC MODE 1)
Response Time 2)
in LIN Mode
(fOSC = 2.2MHz)
(bit)
(bit)
12
11
10
9
(bit)
(ms)
16.3
8.9
14
14
14
14
13
13
13
13
14
13
2
00
01
10
11
00
01
10
11
n/a
n/a
3
4
5.2
LIN /
ADC
2 step
5
3.3
11
10
9
2
8.9
3
5.2
4
3.3
8
5
2.4
LIN /
ADC
1 step
14
13
n/a
n/a
61.5
31.7
1)
2)
See the ZSSC3170 Functional Description for details.
Total response time.
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May 30, 2016
Equation (1) describes the conversion result:
VADC _IN
r
(1)
ZADC 2
VADC _REF RSADC
Where
ZADC
A/D conversion result
A/D resolution in bits
r
VADC_IN Differential input voltage of ADC
VADC_REF Differential reference voltage of ADC
RSADC
ADC range shift adjustable by EEPROM configuration (RSADC = 1/16, 1/8, 1/4, 1/2 )
By selecting different values of RSADC, the user can match the sensor input signal to the optimum input voltage
range of the ADC. The ADC reference voltage VADC_REF is defined as the difference between the bridge supply
potentials at pins VBR_T and VBR_B. The theoretical ADC input voltage range ADCINP_R is equal to this ADC
reference voltage.
A major constraint required for achieving the specified precision as well as the stability and nonlinearity
parameters of the AFE is to use a maximum ADC input voltage range of 10% to 90% of ADCINP_R within the
application. This is of special importance for ensuring the specified parameters for the entire operating
temperature range as well as all possible sensor bridge tolerances. The validity of these conditions is not checked
by the ZSSC3170’s failsafe functions and therefore must be ensured by the customer-specific configuration.
2.4 Temperature Measurement
The following temperature sensors are supported by ZSSC3170 for both temperature and calibration temperature
measurement:
Internal pn-diode
External pn-diode; anode to pin VBR_T
External resistive half-bridge with the thermistor connected in the upper branch
In PWM Mode, the conditioning calculation for the bridge sensor signal is based on values of the selected
temperature sensor.
In LIN Mode, two temperature measurements are executed using either two different sensors or one sensor for
both measurements. The temperature output value is the result of a conditioning calculation including offset
compensation, gain correction, and 2nd order nonlinearity compensation. The conditioning coefficients are stored
in the EEPROM.
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May 30, 2016
2.5 System Control and Conditioning Calculation
The system control performs the following tasks:
Sequencing of the start-up phase
Control of measurement cycle based on EEPROM configuration data
16-bit conditioning calculation for each measurement signal based on EEPROM conditioning coefficients
and ROM-resident signal conditioning algorithm
Processing of communication requests received at the serial interfaces
Control of calibration mode
Processing of diagnostic and failsafe tasks
For a detailed description, refer to the ZSSC3170 Functional Description.
2.5.1
Operating Modes
Three main modes are implemented in the integrated state machine:
Normal Operation Mode (NOM) with continuous signal conditioning
Command Mode (CM), which provides access to all internal registers and provides the basis for
configuration and calibration of the ZSSC3170
Diagnostic Mode (DM), which indicates detected error conditions
2.5.2
Start-Up Phase
The start-up phase consists of the following time periods:
Settling of the internal voltage supply represented by the voltage VDDA-VSSA. At the end of this period,
the power-on-reset circuit (POR) switches off the reset signal.
System start, readout of EEPROM, and signature check.
Processing of the signal conditioning start routine containing bridge sensor signal and temperature
measurements, associated auto-zero measurements, and the conditioning calculation itself. Within this
period, the output pins are ready to receive special LIN frames resulting in entering the Command Mode
(CM). This start window is active for up to 30ms.
The ZSSC3170 switches into Normal Operation Mode (NOM) after the start window is passed. It proceeds with
the cyclic processing of the measurement and conditioning tasks.
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May 30, 2016
2.5.3
Measurement Cycle
Depending on the EEPROM settings, the multiplexer selects the following inputs in a defined sequence:
Pre-amplified sensor bridge signal
Temperature sensor defined by EEPROM configuration for calibration temperature
Temperature sensor defined by EEPROM configuration for temperature measurement
Auto-zero signal
Diagnostic signals
The CMC controls the complete measurement cycle following a basic flow shown in Figure 2.2.
All necessary measurements for bridge sensor and temperature signal are executed once after power-on within
the start-up routine. This initial phase is followed by continuous processing of the complete measurement cycle.
The sensor connection check (SCC), sensor short check (SSC), and sensor aging check (SAC) for diagnostic
tasks (see section 2.8) are continuously executed within the regular measurement cycle even if the processing of
the diagnostic function is disabled by the EEPROM configuration.
For details, refer to the ZSSC3170 Functional Description.
Figure 2.2 Measurement Cycle
Start Routine
Bridge Sensor Signal Auto-Zero
Bridge Sensor Signal Measurement
Calibration Temperature Auto-Zero
Bridge Sensor Signal Measurement
Calibration Temperature Measurement
Bridge Sensor Signal Measurement
Temperature Auto-Zero
Bridge Sensor Signal Measurement
Temperature Measurement
Bridge Sensor Signal Measurement
Sensor Aging Check
Bridge Sensor Signal Measurement
Sensor Connection Check /
Sensor Short Check, Positive Biased
Bridge Sensor Signal Measurement
Sensor Connection Check /
Sensor Short Check, Negative Biased
Bridge Sensor Signal Measurement
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May 30, 2016
2.5.4
Conditioning Calculation
After digital auto-zero correction of the bridge sensor measurement value, the interim result is further processed
based on the correction formula. Offset and gain with temperature effects up to 2nd order and non-linearity up to
3rd order can be compensated for, resulting in a positive 15-bit bridge sensor result value normalized to the range
of [0;1].
In LIN Mode, the digital measurement value of the temperature is processed based on a proprietary correction
formula as well. Offset, gain, and non-linearity up to 2nd order can be compensated for yielding a positive 15-bit
temperature value normalized to the range of [0;1].
2.6 Signal Outputs
ZSSC3170 provides three signal outputs:
LIN – LIN Interface revision 2.1/2.0 with compatibility to revision 1.3
HOUT – PWM high-side switch (HSS)
LOUT – PWM low-side switch (LSS)
For the respective application, one signal output must be selected and configured as the active output. Idle
outputs must be not connected.
To enter the Command Mode (CM), communication can be established at each of the three output pins. A
dedicated command must be sent during the start window immediately after power-on (duration tSTART_WN; see
specification 1.4.2.3). The communication protocol at all pins is based on the LIN Data Link Layer. Note that
communication at the HOUT pin uses the inverted signal levels of the LIN frame. In LIN Mode, communication at
the LIN pin is always possible during Normal Operation Mode (NOM).
To enable communication within the start window, the output drivers are set to tri-state during this time. The
outputs HOUT and LOUT are connected to internal pull-up resistors to ensure the necessary resistive stage. For
the LIN transceiver, an internal pull-up resistor is implemented by default (according to the LIN Specification
Package, Physical Layer section).
If not switched into CM before expiration of the 30ms start window, depending on the configuration, the
ZSSC3170 will start to provide a PWM signal or can respond to communication requests of the LIN master.
The function set of the signal outputs is specified in detail in the following documents: the ZSSC3170 Functional
Description and the ZSSC3170 LIN Interface Description.
Note: LIN Sleep Mode must be disabled for proper PWM operation.
2.6.1
PWM Outputs HOUT and LOUT
In PWM Mode, the output signal is provided at the pins HOUT or LOUT accordingly.
The outputs are protected from short circuit overload by current limiters and time monitoring. Driving the signal
lines with slew-rate-limited edges reduces electromagnetic emission. At the HOUT pin, a voltage higher than the
maximum supply voltage can be tolerated. The notably low leakage current of LOUT is designed to cover the
requirements of some unique electronic control units (ECU).
20
May 30, 2016
2.6.2
LIN Output
The output of the integrated LIN transceiver at the LIN pin is compatible with the LIN revisions 2.1, 2.0 and 1.3.
For details, refer to the ZSSC3170 LIN Interface Description. For LIN Physical Layer Conformance Tests, the
control pins of the integrated LIN transceiver can be accessed separately in a LIN Conformance Test Mode.
2.7 Digital Test and Calibration Interface
Beyond the digital communication features accessed via the output pins, the ZSSC3170 provides an I2C™ com-
patible test and calibration interface with slave functionality. For a detailed description of the I2C™ interface, refer
to the ZSSC3170 Functional Description.
2.8 Diagnostic and Failsafe Features, Watchdog, and Error Detection
The ZSSC3170 detects various possible failures. An identified failure is indicated by the ZSSC3170 entering the
Diagnostic Mode (DM). With PWM active, the respective output is switched to the resistive mode. In LIN Mode,
depending on the error classification, the correlated status bits are activated. A watchdog continuously monitors
the operations of the CMC and the running measurement loop. The operation of the internal clock oscillator is
monitored by the oscillator failure detection. A check of the sensor bridge for broken or shorted wires is performed
continuously (the sensor connection check (SCC) and the sensor short check (SSC). In PWM Mode with Low-
Side Switch (LSS) and PWM Mode with High-Side Switch (HSS), the diagnosis functions SCC and SSC are only
available from ZSSC3170 silicon revision “F” and any subsequent revisions. The common mode voltage of the
sensor (CMV) is monitored continuously (sensor aging check (SAC)). A check for a broken chip (BCC) can be
applied in the start-up phase after power-on. RAM, ROM, EEPROM, registers, and the arithmetic unit are
monitored continuously. Refer to the ZSSC3170 Functional Description for a detailed description.
2.9 High Voltage, Reverse Polarity, and Short Circuit Protection
The ZSSC3170 is designed for a direct 12V supply, which can be provided by a vehicle power system. Internal
sub-assemblies are supplied and protected by integrated voltage regulators and limiters. Specific protection
circuits allow tolerance of permanent reverse polarity at supply and output pins. These functions are described in
detail in the document ZSSC3170 High Voltage Protection Description. When operated in the application circuits
shown in section 3, the protection features of the ZSSC3170 are guaranteed without time limit.
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May 30, 2016
3 Application Circuit Examples and External Components
3.1 Application Circuit Examples
Note: Pad locations shown in the following figures are approximate. For specific pad locations, refer to the
ZSSC3170 Technical Note – Die Dimensions and Pad Coordinates (see section 8).
Figure 3.1 Application Circuit in PWM Mode with Low-Side Switch
Temperature
Sensor
ZSSC3170 Application Circuit
Sensor
Bridge
PWM Mode with Low-Side Switch
n.c.
ZSSC3170 Die
VSS
n.c.
D1
VBAT
R1 27Ω
LSS
SDA SCL VDD
C3
C1
C2
2.2nF
100nF
220nF
GND
Figure 3.2 Application Circuit in PWM Mode with High-Side Switch
Sensor
Bridge
Temperature
Sensor
ZSSC3170 Application Circuit
PWM Mode with High-Side Switch
n.c.
n.c.
VSS
ZSSC3170 Die
D1
VBAT
HSS
R1 27Ω
SDA SCL VDD
C2
470nF
C1
100nF
C3
4.7nF
GND
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May 30, 2016
Figure 3.3 Application Circuit in LIN Mode
Temperature
Sensor
Sensor
Bridge
ZSSC3170 Application Circuit
LIN Mode
n.c.
ZSSC3170 Die
n.c.
D1
VBAT
LIN
R1 10Ω
SDA SCL VDD
C3
220pF
C1
100nF
C2
220nF
GND
3.2 Dimensioning of External Components
For application circuits, refer to Figure 3.1, Figure 3.2, and Figure 3.3.
Table 3.1 Dimensioning of External Components for Application Examples
No.
Component
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Resistor
Symbol
C1
Condition
All modes
Min
Typ
100
470
220
4.7
2.2
220
10
Max
Unit
nF
nF
nF
nF
nF
pF
W
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.2.6
3.2.7
3.2.8
3.2.9
C2
HSS
C2
LSS, LIN
HSS
C3
C3
LSS
C3
LIN
R1
LIN
Resistor
R1
LSS, HSS
All modes
27
W
Diode
D1
Standard Si diode
The capacitor values are examples and must be adapted to the requirements of the specific application, in
particular to the EMC requirements. In the LIN application, the voltage drop over the series connection of D1 and
R1 must not exceed 1V at maximum supply current. For overvoltage pulses at VBAT, R1 serves as a current
limiter.
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May 30, 2016
4 Pinout and Package Options
4.1 Die Pad Definitions and Configuration
Table 4.1 Die Pad Definitions for ZSSC3170
Die Pad
Name
Description
Positive Analog Supply Voltage
Notes
1
VDDA
VSSA
SDA
Power supply
2
Negative Analog Supply Voltage
I²C™ Data I/O
Ground
3
Analog I/O, internal pull-up
Analog input, internal pull-up
Power supply
High voltage I/O
High voltage I/O
High voltage I/O
Ground
4
SCL
I²C™ Clock
5
6
VDD
Positive Digital Supply Voltage
PWM High-Side Switch
Positive External Supply Voltage
External Ground (PWM Modes)
Ground (LIN Mode)
HOUT
VB
7
8
VSSE
VSS
9
10
LIN
LIN
LIN high voltage I/O
High voltage I/O
Analog input
11
LOUT
VBN
PWM Low-Side Switch
12
Negative Input Sensor Bridge
Negative (Bottom) Bridge Supply Voltage
Positive Input Sensor Bridge
Temperature Sensor 1
13 / 14
15
VBR_B
VBP
Analog I/O
Analog input
16
VTN1
VBR_T
VTN2
Analog I/O
17 / 18
19
Positive (Top) Bridge Supply Voltage
Temperature Sensor 2
Analog I/O
Analog I/O
The two-fold implementation of the bridge supply bond pads enables direct bonding from the ZSSC3170 pads to
supply pads on the sensor die. The backside of the die is electrically connected to the potential VSS and VSSA
within the package.
For the die layout and exact bond pad positions, refer to the ZSSC3170 Technical Note – Die Dimensions and
Pad Coordinates.
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May 30, 2016
4.2 SSOP20 Package
An RoHs-compliant SSOP20 package (5.3mm body, 0.65mm lead pitch) is one of the two standard delivery forms
available for packaged parts. Refer to the ZSSC3170 Technical Note – SSOP20 and DFN20 Package
Dimensions for package dimensions, land patterns, and additional details.
Table 4.2 Pin Definition of SSOP20 Package
SSOP20 Pin
Name
Description
Notes
1
2
n.c.
VDDA
VSSA
SDA
No connection
Positive Analog Supply Voltage
Negative Analog Supply Voltage
I²C™ Data I/O
Power supply
Ground
3
4
Analog I/O, internal pull-up
Analog input, internal pull-up
Power supply
5
SCL
I²C™ Clock
6
VDD
Positive Digital Supply Voltage
PWM High-Side Switch
Positive External Supply Voltage
External Ground (PWM Modes)
Ground (LIN Mode)
7
HOUT
VB
High voltage I/O
High voltage I/O
High voltage I/O
Ground
8
9
VSSE
VSS
10
11
12
14
15
16
17
18
19
20
LIN
LIN
LIN high voltage I/O
High voltage I/O
Analog input
LOUT
VBN
PWM Low-Side Switch
Negative Input Sensor Bridge
Negative (Bottom) Bridge Supply Voltage
Positive Input Sensor Bridge
Temperature Sensor 1
VBR_B
VBP
Analog I/O
Analog input
VTN1
VBR_T
VTN2
n.c.
Analog I/O
Positive (Top) Bridge Supply Voltage
Temperature Sensor 2
Analog I/O
Analog I/O
No connection
4.3 DFN20 Package
An RoHs-compliant DFN20 package (6x5 mm body, 0.5mm lead pitch) with wettable flanks is one of the two
standard delivery forms available for packaged parts. Refer to the ZSSC3170 Technical Note – SSOP20 and
DFN20 Package Dimensions for package dimensions, land patterns, and additional details.
The pin definitions for the DFN20 package are the same as for the SSOP20 package described in Table 4.2.
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May 30, 2016
5 ESD Protection and EMC Specification
All pins have an ESD protection of >2000V according to the Human Body Model (HBM). In addition, the pins
VDDE, VSSE, VSS, HOUT, and LOUT have an ESD protection of >4000V and the pin LIN has an ESD protection
of >8000V (system level).
The level of ESD protection has been tested with devices in SSOP20 packages during the product qualification.
The ESD test follows the Human Body Model with 1.5kOhm/100pF based on MIL883, Method 3015.7 (except the
LIN pin tests). The ESD test of the LIN pin follows the system level specification with 330Ω/150 pF (according to
DIN EN 61000-4-2).
The EMC performance regarding external disturbances as well as EMC emission is documented in the
ZSSC3170 High Voltage Protection Description.
6 Reliability and RoHS Conformity
The ZSSC3170 is qualified according to the AEC-Q100 standard, operating temperature grade 0.
The ZSSC3170 complies with the RoHS directive and does not contain hazardous substances.
7 Ordering Information
Product Sales Code
Description
Package
ZSSC3170FE1B
ZSSC3170 Die Revision F — Temperature range: -40°C to +150°C
Unsawn on Wafer, 2450 pcs.
ZSSC3170FE1C
ZSSC3170FE2R
ZSSC3170FE2T
ZSSC3170 Die Revision F — Temperature range: -40°C to +150°C
ZSSC3170 SSOP20 Revision F — Temperature range: -40°C to +150°C
ZSSC3170 SSOP20 Revision F — Temperature range: -40°C to +150°C
Sawn on Wafer Frame, 2450 pcs.
13” Reel, 2000 pcs.
Tube, 660 pcs.
ZSSC3170EE1B
ZSSC3170EE1C
ZSSC3170EE2R
ZSSC3170EE2T
ZSSC3170EE3R
ZSSC3170EA1B
ZSSC3170EA1C
ZSSC3170EA2R
ZSSC3170EA2T
ZSSC3170EA3R
ZSSC3170 Die Revision E — Temperature range: -40°C to +150°C
ZSSC3170 Die Revision E — Temperature range: -40°C to +150°C
ZSSC3170 SSOP20 Revision E — Temperature range: -40°C to +150°C
ZSSC3170 SSOP20 Revision E — Temperature range: -40°C to +150°C
ZSSC3170 DFN20 Revision E — Temperature Range -40°C to +150°C
ZSSC3170 Die Revision E — Temperature range: -40°C to +125°C
ZSSC3170 Die Revision E — Temperature range: -40°C to +125°C
ZSSC3170 SSOP20 Revision E — Temperature range: -40°C to +125°C
ZSSC3170 SSOP20 Revision E — Temperature range: -40°C to +125°C
ZSSC3170 DFN20 Revision E — Temperature Range -40°C to +125°C
Unsawn on Wafer, 2450 pcs.
Sawn on Wafer Frame, 2450 pcs.
13” Reel, 2000 pcs.
Tube, 660 pcs.
13” Reel, 4500 pcs.
Unsawn on Wafer, 2450 pcs.
Sawn on Wafer Frame, 2450 pcs.
13” Reel, 2000 pcs.
Tube, 660 pcs.
13” Reel, 4500 pcs.
ZSSC3170KIT
ZSSC3170 Evaluation Kit and 5 SSOP20 Samples
Kit
26
May 30, 2016
8 Related Documents
Document
ZSSC3170 Evaluation Kit Description
ZSSC3170 Functional Description
ZSSC3170 Application Note – LIN and PWM Operation
ZSSC3170 Technical Note – SSOP20 and DFN20 Package Dimensions
ZSSC3170 High Voltage Protection Description
ZSSC3170 LIN Interface Description
ZSSC3170 Technical Note – Die Dimensions and Pad Coordinates *
Visit the ZSSC3170 product page www.IDT.com/ZSSC3170 or contact your nearest sales office for the latest
version of these documents.
*
Note: Documents marked with an asterisk (*) are available on request only.
9 Glossary
Term
ADC
AEC
AFE
Amp
BCC
CM
Description
Analog-to-Digital Converter
Automotive Electronics Council
Analog Front-End
Amplifier
Broken Chip Check (diagnostic task)
Command Mode
CMC
CMV
DM
Calibration Micro Controller (optimized micro controller architecture for IDT signal conditioners)
Common Mode Voltage (of the sensor bridge signal)
Diagnostic Mode
DNL
EEPROM
EMC
ESD
FSO
HSS
I/O
Differential Nonlinearity
Electrically Erasable Programmable Read Only Memory
Electromagnetic Compatibility
Electrostatic Discharge
Full Scale Output
High-Side Switch (open-drain output; connects to positive supply when active)
Input/Output
I²C
Inter-Integrated Circuit (serial two-wire data bus, trademark of NXP.)
27
May 30, 2016
Term
INL
Description
Integral Nonlinearity
LIN
Local Interconnect Network (international communication standard)
Least Significant Bit
LSB
LSS
MSB
MUX
NOM
P
Low-Side Switch (open-drain output; connects to ground when active)
Most Significant Bit
Multiplexer
Normal Operation Mode
Bridge Sensor Signal (e.g., pressure)
Programmable Gain Amplifier
PGA
POR
PWM
Rev.
RISC
RoHS
ROM
RTD
SAC
SCC
SSC
Power-On Reset (defined start-up procedure until nominal supply voltage is reached)
Pulse Width Modulation
Revision
Reduced Instruction Set Computing
Restrictions of Hazardous Substances
Read Only Memory
Resistance Temperature Detector
Sensor Aging Check (diagnostic measurement task)
Sensor Connection Check (diagnostic measurement task)
Sensor Short Check (diagnostic measurement task);
Sensor Signal Conditioner
T
Temperature
XZC
Extended Zero Compensation (bridge sensor offset compensation)
28
May 30, 2016
10 Document Revision History
Revision
Date
Description
1.00
April 5, 2009
First release.
1.30
September 20, 2010
January 17, 2011
April 4, 2013
Full revision.
2.00
Silicon revision from C to D. Minor edits.
2.10
Silicon revision from D to E. Update for contact information and imagery on cover and
headers. Minor edits.
2.20
2.30
July 5, 2013
SSOP20 is now only available for evaluation purposes as samples in the Evaluation
Kit.
September 16, 2013
Revision to recommendation in footnote 1 in Table 2.2.
PWM operation and LIN Sleep mode incompatibility note added in section 2.6.
Waffle pack option is no longer available; removed from part order table
(ZSSC3170EE1D and ZSSC3170EA1D).
References to SSOP20 package for samples removed.
Minor edits for clarity.
2.40
2.50
January 22, 2014
SSOP20 is now available again.
Update for imagery for cover.
December 10, 2014
DFN20 package added.
Update for Table 1.2 conditions for specification 1.2.4.
Update for external temperature resistor input range specification 1.3.3.5.
Correction for Table 4.2.
Update for block diagram on page 3 and in Figure 2.1.
Contact information and related documents section updated.
2.51
November 4, 2015
Table note 2 added for specifications 1.3.4 and 1.3.6 of Table 1.3.
Revisions in section 2.8 for new silicon revision F.
Ordering information in section 7 updated to add part numbers ZSSC3170FE1B and
ZSSC3170FE1C.
Moved content for SSOP20 and DFN20 package drawings to new separate
document: ZSSC3170 Technical Note – SSOP20 and DFN20 Package Dimensions.
Addition of AEC-Q100 information on page 2.
Minor edits and updates for related documents section.
160118
160530
January 18, 2016
May 30, 2016
Changed to IDT branding.
Added revision F for SSOP20 tube and reel part codes in order information table.
29
May 30, 2016
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