概述
数据手册RF2945 概述
433/868/915MHZ FSK/ASK/OOK TRANSCEIVER 868分之433 / 915MHZ FSK / ASK / OOK收发器
RF2945 数据手册
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PDF下载RF2945
433/868/915MHZ FSK/ASK/OOK TRANSCEIVER
11
Typical Applications
• Wireless Meter Reading
• Keyless Entry Systems
• Wireless Data Transceiver
• Wireless Security Systems
• 433, 868 and 915MHz ISM Band Systems • Battery-Powered Portable Devices
Product Description
-A-
7.00
0.15
The RF2945 is a monolithic integrated circuit intended for
use as a low cost FM transceiver. The device is provided
in 32-lead plastic LQFP packaging and is designed to be
used with a PLL IC to provide a fully functional FM trans-
ceiver. The chip is intended for digital (ASK, FSK, OOK)
applications in the North American 915MHz ISM band
and European 433/868MHz ISM bands. The integrated
VCO has a buffered output to feed the RF signal back to
the PLL IC to form the frequency synthesizer. Internal
decoding of the RX ENABL and TX ENABL lines allow for
half duplex operation as well as turning on the VCO to
give the synthesizer time to settle and complete power
downmode. The DATA REF line allows the use of an
external capacitor to control the DC level at the adaptive
Data Slicer input for setting the bit decision threshold.
+ 0.20 sq.
0.05
0.50
0.22
+ 0.05
1.40
+ 0.05
5.00
+ 0.10 sq.
Dimensions in mm.
7° MAX
0° MIN
0.60
0.127
0.15
+
0.10
Optimum Technology Matching® Applied
Package Style: LQFP-32_5x5
GaAs HBT
GaAs MESFET
üSi BJT
11
Si Bi-CMOS
SiGe HBT
Si CMOS
Features
• Fully Monolithic Integrated Transceiver
• 2.4V to 5.0V Supply Voltage
32
31
30
29
28
27
26
25
Control
Logic
• Narrowband and Wideband FSK
• 300MHz to 1000MHz Frequency Range
• 10dB Cascaded Noise Figure
TX ENABL
1
24 RESNTR-
Gain
Control
PA
TX OUT
GND2
2
3
4
5
6
7
8
23 MOD IN
22 DATA REF
21 DEMOD IN
20 GND6
RX IN
• 10mW Output Power With Power Control
GND1
LNA
LNA OUT
GND3
19 IF2 BP-
18 IF2 BP+
17 IF2 IN
Linear
RSSI
MIX IN
Ordering Information
9
10
11
12
13
14
15
16
RF2945
433/868/915MHz FSK/ASK/OOK Transceiver
RF2945 PCBA-L Fully Assembled Evaluation Board (433MHZ)
RF2945 PCBA-M Fully Assembled Evaluation Board (868MHZ)
RF2945 PCBA-H Fully Assembled Evaluation Board (915MHz)
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Functional Block Diagram
Rev A10 000919
11-215
RF2945
Absolute Maximum Ratings
Parameter
Supply Voltage
Ratings
-0.5 to +5.5
-0.5 to +5.0
Unit
V
DC
Control Voltages
V
Caution! ESD sensitive device.
DC
Input RF Level
+10
dBm
Output Load VSWR
Operating Ambient Temperature
Storage Temperature
50:1
-40 to +85
-40 to +150
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
°C
°C
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
T=25 °C, V =3.6V, Freq=915MHz
Overall
CC
RF Frequency Range
VCO and PLL Section
VCO Frequency Range
VCO OUT Impedance
VCO OUT Level
300 to 1000
MHz
300 to 1000
MHz
Ω
dBm
dBc/Hz
dBc/Hz
50
-20
-72
-98
Freq=915MHz
10kHz offset, 5kHz loop BW
100kHz offset, 5kHz loop BW
VCO/PLL Phase Noise
Transmit Section
Max Modulation Frequency
Min Modulation Frequency
Maximum Power Level
2
MHz
Set by loop filter bandwidth
+7
1
12
+8.5
+3
dBm
dBm
dB
dB/V
kHz
Freq=433MHz
Freq=915MHz
5
Power Control Range
Power Control Sensitivity
Max FM Deviation
10
200
Instantaneous frequency deviation is
inversely proportional with the modulation
voltage. Dependent on external circuitry.
TX ENABL=“1”, RX ENABL=“0”
Antenna Port Impedance
Antenna Port VSWR
Modulation Input Impedance
Harmonics
50
Ω
1.5:1
TX Mode
4
kΩ
dBc
dBc
11
-38
Freq=915MHz, with eval board filter
Compliant to Part 15.249 and I-ETS 300 220
Spurious
Overall Receive Section
Frequency Range
Cascaded Voltage Gain
300 to 1000
MHz
dB
dB
35
23
Freq=433MHz
Freq=915MHz
Cascaded Noise Figure
10
dB
Cascaded Input IP
-31
dBm
Freq=433MHz
3
-26
-96
-55
dBm
dBm
dBm
V
Freq=915MHz
IF BW=400kHz, Freq=915MHz, S/N=8dB
Freq=915MHz
RX Sensitivity
LO Leakage
RSSI DC Output Range
-91.5
70
0.5 to 2.5
R
=51kΩ
LOAD
RSSI Sensitivity
RSSI Dynamic Range
22.5
80
mV/dB
dB
11-216
Rev A10 000919
RF2945
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
LNA
Voltage Gain
23
16
4.8
5.5
-27
dB
dB
dB
dB
dBm
433MHz
915MHz
433MHz
915MHz
433MHz
Noise Figure
Input IP
3
-20
-37
dBm
dBm
915MHz
433MHz
Input P
1dB
-30
50
dBm
Ω
915MHz
RX ENABL=“1”, TX ENABL=“0”
RX Mode
433MHz and 915MHz
Single-ended configuration
Antenna Port Impedance
Antenna Port VSWR
Output Impedance
Mixer
1.5:1
Open Collector
Ω
Conversion Voltage Gain
8
7
10
17
-21
dB
dB
dB
dB
dBm
433MHz
915MHz
433MHz
915MHz
433MHz
Noise Figure (SSB)
Input IP
3
-17
-31
dBm
dBm
915MHz
433MHz
Input P
1dB
-28
dBm
915MHz
First IF Section
IF Frequency Range
Voltage Gain
0.1
0.1
10.7
34
25
25
MHz
dB
IF=10.7MHz, Z =330Ω
L
Noise Figure
13
330
330
dB
Ω
Ω
IF1 Input Impedance
IF1 Output Impedance
Second IF Section
IF Frequency Range
Voltage Gain
10.7
60
MHz
dB
IF=10.7MHz
IF2 Input Impedance
IF2 Output Impedance
Demod Input Impedance
Data Output Bandwidth
330
1
10
Ω
kΩ
kΩ
MHz
11
At IF2 OUT pin
1.4
0.3
3dB Bandwidth, Z
=1MΩ || 3pF
LOAD
Data Output Level
V
-0.3
V
Z
=1MΩ || 3pF. Output voltage is pro-
LOAD
CC
portional with the instantaneous frequency
deviation.
Rev A10 000919
11-217
RF2945
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Power Down Control
Logical Controls “ON”
Logical Controls “OFF”
Control Input Impedance
Turn On Time
2.0
V
V
Ω
ms
ms
µs
Voltage supplied to the input
Voltage supplied to the input
1.0
25k
1
1
100
Turn on/off times are dependent upon
PLL loop parameters
Turn Off Time
RX to TX and TX to RX Time
Power Supply
Voltage
3.6
V
V
Specifications
Operating limits
Temperature range -40°C to +85°C
Operating limits
2.7
2.4
5.0
V
Temperature range +10°C to +40°C
TX ENABL, LVLADJ=3.6V, RX ENABL=0V
TX ENABL=3.6V, LVLADJ, RX ENABL=0V
TX ENABL=0V, RX ENABL=3.6V
TX ENABL, LVLADJ, RX ENABL=0V
PLL Only Mode, TX ENABL,
RX ENABL=3.6V, LVLADJ=0V
Current Consumption
17
4.8
4.4
22
6.1
6.1
27.4
7.2
6.8
1
mA
mA
mA
µA
3.6
mA
11
11-218
Rev A10 000919
RF2945
Pin
1
Function Description
Interface Schematic
Enables the transmitter circuits. TX ENABL>2.0V powers up all trans-
TX ENABL
20 k
Ω
TX ENABL
mitter functions. TX ENABL<1.0V turns off all transmitter functions
except the PLL functions.
40 k
Ω
RF output pin for the transmitter electronics. TX OUT output impedance
is a low impedance when the transmitter is enabled. TX OUT is a high
impedance when the transmitter is disabled.
2
TX OUT
VCC
20
TX OUT
Ground connection for the 40 dB IF limiting amplifier and Tx PA func-
tions. Keep traces physically short and connect immediately to ground
plane for best performance.
3
4
GND2
RX IN
RF input pin for the receiver electronics. RX IN input impedance is a
low impedance when the transmitter is enabled. RX IN is a high imped-
ance when the receiver is disabled.
RX IN
500
Ground connection for RF receiver functions. Keep traces physically
short and connect immediately to ground plane for best performance.
5
6
GND1
Output pin for the receiver RF low noise amplifier. This pin is an open
collector output and requires an external pull up coil to provide bias and
tune the LNA output. A capacitor in series with this output can be used
to match the LNA to 50Ω impedance image filters.
LNA OUT
VCC
LNA OUT
Same as pin 3.
7
8
GND3
MIX IN
RF input to the RF Mixer. An LC matching network between LNA OUT
and MIX IN can be used to connect the LNA output to the RF mixer
input in applications where an image filter is not needed or desired.
MIX IN
GND5
11
GND5 is the ground connection shared by the input stage of the trans-
mit power amplifier and the receiver RF mixer.
9
GND5
IF output from the RF mixer. Interfaces directly to 10.7MHz ceramic IF
filters as shown in the application schematic. A pull-up inductor and
series matching capacitor should be used to present a 330Ω termina-
tion impedance to the ceramic filter. Alternately, an IF tank can be used
to tailor the IF frequency and bandwidth to meet the needs of a given
application.
MIX OUT
10
MIX OUT
15 pF
15 pF
GND5
GND5
DC voltage reference for the IF limiting amplifiers. A 10nF capacitor
from this pin to ground is required.
.
11
12
VREF IF
RSSI
A DC voltage proportional to the received signal strength is output from
this pin. The output voltage range is 0.5V to 2.3V and increases with
increasing signal strength.
VCC
RSSI
IF input to the 40dB limiting amplifier strip. A 10nF DC blocking capaci-
tor is required on this input.
13
IF1 IN
IF1 BP+
Ω
IF1 BP-
60 kΩ
60 k
330
330
IF1 IN
Rev A10 000919
11-219
RF2945
Pin
14
Function Description
Interface Schematic
DC feedback node for the 40dB limiting amplifier strip. A 10nF bypass See pin 13.
IF1 BP+
IF1 BP-
IF1 OUT
capacitor from this pin to ground is required.
Same as pin 14.
See pin 13.
15
16
IF output from the 40dB limiting amplifier. The IF1 OUT output presents
a nominal 330 Ω output resistance and interfaces directly to 10.7MHz
ceramic filters.
IF1 OUT
IF input to the 60dB limiting amplifier strip. A 10nF DC blocking capaci-
tor is required on this input. The IF2 IN input presents a nominal 330 Ω
input resistance and interfaces directly to 10.7MHz ceramic filters.
17
IF2 IN
IF2 BP+
60 k
IF2 BP-
60 k
Ω
Ω
330
330
IF2 IN
DC feedback node for the 60dB limiting amplifier strip. A 10nF bypass See pin 17.
capacitor from this pin to ground is required.
18
IF2 BP+
Same as pin 18.
See pin 17.
19
20
IF2 BP-
GND6
Ground connection for 60dB IF limiting amplifier. Keep traces physically
short and connect immediately to ground plane for best performance.
This pin is the input to the FM demodulator. This pin is NOT AC cou-
pled. Therefore, a DC blocking capacitor is required on this pin to avoid
shorting the demodulator input with the LC tank. A ceramic discrimina-
tor or DC blocked LC tank resonant at the IF should be connected to
this pin.
21
DEMOD IN
VCC
10 k
Ω
DEMOD IN
This pin is used for setting the adaptive Data Slicer DC reference level.
A capacitor from this pin to ground can be used to set the reference
level at the average DC level of the data bit stream.The DC level deter-
mines the bit decision threshold.
22
23
DATA REF
MOD IN
50k
Ω
11
DATA REF
FM analog or digital modulation can be imparted to the VCO through
this pin. The VCO varies in accordance to the voltage level presented
to this pin. To set the deviation to a desired level, a voltage divider refer-
enced to Vcc is the recommended. This deviation is also dependent
upon the overall capacitance of the external resonant circuit.
See pin 24.
This port is used to supply DC voltage to the VCO as well as to tune the
center frequency of the VCO. Equal value inductors should be con-
nected to this pin and pin 25 although a small imbalance can be used
to tune in the proper frequency range.
24
RESNTR+
RESNTR+
RESNTR-
4 k
Ω
MOD IN
See RESNTR+ description.
See pin 24.
25
26
RESNTR-
VCO OUT
This pin is used is supply a buffered VCO output to go to the PLL chip.
This pin has a DC bias and needs to be AC coupled.
VCO OUT
GND4 is the ground shared on chip by the VCO, prescaler, and PLL
electronics.
27
GND4
11-220
Rev A10 000919
RF2945
Pin
28
Function Description
Interface Schematic
This pin is used to supply DC bias to the LNA, Mixer, 1st IF Amp and
VCC1
Bandgap reference. A RF bypass capacitor should be connected
directly to this pin and returned to ground. A 22pF capacitor is recom-
mended for 915MHz applications. A 68 pF capacitor is recommended
for 433MHz applications.
Demodulated data output from the demodulator. Output levels on this
are TTL/CMOS compatible. The magnitude of the load impedance is
intended to be 1MΩ or greater.
29
30
DATA OUT
DATA OUT
This pin is used to supply DC bias and collector current to the transmit-
VCC3
nd
ter PA. It also supplies voltage to the 2 IF Amplifier, Demod and data
slicer. A RF bypass capacitor should be connected directly to this pin
and returned to ground. A 22pF capacitor is recommended for 915MHz
applications. A 68pF capacitor is recommended for 433MHz applica-
tions.
This pin is used to vary the transmitter output power. An output level
adjustment range greater than 12dB is provided through analog volt-
age control of this pin. DC current of the transmitter power amp ia also
reduced with output power.
40 kΩ
31
32
LVL ADJ
LVL ADJ
NOTE: This pin MUST be low when the transmitter is disabled.
400
4 kΩ
Enable pin for the receiver circuits. RX ENABL>2.0V powers up all
receiver functions. RX ENABL<1.0V turns off all receiver functions
except the PLL functions and the RF mixer.
RX ENABL
50 k
Ω
RX ENABL
Operation
TX ENABL RX ENABL
Function
Mode
11
Low
High
Low
High
Low
Low
High
High
Entire chip is powered down. Total current consumption is <1µA. *
Transmitter, VCO are on.
Sleep Mode
Transmit Mode
Receive Mode
Receiver, VCO are on. *
VCO is on. This mode allows time for a synthesizer loop to lock without
spending current on the transmitter or receiver.
PLL Lock
* LVL ADJ pin must be low to disable transmitter.
Rev A10 000919
11-221
RF2945
RF2945 Theory of Operation and Application Information
The RF2945 is part of a family of low-power RF trans-
ceiver IC’s that was developed for wireless data com-
munication devices operating in the European 433MHz
to 868MHz ISM band, and 915MHz U.S. ISM band.
This IC has been implemented in a 15GHz silicon
bipolar process technology that allows low-power
transceiver operation in a variety of commercial wire-
less products.
best operation of the on-chip data slicer, FM deviation
needs to be larger than 40kHzP-P
.
The data slicer itself is a transconductance amplifier,
and the DATA OUT pin is capable of driving rail-to-rail
output only into a very high impedance and a small
capacitance. The amount of capacitance will determine
the bandwidth of DATA OUT. In a 3pF load, the band-
width is in excess of 500kHz. The rail-to-rail output of
the data slicer is also limited by the frequency deviation
and bandwidth of IF filters. With the 400kHz bandwidth
filters on the evaluation boards, the rail-to-rail output is
limited to less than 320kHz. Choosing the right IF
bandwidth and deviation versus data rate (mod index)
is important in evaluating the applicability of the
RF2945 for a given data rate.
In its basic form, the RF2945 can be implemented as a
two-way half-duplex FSK transceiver with the addition
of some crystals, filters, and passive components. The
RF2945 is designed to interface with common PLL IC’s
to form a multi-channel radio. The receiver IF section is
optimized to interface with low-cost 10.7MHz ceramic
filters and has a 3dB bandwidth of 25MHz and can still
be used (with lower gain) at higher frequencies with
other types of filters. The PA output and LNA input are
available on separate pins and are designed to be con-
nected together through a DC blocking capacitor. In the
transmit mode, the PA will have a 50Ω impedance and
the LNA will have a high impedance. In the receive
mode, the LNA will have a 50Ω impedance and the PA
will have a high impedance. This eliminates the need
for a TX/RX switch, and allows for a single RF filter to
be used in transmit and receive modes. Separate
access to the PA and LNA allows the RF2945 to inter-
face with external components such as a high power
PA, lower NF LNA, upconverters, and downconverters,
for a variety of implementations.
The primary consideration when directly modulating
the VCO is the data rate versus PLL bandwidth. The
PLL will track out the modulation to the extent of its
bandwidth, which distorts the modulating data. There-
fore, the lower frequency components of the modulat-
ing data should be five to 10 times the loop bandwidth
to minimize the distortion. The lower frequency compo-
nents are generated by long strings of 1’s and 0’s in
data stream. By limiting the number of consecutive,
same bits, lower frequency components can be set. In
addition, the data stream should be balanced to mini-
mize distortion. Using a coding pattern such as
Manchester is highly recommended to optimize system
performance.
11
FM/FSK SYSTEMS
The PLL loop bandwidth is important in several system
parameters. For example, switching from transmit to
receive requires the VCO to retune to another fre-
quency. The switching speed is proportional to the loop
bandwidth: the higher the loop bandwidth, the faster
the switching times. Phase noise of the VCO is another
factor. Phase noise outside the bandwidth is because
of the VCO itself, rather than a crystal reference. The
design trade-offs must be made here in selecting a
PLL loop bandwidth with acceptable phase noise and
switching characteristics, as well as minimal distortion
of the modulation data.
The MOD IN pin drives an internal varactor for modu-
lating the VCO. This pin can be driven with a voltage
level needed to generate the desired deviation. This
voltage can be carried on a DC bias to select desired
slope (deviation/volt) for FM systems. Or, a resistor
divider network referenced to VCC or ground can
divide down logic level signals to the appropriate level
for a desired deviation in FSK systems.
On the receiver demod, the DATA OUT pin is the out-
put of an internal data slicer providing logic level out-
puts. The digital output is generated by a data slicer
that compares the demodulator with a DC reference
voltage recovered from the demodulator. The refer-
ence voltage is obtained by a filter capacitor on pin 22.
An on-chip 1.6MHz RC filter is provided at the demod-
ulator output to filter the undesirable 2xIF product. This
type data slicer has the ability to track out minor fre-
quency errors in the system, but requires a longer
period of time for the preamble for optimum results. For
ASK/OOK SYSTEMS
The transmitter of the RF2945 has an output power
level adjust (LVL ADJ) that can be used to provide
approximately 18dB of power control for amplitude
modulation. The RSSI output of the receiver section
can be used to recover the modulation. The RSSI out-
put is from a current source, and needs to have a resis-
11-222
Rev A10 000919
RF2945
tor to convert to a voltage. A 51kΩ resistor load
typically produces an output of 0.7V to 2.5V. A parallel
capacitor is suggested to band limit the signal. For
ASK applications, the 18dB range of the LVL ADJ
does not produce enough voltage swing in the RSSI for
reliable communications. The on/off keying (OOK) is
suggested to provide reliable communications. To
achieve this, the LVL ADJ and TX ENABL need to be
controlled together (please note that LVL ADJ cannot
be left high when TX ENABL is low). This will provide
an on/off ratio of greater than 50dB. One of the unfor-
tunate consequences of modulating in this manner is
VCO pulling by the PA. This results in a spurious out-
put outside the desired transmit band, as the PLL
momentarily loses lock and reacquires. This may be
avoided by pulse-shaping TX data to slow the change
in the VCO load to a pace which the PLL can track with
its given loop bandwidth. The loop bandwidth may also
be increased to allow it to track faster changes brought
about by load pulling.
the trace length should be as short as possible. The
inductors may be placed further away, and reducing
the value of the inductors can compensate any trace
inductance. Printed inductors may also be used with
careful design. For best results, physical layout should
be as symmetrical as possible. Figure 1 is a recom-
mended layout pattern for the VCO components. When
using the loop bandwidth lower than 5kHz shown on
the evaluation board, better filtering of the VCC at the
resonators (and lower VCC noise, as well) will help
reduce phase noise of the VCO. A series resistor of
100Ω to 200Ω, and a 1µF or larger capacitor may be
used.
Loop
Voltage
For the ASK/OOK receiver demodulator, an external
data slicer is required. The RSSI output is used to pro-
vide both the filter data and a very low pass filter (rela-
tive to the data rate) DC reference to the data slicer.
Because the very low pass filter has a slow time con-
stant, a longer preamble may be required to allow for
the DC reference to acquire a stable state. Here, as in
the case of the FSK transmitter, the data pattern also
affects the DC reference and the reliability of the
VCC
24
23
Not to Scale
Representative of Size
Figure 1. Recommended VCO Layout
receive data. Again,
a coding scheme such as
Manchester should be used to improve data integrity.
11
For the interface between the LNA/mixer, the coupling
capacitor should be as close to the RF2945 pins as
possible, with the bias inductors further away. Once
again, the value of the inductor may be changed to
compensate for trace inductance. The output imped-
ance of the LNA is in the order of several kΩ, which
makes matching to 50Ω very difficult. If image filtering
is desired, a high impedance filter is recommended.
APPLICATION AND LAYOUT CONSIDERATIONS
Both the RX IN and the TX OUT have a DC bias on
them. Therefore, a DC blocking cap is required. If the
RF filter has DC blocking characteristics (such as a
ceramic dielectric filter), then only one DC blocking cap
would be needed to separate the DC of the RX and TX.
These are RF signals and care should be taken to run
the signal keeping them physically short. Because of
the 50Ω/high impedance nature of these two signals,
they may be connected together into a single 50Ω
device (such as a filter). An external LNA or PA may be
used, if desired, but an external RX/TX switch may be
required.
The quad tank of the discriminator may be imple-
mented with ceramic discriminator available from a
couple of sources. This design works well for wideband
applications where temperature range is limited. The
temperature coefficient of ceramic discriminators may
be in the order of +50ppm/°C. The alternative to the
ceramic discriminator is the LC tank, which provides a
broadband discriminator more useful for high data
rates.
The VCO is a very sensitive block in the system. RF
signals feeding back into the VCO (either radiated or
coupled by traces) may cause the PLL to become
unlocked. The trace(s) for the anode of the tuning var-
actor should also be kept short. The layout of the reso-
nator and varactor are very important. The capacitor
and varactor should be close to the RF2945 pins, and
Rev A10 000919
11-223
RF2945
PLL Synthesizer
The RF2945 evaluation board uses an LMX2316 PLL
IC from National Semiconductor. This PLL IC may be
programmed from the software available from National
Semiconductor (codeloader at www.national.com/
appinfo/wireless/). An external reference oscillator is
required for the PLL IC allowing for the evaluation of
different reference frequencies or step sizes. The
National Semiconductor software also has a calculator
for determining the R and C component values for a
given loop bandwidth.
The RF2945 is controlled by RX ENABL and TX
ENABL which are decoded to put the RF2945 into one
of four states. It may be put into a PLL-only mode with
TX ENABL and RX ENABL both high. This condition is
used to provide time for the synthesizer to turn on and
obtain lock before turning on the receiver or transmit-
ter. Note that LVL ADJ needs to be held low for PLL-
only mode. Sometimes, it is desirable to ramp up the
power amplifier to minimize load pulling on the VCO.
To do this with the RF2945, first put the RF2945 into
PLL mode by putting TX ENABL and RX ENABL high.
Then, ramp up LVL ADJ to turn on the transmitter and
PA. The rate at which LVL ADJ is allowed to ramp up is
dependent on the PLL loop bandwidth. VCC pushing
also affects the VCO frequency. A good low pass filter
on VCC will minimize the VCC pushing effects.
For applications requiring fast switching speeds or
turn-on times, and low data rate loop filter bandwidths,
the LMX2316 may be configured to drive the loop filter
in a fast switching mode. Please refer to literature on
the LMX2316 for more information.
11
11-224
Rev A10 000919
RF2945
Pin Out
32
31
30
29
28
27
26
25
TX ENABL
TX OUT
GND2
RESNTR+
MOD IN
DATA REF
DEMOD IN
GND6
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
RX IN
GND1
LNA OUT
GND3
IF2 BP-
IF2 BP+
IF2 IN
MIX IN
9
10
11
12
13
14
15
16
11
Rev A10 000919
11-225
RF2945
Application Schematic - 915 MHz
VCC
VCC
10 k
Ω
PLL
IC
10
Ω
10 Ω
10 nF
22 pF
10 nF
22 pF
4.7
nF
330
pF
33 pF
TBD
10 k
Ω
100
Ω
30 k
Ω
VCC
DATA OUT
8.2
nH
LVL ADJ
2
pF
RX ENABL
100 Ω
32
31
30
29
28
27
26
25
D1
SMV1233-
011
22 pF
10 nF
8.2
nH
Control
Logic
TX ENABL
1
24
Gain
Control
100 pF
100 pF
PA
2
3
4
5
6
7
8
23
22
21
20
19
18
17
MOD IN
915 MHz SAW
TBD
1.5 k
Ω
LNA
VCC
FM Disc.
10 nF
10 nH
22 pF
10
Ω
10 nF
10 nF
Linear
RSSI
10 nF
10 pF
9
10
11
12
13
10 nF
14
15
16
10 nF
Filter
VCC
8.2 uH
22 pF
RSSI
10
Ω
11 pF
Filter
10 nF
51 k
Ω
10 pF
11
11-226
Rev A10 000919
RF2945
Application Schematic - 915 MHz
IF=25MHz, BW=2MHz
VCC2
R4
C81
4.7 uF
C18
0.1 uF
C17
22 pF
100
Ω
VPLL
R11
10
C33
C32
Ω
0.1 uF
22 pF
P6
DB9
VPLL/VCC2
L3
8.2 nH
L2
8.2 nH
R13
30 kΩ
R2
10
1
FLo
Vp 16
+
+
C29
4.7 uF
C82
4.7 uF
C3
0.1 uF
C4
22 pF
Ω
R12*
100
C16
D1
CPo VCC2
2
3
4
5
6
7
8
15
C48
4.7 nF
Ω
2 pF SMV1233-011
R1
10
GND Fo/LD 14
C2
0.1 uF
C1
22 pF
Ω
R14
C47
330 pF
10 k
Ω
GND
fINb
fIN
LE 13
DATA OUT
LVL ADJ
L7*
TBD
C50
22 pF
Data
12
Clock 11
CE 10
C41
100 pF
RX ENABL
R29
R26
32
31
30
29
28
27
26
25
12 k
Ω
R60
27 k
Ω
0
Ω
VPLL
C44
22 pF
VCC1
VPLL
R28
C43
0.1 uF
Control
Logic
12 k
R25
Ω
TX ENABL
1
24
OSCin GND
LMX2316
9
Gain
Control
C34
1 nF
C6
22 pF
27 k
Ω
50
Ω µstrip
PA
J4
MOD IN
2
3
4
5
6
7
8
23
22
21
20
19
18
R27
12 k
L1
8.2 nH
R80
Ω
0
Ω
50 Ω µstrip
R30
J2
RF
C7
22 pF
51
Ω
R24
27 k
C19
2.2 nF
C9
4 pF
C8
4 pF
C30*
4 pF
Ω
50
Ω
µstrip
L4
10 nH
LNA
C51*
4-22 pF
L8
680 nH
C31
39 pF
R7
10
J5
REF OSC
Linear
RSSI
Ω
C20
10 nF
C21
10 pF
R6*
N/C
C23
0.1 uF
C22
22 pF
P2
1
P3
1
C15
10 nF
17
P2-1
LVL ADJ
GND
P3-1
P3-1
TX ENABL
GND
C14
10 nF
P1
1
P1-1
VCC1
GND
2
3
2
9
10
11
12
13
14
15
16
2
N/C
3
RX ENABL
C10
10 nF
C12
10 nF
C13
10 nF
C54
C56
C52
10 pF
CON2
CON3
CON3
10 pF
3 pF
L5
680 nH
VCC
C53
47 pF
L10
680 nH
C59
47 pF
L9
680 nH
P4
1
P7
1
P8
1
R9
+
C5
4.7 uF
C26
0.1 uF
C25
22 pF
10
Ω
P4-1
RSSI
GND
P7-1
P7-3
VCC2
GND
P8-1
RX OUT
GND
C57
100 pF
2
2
2
RSS
I
CON2
CON2
3
VPLL
C27
39 pF
C24
5 pF
C55
39 pF
L11
680 nH
R3
51 k
C11
10 pF
Ω
CON3
11
Rev A10 000919
11-227
RF2945
Evaluation Board Schematic - 915MHz
(Download Bill of Materials from www.rfmd.com.)
R2
10
VCC
Ω
C3
C4
0.1 uF
22 pF
R13
1.2k
R1
VPLL
Ω
10
Ω
PLL LOOP BW ~5 kHz
1
2
3
4
5
6
7
8
FLD
CPD
GND
GND
fNb
Vp 16
Vcc2 15
FD/LD 14
LE 13
C2
0.1 uF
C1
22 pF
R12
100
C42 0.1 uF
R14
Ω
C32
C33
C49
TBD
22 pF 0.1 uF
C47
6.8nF
10 k
Ω
J1
RX OUT
R4
100
VCC
C81 4.7 uF
C18 0.1 uF
Ω
C50
22 pF
LMX2316
C41
100 pF
LVL ADJ
L3
P2-1
P3-3
RX ENABL
8.2 nH
DATA 12
CLK 11
CE 10
C17 22 pF
D1
SMV1233
-011
C16
2 pF
32
31
30
29
28
27
26
25
fIN
R60
L7*
TBD
L2
0
Ω
Vcc1
OSCin
Control
Logic
8.2 nH
TX ENABL
R87*
P3-2
1
2
3
4
5
6
7
8
24
C58*
10 nF
Gain
Control
C6
22 pF
0
Ω
GND
9
J4
23
PA
VPLL
C34
1 nF
L1
8.2 nH
MOD IN
R80
C19
2.2 nF
R88
0
Ω
50 Ω µstrip
0
Ω
J2
RF
22
21
20
19
18
U4
CDF
107B-
A0-001
10.7 MHz
C9
5 pF
C8
5 pF
C30*
5 pF
L8 C31 R5*
C51*
CAPVAR
4.7
uH
39
pF
4.3
C43
.01 uF 22 pF
C44
J5
kΩ
REF OSC
C7
22 pF
R30
51
LNA
C20
10 nF
P6
DB9
C15
10 nF
L4
12 nH
Ω
R27
R7
10
VCC
Linear
RSSI
12 k
Ω
Ω
R28
12 k
R6*
N/C
C23
0.1
C22
22 pF
C14
10 nF
Ω
µ
f
17
R29
12 k
BW=400 kHz
10.7 MHz
Ω
C21
10 pF
F2
SFE10.7MA21
R86
R85
R24
27 k
R25
27 k
R26
27 kΩ
9
10
C10
10nF
11
12
13
14
C12
15
16
0
Ω
0 Ω
Ω
Ω
L5
6.8 uH
C13
10nF 10nF
C54*
100 pF
C52*
100 pF
VCC1
R9
10
C26
0.1 uF
C25
22 pF
C24
11 pF
RSSI
C11
10 pF
R8
R83
0 Ω
Ω
8.2 k
Ω
R3
51 k
P1
1
C53*
330 pF
L10*
680 nH
R81*
560 Ω
Ω
C55*
100 pF
R84
0 Ω
P1-1
P1-3
VCC (RF2945)
GND
F1
SFE10.7MA21
2
2945400B
P3
1
C27*
10 nF
3
VPLL (LMX2315)
C57*
100 pF
R82*
560
L11*
C56*
680 nH 330 pF
GND
TX ENABL
Ω
P3-2
2
P2
1
L6*
2.2 uH
C28*
120 pF
P3-3
P3-4
P3-5
3
RX ENABL P2-1
NC
LVL ADJ
P4
1
2
GND
NC
P4-1
RSSI
GND
J3
MIX OUT
4
* Denotes components that are normally depopulated.
NC
P2-3
3
2
5
11
11-228
Rev A10 000919
RF2945
Evaluation Board Schematic - 433MHz
R13
4.7 kΩ
VPLL
VC
C
C2
0.1
C 3
VC
C
R1
10
R2
10
µF
0.1
µ
F
PLL LO O P BW ~5 kHz
Ω
Ω
1
2
3
4
5
6
7
8
FLD
Vp 16
R12*
100
C 47
2.2 nF
C 42 33 nF
R14
Ω
C1
C4
C32
Vcc2 15
C33
0.1 uF
CPD
G N D
G N D
fNb
22 pF 22 pF
C49
220 pF
22 pF
20 kΩ
FD /LD 14
J1
RX O UT
VC
C
C81 4.7 uF
Ω
R4 100
C 50
100 pF
LM X2316
LE 13
LVL ADJ
L3
12 nH
P2-1
C18 0.1 uF
C 17 100 pF
C41
100pF
DATA 12
CLK 11
CE 10
RX ENABL
P3-3
D1
S M V12 35
-011
C 16
10 pF
32
31
30
29
28
27
26
25
fIN
R 60
TX ENABL
L7*
TBD
L2
12 nH
0
Ω
P3-2
Vcc1
O SC in
Control
Logic
R 87*
C58*
1
2
3
4
5
6
7
8
24
C6
100 pF
G ain
Control
0
Ω
10 nF
L1
22 nH
L9
22 nH
G ND
9
J4
23
PA
VPLL
C34
1nF
M O D IN
C19
2.2 nF
J2
RF
R 88
0
Ω
C9
pF
C8
15 pF
C30
8 pF
U4
22
21
20
19
18
17
C7
100 pF
8
C DF
107B-
A 0-001
10.7
L8
4.7
uH
C31
39
pF
R5*
4.3
kΩ
C51*
3-10 pF
C43
.01 uF
C44
22 pF
J5
M Hz
REF O SC
R30
51
LNA
C20
10 nF
P6
D B9
C15
L4
47 nH
Ω
10 nF
R 27
kΩ
Linear
RSSI
12
R 28
12
VC
R7
10
R6*
N/C
C14
k
Ω
C
Ω
10 nF
R29
12
C22
100 pF
C23
0.1
B W =400 kH z
10.7 M H z
C21
33 pF
k
Ω
µ
F
F2
SFE10.7 M A21
R86
0
R85
R24
27
R25
27
R26
9
10
C10
11
12
13
14
15
16
Ω
0 Ω
k
Ω
k
Ω
27
k
Ω
L5
6.8 uH
R9
10
C12
C13
Ω
10 nF
10 nF
10nF
C54*
100 pF
C 52*
100 pF
VC C1
C 26
0.1 uF
C25
100 pF
C24
12 pF
RSSI
C 11
10 pF
R8
R 83
8.2
k
Ω
0
Ω
R3
51
P1
1
C53*
330 pF
L10*
680 nH
R81*
560 Ω
k
Ω
C55*
100 pF
R84
0 Ω
P1-1
P1-3
VC C (RF2945)
G ND
F1
SFE10.7M A 21
2
2945401-
P3
1
C27*
10 nF
3
VP LL (LM X2315)
C57*
100 pF
R82*
560
L11*
680 nH 330 pF
C56*
G ND
TX ENABL
Ω
2
P3-2
P2
1
L6*
2.2 uH
C28*
120 pF
P3-3
P3-4
P3-5
3
RX ENABL
P2-1
P2-3
LVL AD J
P4
1
4
NC
NC
2
G ND
NC
P4-1
RSSI
G ND
J3
M IX O UT
*
Denotes com ponents that are norm ally depopulated.
3
2
5
11
Rev A10 000919
11-229
RF2945
Evaluation Board Schematic - 868MHz
R2
10
VCC
Ω
C3
C4
0.1 uF
47 pF
VPLL
R13
R1
30 k
Ω
R11
10
10
Ω
PLL LOOP BW ~5 kHz
Ω
1
2
3
4
5
6
7
8
FL0
Vp 16
C2
0.1 uF
C1
47 pF
R12
100
C48 4.7 nF
R14
Ω
C32
47 pF 0.1 uF
C33
CP0
VCC2 15
C49*
TBD
C47
330 pF
10 k
Ω
GND
GND
fINb
F
0/LD 14
LE 13
J1
RX OUT
R4
100
VCC
C81 4.7 uF
C18 0.1 uF
Ω
C50
47 pF
LMX2316
LVL ADJ
L3
8.2 nH
P2-1
P3-3
RX ENABL
DATA 12
CLK 11
CE 10
C17 47 pF
C41
47 pF
D1
SMV1233
-011
C16
3 pF
32
31
30
29
28
27
26
25
fIN
R60
TX ENABL
P3-2
L7*
TBD
L2
8.2 nH
0
Ω
VCC1
OSCin
Control
Logic
R87*
1
2
3
4
5
6
7
8
24
C58*
10 nF
Gain
Control
C6
47 pF
0
Ω
GND
9
J4
23
PA
VPLL
C34
1 nF
L1
8.2 nH
MOD IN
R80
C19
2.2 nF
R88
0
Ω
50 Ω µstrip
0
Ω
J2
RF
22
21
20
19
18
U4
CDF
107B-
C9
5 pF
C8
5 pF
C30*
5 pF
L8 C31 R5*
C51*
CAPVAR
4.7
uH
39
pF
4.3
k
C43
C44
.01 uF 47 pF
A0-001
10.7 MHz
J5
Ω
REF OSC
C7
47 pF
R30
51
LNA
C20
10 nF
P6
DB9
C15
10 nF
L4
12 nH
Ω
R27
R7
10
VCC
Linear
RSSI
12 k
Ω
Ω
R28
12 k
R6*
N/C
C23
0.1
C22
47 pF
C14
10 nF
Ω
µ
f
17
R29
12 k
BW=400 kHz
10.7 MHz
Ω
C21
9 pF
F2
SFE10.7MA21
R86
R85
0 Ω
R24
27 k
R25
R26
27 kΩ
9
10
C10
10 nF
11
12
13
C12
10 nF
14
15
16
0
Ω
Ω
27 k
Ω
L5
8.2 uH
C13
10 nF
C54*
C52*
VCC1
100 pF
100 pF
R9
10
C26
0.1 uF
C25
47 pF
C24
12 pF
RSSI
C11
10 pF
R8
8.2 k
R83
0 Ω
Ω
Ω
R3
51 k
P1
1
C53*
330 pF
L10*
680 nH
R81*
560 Ω
Ω
C55*
100 pF
R84
0 Ω
P1-1
P1-3
V
CC (RF2945)
F1
SFE10.7MA21
2
GND
2945402-
P3
1
C27*
10 nF
3
V
PLL (LMX2315)
C57*
100 pF
R82*
560
L11*
680 nH 330 pF
C56*
GND
TX ENABL
Ω
P3-2
2
P2
1
L6*
2.2 uH
C28*
120 pF
P3-3
P3-4
P3-5
3
RX ENABL P2-1
NC
LVL ADJ
GND
P4
1
J3
MIX OUT
4
2
P4-1
RSSI
GND
* Denotes components that are normally depopulated.
NC
P2-3
3
NC
2
5
11
11-230
Rev A10 000919
RF2945
Evaluation Board Layout - 915MHz
Board Size 3.050” x 3.050”
Board Thickness 0.031”, Board Material FR-4
11
Rev A10 000919
11-231
RF2945
11
11-232
Rev A10 000919
RF2945
Evaluation Board Layout - 433MHz
11
Rev A10 000919
11-233
RF2945
11
11-234
Rev A10 000919
RF2945
Evaluation Board Layout - 868MHz
11
Rev A10 000919
11-235
RF2945
11
11-236
Rev A10 000919
RF2945
RSSI Output versus Temperature
CC = 2.4 V, 915 MHz
POUT versus Level Control and VCC
915 MHz and Temperature = 25°C
V
2.5
2.0
1.5
1.0
0.5
0.0
10.0
0.0
-40C
10C
25C
40C
85C
-10.0
-20.0
-30.0
Vcc=2.4V
Vcc=2.7V
Vcc=3.0V
Vcc=3.3V
Vcc=3.6V
Vcc=3.9V
Vcc=4.2V
Vcc=4.5V
Vcc=4.8V
-130.0
-110.0
-90.0
-70.0
-50.0
-30.0
-10.0
10.0
0.0
1.0
2.0
3.0
4.0
5.0
Received Signal Strength (dBm)
Level Control (V)
TX Power Output and ICC versus Level Adjust
at 433MHz, 3.6V VCC
TX Power Output and ICC versus Level Adjust
at 868MHz, 3.6V VCC
10.0
5.0
30.0
25.0
20.0
15.0
10.0
5.0
5.0
0.0
30.0
25.0
20.0
15.0
10.0
5.0
Pout(433)
Icc(433)
Pout(868)
Icc(868)
0.0
-5.0
-5.0
-10.0
-15.0
-20.0
-10.0
-15.0
11
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
LVL ADJ (V)
LVL ADJ (V)
TX Power Output and ICC versus Level Adjust
at 905MHz, 3.6V VCC
Receive Current versus VCC
(Excluding PLL IC)
5.0
0.0
30.0
25.0
20.0
15.0
10.0
5.0
9.0
8.0
7.0
6.0
5.0
4.0
Icc (433)
Icc (868)
Icc (905)
Pout(905)
Icc(905)
-5.0
-10.0
-15.0
-20.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
LVL ADJ (V)
Supply Voltage (V)
Rev A10 000919
11-237
RF2945
11
11-238
Rev A10 000919
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| RF2948BPCBA | RFMD | 2.4GHz SPREAD-SPECTRUM TRANSCEIVER | 获取价格 |
|
| RF2948BTR13 | RFMD | 2.4GHz SPREAD-SPECTRUM TRANSCEIVER | 获取价格 |
|
| RF2958 | RFMD | 2.4GHz SPREAD-SPECTRUM TRANSCEIVER | 获取价格 |
|
| RF2958PCBA | RFMD | 2.4GHz SPREAD-SPECTRUM TRANSCEIVER | 获取价格 |
|
| RF2958TR13 | RFMD | 2.4GHz SPREAD-SPECTRUM TRANSCEIVER | 获取价格 |
|
| RF2968 | RFMD | BLUETOOTHTM TRANSCEIVER | 获取价格 |
|
| RF299D0050 | ADAM-TECH | RF CONNECTORS | 获取价格 |
|
| RF299D0075 | ADAM-TECH | RF CONNECTORS | 获取价格 |
|
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