RF5111_1 [RFMD]

3V DCS POWER AMPLIFIER; 3V DCS功率放大器
RF5111_1
型号: RF5111_1
厂家: RF MICRO DEVICES    RF MICRO DEVICES
描述:

3V DCS POWER AMPLIFIER
3V DCS功率放大器

放大器 功率放大器 分布式控制系统 DCS
文件: 总14页 (文件大小:312K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
RF5111  
3V DCS POWER AMPLIFIER  
RoHS Compliant & Pb-Free Product  
Package Style: QFN, 16-Pin, 3 x 3  
Features  
„ Single 2.7V to 4.8V Supply Volt-  
16  
15  
14  
13  
age  
VAT EN  
RF IN  
1
2
3
4
12 RF OUT  
11 RF OUT  
10 RF OUT  
„ +33dBm Output Power at 3.5V  
„ 27dB Gain with Analog Gain Con-  
trol  
GND1  
VCC1  
„ 50% Efficiency  
„ 1700MHz to 1950MHz Opera-  
tion  
9
NC  
5
6
7
8
„ Supports DCS1800 and  
PCS1900  
Applications  
„ 3V DCS1800 (PCN) Cellular  
Handsets  
Functional Block Diagram  
Product Description  
„ 3V DCS1900 (PCS) Cellular  
Handsets  
The RF5111 is a high-power, high-efficiency power amplifier module offering high  
performance in GSM or GPRS applications. The device is manufactured on an  
advanced GaAs HBT process, and has been designed for use as the final RF ampli-  
fier in DCS1800/1900 handheld digital cellular equipment and other applications  
in the 1700MHz to 2000MHz band. On-board power control provides over 65dB of  
control range with an analog voltage input, and provides power down with a logic  
“low” for standby operation. The device is self-contained with 50Ω input and the  
output can be easily matched to obtain optimum power and efficiency characteris-  
tics. The RF5111 can be used together with the RF5110 for dual-band operation.  
The device is packaged in an ultra-small plastic package, minimizing the required  
board space.  
„ 3V Dual-Band/Triple-Band Hand-  
sets  
„ Commercial and Consumer Sys-  
tems  
„ Portable Battery-Powered Equip-  
ment  
„ GPRS Compatible  
Ordering Information  
RF5111  
3V DCS Power Amplifier  
RF5111PCBA-41X Fully Assembled Evaluation Board  
Optimum Technology Matching® Applied  
GaAs HBT  
GaAs MESFET  
InGaP HBT  
SiGe BiCMOS  
Si BiCMOS  
SiGe HBT  
GaAs pHEMT  
Si CMOS  
Si BJT  
GaN HEMT  
9
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trade-  
mark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
Rev A1 DS060921  
1 of 14  
RF5111  
Absolute Maximum Ratings  
Caution! ESD sensitive device.  
Parameter  
Rating  
Unit  
Exceeding any one or a combination of the Absolute Maximum Rating conditions may  
cause permanent damage to the device. Extended application of Absolute Maximum  
Rating conditions to the device may reduce device reliability. Specified typical perfor-  
mance or functional operation of the device under Absolute Maximum Rating condi-  
tions is not implied.  
Supply Voltage  
-0.5 to +6.0  
-0.5 to +3.0  
-0.5 to +3.0  
V
DC  
Power Control Voltage (V  
)
V
APC  
Enable Voltage (V  
)
V
AT_EN  
RoHS status based on EUDirective2002/95/EC (at time of this document revision).  
DC Supply Current  
Input RF Power  
1500  
+13  
mA  
dBm  
%
The information in this publication is believed to be accurate and reliable. However, no  
responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any  
infringement of patents, or other rights of third parties, resulting from its use. No  
license is granted by implication or otherwise under any patent or patent rights of  
RFMD. RFMD reserves the right to change component circuitry, recommended appli-  
cation circuitry and specifications at any time without prior notice.  
Duty Cycle at Max Power  
Output Load VSWR  
50  
10:1  
Operating Case Temperature  
Storage Temperature  
-40 to +85  
-55 to +150  
°C  
°C  
Specification  
Parameter  
Unit  
Condition  
Min.  
Typ.  
Max.  
Temp=25 °C, V =3.6V, V  
=2.8V,  
CC  
APC1,2  
V
=0V, P =+5.5dBm,  
IN  
AT_EN  
Overall  
Freq=1710MHz to 1910MHz,  
37.5% Duty Cycle, pulse width=1731μs  
See application schematic for tuning details.  
A different tuning is required.  
Operating Frequency Range  
1710 to 1785  
1850 to 1910  
1700 to 2000  
+33  
MHz  
MHz  
MHz  
dBm  
Usable Frequency Range  
Maximum Output Power  
+32.3  
+32  
Temp=+25°C, V =3.6V, V  
=2.8V  
=2.8V  
=2.8V  
CC  
APC1,2  
APC1,2  
APC1,2  
+32.8  
+32.5  
49  
dBm  
dBm  
%
Temp=+25°C, V =3.3V, V  
CC  
+30.4  
43  
Temp=+60°C, V =3.3V, V  
CC  
Total Efficiency  
At P  
, V =3.6V  
OUT,MAX CC  
15  
%
P
P
=+20dBm  
=+10dBm  
OUT  
OUT  
10  
%
Recommended Input Power Range  
Output Noise Power  
+5.5  
+8.0  
+10.0  
-79  
dBm  
dBm  
RBW=100kHz, 1805MHz to 1880MHz and  
1930MHz to 1990MHz,  
P
<P  
<P  
,
OUT,MIN  
OUT  
OUT,MAX  
P
<P <P , V =3.0V to 5.0V  
IN,MAX CC  
IN,MIN  
IN  
Forward Isolation  
Second Harmonic  
Third Harmonic  
-37  
-20  
-20  
-25  
-7  
dBm  
dBm  
dBm  
V
=0.3V, P =+10dBm  
APC1,2 IN  
P
<+32.3dBm; P =+10dBm  
IN  
OUT  
-7  
P
=+10dBm  
IN  
All Other Non-Harmonic Spurious  
Input Impedance  
-36  
dBm  
50  
Ω
Input VSWR  
2.5:1  
3:1  
P
P
-5dB<P  
<P  
OUT OUT,MAX  
OUT,MAX  
<P  
-5dB  
OUT,MAX  
OUT  
Output Load VSWR  
Stability  
8:1  
Spurious<-36dBm, V =0.3V to 2.6V,  
APC1,2  
RBW=100kHz  
Ruggedness  
10:1  
No damage  
Output Load Impedance  
4.5-j3.9  
Ω
Load Impedance presented at RF OUT pin  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
2 of 14  
Rev A1 DS060921  
RF5111  
Specification  
Typ.  
Parameter  
Unit  
Condition  
Min.  
Max.  
Power Control  
Power Control “ON”  
Power Control “OFF”  
Power Control Range  
3.0  
V
V
Maximum P  
, Voltage supplied to the input  
OUT  
0.3  
62  
0.5  
68  
Minimum P  
, Voltage supplied to the input  
OUT  
dB  
V
=0.3V to 2.8V, V  
=2.7V,  
AT_EN  
APC1,2  
P
=+8dBm  
IN  
Gain Control Slope  
100  
4.5  
dB/V  
P
=-10dBm to +33dBm  
OUT  
APC Input Capacitance  
APC Input Current  
10  
5
pF  
DC to 2MHz  
mA  
V
=2.8V  
=0V  
APC1,2  
10  
μA  
V
APC1,2  
Turn On/Off Time  
Power Supply  
100  
ns  
Power Supply Voltage  
3.5  
1.3  
V
V
Specifications  
2.7  
5
4.8  
5.5  
Nominal operating limits, P  
<+33dBm  
OUT  
V
With maximum output load VSWR 6:1,  
<+33dBm  
P
OUT  
Power Supply Current  
A
DC Current at P  
OUT,MAX  
295  
10  
mA  
μA  
μA  
Idle Current, P <-30dBm, V  
=2.6V  
IN  
APC  
1
1
P
P
<-30dBm, V  
=0.2V  
IN  
IN  
APC1,2  
APC1,2  
10  
<-30dBm, V  
=0.2V, Temp=+85°C  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
Rev A1 DS060921  
3 of 14  
RF5111  
Pin  
1
Function  
VAT EN  
Description  
Interface Schematic  
Control pin for the pin diode. The purpose of the pin diode is to attenuate  
RF drive level when V  
is low. This serves to reduce RF leakage through  
APC  
the device caused by self-biasing under high RF drive levels. A good input  
match is maintained when the input stage bias is turned off by the same  
mechanism. When this pin is set high, pin diode attenuation control is  
turned on. (See Theory of Operation for details.)  
RF Input. This is a 50Ω input, but the actual impedance depends on the  
interstage matching network connected to pin 5. An external DC blocking  
capacitor is required if this port is connected to a DC path to ground or a  
DC voltage.  
2
RF IN  
VCC1  
RF IN  
PIN  
GND  
1
From Attn  
From Bias  
control circuit Stages  
Ground connection for the preamplifier stage. For best performance, keep See pin 2.  
traces physically short and connect immediately to the ground plane. It is  
important for stability that this pin has it’s own vias to the groundplane, to  
minimize any common inductance.  
3
4
5
GND1  
VCC1  
APC1  
Power supply for the preamplifier stage and interstage matching. This pin See pin 2.  
forms the shunt inductance needed for proper tuning of the interstage  
match. Refer to the application schematic for proper configuration, and  
note that position and value of the components are important.  
Power Control for the driver stage and preamplifier. When this pin is “low”,  
APC VCC  
all circuits are shut off. A “low” is typically 0.5V or less at room tempera-  
ture. A shunt bypass capacitor is required. During normal operation this pin  
is the power control. Control range varies from approximately 1.0V for -  
10dBm to 2.6V for +33dBm RF output power. The maximum power achiev-  
able depends on the actual output matching; see the application informa-  
tion for more details. The maximum current into this pin is 5mA when  
To RF  
Stages  
V
=2.6V, and 0mA when V  
=0V.  
APC1  
APC  
GND  
GND  
Power control for the output stage. See pin 6 for more details.  
Power supply for the bias circuits.  
Not connected.  
See pin 6.  
See pin 6.  
6
7
8
APC2  
VCC  
NC  
Not connected.  
9
NC  
RF output and power supply for the output stage. Bias voltage for the final  
stage is provided through this wide output pin. An external matching net-  
work is required to provide the optimum load impedance.  
10  
RF OUT  
RF OUT  
GND  
From Bias  
Stages  
PCKG BASE  
Same as pin 10.  
Same as pin 10.  
Same as pin 10.  
Same as pin 10.  
11  
12  
13  
RF OUT  
RF OUT  
2F0  
Connection for the second harmonic trap. This pin is internally connected Same as pin 10.  
to the RF OUT pins. The bonding wire together with an external capacitor  
form a series resonator that should be tuned to the second harmonic fre-  
quency in order to increase efficiency and reduce spurious outputs.  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
4 of 14  
Rev A1 DS060921  
RF5111  
Pin  
14  
Function  
VCC2  
Description  
Interface Schematic  
Power supply for the driver stage. This pin forms the shunt inductance  
needed for proper tuning of the second interstage match.  
VCC2  
From Bias  
Stages  
GND2  
Same as pin 14.  
Same as pin 14.  
Same as pin 14.  
Same as pin 14.  
15  
16  
Pkg  
Base  
VCC2  
VCC2  
GND  
Ground connection for the output stage. This pad should be connected to  
the groundplane by vias directly under the device. A short path is required  
to obtain optimum performance, as well as to provide a good thermal path  
to the PCB for maximum heat dissipation.  
Package Drawing  
0.15 C  
2 PLCS  
A
0.05 C  
-A-  
1.00  
0.85  
3.00 SQ.  
0.05  
0.01  
1.50 TYP  
0.80  
0.65  
2 PLCS  
0.15 C B  
12°  
MAX  
2 PLCS  
0.15 C B  
-B-  
1.37 TYP  
SEATING  
PLANE  
-C-  
Dimensions in mm.  
2.75 SQ.  
2 PLCS  
0.15 C  
A
B
C A  
0.10  
M
0.60  
0.24  
TYP  
0.30  
0.18  
Shaded lead is pin 1.  
0.45  
0.00  
4 PLCS  
1.65  
1.35  
SQ.  
0.23  
0.13  
4 PLCS  
0.55  
0.30  
0.50  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
Rev A1 DS060921  
5 of 14  
RF5111  
Theory of Operation and Application Information  
The RF5111 is a three-stage device with 28 dB gain at full power. Therefore, the drive required to fully saturate the output is  
+5dBm. Based upon HBT (Heterojunction Bipolar Transistor) technology, the part requires only a single positive 3V supply to  
operate to full specification. Power control is provided through a single pin interface, with a separate Power Down control pin.  
The final stage ground is achieved through the large pad in the middle of the backside of the package. First and second stage  
grounds are brought out through separate ground pins for isolation from the output. These grounds should be connected  
directly with vias to the PCB ground plane, and not connected with the output ground to form a so called “local ground plane”  
on the top layer of the PCB. The output is brought out through the wide output pad, and forms the RF output signal path.  
The amplifier operates in near Class C bias mode. The final stage is “deep AB”, meaning the quiescent current is very low. As  
the RF drive is increased, the final stage self-biases, causing the bias point to shift up and, at full power, draws about 1500mA.  
The optimum load for the output stage is approximately 4.5Ω. This is the load at the output collector, and is created by the  
series inductance formed by the output bond wires, vias, and microstrip, and 2 shunt capacitors external to the part. The opti-  
mum load impedance at the RF Output pad is 4.5-j3.9Ω. With this match, a 50Ω terminal impedance is achieved. The input is  
internally matched to 50Ω with just a blocking capacitor needed. This data sheet defines the configuration for GSM operation.  
The input is DC coupled; thus, a blocking cap must be inserted in series. Also, the first stage bias may be adjusted by a resis-  
tive divider with high value resistors on this pin to VPC and ground. For nominal operation, however, no external adjustment is  
necessary as internal resistors set the bias point optimally.  
When the device is driven at maximum input power self biasing would occur. This results in less isolation than one would  
expect, and the maximum output power would be about -15dBm. If the drive power to the PA is turned on before the GSM  
ramp-up, higher isolation is required. In order to meet the GSM system specs under those conditions, a PIN diode attenuator  
connected to the input can be turned on. The figure below shows how the attenuator and its controls are connected.  
VCC  
RF IN  
PIN  
From Bia  
750 Ω  
5 kΩ  
500 Ω  
Stages  
APC  
2 kΩ  
AT_EN  
The current through the PIN diode is controlled by two signals: AT_EN and APC. The AT_EN signal allows current through the PIN  
diode and is an on/off function. The APC signal controls the amount of current through the PIN diode. Normally, the AT_EN sig-  
nal will be derived from the VCO ENABLE signal available in most GSM handset designs. If maximum isolation is needed before  
the ramp-up, the AT_EN signal needs to be turned on before the RF power is applied to the device input. The current into this  
pin is not critical, and can be reduced to a few hundred micro amps with an external series resistor. Without the resistor, the  
pin will draw about 700μA.  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
6 of 14  
Rev A1 DS060921  
RF5111  
Because of the inverting stage at the APC input, the current through the PIN diode is inverted from the APC voltage. Thus, when  
VAPC is high for maximum output power, the attenuator is turned off to obtain maximum drive level for the first RF stage. When  
VAPC is low for maximum isolation, the attenuator is be turned on to reduce the drive level and to avoid self-biasing.  
The PIN diode is dimensioned such that a low VAPC the impedance of the diode is about 50 Ohm. Since the input impedance  
of the first RF stage become very high when the bias is turned off, this topology will maintain a good input impedance over the  
entire VAPC control range.  
VCC1 and VCC2 provide supply voltage to the first and second stage, as well as provides some frequency selectivity to tune to  
the operating band. Essentially, the bias is fed to this pin through a short microstrip. A bypass capacitor sets the inductance  
seen by the part, so placement of the bypass cap can affect the frequency of the gain peak. This supply should be bypassed  
individually with 100pF capacitors before being combined with VCC for the output stage to prevent feedback and oscillations.  
The RF OUT pin provides the output power. Bias for the final stage is fed to this output line, and the feed must be capable of  
supporting the approximately 1.5A of current required. Care should be taken to keep the losses low in the bias feed and output  
components. A narrow microstrip line is recommended because DC losses in a bias choke will degrade efficiency and power.  
While the part is safe under CW operation, maximum power and reliability will be achieved under pulsed conditions. The data  
shown in this data sheet is based on a 12.5% duty cycle and a 600μs pulse, unless specified otherwise.  
The part will operate over a 3.0V to 5.0V range. Under nominal conditions, the power at 3.5V will be greater than +32dBm at  
+85°C. As the voltage is increased, however, the output power will increase. Thus, in a system design, the ALC (Automatic  
Level Control) Loop will back down the power to the desired level. This must occur during operation, or the device may be dam-  
aged from too much power dissipation. At 5.0V, over +36dBm may be produced; however, this level of power is not recom-  
mended, and can cause damage to the device.  
The HBT breakdown voltage is >20V, so there is no issue with overvoltage. However, under worst-case conditions, with the RF  
drive at full power during transmit, and the output VSWR extremely high, a low load impedance at the collector of the output  
transistors can cause currents much higher than normal. Due to the bipolar nature of the devices, there is no limitation on the  
amount of current the device will sink, and the safe current densities could be exceeded.  
High current conditions are potentially dangerous to any RF device. High currents lead to high channel temperatures and may  
force early failures. The RF5111 includes temperature compensation circuits in the bias network to stabilize the RF transistors,  
thus limiting the current through the amplifier and protecting the devices from damage. The same mechanism works to com-  
pensate the currents due to ambient temperature variations.  
To avoid excessively high currents it is important to control the VAPC when operating at supply voltages higher than 4.0V, such  
that the maximum output power is not exceeded.  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
Rev A1 DS060921  
7 of 14  
RF5111  
Application Schematic  
Instead of a stripline,  
an inductor of ~6 nH  
can be used  
VCC  
12 pF  
Very close to  
VCC  
1 nF  
pin 15/16  
15 pF  
Instead of a stripline, an  
inductor of 2.2 nH can  
be used  
1.0 pF  
16  
15  
14  
13  
12  
Quarter wave  
length  
1
2
3
4
33 pF  
15 pF  
33 pF  
50 Ω μstrip  
RF IN  
11  
10  
RF OUT  
5.1 pF  
Note 1  
1.0 pF  
Note 1  
VCC  
9
Distance between  
edge of device and  
capacitor is 0.080"  
Distance center to  
center of capacitors  
0.220"  
5
6
7
8
Distance between edge of  
device and capacitor is  
0.240" to improve the "off"  
isolation  
VCC  
15 pF  
15 pF  
15 pF  
Notes:  
1. Using a hi-Q capacitor will increase efficiency slightly.  
2. All capacitors are standard 0402 multi layer chip.  
APC  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
8 of 14  
Rev A1 DS060921  
RF5111  
Internal Schematic  
VCC1  
VCC2  
RF OUT  
APC1  
VCC  
APC2  
VCC  
RF IN  
VCC  
500 Ω  
200 Ω  
750 Ω  
500 Ω  
320 Ω  
2.5k Ω  
5k Ω  
3k Ω  
APC1  
AT_EN  
2.5k Ω  
1.5k Ω  
1.5k Ω  
GND1  
PKG BASE  
PKG BASE  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
Rev A1 DS060921  
9 of 14  
RF5111  
Evaluation Board Schematic  
Dual-Band DCS/PCS Lumped Element  
VCC  
P1  
1
C21  
C22  
P1-1  
P1-2  
P1-3  
VAT EN  
VCC  
3.3 uF  
1 nF  
2
3
4
VCC  
C23  
33 pF  
C16  
3.3 uF  
GND  
C20  
1 nF  
GND  
5
L5  
C15  
1 nF  
10 Ω Ferrite  
CON5  
VAT EN  
C18  
1 pF  
C19  
12 pF  
C25  
1 nF  
C24  
1 nF  
16  
15  
14  
13  
C17  
33 pF  
1
2
3
4
12  
11  
10  
9
50 Ω μstrip  
J1  
L3  
8.8 nH  
L4  
1.2 nH  
C14  
33 pF  
RF IN  
C1  
47 pF  
50 Ω μstrip  
J2  
RF OUT  
L2  
1.2 nH  
C10  
5.1 pF  
C11  
2.2 pF  
C12  
2.4 pF  
VCC  
100 mils  
C2  
1 nF  
C3  
1 nF  
C3A  
10 nF  
C4  
27 pF  
5
6
7
8
C9  
10 nF  
C7  
1 nF  
C6  
1 nF  
C8  
33 pF  
50 Ω μstrip  
VCC  
J3  
APC  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
10 of 14  
Rev A1 DS060921  
RF5111  
Evaluation Board Layout  
Board Size 2.0” x 2.0”  
Board Thickness 0.032”, Board Material FR-4, Multi-Layer  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
Rev A1 DS060921  
11 of 14  
RF5111  
Typical Test Setup  
Power Supply  
V- S- S+ V+  
RF Generator  
Spectrum  
Analyzer  
3dB  
10dB/5W  
Buffer  
x1 OpAmp  
Pulse  
Generator  
A buffer amplifier is recommended because the current into the  
APC changes with voltage. As an alternative, the voltage may be  
monitored with an oscilloscope.  
V
Notes about testing the RF5111  
The test setup shown above includes two attenuators. The 3dB pad at the input is to minimize the effects that the switching of  
the input impedance of the PA has on the signal generator. When VAPC is switched quickly, the resulting input impedance  
change can cause the signal generator to vary its output signal, either in output level or in frequency. Instead of an attenuator  
an isolator may also be used. The attenuator at the output is to prevent damage to the spectrum analyzer, and should be able  
to handle the power.  
It is important not to exceed the rated supply current and output power. When testing the device at higher than nominal supply  
voltage, the VAPC should be adjusted to avoid the output power exceeding +36dBm. During load-pull testing at the output it is  
important to monitor the forward power through a directional coupler. The forward power should not exceed +36dBm, and  
VAPC needs to be adjusted accordingly. This simulates the behavior for the power control loop in this respect. To avoid damage,  
it is recommended to set the power supply to limiting the current during the burst, not to exceed the maximum current rating.  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
12 of 14  
Rev A1 DS060921  
RF5111  
PCB Design Requirements  
PCB Surface Finish  
The PCB surface finish used for RFMD’s qualification process is electroless nickel, immersion gold. Typical thickness is 3μinch  
to 8μinch gold over 180μinch nickel.  
PCB Land Pattern Recommendation  
PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested  
for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly pro-  
cesses. The PCB land pattern has been developed to accommodate lead and package tolerances.  
PCB Metal Land Pattern  
A = 0.64 x 0.28 (mm) Typ.  
B = 0.28 x 0.64 (mm) Typ.  
C = 1.50 (mm) Sq.  
Dimensions in mm.  
1.50 Typ.  
0.50 Typ.  
Pin 16  
B
B
B
B
Pin 1  
Pin 12  
A
A
A
A
A
A
A
A
0.50 Typ.  
0.55 Typ.  
0.75 Typ.  
1.50  
Typ.  
C
B
B
B
B
Pin 8  
0.55 Typ.  
0.75 Typ.  
Figure 1. PCB Metal Land Pattern (Top View)  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
Rev A1 DS060921  
13 of 14  
RF5111  
PCB Solder Mask Pattern  
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB  
metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The  
center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be  
provided in the master data or requested from the PCB fabrication supplier.  
A = 0.74 x 0.38 (mm) Typ.  
B = 0.38 x 0.74 (mm) Typ.  
C = 1.60 (mm) Sq.  
Dimensions in mm.  
1.50 Typ.  
0.50 Typ.  
Pin 16  
B
B
B
B
Pin 1  
Pin 12  
A
A
A
A
A
A
A
A
0.50 Typ.  
0.55 Typ.  
0.75 Typ.  
1.50  
Typ.  
C
B
B
B
B
Pin 8  
0.55 Typ.  
0.75 Typ.  
Figure 2. PCB Solder Mask Pattern (Top View)  
Thermal Pad and Via Design  
The PCB land pattern has been designed with a thermal pad that matches the die paddle size on the bottom of the device.  
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been  
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing  
strategies.  
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a  
0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the  
quantity of vias be increased by a 4:1 ratio to achieve similar results.  
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical  
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.  
14 of 14  
Rev A1 DS060921  

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