RF7321 [RFMD]
3V LTE Band 11, 21 Linear PA Module;
| 型号： | RF7321 |
| 厂家： | 
RF MICRO DEVICES |
| 描述： | 3V LTE Band 11, 21 Linear PA Module LTE |
| 文件： | 总10页 (文件大小：671K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RF7321
3V LTE Band 11, 21 Linear PA Module
Package Style: Module, 10-Pin, 3mm x 3mm x 0.8mm
Features
Fully Compliant to LTE
Modulation
LTE Bands 11, 21
Best-in-Class Efficiency 47%,
+28.5dBm Rel 99 output
power
High Power Gain : 28dB
E-UTRA ACLR : -38dBc
UTRA ACLR : -39dBc
All LTE Channel Bandwidths
(5 MHz up to 20 MHz)
Functional Block Diagram
Optimized use with DC-DC
converter Operation
Product Description
Three Power States with
Digital Control Interface
The RF7321 is a high-power, high-efficiency linear power amplifier
designed for use as final amplification stage in a 3V, 50 ohm LTE mobile
cellular equipment. This PA is developed for the E-UTRAN\LTE Bands 11
and 21 for which operates in the 1427.9MHz to 1462.9MHz frequency
band. The PA is specifically developed for 5MHz to 20MHz channel band-
widths used for the Band 11 or 21 operation on the LTE network. The
RF7321 has two digital control pins to select one of three power bias
states to optimize performance and current drain at lower power levels.
The part also has an integrated directional coupler which eliminates the
need for an external discrete coupler at the output. The RF7321 is fully
LTE compliant and is assembled in a 10-pin, 3mm x 3mm module.
Integrated Power Coupler
Integrated Blocking and
Decoupling Capacitors
Applications
LTE Handsets
LTE Datacards
Ordering Information
RF7321
3V LTE Band 11, 21 Linear PA Module
RF7321PCBA-410 Fully Assembled Evaluation Board
Optimum Technology Matching® Applied
GaAs HBT
GaAs MESFET
InGaP HBT
SiGe BiCMOS
Si BiCMOS
SiGe HBT
GaAs pHEMT
Si CMOS
Si BJT
GaN HEMT
RF MEMS
LDMOS
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trade-
mark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
DS120906
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RF7321
Absolute Maximum Ratings
Caution! ESD sensitive device.
Parameter
Rating
6.0
Unit
Exceeding any one or a combination of the Absolute Maximum Rating conditions may
cause permanent damage to the device. Extended application of Absolute Maximum
Rating conditions to the device may reduce device reliability. Specified typical perfor-
mance or functional operation of the device under Absolute Maximum Rating condi-
tions is not implied.
Supply Voltage in Standby Mode
Supply Voltage in Idle Mode
Supply Voltage in Operating Mode
V
V
V
V
6.0
6.0
The information in this publication is believed to be accurate and reliable. However, no
responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any
infringement of patents, or other rights of third parties, resulting from its use. No
license is granted by implication or otherwise under any patent or patent rights of
RFMD. RFMD reserves the right to change component circuitry, recommended appli-
cation circuitry and specifications at any time without prior notice.
Supply Voltage, V
6.0
BAT
Control Voltage: V
Control Voltage: V
, V
3.5
3.5
V
V
MODE0 MODE1
EN
RFMD Green: RoHS compliant per EU Directive 2002/95/EC, halogen free
per IEC 61249-2-21, < 1000ppm each of antimony trioxide in polymeric
materials and red phosphorus as a flame retardant, and <2% antimony in
solder.
RF - Input Power
+10
+30
dBm
dBm
RF - Output Power
Output Load VSWR (Ruggedness)
Operating Ambient Temperature
Storage Temperature
10:1
-30 to +85
-40 to +150
°C
°C
P
= 28. dBm
OUT
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Recommended Operating
Conditions
Operating Frequency Range
1427.9
+3.0
1462.9
+4.4
MHz
V
V
V
V
V
V
V
+3.8
+3.4
BAT
1
+4.35
0.5
V
V
V
V
V
CC
+0.5
, low level
0
1.5
0
PA disabled
EN
, High level
, V
1.8
1.8
3.1
PA enabled
EN
, low level
, high level
0.5
For a logic "low"
For a logic "high"
MODE0 MODE1
, V
1.5
3.1
MODE0 MODE1
Output Power (P
)
OUT
2
Rel 99 Maximum Linear Output
(HP)
dBm
dBm
High Power Mode (HP)
+28.5
2
Rel 99 Maximum Linear Output
(MP)
Medium Power Mode (MP)
+17
2
Rel 99 Maximum Linear Output (LP)
LTE Maximum Linear Output (HP)
LTE Maximum Linear Output (MP)
LTE Maximum Linear Output (LP)
dBm
dBm
dBm
dBm
°C
Low Power Mode (LP)
+7
2
High Power Mode (HP), MPR=0
Medium Power Mode (MP), MPR=0
Low Power Mode (LP), MPR=0
+27.5
2
+16
2
+6
Ambient Temperature
Notes:
-30
25
+85
[1] V down to 0.5V may be used for backed-off power when using DC-DC converter to reduce low power current drain.
CC
[2] For operation at V =3.0V, de-rate P
by 1.0dB and at V =3.2V de-rate P
by 0.5dB
OUT
CC
OUT
CC
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RF7321
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Temp = +25C, V = +3.8V, V = +1.8V, 50 system,
BAT
EN
LTE Modulation used: QPSK, 10MHz channel,
12 Resource Blocks with MPR = 0, unless otherwise
specified.
Electrical Specifications
Gain
26.5
17
28
19.5
14
31.5
23
dB
dB
dB
HP, P
= 27.5dBm, V = 3.4V
OUT CC
MP, P
≤ 16dBm, V = 1.3V
CC
OUT
OUT
11
17
LP, P
≤ 6dBm, V = 0.7V
CC
Gain Flatness
±0.25
±1
dB
dB
All modes over any 13.5MHz BW
All modes
Gain Linearity
ACLR - E-UTRA (±10MHz)
-39
-35
-35
dBc
HP, P
= 27.5dBm, V = 3.4V (MPR=0)
OUT
OUT
CC
1
-39
dBc
HP, P
= 26.5dBm, V = 3.4V
CC
-41
-44
-39
-39
-35
-35
-36
-36
dBc
dBc
dBc
dBc
MP, P
≤ 16dBm, V = 1.3V
CC
OUT
LP, P
≤ 6dBm, V = 0.7V
CC
OUT
ACLR1 - UTRA (±7.5MHz)
ACLR2 - UTRA (±12.5MHz)
PA Efficiency (PAE)
HP, P
HP, P
= 27.5dBm, V = 3.4V (MPR=0)
OUT
OUT
CC
1
= 26.5dBm, V = 3.4V
CC
-41
-44
-62
-42
-36
-36
-49
-39
dBc
dBc
dBc
dBc
MP, P
≤ 16dBm, V = 1.3V
CC
OUT
OUT
LP, P
≤ 6dBm, V = 0.7V
CC
HP, P
HP, P
= 27.5dBm, V = 3.4V (MPR=0)
OUT
OUT
CC
1
= 26.5dBm, V = 3.4V
CC
-62
-62
43
-49
-49
dBc
dBc
%
MP, P
≤ 16dBm, V = 1.3V
CC
OUT
OUT
LP, P
≤ 6 dBm, V = 0.7V
CC
39
35
HP, P
HP, P
= 27.5 dBm, V = 3.4V
CC
OUT
OUT
1
40
%
= 26.5dBm, V = 3.4V
CC
25
10
29
12
%
%
MP, P
= 16 dBm, V = 1.3V
CC
OUT
OUT
LP, P
= 6 dBm, V = 0.7V
CC
PA Current Drain
375
320
404
375
mA
mA
HP, P
HP, P
= 27.5 dBm, V = 3.4V
CC
OUT
1
= 26.5dBm, V = 3.4V
OUT
CC
105
39
126
46
mA
mA
mA
mA
MP, P
= 16 dBm, V = 1.3V
CC
OUT
OUT
LP, P
= 6 dBm, V = 0.7V
CC
PA + DC-DC Current Drain (MP)
PA + DC-DC Current Drain (LP)
Quiescent Current (PA only)
42.3
9.6
P
P
= 16dBm, Assumes V = 3.8V, 85% DC-DC
BAT
OUT
OUT
= 6dBm, Assumes V = 3.8V, 75% DC-DC
BAT
53
37
70
50
28
mA
mA
mA
mA
HP, DC only, No RF applied
MP, DC only, No RF applied
LP, DC only, No RF applied
23
5.0
Quiescent Current (PA + DC-DC)
No RF, with V = 0.6V, V
= 3.8V,
BAT
CC
and DC-DC Efficiency = 73%.
Noise Power in Duplex Rx Band 11
Noise Power in Duplex Rx Band 21
-135
-135
dBm/Hz All power outs, then measured at Rx Duplex Band 11
(Rx = 1476.9MHz to 1495.9MHz)
dBm/Hz All power outs, then measured at Rx Duplex Band 21
(Rx = 1495.9MHz to 1510.9MHz)
Noise Power in GPS Rx Band
Noise Power in Band 1
NOTES:
-135
-140
dBm/Hz GPS Band RX at 1575.42MHz ± 1MHz
dBm/Hz Measured in the 2110 - 2170 MHz band
[1] ACLR measurements were performed using 10MHz, QPSK LTE modulation with 50 resource blocks (MPR = 1dB) (reference 3GPP
TS36.101)
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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RF7321
Specification
Typ.
Parameter
Unit
Condition
Min.
Max.
Temp = +25C, V = +3.8V, V = +1.8V, 50 system,
BAT
EN
Electrical Specifications
(continued)
LTE Modulation used: QPSK, 10MHz channel,
12 Resource Blocks with MPR = 0, unless otherwise
specified.
Noise Power in 2.4 GHz ISM Band
Noise Power in 5 GHz ISM Band
-143
-146
dBm/Hz Measured in the 2400 - 2483 MHz band
dBm/Hz Measured in the 4.9MHz to 5.9MHz band, excludes 3rd
harmonic contributions
EVM
2.5
5
%
P
≤ +27.5 dBm, all power outs
OUT
Intermodulation
(Channel BW offset)
-35
dBc
CW interferer at -42dBc at Channel BW Offset from
carrier, P ≤ 27.5dBm
OUT
Intermodulation
(2x Channel BW offset)
-41
dBc
CW interferer at -42dBc at (2 x Channel BW) Offset from
carrier, P ≤ 27.5dBm
OUT
Input VSWR
1.8:1
-70
VSWR
dBc
All modes
All spurious, P
Spurious Output Levels
≤ 27.5dBm, all conditions, load VSWR
OUT
at 6:1, all phase angles
Insertion Phase Shift
±25
±10
°
Phase shift at +16dBm when switching from HP to MP,
and then from MP to LP at +6dBm
Insertion Phase Shift Variation
DC Enable time
°
Part to part
10
2
S
Applied DC only, Time from V = HIGH to stable idle
EN
current (90% of steady state value)
RF Rise time / RF Fall time
Coupling Factor
S
20
dB
P
P
≤ +27.5 dBm, all power outs
OUT
OUT
Coupling Accuracy - Temp/Voltage
±0.5
dB
≤ 27.5 dBm, all modes, -20°C ≤ T ≤ +85,
V
as required , referenced back to 25°C, 3.4V
CC
nominal condition
P ≤ 27.5 dBm, all modes, load VSWR 2:1, ± 0.25dB
OUT
accuracy corresponds to 20dB coupler directivity
Coupling Accuracy - VSWR
Coupler Insertion Loss
±0.25
0.25
dB
dB
For the daisy-chain couplers (PA-to-PA): CPL IN to
CPL OUT; 698MHz to 2620MHz
Rel 99
UMTS ACLR1 (±5MHz)
-40
-40
-40
-52
-52
-52
dBc
dBc
dBc
dBc
dBc
dBc
HP, P
= 28.5 dBm, V = 3.4V
OUT CC
MP, P
≤ 17dBm, V = 1.3V
CC
OUT
OUT
LP, P
HP, P
≤ 7dBm, V = 0.7V
CC
UMTS ACLR2 (±10MHz)
= 28.5dBm, V = 3.4V
CC
OUT
MP, P
≤ 17dBm, V = 1.3V
CC
OUT
OUT
LP, P
HP, P
≤ 7dBm, V = 0.7V
CC
PA Efficiency (PAE)
PA Current Drain
47
32
17
%
= 28.5dBm, V = 3.4V
OUT CC
%
MP, P
= 17dBm, V = 1.3V
CC
OUT
OUT
%
LP, P
HP, P
= 7dBm, V = 0.7V
CC
443
120
40
48
10
mA
mA
mA
mA
mA
= 28.5dBm, V = 3.4V
OUT CC
MP, P
= 17dBm, V = 1.3V
CC
OUT
OUT
LP, P
= 7dBm, V = 0.7V
CC
PA + DC-DC Current Drain (MP)
PA + DC-DC Current Drain (LP)
UMTS EVM
P
P
= 17dBm, Assumes V = 3.8V, 85% DC-DC
BAT
OUT
OUT
= 7dBm, Assumes V = 3.8V, 75% DC-DC
BAT
2
%
All modes
Harmonics, 2F
-35
-42
dBc
P
P
= +28.5 dBm
= +28.5 dBm
O
OUT
OUT
Harmonics,3F
dBc
O
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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RF7321
Pin-Out Description
Pin
1
2
3
4
5
6
7
Function
VBAT
RF IN
VMODE1
VMODE0
VEN
CPL OUT
GND
Description
Supply voltage for the bias circuitry.
RF input internally matched to 50 and DC blocked.
Digital control input for power mode selection.
Digital control input for power mode selection.
Digital control input for PA enable and disable.
Coupler output.
This pin must be grounded.
Coupler input used for cascading couplers in series. Terminate this pin with a 50 resistor if not connected to
another coupler.
8
CPL IN
RF output internally matched to 50 and DC blocked.
9
10
RF OUT
VCC
Supply voltage for the first and second stage amplifiers which can be connected to the battery supply or output
of the DC-DC converter.
Ground connection - this package backside should be soldered to a topside ground pad connecting to the PCB
ground plane with multiple ground vias. The pad should have a low thermal resistance and low electrical imped-
ance to the ground plane.
Pkg
Base
GND
Operating Logic Table
VEN
VMODE0 VMODE1
VBAT
VCC
Conditions/Comments
Low
Low
Low
X
Low
X
3.0V to 4.4V
3.0V to 4.4V
3.0V to 4.4V
3.0V to 4.4V
3.0V to 4.4V
0.5V to 4.35V
0.5V to 4.35V
0.5V to 4.35V
0.5V to 4.35V
0.5V to 4.35V
Power down mode
Standby Mode
High
High
High
Low
High
High
Low
Low
High
High Power State
Medium Power State
Low Power State
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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RF7321
Package Drawing
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support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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RF7321
Preliminary Application Schematic
VBAT
VCC
1
2
3
4
5
10
9
AMP
4.7uF
4.7uF (2)
RF IN
RF OUT
8
VMODE1
Bias Control
& PA/VMODE
Enable
50 ꢀ(1)
7
VMODE0
6
VEN
CPL OUT
NOTES:
1. The 50 resistor should be removed if pin 8 is connected to another coupler for daisy chaining multiple couplers.
2. This capacitance value can be reduced for multi-PA with DC to DC converter applications where a total maximum
capacitive load is required to be met. Keeping at least a 1uF capacitor close to the PA Vcc pin is recommended.
Evaluation Board Schematic
VCC1
VCC2
10
9
1
2
3
4
5
AMP
C7
10nF
C5
4.7uF
C8
10nF
C4
22uF
C6
4.7uF
J1
RF IN
J2
RF OUT
8
VMODE1
Bias Control
& PA/VMODE
Enable
R2
51
C9
10nF
7
VMODE0
C10
10nF
6
VEN
J3
CPL OUT
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
P1_8
P1_9
C11
10nF
VEN
VMODE0
VMODE1
VCC1
NOTES:
1. VCC2S is a sense line to be used if the test power supply has voltage sensing
capability. This compensates for any resistive voltage drop that occurs between
the power supply and the PA and thus ensures that the voltage at the PA is set as
expected.
VCC2
VCC2S (1)
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RF7321
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3inch
to 8inch gold over 180inch nickel.
PCB Land Pattern Recommendation
PCB land patterns for RFMD components are based on IPC-7351 standards and RFMD empirical data. The pad pattern shown
has been developed and tested for optimized assembly at RFMD. The PCB land pattern has been developed to accommodate
lead and package tolerances. Since surface mount processes vary from company to company, careful process development is
recommended.
PCB Metal Land Pattern (Top View)
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RF7321
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB
metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The
center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be
provided in the master data or requested from the PCB fabrication supplier.
PCB Solder Mask Pattern (Top View)
Thermal Pad and Via Design
The PCB land pattern has been designed with a thermal pad that matches the die paddle size on the bottom of the device.
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing
strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a
0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the
quantity of vias be increased by a 4:1 ratio to achieve similar results.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
DS120906
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RF7321
PCB Stencil Pattern (Top View)
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support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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