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AIDM-60J

更新时间：2024-09-18 08:12:38
品牌：RHOMBUS-IND
描述：AIDM Series FAST / TTL Buffered 5-Tap Delay Modules

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AIDM-60J 概述

AIDM Series FAST / TTL Buffered 5-Tap Delay Modules AIDM系列FAST / TTL缓冲5 - tap延迟模块 延迟线

AIDM-60J 规格参数

生命周期：Active零件包装代码：SOIC
包装说明：SOJ,针数：8
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.63Is Samacsys：N
其他特性：MAX RISE TIME CAPTURED系列：TTL
JESD-30 代码：R-PDSO-J8负载电容（CL）：10 pF
逻辑集成电路类型：ACTIVE DELAY LINE功能数量：1
抽头/阶步数：5端子数量：8
最高工作温度：70 °C最低工作温度：
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOJ封装形状：RECTANGULAR
封装形式：SMALL OUTLINE最大电源电流（ICC）：65 mA
可编程延迟线：NO认证状态：Not Qualified
座面最大高度：6.73 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：TTL
温度等级：COMMERCIAL端子形式：J BEND
端子节距：2.54 mm端子位置：DUAL
总延迟标称（td）：60 nsBase Number Matches：1

AIDM-60J 数据手册

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AIDM Series FAST / TTL Buffered 5-Tap Delay Modules  
Electrical Specifications at 25OC  
Low Profile 14-Pin Package  
Two Surface Mount Versions  
FAST/TTL Logic Buffered  
5 Equal Delay Taps  
Tap Delay Tolerances +/- 5% or 2ns (+/- 1ns <13ns)  
FAST/TTL  
14-Pin DIP P/N  
Tap-to-Tap  
(ns)  
Tap 1  
Tap 2  
Tap 3  
Tap 4  
Total - Tap 5  
AIDM-7  
AIDM-9  
3.0  
3.0  
4.0  
4.5  
5.0  
6.0  
6.0  
7.5  
7 ± 1.0  
9 ± 1.0  
1 ± 0.5  
1.5 ± 0.5  
2 ± 0.7  
Operating Temperature  
Range 0OC to +70OC  
AIDM-11  
AIDM-13  
AIDM-15  
AIDM-20  
AIDM-25  
AIDM-30  
AIDM-35  
AIDM-40  
AIDM-50  
AIDM-60  
AIDM-75  
AIDM-100  
AIDM-125  
AIDM-150  
AIDM-200  
AIDM-250  
AIDM-350  
AIDM-500  
3.0  
5.0  
7.0  
9.0  
11 ± 1.0  
13 ± 1.5  
15 ± 1.5  
20 ± 2.0  
25 ± 2.0  
30 ± 2.0  
35 ± 2.0  
40 ± 2.0  
50 ± 2.5  
60 ± 3.0  
75 ± 3.75  
100 ± 5.0  
125 ± 6.25  
150 ± 7.5  
200 ± 10.0  
250 ± 12.5  
350 ± 17.5  
500 ± 25.0  
3.0  
5.5  
8.0  
10.5  
12.0  
16.0  
20.0  
24.0  
28.0  
32.0  
40.0  
48.0  
60.0  
80.0  
100.0  
120.0  
160.0  
200.0  
280.0  
400.0  
2.5 ± 1.0  
3 ± 1.0  
8-Pin Versions: FAMDM Series  
SIP Versions: FSIDM Series  
3.0  
6.0  
9.0  
4.0  
8.0  
12.0  
15.0  
18.0  
21.0  
24.0  
30.0  
36.0  
45.0  
60.0  
75.0  
90.0  
120.0  
150.0  
210.0  
300.0  
4 ± 1.5  
Low Voltage CMOS Versions  
refer to LVMDM / LVIDM Series  
5.0  
10.0  
12.0  
14.0  
16.0  
20.0  
24.0  
30.0  
40.0  
50.0  
60.0  
80.0  
100.0  
140.0  
200.0  
5 ± 2.0  
6.0  
6 ± 2.0  
7.0  
7 ± 2.0  
AIDM 14-Pin Schematic  
8.0  
8 ± 2.0  
10.0  
12.0  
15.0  
20.0  
25.0  
30.0  
40.0  
50.0  
70.0  
100.0  
10 ± 2.0  
12 ± 2.0  
15 ± 2.5  
20 ± 3.0  
25 ± 3.0  
30 ± 3.0  
40 ± 4.0  
50 ± 5.0  
70 ± 7.0  
100 ± 10.0  
Vcc  
14  
Tap1  
12  
Tap3  
10  
Tap5  
8
1
4
6
7
GND  
IN  
Tap2  
Tap4  
** These part numbers do not have 5 equal taps. Tap-to-Tap Delays reference Tap 1.  
TEST CONDITIONS -- FAST / TTL  
VCC Supply Voltage................................................ 5.00VDC  
Input Pulse Voltage ................................................... 3.20V  
Input Pulse Rise Time ....................................... 3.0 ns max.  
Input Pulse Width / Period ........................... 1000 / 2000 ns  
1. Measurements made at 25OC  
Dimensions in Inches (mm)  
.285  
(7.24)  
MAX.  
.785  
(19.94)  
MAX.  
2. Delay Times measured at 1.50V level of leading edge.  
3. Rise Times measured from 0.75V to 2.40V.  
4. 10pf probe and fixture load on output under test.  
.250  
.020  
(0.51)  
DIP  
DIP  
.008 R  
(0.20)  
(6.35)  
MAX.  
.120  
(3.05)  
MIN.  
.010  
(0.25)  
TYP.  
.300  
(7.62)  
OPERATING SPECIFICATIONS  
.365  
(9.27)  
MAX.  
VCC Supply Voltage ................................... 5.00 ± 0.25 VDC  
ICC Supply Current .................................... 48 mA Maximum  
Logic “1” Input: VIH ....................... 2.00 V min., 5.50 V max.  
.050  
(1.27)  
TYP.  
.020  
(0.51)  
TYP.  
.100  
(2.54)  
TYP.  
I
IH .............................. 20 µA max. @ 2.70V  
Logic “0” Input: VIL .......................................... 0.80 V max.  
IIL ............................................ -0.6 mA mA  
.285  
.785  
(7.24)  
MAX.  
(19.94)  
MAX.  
VOH Logic “1” Voltage Out .................................. 2.40 V min.  
VOL Logic “0” Voltage Out ............................... 0.50 V max.  
PWI Input Pulse Width ............................. 40% of Delay min.  
Operating Temperature Range ............................ 0O to 70OC  
Storage Temperature Range ...................... -65O to +150OC  
.250  
(6.35)  
MAX.  
G-SMD  
G-SMD  
.008 R  
(0.20)  
.010  
(0.25)  
TYP.  
.015  
(0.38)  
TYP.  
.030  
(0.76)  
TYP.  
.050  
(1.27)  
TYP.  
.020  
(0.51)  
TYP.  
.100  
(2.54)  
TYP.  
.430 (10.92)  
.400 (10.16)  
P/ N De sc rip tion  
AIDM - XXX X  
Buffered 5 Tap Delay  
Molded Package Series:  
.285  
(7.24)  
MAX.  
.785  
(19.94)  
MAX.  
14-pin DIP: AIDM  
Total Delay in nanoseconds (ns)  
.265  
(6.73)  
MAX.  
J-SMD  
J-SMD  
Lead Style: Blank = Thru-hole  
G = “Gull Wing” SMD  
J = “J” Bend SMD  
.020 R  
(0.51)  
.285 (7.24)  
.260 (6.60)  
.030  
(0.76)  
TYP.  
Examples: AIDM-25G = 25ns (5ns per tap)  
74F, 14-Pin G-SMD  
.050  
(1.27)  
TYP.  
.020  
.100  
(0.51)  
(2.54)  
.330 (8.38)  
MAX.  
TYP.  
TYP.  
AIDM-100 =  
100ns (20ns per tap)  
74F, 14-Pin DIP  
For other values & Custom Designs, contact factory.  
Specifications subject to change without notice.  
AIDM 9901  
15801 Chemical Lane, Huntington Beach, CA 92649-1595  
Phone: (714) 898-0960 • FAX: (714) 896-0971  
www.rhombus-ind.com • email: sales@rhombus-ind.com  
Rhombus  
Industries Inc.  

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