JMK107BJ475RA [RICHTEK]
Dual High-Efficiency PWM Step-Down DC/DC Converter; 双路高效率PWM降压型DC / DC转换器
| 型号： | JMK107BJ475RA |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | Dual High-Efficiency PWM Step-Down DC/DC Converter |
| 文件： | 总15页 (文件大小：394K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
RT8020
Dual High-Efficiency PWM Step-Down DC/DC Converter
General Description
Features
ꢀ 2.5V to 5.5V Input Range
The RT8020 is a dual high-efficiency Pulse-Width-
Modulated (PWM) step-down DC/DC converter. It is
capable of delivering 1A output current over a wide input
voltage range from 2.5V to 5.5V, the RT8020 is ideally
suited for portable electronic devices that are powered
from 1-cell Li-ion battery or from other power sources within
the range such as cellular phones, PDAs and other hand-
held devices.
ꢀ Adjustable Output From 0.6V to VIN
ꢀ 1.2V, 1.3V, 1.8V, 2.5V and 3.3V Fixed/ Adjustable
Output Voltage
ꢀ 1A Output Current
ꢀ 95% Efficiency
ꢀ No Schottky Diode Required
ꢀ 50uA Quiescent Current per Channel
ꢀ 1.5MHz Fixed Frequency PWM Operation
ꢀ Small 12-Lead WDFN Package
ꢀ RoHS Compliant and 100% Lead (Pb)-Free
Two operational modes are available : PWM/Low-Dropout
auto-switch and shutdown modes. Internal synchronous
rectifier with low RDS(ON) dramatically reduces conduction
loss at PWM mode. No external Schottky diode is
required in practical application.
Applications
ꢀ Mobile Phones
The RT8020 enters Low-Dropout mode when normal PWM
cannot provide regulated output voltage by continuously
turning on the upper PMOS. The RT8020 enter shutdown
mode and consumes less than 0.1μAwhen ENpin is pulled
low.
ꢀ Personal InformationAppliances
ꢀ Wireless and DSL Modems
ꢀ MP3 Players
ꢀ Portable Instruments
The switching ripple is easily smoothed-out by small
package filtering elements due to a fixed operation
frequency of 1.5MHz. This along with small
WDFN-12L 3x3 package provides small PCB area
application. Other features include soft start, lower internal
reference voltage with 2% accuracy, over temperature
protection, and over current protection.
Ordering Information
RT8020
Package Type
QW : WDFN-12L 3x3 (W-Type)
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Output Voltage : VOUT1/VOUT2
Default : Adjustable
A : 3.3V/1.8V
Pin Configurations
B : 3.3V/1.3V
C : 3.3V/1.2V
(TOP VIEW)
D : 2.5V/1.8V
1
2
3
12
VIN2
LX2
EN2
NC2
FB2
11
10
9
8
7
GND
GND
13
Note :
4
5
6
GND
FB1
NC1
EN1
LX1
VIN1
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
WDFN-12L 3x3
Copyright 2012 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8020-06 March 2012
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1
RT8020
Marking Information
RT8020APQW
RT8020CPQW
C2- : Product Code
C4- : Product Code
YMDNN : Date Code
YMDNN : Date Code
C2-YM
C4-YM
DNN
DNN
RT8020AGQW
RT8020CGQW
C2= : Product Code
C4= : Product Code
YMDNN : Date Code
YMDNN : Date Code
C2=YM
C4=YM
DNN
DNN
RT8020BPQW
RT8020DPQW
C3- : Product Code
C5- : Product Code
YMDNN : Date Code
YMDNN : Date Code
C3-YM
C5-YM
DNN
DNN
RT8020BGQW
RT8020DGQW
C3= : Product Code
C5=: Product Code
YMDNN : Date Code
YMDNN : Date Code
C3=YM
C5=YM
DNN
DNN
Typical Application Circuit
C
4.7µF
OUT2
L2
2.2µH
V
OUT2
V
IN2
RT8020
1
2
12
R21
C21
VIN2
LX2
EN2
NC2
FB2
850k
22pF
C
11
10
9
IN2
4.7µF
3, Exposed Pad (13)
GND
FB1
R12
4
5
GND
R22
8
C
IN1
NC1
EN1
LX1
4.7µF
7
6
C11
22pF
R11
850k
VIN1
V
IN1
L1
2.2µH
V
OUT1
C
OUT1
4.7µF
Rx1
Rx2
V
OUTx
= V
×
1+
REF
Figure 1. Adjustable Voltage Regulator
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2
DS8020-06 March 2012
RT8020
L2
2.2µH
V
OUT2
V
IN2
RT8020
C
4.7µF
OUT2
1
2
12
VIN2
LX2
EN2
NC2
FB2
C
IN2
4.7µF
11
10
9
3, Exposed Pad (13)
4
GND
FB1
GND
8
5
6
C
4.7µF
IN1
NC1
EN1
LX1
7
VIN1
V
IN1
L1
2.2µH
V
OUT1
C
OUT1
4.7µF
VOUTx = 1.2V, 1.3V, 1.8V, 2.5V or 3.3V
Figure 2. Fixed Voltage Regulator
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
VIN2
Power Input of Channel 2.
2
LX2
Pin for Switching of Channel 2.
3, 9,
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
GND
Exposed Pad (13)
4
5, 11
6
FB1
Feedback of Channel 1.
NC1, NC2
EN1
No Connection or Connect to V .
IN
Chip Enable of Channel 1 (Active High). V
Power Input of Channel 1.
≦ V
EN1
EN2
IN1.
IN2.
7
VIN1
LX1
8
Pin for Switching of Channel 1.
Feedback of Channel 2.
10
12
FB2
EN2
Chip Enable of Channel 2 (Active High). V
≦ V
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RT8020
Function Block Diagram
ENx
VINx
RS1
OSC and
Shutdown
Control
Current Limit
Detector
Slope
Compensation
Current
Sense
PWM
Comparator
Control
Logic
Driver
LXx
Error
Amplifier
FBx
UVLO and
Power Good
Detector
RC
RS2
COMP
V
REF
GND
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DS8020-06 March 2012
RT8020
Absolute Maximum Ratings (Note 1)
ꢀ Supply Input Voltage, VIN1, VIN2 ---------------------------------------------------------------------------------- −0.3V to 6.5V
ꢀ EN1, FB1, LX1, EN2, FB2 and LX2 Pin Voltage -------------------------------------------------------------- −0.3V to (VIN + 0.3V)
ꢀ Power Dissipation, PD @ TA = 25°C
WDFN-12L 3x3 -------------------------------------------------------------------------------------------------------- 1.667W
ꢀ Package Thermal Resistance (Note 2)
WDFN-12L 3x3, θJA -------------------------------------------------------------------------------------------------- 60°C/W
WDFN-12L 3x3, θJC -------------------------------------------------------------------------------------------------- 8.2°C/W
ꢀ Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------------- 260°C
ꢀ Junction Temperature ------------------------------------------------------------------------------------------------ 150°C
ꢀ Storage Temperature Range --------------------------------------------------------------------------------------- −65°C to 150°C
ꢀ ESD Susceptibility (Note 3)
HBM (Human Body Mode) ----------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)
ꢀ Supply Input Voltage------------------------------------------------------------------------------------------------- 2.5V to 5.5V
ꢀ Junction Temperature Range--------------------------------------------------------------------------------------- −40°C to 125°C
ꢀ Ambient Temperature Range--------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.6V, VOUT = 2.5V, VREF = 0.6V, L = 2.2uH, CIN = 4.7μF, COUT = 10μF, TA = 25°C, IMAX= 1A unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Channel 1 and Channel 2
Input Voltage Range
2.5
--
--
5.5
--
V
V
V
IN
Under Voltage Lock Out
threshold
UVLO
1.8
Hysteresis
--
--
0.1
50
--
70
V
μA
μA
V
Quiescent Current
Shutdown Current
Reference Voltage
I
I
= 0mA, V = V
+ 5%
Q
OUT
FB
REF
EN = GND
--
0.1
0.6
1
I
SHDN
For Adjustable Output Voltage
(Note 6)
0.588
0.612
V
REF
Adjustable Output Voltage
Range
--
--
--
--
--
--
V
V
V
V −ΔV
IN
OUT
REF
V
0A < I
= 2.5V to 5.5V, V
= 1.2V
= 1.3V
IN
OUT
OUT
3
%
%
%
%
%
ΔV
ΔV
ΔV
ΔV
ΔV
−3
−3
−3
−3
−3
OUT
OUT
OUT
OUT
OUT
< 1A
OUT
V
= 2.5V to 5.5V, V
IN
3
3
3
3
0A < I
< 1A
OUT
Output Voltage
Fix
V
= 2.5 to 5.5V, V
= 1.8V
IN
OUT
Accuracy
0A < I
< 1A
OUT
V
V
V
V
= V
+ ΔV to 5.5V
(Note 5)
< 1A
OUT
IN
OUT
= 2.5V, 0A < I
OUT
= V
+ ΔV to 5.5V
(Note 5)
< 1A
OUT
IN
OUT
= 3.3V, 0A < I
OUT
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RT8020
Parameter
Symbol
ΔV
Test Conditions
Min
Typ
Max
Unit
%
Output Voltage
Accuracy
V
0A < I
= V
+ ΔV to 5.5V
(Note 5)
IN
OUT
Adjustable
−3
--
3
OUT
< 1A
OUT
FB Input Current
I
V
= V
−50
--
--
0.38
0.28
0.35
0.25
1.5
--
50
--
nA
Ω
FB
FB
IN
V
V
V
V
= 2.5V
IN
IN
IN
IN
R
of P-MOSFET
R
I
= 200mA
= 200mA
DS(ON)
DS(ON)
DS(ON)_P OUT
= 3.6V
= 2.5V
= 3.6V
--
--
--
--
R
of N-MOSFET
R
I
Ω
A
V
DS(ON)_N OUT
--
--
P-Channel Current Limit
I
V
IN
V
IN
V
IN
V
IN
= 2.5V to 5.5 V
= 2.5V to 5.5V
= 2.5V to 5.5V
1.4
1.5
--
--
LIM_P
Logic-High
Logic-Low
V
V
IN
EN_H
EN_L
OSC
EN Input Voltage
V
--
0.4
1.8
--
Oscillator Frequency
f
= 3.6V, I
= 100mA
1.2
--
1.5
160
--
MHz
°C
OUT
Thermal Shutdown Temperature
Maximum Duty Cycle
T
SD
100
−1
--
%
LX Leakage Current
I
V
IN
= 3.6V, V = 0V or V = 3.6V
--
1
μA
LX
LX
LX
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. ΔV = IOUT x PRDS(ON)
Note 6. Guarantee by design.
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DS8020-06 March 2012
RT8020
Typical Operating Characteristics
Efficiency vs. Output Current
Efficiency vs. Output Current
100
90
80
70
60
50
40
30
20
10
0
100
90
VIN = 3.6V
VIN = 4.2V
VIN = 5.0V
80
70
60
50
40
30
20
10
0
VIN = 5.0V
VIN = 3.6V
VIN = 3.3V
VIN = 2.5V
VOUT = 3.3V, L = 4.7μH, COUT = 4.7μF
VOUT = 1.2V, L = 4.7μH, COUT = 4.7μF
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Output Current (A)
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Output Current (A)
1
Efficiency vs. Output Current
UVLO Threshold vs. Temperature
100
90
80
70
60
50
40
30
20
10
0
2.00
1.90
1.80
1.70
1.60
1.50
1.40
1.30
1.20
Rising
VIN = 5.0V
VIN = 3.6V
VIN = 3.3V
VIN = 2.5V
Falling
VOUT = 1.2V, IOUT = 0A
VOUT = 1.2V, L = 2.2μH, COUT = 10μF
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Output Current (A)
1
-40 -25 -10
5
20 35 50 65 80 95 110 125
(°C)
Temperature
EN Pin Threshold vs. Input Voltage
EN Pin Threshold vs. Temperature
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
Rising
Falling
Rising
Falling
VOUT = 1.2V, IOUT = 0A
VIN = 3.6V, VOUT = 1.2V, IOUT = 0A
-40 -25 -10
5
20 35 50 65 80 95 110 125
2.5 2.8 3.1 3.4 3.7
4
4.3 4.6 4.9 5.2 5.5
Temperature
(°C)
Input Voltage (V)
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RT8020
Output Voltage vs. Temperature
Output Voltage vs. Loading Current
1.25
1.24
1.23
1.22
1.21
1.20
1.19
1.18
1.17
1.16
1.15
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190
1.185
1.180
VIN = 5.0V
VIN = 3.6V
VIN = 3.6V, IOUT = 0A
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Loading Current (A)
1
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Switching Frequency vs. Temperature
Switching Frequency vs. Input Voltage
1.6
1.55
1.5
1.60
1.55
1.50
1.45
1.40
1.35
1.30
1.25
1.20
1.45
1.4
1.35
1.3
1.25
1.2
VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA
VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA
-40 -25 -10
5
20 35 50 65 80 95 110 125
2.5 2.8 3.1 3.4 3.7
4
4.3 4.6 4.9 5.2 5.5
(°C)
Temperature
Input Voltage (V)
Output Current Limit vs. Input Voltage
Output Current Limit vs. Temperature
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
VOUT = 1.2V
VIN = 5.0V
VIN = 3.6V
VIN = 3.3V
VOUT = 1.2V @ TA = 25°C
-40 -25 -10
5
20 35 50 65 80 95 110 125
2.5 2.8 3.1 3.4 3.7
4
4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
Temperature (°C)
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DS8020-06 March 2012
RT8020
Power On from EN
Power On from EN
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA
VEN
VEN
(2V/Div)
(2V/Div)
VOUT
VOUT
(1V/Div)
(1V/Div)
IIN
IIN
(500mA/Div)
(500mA/Div)
Time (100μs/Div)
Time (100μs/Div)
Power On from VIN
Power Off from EN
VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA
VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA
VIN
(2V/Div)
VEN
(2V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
ILX
(1A/Div)
ILX
(1A/Div)
Time (250μs/Div)
Time (100μs/Div)
Load Transient Response
Load Transient Response
VIN = 3.6V, VOUT = 1.2V, IOUT = 50mA to 1A
VIN = 3.6V, VOUT = 1.2V, IOUT = 50mA to 0.5A
VOUT
(50mV/Div)
VOUT
(50mV/Div)
IOUT
(500mA/Div)
IOUT
(500mA/Div)
Time (50μs/Div)
Time (50μs/Div)
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RT8020
Load Transient Response
Load Transient Response
VIN = 5.0V, VOUT = 1.2V, IOUT = 50mA to 1A
VIN = 5.0V, VOUT = 1.2V, IOUT = 50mA to 0.5A
VOUT
(50mV/Div)
VOUT
(50mV/Div)
IOUT
(500mA/Div)
IOUT
(500mA/Div)
Time (50μs/Div)
Time (50μs/Div)
Ripple
Ripple
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
VIN = 5.0V, VOUT = 1.2V, IOUT = 1A
VOUT
(10mV/Div)
VOUT
(10mV/Div)
VLX
VLX
(2V/Div)
(2V/Div)
Time (500ns/Div)
Time (500ns/Div)
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DS8020-06 March 2012
RT8020
Applications Information
The basic RT8020 application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
This results in an abrupt increase in inductor ripple current
and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don't radiate energy but generally cost more
than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depend on the price vs. size requirements and
any radiated field/EMI requirements.
followed by CIN and COUT
.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
V
f ×L
V
OUT
V
IN
⎡
⎤
⎡
⎤
OUT
ΔI =
L
× 1−
⎢
⎣
⎥
⎦
⎢
⎣
⎥
⎦
CIN and COUT Selection
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor.
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
Areasonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
VOUT
V
IN
IRMS = IOUT(MAX)
−1
V
VOUT
IN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief.Note that ripple current
ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to further
de-rate the capacitor, or choose a capacitor rated at a
higher temperature than required. Several capacitors may
also be paralleled to meet size or height requirements in
the design.
⎡
⎤
⎡
⎤
V
f × ΔI
V
OUT
V
IN(MAX)
OUT
L =
× 1−
⎢
⎣
⎥
⎦
⎢
⎥
⎦
L(MAX)
⎣
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or permalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. However, increased inductance requires
more turns of wire and therefore copper losses will
increase.
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔVOUT, is determined by :
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design
current is exceeded.
⎡
⎣
⎤
1
ΔV
≤ ΔI ESR +
OUT
L
⎢
⎥
⎦
8fC
OUT
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RT8020
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements.Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long-term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
VOUT = VREF x (1+ R1/R2)
Where VREF is the internal reference voltage (0.6V typical)
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+...)
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually account
for most of the losses: VIN quiescent current and I2R
losses.
Using Ceramic Input and Output Capacitors
The VIN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
1.The VIN quiescent current oppears due to two
components : the DC bias current and the gate charge
currents. The gate charge current results from switching
the gate capacitance of the internal power MOSFET
switches. Each time the gate is switched from high to
low to high again, a packet of charge ΔQ moves from VIN
to ground.
The resulting ΔQ/Δt is the current out of VIN that is typically
larger than the DC bias current. In continuous mode,
Output Voltage Programming
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 3.
IGATECHG = f(QT + QB)
V
where QT and QB are the gate charges of the internal top
and bottom switches. Both the DC bias and gate charge
losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
OUT
R1
FB
RT8020
GND
R2
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. In
continuous mode the average output current flowing
Figure 3. Setting the Output Voltage
Copyright 2012 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
12
DS8020-06 March 2012
RT8020
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
through inductor L is “chopped” between the main switch
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET RDS(ON) and the duty cycle (DC) is shown as
follows :
Four-Layer PCB
RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1 − DC)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses, simply add RSW to RL
and multiply the result by the square of the average output
current. Other losses including CIN and COUT ESR
dissipative losses and inductor core losses generally
account for less than 2% of the total loss.
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 4. De-rating Curves for RT8020 Package
Thermal Considerations
Checking Transient Response
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
PD(MAX) = ( TJ(MAX) − TA ) / θJA
Where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature and the θJA is the junction to
ambient thermal resistance. For recommended operating
conditions specification of RT8020 DC/DC converter,
where TJ(MAX) is the maximum junction temperature of
the die and TA is the ambient temperature. The junction
to ambient thermal resistance θJA is layout dependent.
For WDFN-12L 3x3 packages, the thermal resistance
θJA is 60°C/W on the standard JEDEC 51-7 four-layers
thermal test board. The maximum power dissipation at
TA = 25°C can be calculated by following formula :
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8020.
` For the main current paths, keep their traces short and
wide.
` Put the input capacitor as close as possible to the device
pins (VINandGND).
PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for
` LX node is with high frequency voltage swing and should
be kept small area. Keep analog components away from
LX node to prevent stray capacitive noise pick-up.
WDFN-12L 3x3 packages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. For RT8020 packages, the Figure 4 of de-
rating curves allows the designer to see the effect of rising
ambient temperature on the maximum power allowed.
` Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8020.
` Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
Copyright 2012 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS8020-06 March 2012
www.richtek.com
13
RT8020
Table 1. Recommended Inductors
Component
Inductance
DCR
(mΩ)
60
Current Rating
(mA)
Dimensions
(mm)
Series
Supplier
TAIYO YUDEN
TAIYO YUDEN
Sumida
(μH)
2.2
4.7
2.2
4.7
2.2
4.7
NR 3015
NR 3015
1480
3 x 3 x 1.5
120
75
1020
3 x 3 x 1.5
CDRH2D14
CDRH2D14
GTSD32
1500
4.5 x 3.2 x 1.55
4.5 x 3.2 x 1.55
3.85 x 3.85 x 1.8
3.85 x 3.85 x 1.8
Sumida
135
58
1000
GOTREND
GOTREND
1500
GTSD32
146
1100
Table 2. Recommended Capacitors for C and C
IN
OUT
Component Supplier
TDK
Part No.
Capacitance (μF)
Case Size
0603
C1608JB0J475M
4.7
10
4.7
10
4.7
10
10
TDK
C2012JB0J106M
0805
MURATA
GRM188R60J475KE19
GRM219R60J106ME19
JMK107BJ475RA
JMK107BJ106MA
JMK212BJ106RD
0603
MURATA
0805
TAIYO YUDEN
TAIYO YUDEN
TAIYO YUDEN
0603
0603
0805
Copyright 2012 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
14
DS8020-06 March 2012
RT8020
Outline Dimension
2
1
2
1
DETAILA
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A3
b
0.700
0.000
0.175
0.150
2.950
2.300
2.950
1.400
0.800
0.050
0.250
0.250
3.050
2.650
3.050
1.750
0.028
0.000
0.007
0.006
0.116
0.091
0.116
0.055
0.031
0.002
0.010
0.010
0.120
0.104
0.120
0.069
D
D2
E
E2
e
0.450
0.018
L
0.350
0.450
0.014
0.018
W-Type 12L DFN 3x3 Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS8020-06 March 2012
www.richtek.com
15
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