RT5035B [RICHTEK]
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| 型号： | RT5035B |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
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RT5035A/B
7+3 Channel DC-DC Converters with RTC and I2C Interface
General Description
Features
CH1 Sync Step-Up in PWM Mode or Async
RT5035A/B is
a
highly-integrated DSC Power
Step-Up in Pulse Frequency Mode
Management IC that contains 7ch switching DC-DC
converters and two generic LDOs, one keep-alive
low-quiescent LDO for RTC, one load switch with
soft-start control and current limit, a switch with reverse
CH2 Current Mode Sync Step-Up/Down
CH3/CH4/CH5 Current Mode Sync Step-Down
SW4 Load Switch with Soft-Start Inrush Control
And Current Limit
leakage prevention for backup battery, and
a
CH6 Generic Low Voltage LDO for CMOS Sensor
CH7 WLED Driver in Async Step-Up Mode
Open LED Protection
Real-Time-Clock (RTC) including time counter and
32768Hz oscillator. The DC-DC converters are one
low-voltage Step-Up operated in either Async-PFM or
Sync-PWM, one current mode Sync Step-Up/Down
(Buck-Boost), four Sync Step-Down, and one Asyn
Step-Up for WLED driver. All power MOS are
integrated. And compensation networks are built in.
RT5035A/B uses I2C interface to set power-on and
power-off timing, output voltage, and WLED current
and dimming level, and also access RTC time counters
and oscillator fine-tuning. RT5035A/B dedicate for
CMOS image sensor application by providing one Sync
Step-Down, one LDO, and one load switch. The
RT5035A/B also provides rich protection functions
include Over-Current Protection, Under-Voltage
32 Dimming Levels
CH8 Generic Low Voltage LDO for Multiple
Purpose Power Supply
CH9 Keep-Alive Low-Quiescent LDO
CH10 Sync Step-Down or Async Step-down in
Pulse Frequency Mode for Memory Standby
Mode Application
LV Sync Step-Down DC-DC Converter High
Efficiency Up to 95%
100% (Max) Duty Cycle for CH3, CH4, CH5 &CH10
I2C Control Interface to Program Enable, Power
On/Off Delay Time, Output Regulated Voltage,
WLED Dimming Current
Protection,
Over-Voltage
Protection,
Over-
RTC Timer And Oscillator
Temperature Protection, and Over-Load Protection.
RT5035A/B is available in WQFN-40L 5x5 package.
Fixed 2MHz Switching Frequency for CH1, CH3,
CH4, CH5, CH10
Applications
Digital Cameras
Portable Instruments
Fixed 1MHz Switching Frequency for CH2, CH7
Simplified Application Circuit
RT5035A/B
Step-Up for Motor
Step-Up/Down for I/O
Step-Down for Core
Step-Down for CMOS
Load Switch for CMOS
Step-Down for CMOS
LDO for CMOS
BAT
VOUT1
VOUT2
VOUT3
VOUT4
VDDM
SWO
VOUT5
VOUT6
SCL
SDA
2
I C Control
C32K
EN
LX7
VOUT8
Step-Up for LED Backlight
LDO for HDMI
SYNC
RESET
RTCPWR
VOUT10
LDO for RTC
Step-Down for Memory
GND
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
www.richtek.com
1
RT5035A/B
Pin Configuration
Ordering Information
(TOP VIEW)
RT5035A/B
Package Type
QW : WQFN-40L 5x5 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
A : Li-ion
B : 2AA Alkaline
40 39 38 37 36 35 34 33 32 31
30
29
28
27
26
25
1
2
LX3
LX1
RESET
FB7
VOUT6
PVDD6
LX7
PVDD8
VOUT8
VOUT5/FB5
PVDD5
LX5
PVDD2
LX2A
EN
3
Note :
4
Richtek products are :
5
GND
6
RoHS compliant and compatible with the current
24
23
22
21
7
LX4
PVDD4/10
LX10
requirements of IPC/JEDEC J-STD-020.
8
41
9
Suitable for use in SnPb or Pb-free soldering processes.
10
LX2B
VNEG
11 12 13 14 15 16 17 18 19 20
Marking Information
RT5035AGQW
RT5035AGQW : Product Number
YMDNN : Date Code
RT5035A
GQW
YMDNN
WQFN-40L 5x5
RT5035BGQW
RT5035BGQW : Product Number
YMDNN : Date Code
RT5035B
GQW
YMDNN
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
2
3
LX1
Switch node of CH1. This pin is in high impedance during shutdown.
Open drain output port to assert the status of monitored VDDM voltage.
Feedback input pin for CH7. This pin is in high impedance during shutdown.
RESET
FB7
Regulated output node of CH6 generic LDO. When turning off, RT5035A/B would
discharge CH6 output capacitors internally till VOUT6 < 0.1V. This pin is in high
impedance during shutdown.
4
VOUT6
5
6
7
PVDD6
LX7
Power input of CH6 generic LDO. This pin is in high impedance during shutdown.
Switch node of CH7. This pin is in high impedance during shutdown.
Switch node of CH4. This pin is in high impedance during shutdown.
LX4
Power input pin of CH4 and CH10. This pin is in high impedance during
shutdown.
8
PVDD4/10
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS5035A/B-03 February 2020
RT5035A/B
Pin No.
Pin Name
LX10
Pin Function
9
Switch node of CH10. This pin is in high impedance during shutdown.
Output node of negative charge pump to enhance CH2 (PVDD2 LX2A), CH3,
CH4, CH5, CH10 PMOS driving. The regulated voltage is the higher one
between (BAT 4.5V) and (BAT). When the negative charge pump is off, VNEG
is internally connected to GND. Connect this pin to an external 1F capacitor.
10
VNEG
Negative switch node of charge pump. A fly capacitor is needed between pin CP
and CN.
11
12
CN
CP
Positive switch node of charge pump.
Battery power input and sense pin. Recommend that input bypass capacitors are
as close as possible to the IC. The IC would sense the voltage of this pin for
UVLO and perform body-diode direction control of CH1 PMOS switches. This pin
is also the power input pin of negative charge pump circuit for VNEG.
13
14
BAT
Sense pin for CH4 output voltage and power pin for load switch SW4. When
turning off, RT5035A/B would discharge CH4 output capacitors internally till
VOUT4 < 0.1V. Recommend that output capacitors are as close to RT5035A/B
as possible. This pin is in high impedance during shutdown.
VOUT4/SWI
Sense pin of CH10 output voltage. This pin is also the feedback pin for VOUT10
if I2C is set to use the external resistor. When turning off, the IC discharges CH10
output capacitors internally until VOUT10 < 0.1V. Recommend that output
capacitors are as close as possible to the IC. This pin is in high impedance
during shutdown.
15
16
VOUT10/FB10
SWO
Power switch output pin of load switch SW4. When turning off, RT5035A/B would
discharge SWO output capacitors internally. This pin is in high impedance during
shutdown.
Data input and output pin for the I2C serial port.
Clock input pin for the I2C serial port.
17
18
SDA
SCL
Power output pin for CH2 output voltage. When turning off, RT5035A/B would
discharge CH2 output capacitors internally till VOUT2 < 0.1V.
I2C interface power level must be equal to CH2 output voltage. This pin is in high
impedance during shutdown.
19
VOUT2
20
21
SEQ
Sequence setting pin.
LX2B
Switch node B of CH2. This pin is in high impedance during shutdown.
Enable input pin to activate the RT5035A/B power on (EN = High) and off.
RT5035A/B includes an internal pull-low at EN pin.
22
23
24
25
EN
LX2A
PVDD2
LX5
Switch node A of CH2. This pin is in high impedance during shutdown.
Power input pin of CH2 and it must connect to the same node as BAT. This pin is
in high impedance during shutdown.
Switch node of CH5. This pin is in high impedance during shutdown.
Power input pin of CH5. PVDD5 could be separated from BAT. And the logic low
level for PMOS is automatically selected. (VNEG or GND) This pin is in high
impedance during shutdown.
26
PVDD5
Sense pin of CH5 Output Voltage. This pin is also the feedback pin for VOUT5 if
I2C is set to use the external resistor. When turning off, the IC discharges CH5
output capacitors internally until VOUT5 < 0.1V. Recommend that output
capacitors are as close as possible to the IC. This pin is in high impedance
during shutdown.
27
VOUT5/FB5
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
www.richtek.com
3
RT5035A/B
Pin No.
Pin Name
Pin Function
Regulated output node of CH8 generic LDO. When turning off, RT5035A/B would
discharge CH8 output capacitors internally till VOUT8 < 0.1V. This pin is in high
impedance during shutdown.
28
VOUT8
Power input node of CH8 generic LDO. This pin is in high impedance during
shutdown.
29
30
31
PVDD8
LX3
Switch node of CH3. This pin is in high impedance during shutdown.
RTC 32768Hz clock output pin. Its rails are VDDM and GND. When
goes low, C32K outputs low.
RESET
C32K
Power input pin of CH3 and it must connect to the same node as BAT. This pin is
in high impedance during shutdown.
32
PVDD3
Sense pin of CH3 output voltage. This pin is also the feedback pin for VOUT3 if
I2C is set to use the external resistor. When turning off, the IC discharges CH3
output capacitors internally until VOUT3 < 0.1V. Recommend that output
capacitors are as close as possible to the IC. This pin is in high impedance
during shutdown.
33
VOUT3/FB3
34
35
RTCGND
XOUT
Ground pin for RTC timer counter and oscillator.
Crystal output. This pin’s parasitic capacitance should be kept as low as
possible. Noise interference should also be avoided.
Crystal input. This pin’s parasitic capacitance should be kept as low as possible.
Noise interference should also be avoided.
36
37
38
39
XIN
RTCPWR
VDDM
SYNC
RTCLDO power pin. Connect this pin to a backup battery
Regulation voltage output of CH9 keep-alive LDO. It also provides power for all
IC control circuit.
PLL synchronous input pin.
Power output and sense pin for CH1 output voltage. Recommend that output
capacitors are as close to RT5035A/B as possible. This pin is in high impedance
during shutdown.
40
VOUT1
GND
41
RT5035A/B power ground and control circuit ground. Exposed PAD should be
soldered to PCB and connected to GND.
(Exposed Pad)
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS5035A/B-03 February 2020
RT5035A/B
Functional Block Diagram
BAT
VOUT1
LX1
VDDM VOUT1
VDDM
PVDD5
LX5
Body
Diode
Control
BAT
BAT UVLO
2.6V/2.4V (Part A)
or 1.7V/1.5 (Part B)
CH1
PFM Async.
or
C-Mode Sync.
LV Step-Up
CH5
LV C-Mode
Sync.
VOUT1
Step-Down
VOUT5/FB5
-
+
Floating GND
Selection
-
A9.Bit0
V
& DAC
REF
+
V
DAC
&
REF
(W / DVS)
VDDM
PVDD2
VNEG
PVDD6
VOUT6
CH6
Generic LDO
LX2A
VOUT2
CH2
LV C-Mode
Sync.
Step-Up/Down
-
LX2B
+
V
& DAC
REF
VDDM
-
VNEG
VDDM
CH7 (WLED)
HV C-Mode
Async. Step-Up
For 2 to 6WLED
LX7
+
V
& DAC
REF
PVDD3
LX3
V
& DAC
+
-
REF
FB7
CH3
LV C-Mode
Sync.
PVDD8
CH8
Generic LDO
Step-Down
VOUT3/FB3
VOUT8
VNEG
-
-
+
+
V
& DAC
REF
(W / DVS)
V
& DAC
REF
(W / DVS)
VDDM
VDDM
PVDD4/10
PVDD4/10
LX4
CH10
PFM or
LV C-Mode
Sync.
LX10
CH4
LV C-Mode
Sync.
Reg.PFM10
Step-Down
Step-Down
VOUT10/FB10
VOUT4/SWI
VNEG
VDDM
-
VNEG
-
+
+
V
& DAC
REF
V
REF
& DAC
(W / DVS)
(W / DVS)
I2C Control Interface
(Fast Mode up to 400kb/s)
SCL
SDA
VDDM
BAT
VM
VOUT1
SW4 Control
SWO
Charge
Pump for SW
Max (BAT, VOUT1)
VOUT1
Body
Diode
Control
CH9 LDO
Keep Alive
3.1V
Always On
Chip Enable
EN
Register File
Output Voltage,
Power On/Off
VDDM
Sequence
Selection
SEQ
RESET
2.4V/2.2V
Sequence Control,
Delay time,
WLED dim. Ratio,
CH7 OVP
RESET
Reverse Leakage
Control
PLL
SYNC
Threshold
32bits Memory
BAT
VDDM
RTCPWR
XIN
CP
VNEG
CN
Charge Pump
VNEG = BAT-4.5V
XOUT
VNEG
Base Controller
POR/OSC/UVP/
OVP/OCP/OTP
RTC + OSC+
Reset@1.9V
RTCGND
VDDM
C32K
GND
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
www.richtek.com
5
RT5035A/B
Operation
The RT5035A/B is a highly integrated DSC power
management IC that contains 7-CH switching DC-DC
converters, two generic LDO, one Keep Alive low
quiescent LDO, one load switch with soft-start control
and current limit, one switch with reverse leakage
prevention from backup battery, and a Real-Time Clock
(RTC) that includes a time counter and a 32768Hz
oscillator.
CH6 : Generic LDO
CH6 is a generic low voltage LDO for multiple purpose
power.
CH7 : WLED Driver
CH7 is a WLED driver that can support 6WLED/30mA,
and it can setting OVP threshold, dimming current level
and power on/off by I2C interface.
CH1 : Step-Up DC-DC Converter
CH8 : Generic LDO
CH1 is a step-up converter for motor driver power in
DSC system. The converter operates at asynchronous
PFM or fixed frequency PWM current mode which can
be set by the I2C interface.
CH8 is a generic low voltage LDO for multiple purpose
power.
CH9 : Keep Alive LDO and RTC
The RT5035A/B provides a 3.1V output LDO for all IC
control circuits and real time clock.
CH2 : Synchronous Step-Up / Down DC-DC
Converter CH2 is a synchronous step-up / down
converter for system I/O power. The converter operates
at fixed frequency PWM Current Mode.
VNEG Charge Pump
The Charge pump is to increase the Vgs driving of big
P-MOSFET in Ch2/3/4/5/10. When BAT < 3.6V and
one of Ch2/3/4/5/10 turns on, VNEG charge pump will
turn on and start to pump.
CH3 : Synchronous Step-Down DC-DC Converter
CH3 is suitable for core power in DSC system. The
converter operates in fixed frequency PWM mode with
integrated internal MOSFETs, FB resistors and
compensation network. The CH3 also can be adjusted
output voltage if I2C is set to use the external resistor.
Load Switch (SW4)
The Load Switch is equipped with soft-start inrush
control and current limit function (SW4).
CH10 : Synchronous Step-Down DC-DC Converter
CH4 : Synchronous Step-Down DC-DC Converter
CH10 is suitable for memory power in DSC system.
The converter operates at asynchronous PFM or fixed
frequency PWM current mode which can be set by the
I2C interface and it integrated internal MOSFETs, FB
resistors and compensation network. The CH10 also
can be adjusted output voltage if I2C is set to use the
external resistor.
CH4 is suitable for memory power in DSC system. The
converter operates in fixed frequency PWM mode with
integrated internal MOSFETs, FB resistors and
compensation network.
CH5 : Synchronous Step-Down DC-DC Converter
The converter operates in fixed frequency PWM mode
with integrated internal MOSFETs, FB resistors and
compensation network. The CH5 also can be adjusted
output voltage if I2C is set to use the external resistor.
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
6
DS5035A/B-03 February 2020
RT5035A/B
Absolute Maximum Ratings (Note 1)
Supply Voltage : BAT, PVDD2, PVDD3, PVDD4/10, PVDD5, PVDD6, PVDD8, SWI -----------0.3V to 6V
Power Switch : LX1,LX2A, LX2B, LX3, LX4, LX5, LX10, CP ------------------------------------------0.3V to 6V
Power Switch : LX7-----------------------------------------------------------------------------------------------0.3V to 24V
Output Node : VOUT1 to VOUT6, SWO, VOUT8, VOUT10, RTCPWR, VDDM-------------------0.3V to 6V
Output Node : CN, VNEG -------------------------------------------------------------------------------------(BAT 6V) to 0.3V
Other Pins ----------------------------------------------------------------------------------------------------------0.3V to 6V
Power Dissipation, PD @ TA = 25C
WQFN-40L 5x5----------------------------------------------------------------------------------------------------3.63W
Package Thermal Resistance
(Note 2)
WQFN-40L 5x5, JA----------------------------------------------------------------------------------------------27.5C/W
WQFN-40L 5x5, JC----------------------------------------------------------------------------------------------6C/W
Junction Temperature--------------------------------------------------------------------------------------------150C
Lead Temperature (Soldering, 10 sec.)----------------------------------------------------------------------260C
Storage Temperature Range-----------------------------------------------------------------------------------65C to 125C
ESD Susceptibility
(Note 3)
HBM (Human Body Model)------------------------------------------------------------------------------------ 2kV
MM (Machine Model) ------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)
Supply Voltage : BAT-------------------------------------------------------------------------------------------- 1.8V to 5.5V
Ambient Temperature Range---------------------------------------------------------------------------------- 40C to 85C
Junction Temperature Range --------------------------------------------------------------------------------- 40C to 125C
Electrical Characteristics
(VDDM = 3.1V, TA = 25C, unless otherwise specified)
Parameter
Supply Voltage
Symbol
Test Conditions
Min
Typ
Max Unit
VDDM Over Voltage Protection
VDDM Rising
5.8
--
6
6.2
--
V
V
VDDM Over Voltage Protection
Hysteresis
0.25
BAT UVLO High Threshold
Voltage (For Li) (Part. A)
VBAT Rising
VBAT Rising
--
2.6
2.4
1.7
1.5
2.678
--
V
V
V
V
BAT UVLO Low Threshold
Voltage (For Li) (Part. A)
2.328
--
BAT UVLO high Threshold
Voltage (For 2AA) (Part. B)
1.751
--
BAT UVLO low Threshold
Voltage (For 2AA) (Part. B)
1.455
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
www.richtek.com
7
RT5035A/B
Parameter
Symbol
IOFF,BAT
IOFF,BAT
Test Conditions
Min
--
Typ
10
--
Max Unit
Supply Current
Shutdown Supply Current into
BAT (Including CH9 keep-alive
LDO)
EN = 0V, Reg.SHDN_EN1 = 0,
Reg.SHDN_EN10 = 0 and
VOUT1 = 0V, BAT = 3.3V
--
A
A
EN = 0V, Reg.SHDN_EN1 = 0,
Reg.SHDN_EN10 = 1 and
VOUT1 = 0V, BAT = 3.3V
And CH10 no-switching
Shutdown Supply Current into
BAT (Including CH9 keep-alive
LDO)
--
80
EN = 0V, Reg.SHDN_EN1 = 1,
Reg.SHDN_EN10 = 0 and Ch1
no-switching and VOUT1 = 4.2V,
BAT = 3.3V
Shutdown Supply Current into
VOUT1 (Including CH9
keep-alive LDO)
IOFF,VOUT1
--
--
--
--
80
A
A
EN = 0V, Reg.SHDN_EN1 = 1,
Reg.SHDN_EN10 = 1 and Ch1
no-switching and VOUT1 = 4.2V,
BAT = 3.3V
Shutdown Supply Current into
VOUT1 (including CH9
keep-alive LDO)
IOFF,VOUT1
100
CH1 (Sync Step-Up PWM) +
CH2 (Sync Step-Up/Down) +
CH3 (Sync Step-Down) + CH4
(Sync Step-Down) + CH10 (Sync
Step-Down) Supply Current into
VDDM
CH2 (Sync Step-Up/Down) +
CH3 (Sync Step-Down) + CH4
(Sync Step-Down) + CH10 (Sync IQ234,10
Step-Down) Supply Current into
VDDM
EN = 3.3V, Reg.SHDN_EN1 = 1,
And Non switching.
IQ1234,10
--
--
--
--
1600
1400
A
A
EN = 3.3V, And Non switching.
CH5 (sync Step-Down)
IQ5
EN = 3.3V, And Non switching
EN = 3.3V, And no load.
--
--
--
--
--
--
--
--
--
--
400
100
500
100
400
A
A
A
A
A
Supply Current into VDDM
CH6 (LDO)
Supply Current into VDDM
IQ6
CH7 (WLED) in Async Step-Up
IQ7bo
EN = 3.3V, And Non switching
EN = 3.3V, And no load.
Mode Supply Current into VDDM
CH8 (LDO)
Supply Current into VDDM
IQ8
CH10 (sync Step-Down)
IQ10
EN = 3.3V, And Non switching,
Supply Current into VDDM
Oscillator
CH1, 3, 4, 5, 10 Operation
FOSC
CH1 in PWM mode
1800 2000 2200 kHz
Frequency
CH2, 7 Operation Frequency
FOSC
900
80
1000 1100 kHz
CH1 Maximum Duty Cycle
(Step-Up)
FOSC = 2000kHz
FOSC = 1000kHz
83
83
--
86
86
%
%
%
CH2 Maximum Duty Cycle at
LX2B
80
--
CH2 Maximum Duty Cycle at
LX2A
100
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
8
DS5035A/B-03 February 2020
RT5035A/B
Parameter
Symbol
Test Conditions
Min
Typ
Max Unit
CH3 Maximum Duty Cycle
(Step-Down)
--
--
100
100
100
97
%
%
%
%
%
CH4 Maximum Duty Cycle
(Step-Down)
--
--
--
--
CH5 Maximum Duty Cycle
(Step-Down)
CH7 Maximum Duty Cycle
(WLED)
Step-Up mode
91
--
93
--
CH10 Maximum Duty Cycle
(Step-Down)
100
Feedback and Output Regulation Voltage
A1.VOUT1 = 0 to 7
A1.VOUT1 = 8 to 15
1.5
2
--
--
1.5
2
%
%
VOUT1 Accuracy
The VOUTx typical values are
listed next.
VOUT2, 3, 10 Accuracy
VOUT4 Accuracy
1.5
--
1.5
%
A2.VOUT4 = 0 to 3 (near 1.8V)
A2.VOUT4 = 4 to 7 (near 1.5V)
A2.VOUT5 = 0 to 3
1.5
2
--
--
--
--
--
--
--
--
1.5
2
%
%
%
%
%
%
%
%
1.5
2
1.5
2
VOUT5 Accuracy
VOUT6 Accuracy
VOUT8 Accuracy
A2.VOUT5 = 4 to 7
A3.VOUT6 = 0 to 8
2
2
A3.VOUT6 = 9 to 15
A4.VOUT8 = 0 to 3
2
2
2
2
A4.VOUT8 = 4 to 7
2
2
Feedback Regulation Voltage @
FB7
0.285
3.01
0.3
3.1
0.315
3.19
V
V
VDDM Voltage
(CH9 LDO Output Regulation)
Power Switch Ron and Current Limit
CH1 On Resistance of MOSFET RDS(ON)_1
CH1 Current Limitation (Step-Up) ILIM_1
P-MOSFET, VOUT1 = 3.3V
N-MOSFET, VOUT1 = 3.3V
--
--
150
100
3.5
200
150
4.5
m
m
A
2.5
PMOSFET (PVDD2 LX2A),
PVDD2 = VOUT2 = 3.3V
--
--
100
200
150
100
3
150
300
200
150
4
m
m
m
m
A
CH2 On Resistance of MOSFET RDS(ON)_2A
CH2 On Resistance of MOSFET RDS(ON)_2B
NMOSFET (LX2A GND),
PVDD2 = VOUT2 = 3.3V
PMOSFET (LX2B VOUT2),
PVDD2 = VOUT2 = 3.3V
--
NMOSFET (LX2B GND),
PVDD2 = VOUT2 = 3.3V
--
Both PMOS (PVDD2 LX2A)
and NMOS (LX2B GND)
CH2 Current Limitation
ILIM_2
2.2
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is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
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9
RT5035A/B
Parameter
Symbol
Test Conditions
PMOSFET, PVDD3 = 3.3V
N-MOSFET, PVDD3 = 3.3V
Min
--
Typ
200
150
Max Unit
300
220
m
m
CH3 On Resistance of MOSFET RDS(ON)_3
--
CH3 Current Limitation
ILIM_3
2.2
3
3.8
A
(Step-Down)
P-MOSFET, PVDD4 = 3.3V
N-MOSFET, PVDD4 = 3.3V
--
--
350
350
400
400
m
m
CH4 On Resistance of MOSFET RDS(ON)_4
CH4 Current Limitation
ILIM_4
1
1.5
2
A
(Step-Down)
P-MOSFET, PVDD5 = 3.3V
N-MOSFET, PVDD5 = 3.3V
--
--
350
350
400
400
m
m
CH5 On Resistance of MOSFET RDS(ON)_5
CH5 Current Limitation
ILIM_5
1
1.5
2
A
(Step-Down)
CH7 On Resistance of MOSFET RDS(ON)_7
N-MOSFET
--
0.6
--
400
0.8
500
1
m
A
CH7 Current Limitation
ILIM_7
N-MOSFET
P-MOSFET, PVDD10 = 3.3V
N-MOSFET, PVDD10 = 3.3V
350
350
400
400
m
m
CH10 On Resistance of
MOSFET
RDS(ON)_10
--
CH10 Current Limitation
(Step-Down)
ILIM_10
1
1.5
2
A
SW4 Load Switch
Supply Voltage of SW4 at SWI
SWI
1.2
--
3.6
V
SWI = 1.8V, VOUT1 = 3.6V,
IO = 400mA
100
100
130
m
RDS(ON)
_SW4
SW4 On Resistance of MOSFET
SWI = 3.6V, VOUT1 = 5V,
IO = 400mA
--
130
m
From enabled to VSWO = VSWI
1.8V
=
SW4 Soft-Start Time
--
1.4
--
--
ms
Current Limit of SW4
CH6 LDO
ILIM_SW4
PVDD6
SWI = 1.8V
500
900
mA
Supply Voltage of Ch6
2.7
--
--
5.5
--
V
1kHz, IO = 10mA, PVDD6 = 3.6V,
VOUT6 = 2.7V
PSRR+ of Ch6
60
dB
Ch6 Dropout Voltage
Current Limit of Ch6
Control
VOUT6 = 2.7V, IO = 100mA
VOUT6 = 2.7V
--
50
80
mV
mA
ILIM_6
300
450
600
CP Pull Down Resistance
EN Input High Level Threshold
EN Input Low Level Threshold
EN Sink Current
70
1.3
--
100
--
--
k
V
--
0.4
3
V
--
1
A
SYNC Input High Level
Threshold
1.3
--
--
--
--
V
V
SYNC Input Low Level Threshold
0.4
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
10
DS5035A/B-03 February 2020
RT5035A/B
Parameter
SYNC Sink Current
Symbol
Test Conditions
Min
Typ
Max Unit
--
1
3
A
Thermal Protection
Thermal Shutdown
TSD
125
--
160
20
--
--
°C
°C
Thermal Shutdown Hysteresis
VNEG Charge Pump
TSD
Charge Pump Low Threshold to
Start
NVst
Monitor BAT falling
3.4
3.6
3.8
V
Charge Pump Hysteresis gap to
Stop
NVst
0.1
4.1
0.2
4.5
0.3
4.9
V
V
(BAT-VNEG) Clamp Level
CH8 LDO
Supply Voltage of Ch8
PVDD8
2.7
--
--
5.5
--
V
1kHz, IO = 10mA, PVDD8 = 3.6V,
VOUT8 = 3.4V
PSRR+ of Ch8
60
dB
Ch8 Dropout Voltage
Current Limit of Ch8
CH9 Keep-Alive LDO
VOUT8 = 3.4V, IO = 100mA
VOUT8 = 3.4V
--
40
60
mV
mA
ILIM_8
220
300
380
Supply Voltage of CH9 at VOUT1
Pin
2.4
--
--
5.5
--
V
PSRR+ of CH9
1kHz, IO = 1mA, VDDM = 3.1V
40
dB
CH9 Dropout Voltage
VDDM = 3.1V, IO = 20mA
VDDM = 3.1V
--
50
2.15
--
220
100
2.2
2.4
--
300
--
mV
mA
V
Current Limit of RTC LDO
ILIM_9
Hysteresis Low
Hysteresis High
Rising Delay Time
falling
rising
--
RESET
RESET
RESET
RESET
RESET
2.45
0.5
--
V
--
s
CH9 Quiescent Current
RTC
Excluding RTC quiescent current
--
10
A
RTC Operation Voltage
1.9
--
--
--
3.3
3
V
RTCPWR > UVLO threshold XIN
= XOUT = 14pF
RTC Quiescent Current
(Including RTC_UVLO,
A
RTC_OSC, and Time Counter)
RTCPWR < UVLO threshold
--
--
--
32.768
--
0.2
--
A
kHz
ppm
RTC Clock
RTC Clock Accuracy
RTCPWR = 1.9V to 3.3V
Pin C32K source Out 0.1mA
Pin C32K sink 0.1mA
10
10
VDDM
0.3
RTC Clock Output High
RTC Clock Output Low
--
--
--
V
V
--
0.3
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
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11
RT5035A/B
Parameter
Symbol
VRTC_F
Test Conditions
RTCPWR falling
Min
Typ
Max Unit
1.8
1.9
2
2.3
1
V
V
s
RTC Under Voltage Lockout
Threshold (UVLO)
VRTC_F
+ 20m
VRTC_R
RTCPWR rising
2.2
0.5
60
RTC OSC Startup Time
--
--
Switch Ron from VDDM to
RTCPWR
P-MOSFET, VDDM = 3.1V
--
Under-Voltage and Over-Voltage Protection
CH1 OVP Threshold @ VOUT1
5.6
5.8
5.8
6
6
V
V
CH2 OVP Threshold @ VOUT2
6.2
CH7 OVP Threshold Accuracy @
LX7
Target voltage is the chosen one Target
Target
+ 1
Target
V
in A7.OVP7
1
1.95
1.4
0.525
0.7
--
CH1 UVP Threshold @ VOUT1
CH2 UVP Threshold @ VOUT2
CH3 UVP Threshold @ VOUT3
CH4 UVP Threshold @ VOUT4
SW4 Load Switch UVP Threshold
SW4 Load Switch UVP Threshold
CH5 UVP Threshold @ VOUT5
2.25
1.6
0.6
0.8
0.9
0.9
0.8
1.6
0.8
2.55
1.8
0.675
0.9
--
V
V
V
V
V
V
V
VSWI-VSWO
VSWO
--
--
0.7
--
0.9
--
A3.VOUT6 = 0 to 9
CH6 UVP Threshold @ VOUT6
V
A3.VOUT6 = 10 to 15
--
--
Target voltage is the chosen one
in A4.VOUT8
0.5 x
Target
CH8 UVP Threshold @ VOUT8
CH10 UVP Threshold @ VOUT10
--
0.7
--
--
0.9
--
V
V
V
0.8
CH1 Over-Load P threshold
(OLP) @ VOUT1
Target voltage is the chosen one
in A1.VOUT1
Target
0.6
Target voltage is the chosen one
in A1.VOUT2
Target
0.4
CH2 OLP Threshold @ VOUT2
CH3 OLP Threshold @ VOUT3
CH4 OLP Threshold @ VOUT4
CH5 OLP Threshold @ VOUT5
CH10 OLP Threshold @ VOUT10
--
--
--
--
--
--
--
--
--
--
--
--
V
V
Target voltage is the chosen one
in A2.VOUT3
Target
0.15
Target voltage is the chosen one
in A2.VOUT4
Target
0.2
V
Target voltage is the chosen one
in A3.VOUT5
Target
0.2
V
Target voltage is the chosen one
in A5.VOUT10
Target
0.2
V
for OCP and OLP, except OCP of
CH2
Protection Delay Time
100
ms
I2C
SDA, SCLK Input High Level
Threshold
0.7 x
VDDM
--
--
--
V
V
SDA, SCLK Input Low Level
Threshold
0.3 x
VDDM
--
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
12
DS5035A/B-03 February 2020
RT5035A/B
Parameter
SCLK Clock Rate
Symbol
fSCL
Test Conditions
Min
Typ
Max Unit
VDDM = 3.1V, VOUT2 = 3.3V
--
--
400
kHz
Hold Time (Repeated) START
condition.
After this Period, the First Clock
Pulse is Generated
tHD;STA
0.6
--
--
s
LOW Period of the SCL Clock
HIGH Period of the SCL Clock
tLOW
1.3
0.6
--
--
--
--
s
s
tHIGH
Set-up Time for a Repeated
START Condition
tSU;STA
0.6
--
--
s
Data Hold Time
tHD;DAT
tSU;DAT
0
--
--
--
0.9
--
s
ns
s
Data Set-Up Time
100
0.6
Set-Up Time for STOP Condition tSU;STO
--
Bus Free Time between a STOP
tBUF
1.3
20
20
2
--
--
--
--
--
s
ns
and START Condition
Rise Time of both SDA and SCL
Signals
tR
300
300
--
Fall Time of both SDA and SCL
Signals
tF
ns
SDA and SCL Output Low Sink
Current
IOL
SDA or SCL voltage = 0.4V
mA
Output Voltage Ramp Rate
VOUT1 Ramp Rate
VOUT2 Ramp Rate
VOUT3 Ramp Rate
VOUT4 Ramp Rate
VOUT5 Ramp Rate
VOUT6 Ramp Rate
VOUT8 Ramp Rate
VOUT10 Ramp Rate
VOUT1 = 3.6V to 5.3V
VOUT2 = 0V to 3.25V
VOUT3 = 0V to 1.1V
VOUT4 = 0V to 1.8V
VOUT5 = 0V to 2.2V
VOUT6 = 0V to 2.7V
VOUT8 = 0V to 3.4V
VOUT10 = 0V to 1.35V
--
--
--
--
--
--
--
--
1.24
0.82
0.33
0.44
0.6
--
--
--
--
--
--
--
--
V/ms
V/ms
V/ms
V/ms
V/ms
V/ms
V/ms
V/ms
0.84
0.84
0.41
Ramp Rate Accuracy of All the
Above
40
--
+40
%
Enabling Delay Time
Delay Time Step Resolution
Off Discharge
For ENDLY2, 3, 4, 10
1.5
2
2.5
ms
VOUT1, 2, 3, 4, 5, 10 Discharge
Equivalent Resistance
VDDM = 3.1V and VOUTx = 1V
VDDM = 3.1V and SWO = 1V
VDDM = 3.1V and VOUT6 = 1V
VDDM = 3.1V and VOUT8 = 1V
50
--
--
--
--
--
--
--
--
SW4 Discharge Equivalent
Resistance
400
200
200
VOUT6 Discharge Equivalent
Resistance
VOUT8 Discharge Equivalent
Resistance
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
www.richtek.com
13
RT5035A/B
Parameter
Symbol
Test Conditions
Min
Typ
Max Unit
VDDM Discharge Equivalent
Resistance
VM = 4.2V and VDDM = 1V
200
--
--
Each Channel Discharge Finish
Threshold for Next Channel
Starting to Turn Off
0.05
0.1
0.15
V
CH1 Async. PFM
N-MOSFET On-Time
Minimum Off-Time
--
--
0.5
0.5
0.8
3.6
--
--
s
s
A
N-MOSFET Current Limit
VOUT1 Regulation Voltage
--
--
3.5
3.7
V
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2. JA is measured at TA = 25C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. JC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
14
DS5035A/B-03 February 2020
RT5035A/B
Typical Application Circuit
RT5035A/B
L1
2.2μH
26
1
PVDD5
LX1
V
V
BAT
BAT
C
C
IN1
IN5
4.7μF
4.7μF
L5
2.2μH
40
V
VOUT1
PVDD2
MOTOR
25
27
C
OUT1
LX5
VOUT5
10μF x 2
VOUT5/FB5
24
V
C
BAT
OUT5
C
IN2
10μF
10μF
13
5
L2
BAT
V
BAT
C
BAT
2.2μH
23
21
LX2A
LX2B
4.7μF
V
MOTOR
PVDD6
VOUT6
C
IN6
1μF
19
32
4
VOUT2
VOUT2
PVDD3
VOUT6
C
C
2.2μF
OUT2
OUT6
R6
5k
10μF x 2
V
BAT
C
IN3
L3
1.2μH
10μF
D7
Back Light
30
33
LX3
VOUT3
C
OUT7
1μF
D1
D2
D3
D4
VOUT3/FB3
L7
10μH
C
OUT3
40μF
6
3
LX7
FB7
V
BAT
C
8
IN7
PVDD4/10
V
BAT
D5
D6
1μF
C
IN4
4.7μF
L4
2.2μH
R
10
EXT
7
LX4
VOUT4
14
VOUT4/SWI
28
29
VOUT8
PVDD8
VOUT8
C
OUT4
C
2.2μF
OUT8
10μF
V
I/O
3.25V
V
MOTOR
C
IN8
R
R
SDA
SCL
1μF
18
17
16
SCL
SDA
L10
2
I C Bus
2.2μH
9
LX10
VOUT10
15
SWO
SWO
VOUT10/FB10
VDDM
C
C
SWO
10μF
OUT10
10μF
V
38
2
12
DDM
CP
To ASIC Power Sequencer
C
VDDM
C
10nF
CP
2.2μF
R
RESET
10k
11
10
CN
V
RESET
DDM
VNEG
To ASIC Power Sequencer
C
VNEG
1μF
R
RTCPWR
1k
37
RTCPWR
+
C
1μF
39
20
34
RTCPWR
Backup
Battery
SYNC
R
31
36
SEQ
To ASIC Power Sequencer
C32K
XIN
SEQ
C
XIN
Y1
RTCGND
15pF
35
22
XOUT
EN
C
XOUT
41 (Exposed Pad)
15pF
From ASIC
Power Sequencer
GND
Chip Enable
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
www.richtek.com
15
RT5035A/B
Typical Operating Characteristics
CH2 Buck-Boost Efficiency vs. Output Current
100
CH1 Boost Efficiency vs. Output Current
100
90
80
90
80
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
= 3.6V
= 4.2V
= 5V
= 3.6V
= 4.2V
= 4.5V
V
= 3.25V, L = 2.2μH, C
= 10μF x 2
OUT
OUT
V
= 5V, L = 2.2μH, C
= 10μF x 2
OUT
OUT
10
100
1000
10
100
1000
10000
Output Current (mA)
Output Current (mA)
CH3 Buck Efficiency vs. Output Current
CH4 Buck Efficiency vs. Output Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
V
V
V
V
V
= 2.1V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
= 3.6V
= 4.2V
= 5V
= 3.6V
= 4.2V
= 5V
V
= 1.16V, L = 1.2μH, C
= 44μF
OUT
V
= 1.8V, L = 2.2μH, C
= 10μF
OUT
OUT
OUT
10
100
1000
10000
10
100
1000
Output Current (mA)
Output Current (mA)
CH5 Buck Efficiency vs. Output Current
CH7 Efficiency vs. Input Voltage
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
= 3.6V
= 4.2V
= 5V
Load = 6WLEDs/30mA, L = 10μH, C
= 1μF
V
= 1.23V, L = 2.2μH, C
= 10μF
OUT
OUT
OUT
1.8 2.1 2.4 2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Input Voltage (V)
10
100
1000
Output Current (mA)
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
16
DS5035A/B-03 February 2020
RT5035A/B
CH10 Buck Efficiency vs. Output Current
CH1 Boost Output Voltage vs. Output Current
5.06
100
90
80
70
60
50
40
30
20
10
0
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
4.88
4.86
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
= 3.6V
= 4.2V
= 4.5V
= 3.6V
= 4.2V
= 5V
L = 2.2μH, C
= 10μF x 2
V
= 1.35V, L = 2.2μH, C
= 10μF
OUT
OUT
OUT
0
200
400
600
800
1000
1200
10
100
1000
Output Current (mA)
Output Current (mA)
CH3 Buck Output Voltage vs. Output Current
1.18
CH2 Buck-Boost Output Voltage vs. Output Current
3.30
L = 2.2μH, C
= 10μF x 2
OUT
1.16
1.14
1.12
1.10
1.08
1.06
3.25
3.20
3.15
3.10
3.05
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
= 3.6V
= 4.2V
= 5V
= 3.6V
= 4.2V
= 5V
L = 1.2μH, C
= 44μF
OUT
0
200
400
600
800
1000
0
500
1000
1500
2000
Output Current (mA)
Output Current (mA)
CH5 Buck Output Voltage vs. Output Current
1.240
CH4 Buck Output Voltage vs. Output Current
1.81
1.80
1.79
1.78
1.77
1.76
1.75
1.74
1.73
1.72
1.71
V
V
V
V
V
V
= 2.1V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
1.235
1.230
1.225
1.220
= 3.6V
= 4.2V
= 5V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
V
V
= 4.2V
= 5V
IN
IN
= 3.6V
L = 2.2μH, C
= 10μF
L = 2.2μH, C
= 10μF
OUT
800
OUT
0
200
400
600
800
1000
0
200
400
600
1000
Output Current (mA)
Output Current (mA)
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
www.richtek.com
17
RT5035A/B
CH6 LDO Output Voltage vs. Output Current
CH8 LDO Output Voltage vs. Output Current
5.07
2.950
2.945
2.940
2.935
2.930
2.925
2.920
2.915
2.910
2.905
2.900
5.06
5.05
5.04
5.03
5.02
5.01
5.00
4.99
4.98
V
V
V
V
V
V
= 5V
IN
IN
IN
IN
IN
IN
= 5.1V
= 5.2V
= 5.3V
= 5.4V
= 5.5V
V
V
V
V
V
V
= 3V
IN
IN
IN
IN
IN
IN
= 3.3V
= 3.6V
= 4.2V
= 4.5V
= 5V
C
= 1μF
C
= 1μF
OUT
OUT
0
50
100
150
200
0
50
100
150
200
Output Current (mA)
Output Current (mA)
CH10 Buck Output Voltage vs. Output Current
1.355
CH9 LDO Output Voltage vs. Output Current
3.20
1.350
1.345
1.340
1.335
1.330
1.325
1.320
3.15
3.10
3.05
3.00
V
V
V
V
V
V
= 1.8V
= 2.4V
= 3V
IN
IN
IN
IN
IN
IN
V
V
V
V
V
V
= 3.3V
= 3.6V
= 3.9V
= 4.2V
= 4.5V
= 5V
IN
IN
IN
IN
IN
IN
= 3.6V
= 4.2V
= 5V
C
= 1μF
L = 2.2μH, C
= 10μF
OUT
OUT
800
0
10
20
30
40
50
0
200
400
600
1000
Output Current (mA)
Output Current (mA)
CH7 Output Voltage vs. Input Voltage
CH7 LED Current vs. Dimming Level
19.8
19.6
19.4
19.2
19.0
18.8
18.6
18.4
18.2
18.0
35
30
25
20
15
10
5
V
V
V
= 1.8V
= 3V
IN
IN
IN
= 5.5V
Load = 6WLEDs/30mA, L = 10μH, C
= 1μF
Load = 6WLEDs, C
= 1μF
OUT
OUT
0
0
4
8
12
16
20
24
28
32
1.8 2.1 2.4 2.7
3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Input Voltage (V)
Dimming Level
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DS5035A/B-03 February 2020
RT5035A/B
CH6 LDO Dropout Voltage vs. Load Current
0.12
CH8 LDO Dropout Voltage vs. Load Current
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0.00
0.10
0.08
0.06
0.04
0.02
0.00
90°C
90°C
40°C
40°C
25°C
25°C
0
50
100
150
200
0
50
100
150
200
Load Current (mA)
Load Current (mA)
CH6 LDO PSRR
CH9 LDO Dropout Voltage vs. Load Current
1.2
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
1.0
0.8
0.6
0.4
0.2
0.0
90°C
40°C
25°C
PVDD6 = 3.6V, VOUT6 = 2.7V, I
= 10mA
OUT
10
100
1000
10000
100000 1000000
0
10
20
30
40
50
Frequency (Hz)
Load Current (mA)
CH8 LDO PSRR
CH9 LDO PSRR
0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
VDDM = 3.1V, I
= 1mA
PVDD8 = 3.6V, VOUT8 = 3.4V, I
= 10mA
OUT
OUT
10
100
1000
10000
100000 1000000
10
100
1000
10000
100000 1000000
Frequency (Hz)
Frequency (Hz)
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RT5035A/B
Application Information
CH1 : Step-Up DC-DC Converter
CH1 is a step-up converter for motor driver power in DSC system. The converter operates at Async PFM or fixed
frequency PWM current mode which can be set by I2C. The converter integrates internal MOSFETs, FB resistors,
compensation network and synchronous rectifier for up to 95% efficiency. The output voltage of CH1 is adjustable
by the I2C interface in the range of 3.6V to 5.3V. When CH1 operates at Async. PFM mode, LX1 switches as below
waveform :
V
LX1
Output charge per cycle :
Qo = Ilpk x Ilpk x L/(Vo-Vi) /2 = L x Ilpk^2 /2/(Vo-Vi)
Qo/Cout determines the output voltage ripple.
Iout = Qo x (switching frequency)
ILpk
I
L1
Toff ³ min off time
Next cycle activated
by EA
EA monitor VOUT1 ³ 3.6V to activate the switching.
If VIN (BAT)-Vf > 3.6V à async boost not switch.
If VIN-Vf < 3.6V, LX1 switch as the above waveform.
Max Iout would be limited by peak current limit and
switching frequency.
(if VOUT1 < 3.6V)
Ton = constant on time
Ton let IL1 increase to ILpk
(where Vf is forward voltage of external Schottky diode.)
CH1 OVP Operation
Usually, CH1 suffers BEMF of motor, and OVP would occur abnormally. To eliminate this, the operation of CH1 is as
follows. When OVP (5.8V) occurs, CH1 stops switching and CH1 discharges VOUT1 through internal MOS (only for
discharge, I~30mA) until OVP hysteresis (5.5V) low threshold. If there is longer BEMF, the charging and discharging
period will repeat. PMU itself doesn’t shut down immediately, but shuts down when continuous 100mS OVP occurs.
OVP high threshold = 5.8V
OVP hysteresis low threshold = 5.5V
I_discharge
30mA
Longer BEMF
5.8V
5.5V
5V
BEMF
0V
CH2 : Synchronous Step-Up / Down DC-DC Converter
CH2 is a synchronous step-up / down converter for system I/O power. The converter operates at fixed frequency
PWM Current Mode. The converter integrates internal MOSFETs, FB resistors, compensation network and
synchronous rectifier for up to 95% efficiency. The output voltage of CH2 can be adjusted by the I2C interface in the
range of 2.9V to 3.65V.
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DS5035A/B-03 February 2020
RT5035A/B
extend battery operating voltage range. The output
voltage of CH5 is adjustable by the I2C interface in the
range of 1.2V to 2V or set by external feedback
resistors, as expressed in the following equation :
VNEG Charge Pump
The Charge pump is to increase the Vgs driving of big
PMOS in Ch2/3/4/5/10. When BAT < 3.6V and one of
Ch2/3/4/5/10 turns on, VNEG Charge Pump would turn
on and start to pump. But when pumping, the BAT
threshold to turn off and stop charge pump becomes
3.9V. When pumping, the (BAT VNEG) voltage would
be clamped at 4.5V. But because of charge pumping
architecture limitation, most negative level of the VNEG
is only (BAT). Hence, if BAT < 4.5 / 2 = 2.25V, VNEG
is limited to (BAT). When VNEG Charge pump is off,
VNEG is connected internally to GND.
VOUT_CH5 = (1 + R1 / R2) x VFB5
where VFB5 is 0.8V typically and suggested value for
R1 is 100k to 600k.
CH6 : Generic LDO
CH6 is a generic low voltage LDO for multiple purpose
power. The CH6 is a linear regulator, designed to be
stable over the entire operating load range with the use
of external ceramic capacitors. CH6 has an ON/OFF
control which can be set by I2C commands. The output
voltage of CH6 is adjustable by the I2C interface in the
range of 1.2V to 3V.
CH3 : Synchronous Step-Down DC-DC Converter
CH3 is suitable for core power in DSC system. The
converter operates in fixed frequency PWM mode with
integrated MOSFETs, FB resistors and compensation
network. The CH3 step-down converter can be
operated at 100% maximum duty cycle to extend
battery operating voltage range. The output voltage of
CH3 is adjustable by the I2C interface in the range of
1V to 1.3V. Besides, the CH3 also can be adjusted
output voltage if I2C is set to use the external resistor.
The VOUT can be calculated by the equation as below :
CH7 : WLED Driver
CH7 is a WLED driver operates at asynchronous
step-up mode with an internal MOSFET and internal
compensation. The LED current is defined by FB7
voltage and the external resistor between FB7 and
GND. The FB7 regulation voltage can be set in 32
steps from 9.2mV to 300mV, typically, via I2C interface.
The WLED current can be set by the following equation :
ILED (mA) = [0.3V / REXT] x (DIM7 + 1) / 32
VOUT_CH3 = (1 + R1 / R2) x VFB3
Where VFB3 is 0.8V typically and suggested value for
Where REXT is the current sense resistor from FB7 to
GND and (DIM7 + 1) / 32 ratio refers to I2C control
register file. The 0.3V voltage is with ±5% accuracy.
R1 is 100k to 600k.
CH4 : Synchronous Step-Down DC-DC Converter
CH4 is suitable for digital I/O power in DSC system.
The converter operates in fixed frequency PWM mode
with integrated internal MOSFETs, FB resistors and
compensation network. The CH4 step-down converter
can be operated at 100% maximum duty cycle to
extend battery operating voltage range. The output
voltage of CH4 is adjustable by the I2C interface in the
range of 1.35V to 2.14V.
The maximum ILED is defined by 0.3V / REXT
.
CH8 : Generic LDO
CH8 is a generic low voltage LDO for multiple purpose
power. The CH8 is a linear regulator, designed to be
stable over the entire operating load range with the use
of external ceramic capacitors. CH8 has an ON/OFF
control which can be set by I2C commands. The output
voltage of CH8 is adjustable by the I2C interface in the
range of 1.5V to 5.2V.
CH5 : Synchronous Step-Down DC-DC Converter
CH5 is suitable for CMOS sensor power in DSC system.
The converter operates in fixed frequency PWM mode
with integrated internal MOSFETs, FB resistors and
compensation network. The CH5 step-down converter
can be operated at 100% maximum duty cycle to
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RT5035A/B
CH9 : Keep Alive LDO and RTC Related Function Block
The RT5035A/B provides a 3.1V output LDO for all IC control circuits and real time clock. The LDO features low
quiescent current (3A) and high output voltage accuracy. This LDO is always on, even when the system is shut
down. For better stability, it is recommended to connect a 1F to the VDDM pin. The RTCPWR switch avoids back
charging from the RTCPWR node into the input node VDDM.
To ASIC Power
Sequencer
VM
VM
-
3.1V
CL = 40mA (min)
VDDM = 3.1V ±3%
+
BAT
RTCPWR
+
Backup
Battery
VM
1μF
VM
-
BAT
RTCPWR
VDDM
UVLO
+
-
2.6V/2.4V
falling
delay 4ms
+
VREF
UVLO
Low BAT
discharge
2.4V/2.2V
/RESET
To ASIC Power
Sequencer
RTCPWR
Rbias
RTCPWR
-
RTCPWR
32768Hz
RTCPWR
RTCPWR
/EN
/R
Count
YY/MM/DD, Week,
hh : mm : ss
With leap year
correction
1Hz
clock
Freq divider
RTC
UVLO
/R
RTCGND
+
1.9V
N = 0 to 63
R1
XOUT
C1
XIN
Internal bus
C2
VDDM
C32K
To ASIC Power
Sequencer
CH10 : Synchronous Step-Down DC-DC Converter
CH10 is suitable for memory power in DSC system. The converter operates in fixed frequency PWM mode or PFM
mode with integrated internal MOSFETs, FB resistors and compensation network. The CH10 step-down converter
can be operated at 100% maximum duty cycle to extend battery operating voltage range. The output voltage of
CH10 is adjustable by the I2C interface in the range of 1.2V to 1.52V or set by external feedback resistors, as
expressed in the following equation :
VOUT_CH10 = (1 + R1 / R2) x VFB10
Where VFB10 is 0.8V typically and suggested value for R1 is 100k to 600k.
RTC_C32K
The Frequency Divider from 32768Hz to 1Hz would generate the below 1Hz wave that with a little jitter but the 1Hz
average frequency can be finely tuned.
RTCPWR
RTCPWR
C32K
1Hz
clock
Freq divider
N = 0 to 127
Rbias
R1
C1
32767 CLKo
32767 CLKo
...
32767 CLKo
N CLKo
1Hz clock
C2
1
2
60
1
60sec
Fine tune 1Hz by digital divider can create
tuning range = (-60 to 67) / (32768Hz x 60s) = -30 to 33 ppm
each tune step size = 0.5 ppm.
But the 1Hz would include jitter and the C32K still is not tuned.
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DS5035A/B-03 February 2020
RT5035A/B
RTC time read/write method :
When reading RTC time via I2C interface, suggest read 6 bytes (address A11 to A16) together and finish reading
within 0.5 second to avoid the second carry issue. A16.RTCT_SEC[0] can be used for checking whether second is
carried during reading time. When writing RTC time via I2C interface, suggest to write 6 bytes (address A11 to A16)
together. A11 is first and then A12, A13, A14, A15, A16. Suggest finishing writing within 0.5 second to avoid second
carry issue during writing.
Output Voltage Ramp Rate
For instance, CH3 VCORE output voltage ramp up rate = 1.5 x 0.8V / 4ms = 0.3V/ms. The ramp up/down rate is kept
the same for enabling soft-start or dynamic output voltage adjustment.
Each channel has different ramp rate as listed below.
1.3V
Ramp rate =
1.5 x 0.8V/4ms
1.1V
Ramp rate = 1.5 x
0.8V/4ms
0V
0.7ms
3.7ms
Note :
About Dynamic Voltage Scaling, CH1, CH3, CH4, CH8, CH10 output voltage can be changed without inrush and
Vout ramping control when they have been turned on (said, dynamically change Vout). CH2, CH5, CH6 are not.
Synchronization and Spread Spectrum
If SYNC remains logic high or low, the spread spectrum clock will act the main clock for PWM. And, spread spectrum
function can be turned off by register A15.SS.
If the toggling clock of SYNC is detected, the PLL clock will act the main clock for PWM and the clock of PLL will
track its frequency. And the division ratio is decided by A15.SYN_DIV.
Furthermore, according to the logic high and low level threshold voltage, both 1.8V and 3V logic are compatible. If it
isn't used, the SYNC pin must be connected to GND.
VDDM
SYNC
ASIC
CLK
Spread Spectrum
Clock Generator
Detection
0
1
Clock for PWM
synchronization
A15.SS
The output interface
of ASIC : Push-Pull
is preferred.
DIV
A15.SYN_DIV
PLL
If the clock of SYNC is 12MHz, VDDM is not recommended as pull-up power voltage. Other power domains can be
used if they fit the logic high and logic low threshold voltage.
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RT5035A/B
Power On/Off Sequence
Part.A : Li (SHDN_PFM1 = 0)
Battery Installed
And BATUVLO goes LOW
BAT
0V
PWM operation
5.0V (for instance)
VOUT1
5V
0V
BAT
BAT
VM(internal)
3.1V
3.1 or BAT
3.1 or BAT
VDDM
0V
VDDM>2.4V and RTCOSC stable
/RESET
(Sync with C32K)
EN pin
VREF, OSC, OTP, VDDM_UVLO, SEQ detection are ready.
REF_GOOD
CH3
ENDLY3
SHDLY3
ENDLY2
CH2
CH4
ENDLY4
ENDLY10
A13.SHDN_EN10=0
CH10
SHDLY2=0
SHDLY4=0
SHDLY10=0
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DS5035A/B-03 February 2020
RT5035A/B
Part.B : 2AA (SHDN_PFM1 = 1)
BAT
Battery Installed
And BATUVLO goes LOW
0V
PWM operation
5.0V (for instance)
PFM operation
PFM operation
3.6V
3.6V
VOUT1
5V
0V
3.6V
3.6V
VM(internal)
3.1V
3.1 or BAT
VDDM
0V
VDDM>2.4V and RTCOSC stable
/RESET
(Sync with C32K)
EN pin
VREF, OSC, OTP, VDDM_UVLO, SEQ detection are ready.
REF_GOOD
CH3
ENDLY3
SHDLY3
ENDLY2
CH2
CH4
ENDLY4
ENDLY10
A13.SHDN_EN10=0
CH10
SHDLY2=0
SHDLY4=0
SHDLY10=0
CH1 :
For 2AA case, as long as the BAT voltage is higher than UVLO and EN pin = L, CH1 keeps working in PFM mode
3.6V (default SHDN_EN1 = 1). However, when A14.PWM1 = 1, EN pin = H and the VDDM voltage is higher than
UVLO, CH1 will switch from PFM mode to PWM mode.
As for Li battery case, to save electricity, when BAT voltage is higher than UVLO and EN pin = L, the CH1 would be
off and truly shutdown (default SHDN_EN1 = 0)
CH2/3/4 :
CH2, CH3 and CH4 are both enabled by EN pin and with turn on delay time defined in I2C register A9 to A10.
CH10 :
CH10 is also equipped PFM operation to reduce operating quiescent current for memory self-refresh application.
When EN = H, I2C registers can be set to ready to get into standby mode. (Set SHDN_EN1 = 1 and SHDN_EN10 =
1)
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RT5035A/B
And then EN goes low, IC will get into standby mode with CH1 and CH10 operating in PFM mode.
If BAT > 2.8V is guaranteed, SHDN_EN1 could be 0 to save electricity in standby mode.
As for back to shutdown mode, EN goes high, and to set I2C registers back to shutdown mode (SHDN_EN10 = 0
and SHDN_EN1 = 0 for Li battery. SHDN_EN10 = 0 and SHDN_EN1 keeps 1 for 2AA) and then EN goes low finally.
Power Sequence with Delay Time
The start point referred by ENDLYx delay time begins when the EN pin goes high. For instance, A14.EN8 = 1, CH8
turns on immediately.
EN Pin
A7.EN8
CH8 V
OUT
I2C Register Information
The RT5035A/B I2C interface power must be supplied by either VOUT2 or an equal potential node. If
= Low,
RESET
I2C read/write can not function. The RT5035A/B I2C slave address = 0011000 (7bits). I2C interface supports fast
mode (bit rate up to 400kb/s). The write or read bit stream (N ³1) is shown below :
SDA
t
LOW
t
t
t
F
t
SP
SU;DAT
t
HD;STA
t
F
R
t
R
t
BUF
SCL
t
t
t
SU;STO
HD;STA
SU;STA
t
t
HIGH
HD;DAT
S
P
S
S
r
Read N bytes from RT5035
Slave Address
Register Address
Slave Address
MSB
MSB
Data 1
LSB
S
0
A
A
Sr
1
A
A
R/W
Assume Address = m
MSB Data 2
Data for Address = m
LSB
LSB
Data N
A
A
P
Data for Address = m+N-1
Data for Address = m+1
Register Address
Write N bytes to RT5035
Slave Address
MSB
Data 1
LSB MSB
A
Data 2
LSB
S
0
A
A
A
Assume Address = m
Data for Address = m
MSB
Data for Address = m+1
LSB
R/W
Data N
A
P
Data for Address = m+N-1
P Stop, S Start, Sr Repeat Start
Driven by Master,
Driven by Slave (RT5035),
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DS5035A/B-03 February 2020
RT5035A/B
I2C Register File
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
VOUT1
VOUT2
1
1
1
1
1
0
0
0
A1
0X01
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting of CH1 Output Voltage (Range : 5.3V to 3.6V, Default = 3.6V)
Code
0000
0001
0010
0011
Voltage
5.3V
5.2V
5.1V
5V
Code
0100
0101
0110
0111
Voltage
4.9V
Code
1000
1001
1010
1011
Voltage
4.5V
Code
1100
1101
1110
1111
Voltage
4V
VOUT1
4.8V
4.4V
3.9V
3.8V
3.6V
4.7V
4.3V
4.6V
4.2V
Setting of CH2 Output Voltage (Range : 3.65V to 2.9V, Default = 3.25V)
Code
0000
0001
0010
Voltage
3.65V
3.6V
Code
0100
0101
0110
Voltage
3.45V
3.4V
Code
1000
1001
1010
Voltage
3.25V
3.2V
Code
1100
1101
1110
Voltage
3.05V
3V
VOUT2
3.55V
3.35V
3.15V
2.95V
0011
3.5V
0111
3.3V
1011
3.1V
1111
2.9V
Note : If CH1 operate in PFM mode (the bit A14.PWM1 = 0), VOUT1 = 3.6V only
Address Register
Name Address
Bit7
Bit6
VOUT3
Decided by SEQ
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
VOUT4
Decided by SEQ
A2
0X02
Read/Write
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
Reset
Condition
Setting of CH3 Output Voltage (Range : 1.3V to 1V, Default is setting by SEQ)
Code
0000
0001
0010
0011
Voltage
1.3V
Code
0100
0101
0110
0111
Voltage
1.22V
1.2V
Code
1000
1001
1010
1011
Voltage
1.14V
1.12V
1.1V
Code
1100
1101
1110
1111
Voltage
1.04V
1.02V
1V
VOUT3
1.28V
1.26V
1.24V
1.18V
1.16V
1.06V
REF
Setting of CH4 Output Voltage (Range : 2.14V to 1.35V, Default is setting by
SEQ)
Code
0000
0001
0010
0011
Voltage
2.14V
2.1V
Code
0100
0101
0110
0111
Voltage
2V
Code
1000
1001
1010
1011
Voltage
1.84V
1.8V
Code
1100
1101
1110
1111
Voltage
1.5 V
VOUT4
1.96V
1.92V
1.88V
1.46V
1.39V
1.35V
2.06V
2.04V
1.76V
1.54V
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RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning Reserved
VOUT5
1
VOUT6
Default
0
1
0
0
0
1
1
A3
0X03
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting of CH5 Output Voltage (Range : 2V to 1.2V, Default = 1.2V)
Code
000
Voltage
2V
Code
010
Voltage
1.5V
Code
100
Voltage
1.26V
Code
110
Voltage
1.2V
VOUT5
001
1.8V
011
1.35V
101
1.23V
111
REF
Setting of CH6 Output Voltage (Range : 3V to 1.2V, Default = 2.7V)
Code
0000
0001
0010
0011
Voltage
3V
Code
0100
0101
0110
0111
Voltage
2.6V
Code
1000
1001
1010
1011
Voltage
2.2V
2V
Code
1100
1101
1110
1111
Voltage
1.7V
VOUT6
2.9V
2.8V
2.7V
2.5V
1.5V
2.4V
1.9V
1.8V
1.4V
2.3V
1.2V
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
VOUT8
1
DIM7
1
0
0
1
1
1
1
A4
0X04
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting of CH8 Output Voltage (Range : 5.2V to 1.5V, Default = 5V)
Code
000
Voltage
5.2V
Code
010
Voltage
5V
Code
100
Voltage
3.4V
Code
110
Voltage
3V
VOUT8
DIM7
001
5.1V
011
3.5V
101
3.3V
111
1.5V
Defines LED current dimming ratio of CH7
The dimming ratio is (DIM7 + 1) / 32.
DIM7 define FB7 regulation voltage = 0.3V x (DIM7 + 1) / 32
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning Reserved Reserved Reserved Reserved Reserved
VOUT10
by SEQ
R/W
Default
0
0
0
0
0
A5
0X05
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
B
R/W
B
Reset
Condition
B
B
B
B
B
B
Setting of CH10 Output Voltage (Range : 1.52V to 1.2V, Default = SEQ Setting)
Code
000
Voltage
1.52V
1.5V
Code
010
Voltage
1.37V
Code
100
Voltage
1.25V
Code
110
Voltage
1.2V
VOUT10
001
011
1.35V
101
1.22V
111
REF
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is a registered trademark of Richtek Technology Corporation.
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28
DS5035A/B-03 February 2020
RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning Reserved Reserved DIS10
DIS5
1
DIS4
1
DIS3 Reversed Reserved
Default
0
0
0
1
0
0
A6
0X06
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
1 : CH10 would discharge VOUT10 node when it turns off.
0 : CH10 would not discharge VOUT10 node when it turns off.
DIS10
DIS5
DIS4
DIS3
1 : CH5 would discharge VOUT5 node when it turns off.
0 : CH5 would not discharge VOUT5 node when it turns off.
1 : CH4 would discharge VOUT4 node when it turns off.
0 : CH4 would not discharge VOUT4 node when it turns off.
1 : CH3 would discharge VOUT3 node when it turns off.
0 : CH3 would not discharge VOUT3 node when it turns off.
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning Reserved Reserved Reserved Reserved Reserved
OVP7
1
Default
0
0
0
0
0
1
0
A7
0X07
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Setting CH7 OVP threshold at VOUT7 node in Step-Up mode (Range : 8V to 25V,
Default = 20V)
Code
000
Voltage
8V
Code
010
Voltage
12V
Code
100
Voltage
16V
Code
110
Voltage
20V
OVP7
001
10V
011
14V
101
18V
111
25V
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
Reserved
0
0
0
0
0
0
0
0
A8
0X08
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
Reserved
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29
RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
ENDLY3
Decided by SEQ
ENDLY2
Decided by SEQ
Default
A9
0X09
Read/Write
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
Reset
Condition
Setting ENDLY3 for CH3 Power on delay time (2ms x ENDLY3).
Code
0000
0001
0010
0011
Voltage
0ms
Code
0100
0101
0110
0111
Voltage
8ms
Code
1000
1001
1010
1011
Voltage
16ms
18ms
20ms
22ms
Code
1100
1101
1110
1111
Voltage
24ms
26ms
28ms
30ms
ENDLY3
2ms
10ms
12ms
14ms
4ms
6ms
Setting ENDLY2 for CH2 Power on delay time (2ms x ENDLY2).
Code
0000
0001
0010
0011
Voltage
0ms
Code
0100
0101
0110
0111
Voltage
8ms
Code
1000
1001
1010
1011
Voltage
16ms
18ms
20ms
22ms
Code
1100
1101
1110
1111
Voltage
24ms
26ms
28ms
30ms
ENDLY2
2ms
10ms
12ms
14ms
4ms
6ms
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
ENDLY10
Decided by SEQ
ENDLY4
Decided by SEQ
A10
0X0A
Read/Write
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
Reset
Condition
Setting ENDLY10 for CH10 Power on delay time (2ms x ENDLY10).
Code
0000
0001
0010
0011
Voltage
0ms
Code
0100
0101
0110
0111
Voltage
8ms
Code
1000
1001
1010
1011
Voltage
16ms
18ms
20ms
22ms
Code
1100
1101
1110
1111
Voltage
24ms
26ms
28ms
30ms
ENDLY10
2ms
10ms
12ms
14ms
4ms
6ms
Setting ENDLY4 for CH4 Power on delay time (2ms x ENDLY4).
Code
0000
0001
0010
0011
Voltage
0ms
Code
0100
0101
0110
0111
Voltage
8ms
Code
1000
1001
1010
1011
Voltage
16ms
18ms
20ms
22ms
Code
1100
1101
1110
1111
Voltage
24ms
26ms
28ms
30ms
ENDLY4
2ms
10ms
12ms
14ms
4ms
6ms
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
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30
DS5035A/B-03 February 2020
RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
SHDLY3
Decided by SEQ
SHDLY2
Decided by SEQ
A11
0X0B
Read/Write
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
Reset
Condition
Setting SHDLY3 for CH3 Power off delay time (2ms x SHDLY3).
Code
0000
0001
0010
0011
Voltage
0ms
Code
0100
0101
0110
0111
Voltage
8ms
Code
1000
1001
1010
1011
Voltage
16ms
18ms
20ms
22ms
Code
1100
1101
1110
1111
Voltage
24ms
26ms
28ms
30ms
SHDLY3
2ms
10ms
12ms
14ms
4ms
6ms
Setting SHDLY2 for CH2 Power off delay time (2ms x SHDLY2).
Code
0000
0001
0010
0011
Voltage
0ms
Code
0100
0101
0110
0111
Voltage
8ms
Code
1000
1001
1010
1011
Voltage
16ms
18ms
20ms
22ms
Code
1100
1101
1110
1111
Voltage
24ms
26ms
28ms
30ms
SHDLY2
2ms
10ms
12ms
14ms
4ms
6ms
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
SHDLY10
Decided by SEQ
SHDLY4
Decided by SEQ
A12
0X0C
Read/Write
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
R/W
B
Reset
Condition
Setting SHDLY10 for CH10 Power on delay time (2ms x SHDLY10).
Code
0000
0001
0010
0011
Voltage
0ms
Code
0100
0101
0110
0111
Voltage
8ms
Code
1000
1001
1010
1011
Voltage
16ms
18ms
20ms
22ms
Code
1100
1101
1110
1111
Voltage
24ms
26ms
28ms
30ms
SHDLY10
2ms
10ms
12ms
14ms
4ms
6ms
Setting SHDLY4 for CH4 Power on delay time (2ms x SHDLY4).
Code
0000
0001
0010
0011
Voltage
0ms
Code
0100
0101
0110
0111
Voltage
8ms
Code
1000
1001
1010
1011
Voltage
16ms
18ms
20ms
22ms
Code
1100
1101
1110
1111
Voltage
24ms
26ms
28ms
30ms
SHDLY4
2ms
10ms
12ms
14ms
4ms
6ms
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is a registered trademark of Richtek Technology Corporation.
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RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SHDN_ SHDN_
Meaning Reserved Reserved Reserved Reserved Reserved Reserved
PFM1
0
PFM10
0
Default
0
0
0
0
0
0
A13
0X0D
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
0 : CH1 is off when EN is low (Part. A default)
1 : CH1 operates at PFM when EN is low (Part. B default)
SHDN_PFM1
SHDN_PFM10
0 : CH10 is off when EN is low
1 : CH 10 operates at PFM when EN is low
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
PWM1 ENSW4
EN4
1
EN5
0
EN6
0
EN7
0
EN8
0
PWM10
1
1
0
A14
0X0E
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
A
A
A
A
A
A
A
A
1 : Means CH1 in Peak-Current Control PWM synchronous rectified operation
mode.
PWM1
0 : Means CH1 in PFM asynchronous rectified operation mode.
1 : Enable SW4.
0 : Disable SW4
ENSW4
EN4
1 : Enable CH4
0 : Disable CH4
1 : Enable CH5
0 : Disable CH5
EN5
1 : Enable CH6
0 : Disable CH6
EN6
1 : Enable CH7
0 : Disable CH7
EN7
1 : Enable CH8
0 : Disable CH8
EN8
1 : Means CH10 in Peak-Current Control PWM synchronous rectified operation
PWM10
mode.
0 : Means CH10 in PFM mode
Notes :
ENSW4, EN4/5/6/7/8 at A14 : enable (ENx = 1) or disable (ENx = 0) SW4/CH4/5/6/7/8
When EN pin goes high, CHx would turn on (after the delay time ENDLYx) if the bits ENx = 1.
The register byte A14 would be reset when the external EN input pin goes low.
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
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32
DS5035A/B-03 February 2020
RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning Reserved Reserved Reserved Reserved Reserved Reserved
SS
0
SYN_DIV
Default
0
0
0
0
0
0
0
A15
0X0F
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
B
B
B
B
B
B
B
B
0: FREQ of RT5035A/B=FREQ of SYNC
1: FREQ of RT5035A/B=FREQ of SYNC/6
SYN_DIV
SS
0: Spread spectum OFF
1: Spread spectum ON
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning Reserved Reserved Reserved Reserved DIS9
BAT_UVLO
Reserved
Default
0
0
0
0
0
1
0
0
A16
0X10
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
0: No discharge VDDM when BATUVLO occurs.
1: Discharge VDDM when BATUVLO occurs.
DIS9
BAT UVLO Setting Voltage (Range : 2.4V to 2.7V, Default = 2.6V) (Part. A)
BAT_UVLO (Li)
Code
00
Voltage
2.4V
Code
01
Voltage
2.5V
Code
10
Voltage
2.6V
Code
11
Voltage
2.7V
BAT UVLO Setting Voltage (Range : 1.7V to 2V, Default = 1.7V) (Part. B)
BAT_UVLO (2AA)
Code
00
Voltage
1.7V
Code
01
Voltage
1.8V
Code
10
Voltage
1.9V
Code
11
Voltage
2V
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
Reserved
RTCAJ
1
0
0
1
1
1
0
0
A17
0X11
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Finely tune the RTC time counting frequency by adjusting (RTCAJ − 60) / 2 ppm.
Hence, the tuning range is −30ppm to 33ppm.
RTCAJ
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RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
BUSY
Reversed
RTCT_SEC
Default
0
0
0
0
0
0
0
0
A18
0X12
Read/Write
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
BUSY
1: RTC is busy and the writing access is not allowed
Stores the SECOND field of RTC time. That is 0 to 59.
RTCT_SEC[5:0]
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning Reversed Reversed
RTCT_MIN
Default
0
0
0
0
0
0
0
0
A19
0X13
Read/Write
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
RTCT_MIN[5:0]
Stores the MINUTE field of RTC time. That is 0 to 59.
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning MODE_12H AM/PM Reversed
RTCT_HR
Default
0
0
0
0
0
0
0
0
A20
0X14
Read/Write
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
MODE_12H/24H
AM/PM
0 = 24H, 1 = 12H
0 = AM, 1 = PM
RTCT_HR[4:0]
Stores the HOUR field of RTC time. That is 0 to 23 (24hour format).
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning Reversed Reversed
RTCT_YEAR
Default
0
0
0
0
1
1
0
1
A21
0X15
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Stores the YEAR field of RTC time. That is 0 to 63. RTCT_YEAR = 0 means the
year 2000.
RTCT_YEAR[6:0]
Hence, RT5035A/B can count till the year 2063.
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
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34
DS5035A/B-03 February 2020
RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default Reversed Reversed Reversed Reversed
RTC MONTH
RTCT_MON
A22
0X16
Read/Write
0
0
0
0
0
0
0
1
Reset
Condition
C
C
C
C
C
C
C
C
Stores the MONTH field of RTC time. That is 1 to 12. RTCT_MON = 1 means
January.
RTCT_MON [3:0]
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
RTCT_WEEK
RTCT_DAY
1
1
0
0
0
0
0
1
A23
0X17
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Stores the DAY-of-WEEK field of RTC time. That is 0 to 6.
RTCT_WEK = 0 means Sunday.
RTCT_WEK [2:0]
RTCT_DAY[4:0]
RTCT_WEK = 1 means Monday.
RT5035A/B cannot calculate automatically the field based on other fields. (YEAR,
MONTH, DATE).
Stores the DATE field of RTC time. That is 1 to 31, depending on the month.
RTCT_DAY [4:0] = 1 means 1st day of each month. RT5035A/B supports leap
year counting.
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
Default
USER[7:0]
0
0
0
0
0
0
0
0
A24
A25
A26
0X18
0X19
0X1A
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Meaning
Default
USER[15:8]
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Meaning
Default
USER[23:16]
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
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RT5035A/B
Address Register
Name Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Meaning
USER[31:24]
Default
0
0
0
0
0
0
0
0
A27
0X1B
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Condition
C
C
C
C
C
C
C
C
USER[31:0] at A24 to A27: Stores user's data. It is like a SARM, which accesses
via I2C.
USER[31:0]
Reset Condition
A
B
C
External EN pin goes low.
A0 to A13 and A15 : Reset when (
= L) occurs.
RESET
A16 to A27: Reset when RTC Reset occurs.
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
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36
DS5035A/B-03 February 2020
RT5035A/B
Output Voltage List
I2C
VOUT1
VOUT2
4bit
VOUT3
4bit
VOUT4
4bit
VOUT5
3bit
VOUT6
4bit
VOUT8
3bit
VOUT10
3bit
Register Value
4bit
5.3
5.2
5.1
5
0
1
3.65
3.6
1.3
1.28
1.26
1.24
1.22
1.2
2.14
2.1
2
1.8
3
2.9
2.8
* 2.7
2.6
2.5
2.4
2.3
2.2
2
5.2
5.1
* 5
3.5
3.4
3.3
3
1.52
1.5
2
3.55
3.5
2.06
2.04
2
1.5
1.37
3
1.35
1.35
4
4.9
4.8
4.7
4.6
4.5
4.4
4.3
4.2
4
3.45
3.4
1.26
1.25
5
1.96
1.92
1.88
1.84
* 1.8
1.76
1.54
1.5
1.23
1.22
6
3.35
3.3
1.18
1.16
1.14
1.12
1.1
*1.2
1.2
7
REF (0.8)
1.5
REF (0.8)
8
* 3.25
3.2
9
10
11
12
13
14
15
3.15
3.1
1.9
1.8
1.7
1.5
1.4
1.2
1.06
1.04
1.02
1
3.05
3
3.9
3.8
* 3.6
1.46
1.39
1.35
2.95
2.9
REF (0.8)
* : Default value
VOUT3/4/10 Default Voltage is selected by the SEQ pin and latched at the moment when
goes high.
RESET
SEQ ID
SEQ1
Register
A2
The SEQ pin pull down resistance RSEQ defines Power
on/off Sequence and Default Voltage.
Item
Code
1101
1001
111
Value
1.02V
1.8V
RSEQ Range
Typical
RSEQ(k) Procedure
Power on
VOUT3
SEQ ID
(k)
A2
VOUT4
Connect to Power
A5
VOUT10
ENDLY3
ENDLY2
ENDLY10
ENDLY4
SHDLY3
SHDLY2
SHDLY10
SHDLY4
REF
SEQ #0 (>0.2V, <AVDD) before EN
goes high
Reserved
A9
0111
1011
1001
1001
1010
0000
0000
0000
14ms
22ms
18ms
18ms
20ms
0ms
Refer Table.
SEQ1
A9
SEQ #1 80> RSEQ >20
SEQ #2 20> RSEQ >5
SEQ #3 5> RSEQ >1.25
40
10
A10
A10
A11
A11
A12
A12
Refer Table.
SEQ2
Refer Table.
SEQ3
2.5
1.25> RSEQ or
SEQ #4 connect to GND
(<0.2V)
0ms
0.625 or
short to GND
Refer Table.
SEQ4
0ms
RSEQ >80 or
SEQ #5
Refer Table.
SEQ5
120 or HZ
floating (HZ)
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DS5035A/B-03 February 2020
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RT5035A/B
SEQ2
SEQ4
Register
A2
Register
A2
Item
Code
1101
1001
101
Value
1.02V
1.8V
Item
Code
1000
1001
011
Value
1.14V
1.8V
VOUT3
VOUT3
A2
VOUT4
A2
VOUT4
A5
VOUT10
ENDLY3
ENDLY2
ENDLY10
ENDLY4
SHDLY3
SHDLY2
SHDLY10
SHDLY4
1.22V
14ms
18ms
18ms
18ms
20ms
0ms
A5
VOUT10
ENDLY3
ENDLY2
ENDLY10
ENDLY4
SHDLY3
SHDLY2
SHDLY10
SHDLY4
1.35V
14ms
18ms
18ms
18ms
20ms
0ms
A9
0111
1001
1001
1001
1010
0000
0000
0000
A9
0111
1001
1001
1001
1010
0000
0000
0000
A9
A9
A10
A10
A11
A11
A12
A12
A10
A10
A11
A11
A12
A12
0ms
0ms
0ms
0ms
SEQ3
Register
A2
SEQ5
Register
A2
Item
Code
1111
1001
111
Value
REF
Item
Code
1101
1001
011
Value
1.02V
1.8V
VOUT3
VOUT3
A2
VOUT4
1.8V
REF
A2
VOUT4
A5
VOUT10
ENDLY3
ENDLY2
ENDLY10
ENDLY4
SHDLY3
SHDLY2
SHDLY10
SHDLY4
A5
VOUT10
ENDLY3
ENDLY2
ENDLY10
ENDLY4
SHDLY3
SHDLY2
SHDLY10
SHDLY4
1.35V
14ms
18ms
18ms
18ms
20ms
0ms
A9
0111
1001
1001
1001
1010
0000
0000
0000
14ms
18ms
18ms
18ms
20ms
0ms
A9
0111
1001
1001
1001
1010
0000
0000
0000
A9
A9
A10
A10
A11
A11
A12
A12
A10
A10
A11
A11
A12
A12
0ms
0ms
0ms
0ms
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
38
DS5035A/B-03 February 2020
RT5035A/B
Thermal Considerations
Layout Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature.
The maximum power dissipation can be calculated by
the following formula :
The PCB layout is an important step to maintain the
high performance of the RT5035A/B. Both the high
current and the fast switching nodes demand full
attention to the PCB layout to save the robustness of
the RT5035A/B through the PCB layout. Improper
layout might show the symptoms of poor line or load
regulation, ground and output voltage shifts, stability
issues, unsatisfying EMI behavior or worsened
efficiency. For the best performance of the RT5035A/B,
the following PCB layout guidelines must be strictly
followed.
PD(MAX) = (TJ(MAX) TA) / JA
where TJ(MAX) is the maximum junction temperature,
TA is the ambient temperature, and JA is the junction to
ambient thermal resistance.
Place the input and output capacitors as close as
possible to the input and output pins respectively for
good filtering.
For recommended operating condition specifications,
the maximum junction temperature is 125C. The
junction to ambient thermal resistance, JA, is layout
dependent. For WQFN-40L 5x5 package, the thermal
resistance, JA, is 27.5C/W on a standard JEDEC
51-7 four-layer thermal test board. The maximum
power dissipation at TA = 25C can be calculated by
the following formula :
Keep the main power traces as wide and short as
possible.
The switching node area connected to LX and
inductor should be minimized for lower EMI.
Place the feedback components as close as possible
to the FB pin and keep these components away from
the noisy devices.
PD(MAX) = (125C 25C) / (27.5C/W) = 3.63W for
WQFN-40L 5x5 package
The maximum power dissipation depends on the
operating ambient temperature for fixed TJ(MAX) and
thermal resistance, JA. The derating curve in Figure 1
allows the designer to see the effect of rising ambient
temperature on the maximum power dissipation.
Connect the GND and Exposed Pad to a strong
ground plane for maximum thermal dissipation and
noise protection.
Directly connect the output capacitors to the
feedback network of each channel to avoid bouncing
caused by parasitic resistance and inductance from
the PCB trace.
4.0
Four-Layer PCB
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
For the 32-kHz oscillator to the best performance,
observe the following guidelines :
Place the crystal and its components close to the
oscillator side and the oscillator pins.
Ensure that the ground plane under the oscillator and
its components are of good quality.
Avoid placing a separate ground under the oscillator
and connecting it to the general ground through a
single point.
0
25
50
75
100
125
Ambient Temperature (°C)
Avoid long connections to the crystal and to the load
capacitor that create a large loop on the PCB.
Figure 1. Derating Curve of Maximum Power
Dissipation
Use a short connection between the two crystal load
capacitors and route the common connection to the
oscillator ground reference.
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DS5035A/B-03 February 2020
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39
RT5035A/B
Place a ceramic capacitor for noise filtering from
RTCPWR to RTCGND with short connections.
Place the C32K (logic output signal) output so that
the return ground current runs back to RTCGND. Do
not route the trace close to the oscillator input.
The ground surrounded C32K pin and
keep away from noisy devices.
LX should be connected to Inductor by wide and short
trace, keep sensitive compontents away from this trace.
VOUT_CH3
GND
BAT
VOUT_CH1
GND
GND
Backup
Battery
COUT1
COUT1
RRTCPWR
CVDDM
CRTCPWR
CIN3
CXIN CXOUT
CIN1
Y1
COUT3
L3
L1
40 39 38 37 36 35 34 33 32 31
LX1
/RESET
FB7
1
2
30 LX3
CIN8
REXT
VOUT_CH1
CIN5
29 PVDD8
28 VOUT8
D6
D5
D4
D3
COUT8
VOUT_CH8
3
COUT6
CIN6/7
4
27 VOUT5/FB5
26 PVDD5
25 LX5
VOUT6
GND
D2
D1
BAT PVDD6
5
BAT
COUT7
L7
GND
LX7
LX4
6
VOUT_CH5
L5
D7
L4
COUT5
BAT
7
24 PVDD2
23 LX2A
22 EN
VOUT_CH4
Input/Output
CIN2
COUT4
capacitors must be
placed as close as
possible to the
8
BAT PVDD4/10
CIN4
L10
LX10
9
VOUT_CH10
L2
Input/Output pins.
COUT10
10
21 LX2B
VNEG
CVNEG
11 12 13 14 15 16 17 18 19 20
CCP
CSWO
COUT2
COUT2
GND
GND
SWO
VOUT_CH2
Connect the
Exposed Pad to
a ground plane.
Figure 2. PCB Layout Guide
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
40
DS5035A/B-03 February 2020
RT5035A/B
Max Load of Every Channel
Purpose
VDDM and VMOTOR
VI/O
RT5035A/B
Current Limit
3.5A
Max Load
1200mA
900mA
2A
Condition (VIN à VOUT
3V à 5V
)
CH1
CH2
CH3
CH4
CH5
CH6
SW4
CH7
CH8
CH9
CH10
3A
3V à 3.3V
VCORE
3A
3V à 1.1V
VMEM
1.5A
700mA
500mA
300mA
500mA
30mA
3V à 1.8V
CMOS_D
CMOS_A
Load SW
1.5A
3V à 2.2V
450mA
900mA
0.8A
3V à 2.7V
1.8V à 1.8V
6 WLED
WLED
Generic LDO
Keep-Alive LDO
VMEM
300mA
100mA
1.5A
200mA
50mA
VIN VOUT > 150mV
VIN VOUT > 300mV
3V à 1.35V
700mA
Protection Act
Protection
Type
Threshold
(Typical Value)
Delay
Time
Protection Method
Reset Method
Turn off whole IC,
100ms except CH9 and CH1 Restart if VDDM < 5.8V
in PFM (only for 2AA)
Over Voltage
VDDM
VDDM > 6V
Protection
Restart if
No delay Disable all channels VBAT > 2.6V (RT5035A),
VBAT > 1.7V (RT5035B)
VBAT < 2.4V (RT5035A)
VBAT < 1.5V (RT5035B)
BAT
UVLO
Current Limit
(in PFM )
Reset after min-off-time
NMOS current > 0.8A No delay
Turn off NMOS
finish
Turn off whole IC,
100ms except CH9 and CH1
in PFM (only for 2AA)
VOUT1 OVP
(in PWM)
VDDM power reset or
EN = low
VOUT1 > 5.8V
NMOS current > 3.5A
VOUT1< 2.25V
Turn off whole IC,
100ms except CH9 and CH1
in PFM (only for 2AA)
OCP
(in PWM)
VDDM power reset or
EN = low
CH1
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VOUT1 UVP
(in PWM)
VDDM power reset or
EN = low
Over-Load
protection
(in PWM)
Turn off whole IC,
VOUT1 < target 0.6V 100ms except CH9 and CH1
VDDM power reset or
EN = low
in PFM (only for 2AA)
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
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41
RT5035A/B
Protection
Type
Threshold
(Typical Value)
Delay
Time
Protection Method
Reset Method
Turn off whole IC,
Inductor current > 3A No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT2 OVP
CH2
VOUT2 > 6V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
VOUT2 UVP
VOUT2 < 1.6V
Turn off whole IC,
VOUT2 < target 0.4V 100ms except CH9 and CH1
Over-Load
Protection
VDDM power reset or
EN = low
in PFM (only for 2AA)
Turn off whole IC,
100ms except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
PMOS current > 3A
VOUT3 < 0.6V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
CH3
VOUT3 UVP
Turn off whole IC,
VOUT3 < target – 0.15V 100ms except CH9 and CH1
Over-Load
Protection
VDDM power reset or
EN = low
in PFM (only for 2AA)
Turn off whole IC,
100ms except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
PMOS current > 1.5A
VOUT4 < 0.8V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
CH4
VOUT4 UVP
Turn off whole IC,
VOUT4 < target 0.2V 100ms except CH9 and CH1
Over-Load
Protection
VDDM power reset or
EN = low
in PFM (only for 2AA)
Turn off whole IC,
100ms except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
PMOS current > 1.5A
VOUT5 < 0.8V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
CH5
CH6
VOUT5 UVP
Turn off whole IC,
VOUT5 < target 0.2V 100ms except CH9 and CH1
Over-Load
Protection
VDDM power reset or
EN = low
in PFM (only for 2AA)
A2.VOUT6 = 0 to 9,
Turn off whole IC,
No delay except CH9 and CH1
A2.VOUT6 = 10 to 15,
in PFM (only for 2AA)
VOUT6 < 0.8V
VOUT6<1.6V
VDDM power reset or
EN = low
UVP
Current Limit PMOS current > 450mA No delay Limit PMOS current
Reset by load
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42
DS5035A/B-03 February 2020
RT5035A/B
Protection
Type
Threshold
(Typical Value)
Delay
Time
Protection Method
Reset Method
VDDM power reset or
EN = low
OCP
OVP
NMOS current > 0.8A
100ms
Turn Off whole IC
CH7
CH8
LX7 > A4.OVP7
threshold
VDDM power reset or
EN = low
No delay
Turn Off CH7 only
Turn off whole IC,
VDDM power reset or
EN = low
UVP
VOUT8 < target x 0.5 No delay except CH9 and CH1
in PFM (only for 2AA)
Current Limit PMOS current > 300mA No delay Limit PMOS current
Reset by load
Reset by load
Current limit PMOS current > 100mA No delay Limit PMOS current
Turn off whole IC,
Restart whole IC if EN =
High and VDDM > 2.4V
CH9
VDDM UVLO
VDDM < 2.2V
No delay except CH9 and CH1
in PFM
Restart whole IC if EN =
High and VDDM > 2.4V
VDDM < 2.2V
No delay
goes low
RESET
RESET
Turn off whole IC,
100ms except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
OCP
PMOS current > 1.5A
VOUT10 < 0.8V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
VDDM power reset or
EN = low
CH10
VOUT10 UVP
Turn off whole IC,
VOUT10 < target 0.2V 100ms except CH9 and CH1
Over-Load
Protection
VDDM power reset or
EN = low
in PFM
RTCPWR
UVLO
UVP
RTCPWR < 1.9V
No delay Clear RTC registers
RTCPWR > 2.2V
Turn off whole IC,
No delay except CH9 and CH1
in PFM (only for 2AA)
SWO < SWI 0.9V
Or SWO < 0.9V
VDDM power reset or
EN = L
SW4
Load
Switch
Limit N-MOSFET
Current Limit NMOS current > 900mA No delay
Reset by load
current
Turn off whole IC,
Temperature > 160C No delay except CH9 and CH1
Restart whole IC if
EN = High and
Temperature < 140C
Thermal
Shutdown
Thermal
in PFM (only for 2AA)
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS5035A/B-03 February 2020
www.richtek.com
43
RT5035A/B
Outline Dimension
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A3
b
0.700
0.000
0.175
0.150
4.950
3.250
4.950
3.250
0.800
0.050
0.250
0.250
5.050
3.500
5.050
3.500
0.028
0.000
0.007
0.006
0.195
0.128
0.195
0.128
0.031
0.002
0.010
0.010
0.199
0.138
0.199
0.138
D
D2
E
E2
e
0.400
0.016
L
0.350
0.450
0.014
0.018
W-Type 40L QFN 5x5 Package
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume
responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and
reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Copyright © 2020 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
44
DS5035A/B-03 February 2020
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