RT8205MGQW
更新时间：2024-09-18 22:07:41
品牌：RICHTEK
描述：High Efficiency, Main Power Supply Controller for Notebook Computer
概述
数据手册RT8205MGQW 概述
High Efficiency, Main Power Supply Controller for Notebook Computer
RT8205MGQW 数据手册
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PDF下载RT8205L/M
High Efficiency, Main Power Supply Controller
for Notebook Computer
General Description
Features
z Constant On-time Control with 100ns Load Step
The RT8205L/M is a dual step-down, switch mode power
supply controller generating logic-supply voltages in
battery powered systems. It includes two Pulse-Width
Modulation (PWM) controllers adjustable from 2V to 5.5V,
and also features fixed 5V/3.3V linear regulators. Each
linear regulator provides up to 100mA output current with
automatic linear regulator bootstrapping to the PWM
outputs. An optional external charge pump can be
monitored through SECFB (RT8205M). The RT8205L/M
includes on-board power up sequencing, a power good
output, internal soft-start, and internal soft-discharge
output that prevents negative voltage during shutdown.
Response
z Wide Input Voltage Range : 6V to 25V
z Dual Adjustable Outputs from 2V to 5.5V
z Secondary Feedback Input Maintains Charge Pump
Voltage (RT8205M)
z Fixed 3.3V and 5V LDO Output : 100mA
z 2V Reference Voltage
z Frequency Selectable via TONSEL Setting
z 4700ppm/°C RDS(ON) Current Sensing
z Programmable Current Limit Combined with
Enable Control
z Selectable PWM, DEM, or Ultrasonic Mode
z Internal Soft-Start and Soft-Discharge
z High Efficiency up to 97%
The constant on-time PWM control scheme operates
without sense resistors and provides 100ns response to
load transient response while maintaining nearly constant
switching frequency. To eliminate noise in audio
applications, an ultrasonic mode is included, which
maintains the switching frequency above 25kHz. Moreover,
the diode-emulation mode maximizes efficiency for light
load applications. The RT8205L/M is available in a
WQFN-24L 4x4 package.
z 5mW Quiescent Power Dissipation
z Thermal Shutdown
z RoHS Compliant and Halogen Free
Applications
z Notebook and Sub-Notebook Computers
z 3-Cell and 4-Cell Li+ Battery-PoweredDevices
Ordering Information
RT8205
Package Type
QW : WQFN-24L 4x4 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Pin Function
L : Default
M : With SECFB
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
DS8205L/M-05 June 2011
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1
RT8205L/M
Marking Information
RT8205LGQW
RT8205MGQW
EM= : Product Code
EN= : Product Code
YMDNN : Date Code
YMDNN : Date Code
EM=YM
DNN
EN=YM
DNN
RT8205LZQW
RT8205MZQW
EM : Product Code
YMDNN : Date Code
EN : Product Code
YMDNN : Date Code
EM YM
DNN
EN YM
DNN
Pin Configurations
(TOP VIEW)
24 23 22 21 20 19
24 23 22 21 20 19
1
2
3
18
17
16
1
18
17
16
ENTRIP1
FB1
NC
VREG5
VIN
ENTRIP1
SECFB
VREG5
VIN
2
3
FB1
REF
REF
GND
GND
4
5
6
15
14
13
4
5
6
15
14
13
TONSEL
FB2
ENTRIP2
GND
SKIPSEL
EN
TONSEL
FB2
ENTRIP2
GND
SKIPSEL
EN
25
25
7
8
9
10 11 12
7
8
9 10 11 12
WQFN-24L 4x4
RT8205L
WQFN-24L 4x4
RT8205M
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2
DS8205L/M-05 June 2011
RT8205L/M
Typical Application Circuit
V
IN
6V to 25V
R8
C
1
RT8205L
UGATE2
R10
0
C13
10µF
C12
10µF
3.9
10µF
Q2
10
9
16
VIN
BSC119
C10
0.1µF
R
N03S
0
BOOT2
BOOT2
C11
L2
R4 0
0.1µF
4.7µH
21
22
Q1
V
OUT2
UGATE1
BOOT1
11
12
15
BSC119
PHASE2
LGATE2
GND
3.3V
N03S
0
R
BOOT1
Q4
C17
220µF
R11
C14
BSC119
C2
0.1µF
N03S
L1
6.8µH
V
OUT1
5V
20
19
PHASE1
LGATE1
7
5
VOUT2
FB2
Q3
BSC119
N03S
C3
220µF
R5
C4
C21
R14
6.5k
R
ILIM1
150k
1
C20
0.1µF
ENTRIP1
24
R15
10k
R
150k
VOUT1
ILIM2
C18
6
R12
15k
ENTRIP2
GND
2
3
25 (Exposed Pad)
FB1
REF
C19
0.1µF
V
REF
2V
R13
10k
C15
0.22µF
17
VREG5
5V Always On
C9
R6
100k
4.7µF
4
14
13
TONSEL
SKIPSEL
EN
ontrol
Frequency C
23
8
PGOOD Indi
cator
PGOOD
VREG3
ic
PWM/DEM/Ultrason
3.3V A
lways On
ON
C16
4.7µF
OFF
V
IN
6V to 25V
R8
3.9
C
1
RT8205M
R10
C13
10µF
C12
10µF
10µF
0
Q2
10
9
16
UGATE2
VIN
BSC119
C10
0.1µF
R
N03S
BOOT20
BOOT2
C11
0.1µF
L2
R4 0
4.7µH
21
22
Q1
BSC119
N03S
V
OUT2
UGATE1
BOOT1
11
12
15
PHASE2
LGATE2
GND
3.3V
0
R
Q4
BOOT1
C17
220µF
R11
C14
BSC119
C2
0.1µF
N03S
L1
6.8µH
V
OUT1
5V
20
19
PHASE1
LGATE1
7
5
VOUT2
FB2
Q3
BSC119
C3
R5
C4
C21
R14
6.5k
220µF
N03S
R
ILIM1
150k
C20
0.1µF
1
6
ENTRIP1
24
2
R15
10k
VOUT1
FB1
R
ILIM2
C18
R12
15k
150k
ENTRIP2
GND
25 (Exposed Pad)
C19
0.1µF
C5
R13
10k
D1
D3
0.1µF
C6
17
D2
D4
VREG5
5V Always On
0.1µF
C9
4.7µF
C7
0.1µF
R6
100k
23
8
PGOOD
VREG3
PGOOD Indicator
3
.3V Always On
BAT254
C8
R6
C16
18
13
0.1µF
SECFB
4.7µF
200k
R7
39k
V
3
REF
CP
REF
2V
C15
0.22µF
4
TONSEL
SKIPSEL
Frequenc
y Control
ON
EN
14
PWM/DEM/Ultra
sonic
OFF
DS8205L/M-05 June 2011
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3
RT8205L/M
Functional Pin Description
Pin No.
Pin Name
Pin Function
Channel 1 Enable and Current Limit Setting Input. Connect a resistor to GND to
set the threshold for channel 1 synchronous RDS(ON) sense. The GND − PHASE1
current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.515V to 3V
range. There is an internal 10μA current source from VREG5 to ENTRIP1. Leave
ENTRIP1 floating or drive it above 4.5V to shutdown channel 1.
1
ENTRIP1
SMPS1 Feedback Input. Connect FB1 to a resistive voltage divider from VOUT1
to GND to adjust output from 2V to 5.5V.
2
3
FB1
REF
2V Reference Output. Bypass to GND with a minimum 0.22μF capacitor. REF
can source up to 100μA for external loads. Loading REF degrades FBx and
output accuracy according to the REF load regulation error.
Frequency Selectable Input for VOUT1/VOUT2 respectively.
400kHz/500kHz : Connect to VREG5 or VREG3
300kHz/375kHz : Connect to REF
200kHz/250kHz : Connect to GND
SMPS2 Feedback Input. Connect FB2 to a resistive voltage divider from VOUT2
to GND to adjust output from 2V to 5.5V.
4
5
TONSEL
FB2
Channel 2 Enable and Current Limit Setting Input. Connect a resistor to GND to
set the threshold for channel 2 synchronous RDS(ON) sense. The GND − PHASE2
current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.515V to 3V
range. There is an internal 10μA current source from VREG5 to ENTRIP2. Leave
ENTRIP2 floating or drive it above 4.5V to shutdown channel 1.
6
ENTRIP2
Bypass Pin for SMPS2. Connect to the SMPS2 output to bypass efficient power
for VREG3 pin. VOUT2 is also for the SMPS2 output soft-discharge.
3.3V Linear Regulator Output.
7
8
VOUT2
VREG3
Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor
according to the typical application circuits.
9
BOOT2
Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and
BOOT2.
10
UGATE2
Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the
11
PHASE2
UGATE2 high side gate driver. PHASE2 is also the current sense input for the
SMPS2.
Lower Gate Drive Output for SMPS2. LGATE2 swings between GND and
VREG5.
12
13
LGATE2
EN
Master Enable Input. The REF/VREG5/VREG3 are enabled if it is within logic
high level and disabled if it is less than the logic low level.
Operation Mode Selectable Input.
Connect to VREG5 or VREG3 : Ultrasonic Mode
Connect to REF : DEM Mode
14
SKIPSEL
Connect to GND : PWM Mode
15,
Ground for SMPS Controller. The exposed pad must be soldered to a large PCB
and connected to GND for maximum power dissipation.
GND
VIN
25 (Exposed Pad)
16
Supply Input for 5V/3.3V LDO and Feed Forward On Time Circuitry.
5V Linear Regulator Output. VREG5 is also the supply voltage for the lower gate
driver and analog supply voltage for the device.
17
VREG5
To be continued
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4
DS8205L/M-05 June 2011
RT8205L/M
Pin No.
Pin Name
NC
(RT8205L)
Pin Function
No Internal Connection.
Charge Pump Control Pin. The SECFB is used to monitor the optional external 14V
charge pump. Connect a resistive voltage divider from the 14V charge pump output to
GND to detect the output. If SECFB drops below the threshold voltage, LGATE1 will
provide 33kHz switching frequency for the charge pump. This will refresh the external
charge pump driven by LGATE1 without over discharging the output voltage.
18
SECFB
(RT8205M)
19
20
21
22
23
24
LGATE1
PHASE1
UGATE1
BOOT1
PGOOD
VOUT1
Lower Gate Drive Output for SMPS1. LGATE1 swings between GND and VREG5.
Switch Node for SMPS1. PHASE1 is the internal lower supply rail for the UGATE1 high
side gate driver. PHASE1 is also the current sense input for the SMPS1.
Upper Gate Driver Output for SMPS1. UGATE1 swings between PHASE1 and BOOT1.
Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor
according to the typical application circuits.
Power Good Output for Channel 1 and Channel 2. (Logical AND)
Bypass Pin for SMPS1. Connect to the SMPS1 output to bypass efficient power for
VREG5 pin. VOUT1 is also for the SMPS1 output soft-discharge.
Function Block Diagram
TONSEL SKIPSEL
BOOT1
BOOT2
UGATE1
UGATE2
PHASE2
PHASE1
VREG5
VREG5
SMPS1
PWM Buck
Controller
SMPS2
PWM Buck
Controller
LGATE1
LGATE2
VREG5
VREG5
VOUT2
FB2
ENTRIP2
FB1
ENTRIP1
PGOOD
Power-On
Sequence
EN
Clear Fault Latch
GND
SW3 Threshold
SW5 Threshold
VOUT1
Thermal
Shutdown
VREG3
VREG5
VIN
REF
VREG3
VREG5
REF
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5
RT8205L/M
Absolute Maximum Ratings (Note 1)
z VIN, ENtoGND ----------------------------------------------------------------------------------------------- −0.3V to 30V
z PHASEx to GND
DC ---------------------------------------------------------------------------------------------------------------- −0.3V to 30V
< 20ns----------------------------------------------------------------------------------------------------------- −8V to 38V
z BOOTx to PHASEx ------------------------------------------------------------------------------------------ −0.3V to 6V
z ENTRIPx, SKIPSEL, TONSEL, PGOODtoGND ------------------------------------------------------ −0.3V to 6V
z VREG5, VREG3, FBx , VOUTx, SECFB, REF to GND---------------------------------------------- −0.3V to 6V
z UGATEx to PHASEx
DC ---------------------------------------------------------------------------------------------------------------- −0.3V to (VREG5 + 0.3V)
< 20ns----------------------------------------------------------------------------------------------------------- −5V to 7.5V
z LGATEx toGND
DC ---------------------------------------------------------------------------------------------------------------- −0.3V to (VREG5 + 0.3V)
< 20ns----------------------------------------------------------------------------------------------------------- −2.5V to 7.5V
z PowerDissipation, PD @ TA = 25°C
WQFN-24L-4x4------------------------------------------------------------------------------------------------ 1.923W
z Package Thermal Resistance (Note 2)
WQFN-24L-4x4, θJA ------------------------------------------------------------------------------------------ 52°C/W
WQFN-24L-4x4, θJC ------------------------------------------------------------------------------------------ 7°C/W
z Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------ 260°C
z Junction Temperature ---------------------------------------------------------------------------------------- 150°C
z Storage Temperature Range -------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ----------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)
z Supply Input Voltage, VIN ----------------------------------------------------------------------------------- 6V to 25V
z Junction Temperature Range ------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range ------------------------------------------------------------------------------- −40°C to 85°C
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6
DS8205L/M-05 June 2011
RT8205L/M
Electrical Characteristics
(VIN = 12V, VEN = 5V, VENTRIP1 = VENTRIP2 = 2V, No Load, TA = 25°C, unless otherwise specified)
Parameter
Input Supply
Symbol
Test Conditions
Min
Typ
Max
Unit
VIN Standby Current
I
V
V
= 6V to 25V, ENTRIPx = GND
= 6V to 25V,
--
--
200
20
--
μA
μA
VIN_SBY
IN
IN
VIN Shutdown Supply
Current
I
40
VIN_SHDN
ENTRIPx = EN = GND
Both SMPS On, V = 2.1V,
FBx
Quiescent Power
Consumption
P
VIN
SKIPSEL = REF, V
= 5V,
--
5
7
mW
OUT1
+P
PVCC
V
= 3.3V (Note 5)
OUT2
SMPS Output and FB Voltage
DEM Mode
PWM Mode
1.975
--
2
2
2.025
--
(Note 6)
FBx Voltage
V
V
FBx
Ultrasonic Mode
--
2.032
2
--
SECFB Voltage
V
V
1.92
2.08
V
V
SECFB
OUTx
Output Voltage Adjust
Range
SMPS1, SMPS2
2
--
5.5
--
V
OUTx
Discharge
V
OUTx
= 0.5V, V
= 0V
10
45
mA
ENTRIPx
Current
On-Time
V
V
V
V
V
= 5.05V (200kHz)
= 3.33V (250kHz)
= 5.05V (300kHz)
= 3.33V (375kHz)
= 5.05V (400kHz)
1895 2105 2315
999 1110 1221
1227 1403 1579
OUT1
OUT2
OUT1
OUT2
OUT1
TONSEL = GND
TONSEL = REF
On-Time Pulse Width
Minimum Off-Time
t
ON
ns
647
895
740
833
1052 1209
TONSEL =
VREG5
V
= 3.33V (500kHz)
475
200
22
555
300
33
635
400
--
OUT2
t
FBx = 1.9V
ns
OFF
Ultrasonic Mode
Frequency
SKIPSEL = VREG5 or VREG3
kHz
Soft-Start
Soft-Start Time
Current Sense
t
Internal Soft-Start
--
2
--
ms
SSx
ENTRIPx Source
Current
ENTRIPx Current
Temperature
Coefficient
I
V
= 0.9V
9.4
--
10
10.6
--
μA
ENTRIPx
ENTRIPx
TC
In Comparison with 25°C (Note 6)
4700
ppm/°C
IENTRIPx
ENTRIPx Adjustment
Range
Current Limit
Threshold
Zero-Current
Threshold
V
= I
x R
0.515
180
--
--
200
3
3
220
--
V
ENTRIPx
ENTRIPx
ENTRIPx
GND − PHASEx, V
= 2V
mV
mV
ENTRIPx
GND − PHASEx in DEM
To be continued
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www.richtek.com
7
RT8205L/M
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Internal Regulator and Reference
VOUT1 = GND, IVREG5 < 100mA
VOUT1 = GND, 6.5V < VIN < 25V,
4.8
5
5
5.2
4.75
5.25
VREG5 Output Voltage
VREG3 Output Voltage
VVREG5
V
I
VREG5 < 100mA
VOUT1 = GND, 5.5V < VIN < 25V,
IVREG5 < 50mA
4.75
3.2
5
5.25
3.46
3.5
VOUT2 = GND, IVREG3 < 100mA
3.33
3.33
VOUT2 = GND, 6.5V < VIN < 25V,
IVREG3 < 100mA
3.13
VVREG3
V
VOUT2 = GND, 5.5V < VIN < 25V,
IVREG3 < 50mA
3.13
3.33
3.5
VREG5 Output Current
VREG3 Output Current
IVREG5
IVREG3
VVREG5 = 4.5V, VOUT1 = GND
VVREG3 = 3V, VOUT2 = GND
VOUT1 Rising Edge
100
100
4.6
4.3
175
175
4.75
4.4
250
250
4.9
mA
mA
VREG5 Switchover
Threshold to VOUT1
VSW5
V
V
VOUT1 Falling Edge
4.5
VOUT2 Rising Edge
2.975 3.125
3.25
VREG3 Switchover
Threshold to VOUT2
VSW3
VOUT2 Falling Edge
VREGx to VOUTx, 10mA
No External Load
2.775 2.875 2.975
VREGx Switchover Equivalent
Resistance
RSWx
VREF
--
1.5
2
3
Ω
REF Output Voltage
REF Load Regulation
1.98
2.02
V
0 < ILOAD < 100μA
--
5
10
--
--
--
mV
REF Sink Current
REF in Regulation
μA
UVLO
Rising Edge
Falling Edge
--
4.20
3.9
4.35
4.1
VREG5 Under Voltage
Lockout Threshold
V
V
3.7
VREG3 Under Voltage
Lockout Threshold
SMPSx off
--
2.5
--
Power Good
PGOOD Detect, FBx Falling Edge
82
--
85
6
88
--
PGOOD Threshold
%
Hysteresis, Rising Edge with SS
Delay Time
PGOOD Propagation Delay
Falling Edge, 50mV Overdrive
High State, Forced to 5.5V
ISINK = 4mA
--
--
--
10
--
--
1
μs
μA
V
PGOOD Leakage Current
PGOOD Output Low Voltage
Fault Detection
--
0.3
Over Voltage Protection Trip
Threshold
Over Voltage Protection
Propagation Delay
Under Voltage Protection Trip
Threshold
VFB_OVP
OVP Detect, FBx Rising Edge
FBx = 2.35V
109
--
112
5
116
--
%
μs
VFB_UVP
UVP Detect, FBx Falling Edge
49
--
52
5
56
--
%
UVP Shutdown Blanking Time tSHDN_UVP From ENTRIPx Enable
ms
To be continued
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8
DS8205L/M-05 June 2011
RT8205L/M
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Thermal Shutdown
Thermal Shutdown
TSHDN
--
--
150
10
--
--
°C
°C
Thermal Shutdown
Hysteresis
Logic Input
Low Level (PWM Mode)
REF Level (DEM Mode)
--
--
--
0.8
2.3
SKIPSEL Input Voltage
1.8
V
V
High Level (Ultrasonic Mode)
Low Level (SMPS Off)
2.7
--
--
--
--
--
--
--
3.3
3
--
0.25
3
ENTRIPx Input Voltage
VENTRIPx On Level (SMPS On)
High Level (SMPS Off)
0.515
4.5
1
--
Logic-High VIH
Logic-Low VIL
VEN
--
EN Threshold
Voltage
V
V
--
0.4
4.2
5
Floating, Default Enable
VEN = 0.2V, Source
2.4
1.5
--
EN Voltage
EN Current
IEN
μA
VEN = 5V, Sink
3
8
VOUT1 / VOUT2 = 200kHz / 250kHz
VOUT1 / VOUT2 = 300kHz / 375kHz
--
--
--
--
--
--
0.8
2.3
--
TONSEL Setting Voltage
1.8
2.7
−1
−1
V
VOUT1 / VOUT2 = 400kHz / 500kHz
VTONSEL, VSKIPSEL = 0V or 5V
VSECFB = 0V or 5V
1
Input Leakage Current
μA
1
Internal BOOT Switch
Internal Boost Switch
On-Resistance
VREG5 to BOOTx, 10mA
--
40
80
Ω
Ω
Power MOSFET Drivers
UGATEx, High State,
--
--
4
8
4
BOOTx to PHASEx Forced to 5V
UGATEx, Low State,
UGATEx On-Resistance
1.5
BOOTx to PHASEx Forced to 5V
LGATEx, High State
--
--
--
--
4
8
4
LGATEx On-Resistance
Dead Time
Ω
LGATEx, Low State
LGATEx Rising
1.5
30
40
--
--
ns
UGATEx Rising
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9
RT8205L/M
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high effective four layers thermal conductivity four-layer test
board of JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad
of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. PVIN + PVREG5
Note 6. Guaranteed by Design.
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DS8205L/M-05 June 2011
RT8205L/M
Typical Operating Characteristics
VOUT1 Efficiency vs. Load Current
VOUT1 Efficiency vs. Load Current
100
100
90
80
70
60
50
40
30
20
10
0
DEM Mode
90
80
70
60
50
40
30
20
10
0
DEM Mode
PWM Mode
PWM Mode
Ultrasonic Mode
Ultrasonic Mode
VIN = 12V, TONSEL = GND,
VENTRIP1 = 1.5V, ENTRIP2 =GND,
EN= FLOATING
VIN = 8V, TONSEL = GND, VENTRIP1 = 1.5V,
ENTRIP2 =GND, EN= FLOATING
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
Load Current (A)
Load Current (A)
VOUT1 Efficiency vs. Load Current
VOUT2 Efficiency vs. Load Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
DEM Mode
DEM Mode
PWM Mode
PWM Mode
Ultrasonic Mode
Ultrasonic Mode
VIN = 20V, TONSEL = GND,
VENTRIP1 = 1.5V, ENTRIP2 =GND,
EN= FLOATING
VIN = 8V, TONSEL = GND,
ENTRIP1 =GND, VENTRIP2 = 1.5V,
EN= FLOATING
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
Load Current (A)
Load Current (A)
VOUT2 Efficiency vs. Load Current
VOUT2 Efficiency vs. Load Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
DEM Mode
DEM Mode
PWM Mode
Ultrasonic
Mode
PWM Mode
Ultrasonic Mode
VIN = 12V, TONSEL = GND,
ENTRIP1 =GND, VENTRIP2 = 1.5V,
EN= FLOATING
VIN = 20V, TONSEL = GND,
ENTRIP1 =GND, VENTRIP2 = 1.5V,
EN= FLOATING
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
Load Current (A)
Load Current (A)
DS8205L/M-05 June 2011
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11
RT8205L/M
VOUT1 Switching Frequency vs. Load Current
VOUT1 Switching Frequency vs. Load Current
220
220
PWM Mode
200
PWM Mode
200
180
160
140
120
100
80
180
160
140
120
100
80
VIN = 8V,
TONSEL=GND,
EN= FLOATING,
VENTRIP1 = 1.5V,
ENTRIP2=GND
VIN = 12V,
TONSEL=GND,
EN= FLOATING,
VENTRIP1 = 1.5V,
ENTRIP2=GND
60
60
Ultrasonic Mode
Ultrasonic Mode
DEMMode
40
20
0
40
20
0
DEM Mode
0.01
0.001
0.01
0.1
1
10
0.001
0.1
1
10
Load Current (A)
Load Current (A)
VOUT1 Switching Frequency vs. Load Current
220
VOUT2 Switching Frequency vs. Load Current
280
260
240
220
200
180
160
140
120
100
80
PWM Mode
200
180
160
140
120
100
80
PWM Mode
VIN = 8V,
VIN = 20V,
60
TONSEL=GND,
EN= FLOATING,
ENTRIP1 =GND,
VENTRIP2 = 1.5V
TONSEL=GND,
EN= FLOATING,
VENTRIP1 = 1.5V,
ENTRIP2=GND
60
Ultrasonic Mode
DEM Mode
40
Ultrasonic Mode
DEM Mode
40
20
20
0
0
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
Load Current (A)
Load Current (A)
VOUT2 Switching Frequency vs. Load Current
280
VOUT2 Switching Frequency vs. Load Current
280
260
240
220
200
180
160
140
120
100
80
260
240
220
200
180
160
140
120
100
80
PWM Mode
PWM Mode
VIN = 12V,
VIN = 20V,
TONSEL=GND,
EN= FLOATING,
ENTRIP1 =GND,
VENTRIP2 = 1.5V
TONSEL=GND,
EN= FLOATING,
ENTRIP1 =GND,
VENTRIP2 = 1.5V
60
60
Ultrasonic Mode
DEM Mode
Ultrasonic Mode
DEM Mode
40
40
20
20
0
0
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
Load Current (A)
Load Current (A)
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12
DS8205L/M-05 June 2011
RT8205L/M
VOUT2 Output Voltage vs. Load Current
VOUT1 Output Voltage vs. Load Current
5.090
5.084
5.078
5.072
5.066
5.060
5.054
5.048
5.042
5.036
5.030
5.024
5.018
5.012
5.006
5.000
3.446
3.440
3.434
3.428
3.422
3.416
3.410
3.404
3.398
3.392
3.386
3.380
VIN = 12V,
VIN = 12V,
TONSEL=GND,
Ultrasonic Mode
TONSEL=GND,
EN= FLOATING,
Ultrasonic Mode
EN= FLOATING,
VENTRIP1 = 1.5V,
ENTRIP2=GND
ENTRIP2 =GND,
VENTRIP1 = 1.5V
PWM Mode
DEM Mode
PWM Mode
DEM Mode
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
Load Current (A)
Load Current (A)
VREG3 Output Voltage vs. Output Current
VREG5 Output Voltage vs. Output Current
5.006
5.002
4.998
4.994
4.990
4.986
4.982
4.978
4.974
4.970
3.358
3.354
3.350
3.346
3.342
3.338
3.334
3.330
VIN = 12V, ENTRIP1 = ENTRIP2 =GND,
EN= FLOATING, TONSEL=GND
VIN = 12V, ENTRIP1 = ENTRIP2 =GND,
EN= FLOATING, TONSEL=GND
0
10 20 30 40 50 60 70 80 90 100
Output Current (mA)
0
10
20
30
40
50
60
70
Output Current (mA)
Reference Voltage vs. Output Current
Battery Current vs. Input Voltage
2.0080
2.0072
2.0064
2.0056
2.0048
2.0040
2.0032
2.0024
2.0016
2.0008
2.0000
100.0
10.0
1.0
PWM Mode
Ultrasonic Mode
DEMMode
VENTRIP1 = VENTRIP2 = 0.91V,
TONSEL=GND, EN= FLOATING
VIN = 12V, ENTRIP1 = ENTRIP2 =GND,
EN= FLOATING, TONSEL=GND
0.1
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Input Voltage (V)
-10
0
10 20 30 40 50 60 70 80 90 100
Output Current (μA)
DS8205L/M-05 June 2011
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13
RT8205L/M
Standby Input Current vs. Input Voltage
Shutdown Input Current vs. Input Voltage
250
249
248
247
246
245
244
243
242
241
240
22
20
18
16
14
12
10
8
ENTRIP1 = ENTRIP2 =GND,
EN= FLOATING, No Load
ENTRIP1 = ENTRIP2 = EN=GND, No Load
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Input Voltage (V)
7
9
11
13
15
17
19
21
23
25
Input Voltage (V)
VREG5, VREG3 and REF Start Up
Reference Voltage vs. Temperature
2.011
2.008
2.005
2.002
1.999
1.996
1.993
1.990
1.987
1.984
ENTRIP1 = ENTRIP2 =GND, EN= FLOATING
VREG5
(5V/Div)
VREG3
(2V/Div)
REF
(2V/Div)
EN
(5V/Div)
VIN = 12V, ENTRIP1 = ENTRIP2 =GND,
EN= FLOATING, TONSEL=GND
VIN = 12V, TONSEL = GND, No Load
-50
-25
0
25
50
75
100
125
Time (400μs/Div)
Temperature (°C)
VOUT1 Start Up
VOUT2 Start Up
VOUT1
(1V/Div)
PGOOD
(5V/Div)
VOUT2
(1V/Div)
PGOOD
(5V/Div)
ENTRIP1
(1V/Div)
VENTRIP1 = 1.5V, ENTRIP2 =GND,
EN = FLOATING, VIN = 12V,
TONSEL=GND, SKIPSEL=GND,
No Load
ENTRIP1 =GND, VENTRIP2 = 1.5V,
EN = FLOATING, VIN = 12V,
TONSEL=GND, SKIPSEL=GND,
No Load
ENTRIP2
(1V/Div)
Time (1ms/Div)
Time (1ms/Div)
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14
DS8205L/M-05 June 2011
RT8205L/M
VOUT1 Delay-Start
CP Start Up
VOUT1
(5V/Div)
VOUT1
(2V/Div)
CP
(10V/Div)
VOUT2
(1V/Div)
ENTRIP1
(2V/Div)
ENTRIP2
(2V/Div)
UGATE
(20V/Div)
LGATE
VENTRIP1 = VENTRIP2 = 1.5V, EN = FLOATING,
VIN = 12V, TONSEL=GND, SKIPSEL= REF,
No Load
(10V/Div)
VIN = 12V, TONSEL = GND,
EN= FLOATING, SKIPSEL=GND,
No Load
Time (2ms/Div)
Time (2ms/Div)
VOUT2 Delay-Start
Power Off from ENTRIP1
VIN = 12V, TONSEL = GND,
SKIPSEL=GND,
EN= FLOATING
VOUT1
(2V/Div)
PGOOD
(5V/Div)
ENTRIP1
(2V/Div)
VOUT1
(2V/Div)
VOUT2
(1V/Div)
ENTRIP1
(2V/Div)
ENTRIP2
(2V/Div)
No Load on VOUT1, VOUT2,
VREG5, VREG3 and REF
LGATE1
(5V/Div)
VIN = 12V, TONSEL = GND,
EN= FLOATING, SKIPSEL=GND,
No Load
Time (2ms/Div)
Time (4ms/Div)
VOUT1 PWM-Mode Load Transient Response
Power Off from ENTRIP2
VOUT1_ac
(50mV/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
ENTRIP2
(2V/Div)
Inductor
Current
(5A/Div)
UGATE1
(20V/Div)
VIN = 12V, TONSEL=GND, SKIPSEL=GND
LGATE2
(5V/Div)
VIN = 12V, TONSEL=GND, SKIPSEL=GND,
EN= FLOATING, No Load on VOUT1, VOUT2,
VREG5, VREG3 and REF
LGATE1
(5V/Div)
EN = FLOATING, IOUT1 = 0A to 6A
Time (4ms/Div)
Time (20μs/Div)
DS8205L/M-05 June 2011
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15
RT8205L/M
OVP
VOUT2 PWM-Mode Load Transient Response
VOUT2_ac
(50mV/Div)
Inductor
Current
(5A/Div)
VOUT1
(2V/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
UGATE
(20V/Div)
VIN = 12V, TONSEL=GND, SKIPSEL=GND
LGATE
VIN = 12V, TONSEL=GND, SKIPSEL= REF,
EN= FLOATING,No Load
(5V/Div)
EN = FLOATING, IOUT2 = 0A to 6A
Time (20μs/Div)
Time (4ms/Div)
UVP
VIN = 12V,
TONSEL=GND,
SKIPSEL=GND,
EN= FLOATING,
No Load
VOUT1
(2V/Div)
PGOOD
(5V/Div)
UGATE
(20V/Div)
LGATE
(5V/Div)
Time (100μs/Div)
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16
DS8205L/M-05 June 2011
RT8205L/M
Application Information
The RT8205L/M is a dual, Mach ResponseTM DRVTM dual
ramp valley mode synchronous buck controller. The
controller is designed for low-voltage power supplies for
notebook computers. Richtek's Mach ResponseTM
technology is specifically designed for providing 100ns
“instant-on” response to load steps while maintaining a
relatively constant operating frequency and inductor
operating point over a wide range of input voltages. The
topology circumvents the poor load-transient timing
problems of fixed-frequency current-mode PWMs while
avoiding the problems caused by widely varying switching
frequencies in conventional constant-on-time and constant-
off-time PWM schemes. The DRVTM mode PWM
modulator is specifically designed to have better noise
immunity for such a dual output application. The RT8205L/
M includes 5V (VREG5) and 3.3V (VREG3) linear
regulators. VREG5 linear regulator can step down the
battery voltage to supply both internal circuitry and gate
drivers. The synchronous-switch gate drivers are directly
powered from VREG5. When VOUT1 voltage is above
4.66V, an automatic circuit will switch the power of the
device from VREG5 linear regulator to VOUT1.
and output voltage into the on-time one shot timer. The
high side switch on-time is inversely proportional to the
input voltage as measured by VIN, and proportional to the
output voltage. There are two benefits of a constant
switching frequency. First, the frequency can be selected
to avoid noise-sensitive regions such as the 455kHz IF
band. Second, the inductor ripple-current operating point
remains relatively constant, resulting in easy design
methodology and predictable output voltage ripple.
Frequency for the 3V SMPS is set at 1.25 times higher
than the frequency for 5V SMPS. This is done to prevent
audio frequency “beating” between the two sides, which
switches asynchronously for each side. The frequencies
are set by the TONSEL pin connection as shown in Table
1. The on-time is given by :
tON = K×(VOUT / V )
IN
where “K” is set by the TONSEL pin connection (Table
1).
The on-time guaranteed in the Electrical Characteristics
table is influenced by switching delays in the external
high side power MOSFET. Two external factors that
influence switching frequency accuracy are resistive drops
in the two conduction loops (including inductor and PC
board resistance) and the dead time effect. These effects
are the largest contributors to the change frequency with
changing load current. The dead time effect increases the
effective on-time by reducing the switching frequency. It
occurs only in PWM mode (SKIPSEL = GND) when the
inductor current reverses at light or negative load currents.
With reversed inductor current, the inductor's EMF causes
PHASEx to go high earlier than normal, thus extending
the on-time by a period equal to the low-to-high dead time.
For loads above the critical conduction point, the actual
switching frequency is :
PWM Operation
The Mach ResponseTM DRVTM mode controller relies on
the output filter capacitor's Effective Series Resistance
(ESR) to act as a current-sense resistor, so the output
ripple voltage provides the PWM ramp signal. Referring to
the RT8205L/M's function block diagram, the synchronous
high side MOSFET will be turned on at the beginning of
each cycle. After the internal one-shot timer expires, the
MOSFET will be turned off. The pulse width of this one
shot is determined by the converter's input voltage and
the output voltage to keep the frequency fairly constant
over the input voltage range. Another one-shot sets a
minimum off-time (300ns typ.). The on-time one-shot will
be triggered if the error comparator is high, the low side
switch current is below the current limit threshold, and
the minimum off-time one-shot has timed out.
f = (VOUT + VDROP1)/ (tON ×(VIN + VDROP1 − VDROP2))
where VDROP1 is the sum of the parasitic voltage drops in
the inductor discharge path, which includes the
synchronous rectifier, inductor, and PC board resistances.
VDROP2 is the sum of the resistances in the charging path;
and tON is the on-time.
PWM Frequency and On-Time Control
The Mach ResponseTM control architecture runs with
pseudo constant frequency by feed forwarding the input
DS8205L/M-05 June 2011
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17
RT8205L/M
Table 1. TONSEL Connection and Switching Frequency
SMPS 1
TONSEL
SMPS 1
Frequency (kHz)
SMPS 2
K-Factor (μs)
SMPS 2
Frequency (kHz)
Approximate K-Factor
Error (%)
K-Factor (μs)
GND
REF
5
200
300
4
250
375
±10
±10
3.33
2.67
VREG5 or
VREG3
2.5
400
2
500
±10
Operation Mode Selection (SKIPSEL)
(VIN − VOUT
)
ILOAD(SKIP)
≈
×tON
2L
The RT8205L/M supports three operation modes:Diode-
Emulation Mode, Ultrasonic Mode, and Forced-CCM
Mode. User can set operation mode via the SKIPSELpin.
where tON is the On-time.
The switching waveforms may appear noisy and
asynchronous when light loading causesDiode-Emulation
Mode operation. However, this is normal and results in
high efficiency. Trade offs in PFM noise vs. light load
efficiency is made by varying the inductor value.Generally,
low inductor values produce a broader efficiency vs. load
curve, while higher values result in higher full load efficiency
(assuming that the coil resistance remains fixed) and less
output voltage ripple. Penalties for using higher inductor
values include larger physical size and degraded load
transient response (especially at low input voltage levels).
Diode-Emulation Mode (SKIPSEL = REF)
InDiode-Emulation Mode, the RT8205L/M automatically
reduces switching frequency at light load conditions to
maintain high efficiency. This reduction of frequency is
achieved smoothly.As the output current decreases from
heavy load condition, the inductor current is also reduced
and eventually comes to the point when its valley touches
zero current, which is the boundary between continuous
conduction and discontinuous conduction modes. By
emulating the behavior of diodes, the low side MOSFET
allows only partial negative current when the inductor free
wheeling current becomes negative. As the load current
is further decreased, it takes longer and longer to discharge
the output capacitor to the level that requires the next
“ON” cycle. The on-time is kept the same as that in the
heavy-load condition. In reverse, when the output current
increases from light load to heavy load, the switching
frequency increases to the preset value as the inductor
current reaches the continuous conduction. The transition
load point to the light load operation as follows (Figure 1) :
Ultrasonic Mode (SKIPSEL = VREG5 or VREG3)
The RT8205L/M activates an uniqueDiode-Emulation Mode
with a minimum switching frequency of 25kHz, called the
Ultrasonic Mode. The Ultrasonic Mode avoids audio-
frequency modulation that would otherwise be present
when a lightly loaded controller automatically skips
pulses. In Ultrasonic Mode, the high side switch gate driver
signal is ORed with an internal oscillator (>25kHz). Once
the internal oscillator is triggered, the controller enters
constant off-time control. When output voltage reaches
the setting peak threshold, the controller turns on the low
side MOSFET until the controller detects that the inductor
current has dropped below the zero crossing threshold.
The internal circuitry provides a constant off-time control,
and it is effective to regulate the output voltage under light
load condition.
I
L
Slope = (V -V
) / L
OUT
IN
I
L, PEAK
I
= I
L, PEAK
/ 2
Load
Forced CCM Mode (SKIPSEL = GND)
The low noise, Forced CCM mode (SKIPSEL = GND)
disables the zero crossing comparator, which controls
the low side switch on-time. This causes the low side
t
0
t
ON
Figure 1. Boundary Condition of CCM/DEM
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18
DS8205L/M-05 June 2011
RT8205L/M
gate driver waveform to become the complement of the
high side gate driver waveform. This in turn causes the
inductor current to reverse at light loads as the PWM loop
to maintain a duty ratio of VOUT/VIN. The benefit of forced
CCM mode is to keep the switching frequency fairly
constant, but it comes at a cost. The no-load battery
current can be from 10mA to 40mA, depending on the
external MOSFETs.
Therefore, the exact current limit characteristic and
maximum load capability are functions of the sense
resistance, inductor value, and battery and output voltage.
I
L
I
I
I
L, peak
Load
LIM
Reference and Linear Regulators (REF, VREGx)
The 2V reference (REF) is accurate within 1% over the
entire operating temperature range, making REF useful
as a precision system reference. Bypass REF to GND
with a minimum 0.22μF ceramic capacitor. REF can supply
up to 100μA for external loads. Loading REF reduces the
VOUTx output voltage slightly because of the reference
load regulation error.
t
0
Figure 2. “Valley” Current Limit
The RT8205L/M uses the on resistance of the synchronous
rectifier as the current sense element and supports
temperature compensated MOSFET RDS(ON) sensing. The
RILIMx resistor between the ENTRIPx pin and GND sets
the current limit threshold. The resistor RILIMx is connected
to a current source from ENTRIPx, which is typically10μA
at room temperature. The current source has a 4700ppm/
°C temperature slope to compensate the temperature
dependency of the RDS(ON). When the voltage drop across
the sense resistor or low side MOSFET equals 1/10 the
voltage across the RILIMx resistor, positive current limit
will be activated. The high side MOSFET will not be turned
on until the voltage drop across the MOSFET falls below
1/10 the voltage across the RILIMx resistor.
The RT8205L/M includes 5V (VREG5) and 3.3V (VREG3)
linear regulators. The VREG5 regulator supplies a total of
100mA for internal and external loads, including the
MOSFET gate driver and PWM controller. The VREG3
regulator supplies up to 100mAfor external loads. Bypass
VREG5 and VREG3 with a minimum 4.7μF ceramic
capacitor.
When the 5V main output voltage is above the VREG5
switchover threshold (4.75V), an internal 1.5Ω P- MOSFET
switch connects VOUT1 to VREG5, while simultaneously
shutting down the VREG5 linear regulator. Similarly, when
the 3.3V main output voltage is above the VREG3
switchover threshold (3.125V), an internal 1.5Ω
P-MOSFET switch connects VOUT2 to VREG3, while
simultaneously shutting down the VREG3 linear regulator.
It can decrease the power dissipation from the same
battery, because the converted efficiency of SMPS is
better than the converted efficiency of the linear regulator.
Choose a current limit resistor by following equation :
V
= (RILIMx ×10μA)/10 = IILIMx ×RDS(ON)
ILIMx
RILIMx = (IILIMx ×RDS(ON))×10/10μA
Carefully observe the PC board layout guidelines to
ensures that noise andDC errors do not corrupt the current
sense signal at PHASEx andGND. Mount or place the IC
close to the low side MOSFET.
Charge Pump (SECFB)
Current Limit Setting (ENTRIPx)
The external 14V charge pump is driven by LGATEx (Figure
3). When LGATEx is low, C1 will be charged by D1 from
VOUT1. C1 voltage is equal to VOUT1 minus a diode drop.
When LGATEx transitions to high, the charges from C1
will transfer to C2 throughD2 and charge it to VLGATEX plus
VC1. As LGATEx transitions low on the next cycle, C2
will charge C3 to its voltage minus a diode drop through
The RT8205L/M has a cycle-by-cycle current limit control.
The current limit circuit employs an unique “Valley” current
sensing algorithm. If the magnitude of the current sense
signal at PHASEx is above the current limit threshold,
the PWM is not allowed to initiate a new cycle (Figure 2).
The actual peak current is greater than the current limit
threshold by an amount equal to the inductor ripple current.
DS8205L/M-05 June 2011
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19
RT8205L/M
D3. Finally, C3 charges C4 through D4 when LGATEx
switches to high. So, VCP voltage is :
The low side driver is designed to drive high current, low
RDS(ON) N-MOSFET(s). The internal pull down transistor
that drives LGATEx low is robust, with a 1.5Ω typical on
resistance.A5V bias voltage is delivered from the VREG5
supply. The instantaneous drive current is supplied by an
input capacitor connected between VREG5 andGND.
VCP = VOUT1+ 2× VLGATEX − 4× VD
where VLGATEX is the peak voltage of LGATEx driver and is
equal to the VREG5; VD is the forward diode dropped
across the Schottky.
For high current applications, some combinations of high
and low side MOSFETs might be encountered that will
cause excessive gate drain coupling, which can lead to
efficiency killing, EMI producing shoot through currents.
This can be remedied by adding a resistor in series with
BOOTx, which increases the turn-on time of the high side
MOSFET without degrading the turn-off time (Figure 4).
SECFB in the RT8205M is used to monitor the charge
pump through the resistive divider (Figure 3) to generate
approximately 14VDC voltage and the clock driver uses
VOUT1 as its power supply. In the event when SECFB
drops below its feedback threshold, an ultrasonic pulse
will occur to refresh the charge pump driven by LGATEx.
In the event of an overload on charge pump where SECFB
can not reach more than its feedback threshold, the
controller will enter the ultrasonic mode. Special care
should be taken to ensure enough normal ripple voltage
on each cycle as to prevent charge pump shutdown.
V
IN
R
BOOT
BOOTx
UGATEx
PHASEx
Reducing the charge pump decoupling capacitor and
placing a small ceramic capacitor(47 pF to 220pF) (CF of
Figure 3) in parallel with the upper leg of the SECFB
resistor feedback network (RCP1 of Figure 3) will also
increase the robustness of the charge pump.
Figure 4. Reducing the UGATEx Rise Time
Soft-Start
SECFB
R
CP2
LGATE1
C1
The RT8205L/M provides internal soft-start function to
prevent large inrush current and output voltage overshoot
when the converter starts up. The soft-start (SS)
automatically begins once the chip is enabled.During soft-
start, the voltage is clamped to the ramping of internal
reference voltage which is compared with FBx signal. The
typical soft-start duration is 2ms. An unique PWM duty
limit control that prevents output over voltage during soft-
start period is designed specifically for FBx floating.
C
F
R
C3
CP1
D2
D4
D3
C2
CP
C4
D1
V
OUT1
Figure 3. Charge Pump Circuit Connected to SECFB
MOSFET Gate Driver (UGATEx, LGATEx)
The high side driver is designed to drive high current, low
RDS(ON) N-MOSFET(s). When configured as a floating driver,
a 5V bias voltage is delivered from the VREG5 supply.
The average drive current is calculated by the gate charge
at VGS = 5V times the switching frequency. The
instantaneous drive current is supplied by the flying
capacitor between the BOOTx and PHASEx pins. Adead
time to prevent shoot through is internally generated
between the high side MOSFET off to, the low side
MOSFET on, and the low side MOSFET off to the high
side MOSFET on.
UVLO Protection
The RT8205L/M features VREG5 under voltage lockout
protection (UVLO). When the VREG5 voltage is lower than
3.9V (typ.) and the VREG3 voltage is lower than 2.5V
(typ.), both switch power supplies are shut off. This is
non-latch protection.
Power Good Output (PGOOD)
PGOODis an open-drain type output and requires a pull-
up resistor. PGOOD is actively held low in soft-start,
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20
DS8205L/M-05 June 2011
RT8205L/M
standby, and shutdown. It is released when both output
voltages are above 91% of the nominal regulation point.
The PGOOD goes low if either output turns off or is 15%
below its nominal regulator point.
supplied from VOUTx, while the input voltage on VIN and
the drawing current from VREGx are too high. Even if
VREGx is supplied from VOUTx, large power dissipation
on automatic switches caused by overloading VREGx,
which may also result in thermal shutdown.
Output Over Voltage Protection (OVP)
Discharge Mode (Soft-Discharge)
The output voltage can be continuously monitored for over
voltage. If the output voltage exceeds 12% of its set voltage
threshold, the over voltage protection is triggered and the
LGATEx low side gate drivers are forced high. This
activates the low side MOSFET switch, which rapidly
discharges the output capacitor and pulls the input voltage
downward.
When ENTRIPx is low and a transition to standby or
shutdown mode occurs, or the output under voltage fault
latch is set, the output discharge mode will be triggered.
During discharge mode, the output capacitors' residual
charge will be discharge toGNDthrough an internal switch.
Shutdown Mode
The RT8205L/M is latched once OVP is triggered and can
only be released by toggling EN, ENTRIPx or cycling VIN.
There is a 5μs delay built into the over voltage protection
circuit to prevent false alarm.
The RT8205L/M SMPS1, SMPS2, VREG3 and VREG5
have independent enabling control. Drive EN, ENTRIP1
and ENTRIP2 below the precise input falling edge trip level
to place the RT8205L/M in its low power shutdown state.
The RT8205L/M consumes only 20μA of input current while
in shutdown. When shutdown mode is activated, the
reference turns off. The accurate 0.4V falling edge threshold
on the EN pin can be used to detect a specific analog
voltage level as well as to shutdown the device. Once in
shutdown, the 1V rising edge threshold activates, providing
sufficient hysteresis for most applications.
Note that the latching LGATEx high causes the output
voltage to dip slightly negative when energy has been
previously stored in the LC tank circuit. For loads that
cannot tolerate a negative voltage, place a power Schottky
diode across the output to act as a reverse polarity clamp.
If the over voltage condition is caused by a short in the
high side switch, completely turning on the low side
MOSFET can create an electrical short between the
battery andGND, which will blow the fuse and disconnect
the battery from the output.
Power Up Sequencing and On/Off Controls
(ENTRIPx)
ENTRIP1 and ENTRIP2 control the SMPS power up
sequencing. When the RT8205L/M is in single channel
mode, ENTRIP1 or ENTRIP2 enables the respective
outputs when ENTRIPx voltage rises above 0.515V.
Output Under Voltage Protection (UVP)
The output voltage can be continuously monitored for under
voltage protection. If the output is less than 52% of its set
voltage threshold, under voltage protection will be triggered,
and then both UGATEx and LGATEx gate drivers will be
forced low. The UVP will be ignored for at least 5ms (typ.)
after start up or a rising edge on ENTRIPx. Toggle ENTRIPx
or cycle VIN to reset the UVP fault latch and restart the
controller.
Since current source form ENTRIPx has 4700ppm/°C
temperature slope, please make sure that ENTRIPx voltage
is high enough to enable the respective output in low
temperature application.
If ENTRIPx pin becomes higher than the enable threshold
voltage while another channel is starting up, soft-start is
postponed until the other channel's soft-start has
completed. If both ENTRIP1 and ENTRIP2 become higher
than the enable threshold voltage simultaneously (within
60μs), both channels will be start up simultaneously. The
timing diagrams of the power sequence is shown below
(Figure 5).
Thermal Protection
The RT8205L/M features thermal shutdown protection to
prevent overheat damage to the device. Thermal shutdown
occurs when the die temperature exceeds 150°C. All
internal circuitry is inactive during thermal shutdown. The
RT8205L/M triggers thermal shutdown if VREGx is not
DS8205L/M-05 June 2011
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21
RT8205L/M
< 60µs
0.515V
> 60µs
0.515V
V
V
ENTRIPx
V
V
ENTRIPx
0.515V
0.515V
ENTRIPy
ENTRIPy
V
V
OUTx
V
V
OUTx
OUTy
≈2ms
(b). Delay Start Mode
OUTy
(a). Start-Up at the Same Time
Figure 5. TimeDiagrams of Power Sequence
Table 2. Operation Mode Truth Table
Mode
Condition
Comment
Transitions to discharge mode after a VIN POR and after
REF becomes valid. VREG5, VREG3, and REF remain
active.
Power UP VREGX < UVLO threshold
EN = high, VOUT1 or VOUT2
enabled
RUN
Normal Operation.
Over Voltage Either output > 111% of the nominal LGATEx is forced high. VREG3, VREG5 and REF active.
Protection level.
Exited by VIN POR or by toggling EN, ENTRIPx
Under
Either output < 52% of the nominal
Both UGATEx and LGATEx are forced low and enter
Voltage
level after 3ms time out expires and discharge mode. VREG3, VREG5 and REF are active.
Protection output is enabled
Exited by VIN POR or by toggling EN, ENTRIPx
Either SMPS output is still high in
Discharge either standby mode or shutdown
mode
During discharge mode, there is one path to discharge the
outputs capacitor residual charge. That is output capacitor
discharge to GND through an internal switch.
ENTRIPx < startup threshold,
EN = high.
Standby
VREG3, VREG5 and REF are active.
All circuitry off.
Shutdown EN = low
Thermal
TJ > 150°C
Shutdown
All circuitry off. Exit by VIN POR or by toggling EN, ENTRIPx
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22
DS8205L/M-05 June 2011
RT8205L/M
Table 3. Power Up Sequencing
EN
(V)
ENTRIP1
ENTRIP2
REF
Off
VREG5
Off
VREG3
Off
SMPS1
SMPS2
Off
Low
X
X
X
X
Off
Off
“>1V”
=> High
On
On
On
Off
“>1V”
=> High
Off
Off
Off
On
On
On
On
On
On
On
Off
Off
Off
On
“>1V”
=> High
On
(after
ENTRIP2 is
On without
60μs)
On
(after SMPS2
is on)
“>1V”
=> High
On
Off
On
On
On
On
Off
“>1V”
=> High
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
(after SMPS1
is on)
“>1V”
=> High
(after ENTRIP1
is On without
60μs)
“>1V”
=> High
On
On
Output Voltage Setting (FBx)
Output Inductor Selection
Connect a resistor voltage divider at the FBxpin between
VOUTx and GND to adjust the respective output voltage
between 2V and 5.5V (Figure 6). Refering to Figure 5 as
an example, choose R2 to be approximately 10kΩ, and
solve for R1 using the equation :
The switching frequency (on-time) and operating point (%
ripple or LIR) determine the inductor value as shown in
the following equation :
tON ×(V − VOUTx
)
IN
L =
LIR×ILOAD(MAX)
⎛
R1 ⎞
⎛
⎞
VOUTx = VFBX × 1+
where LIR is the ratio of the peak to peak ripple current to
the average inductor current.
⎜
⎜
⎝
⎟⎟
R2
⎠
⎝
⎠
where VFBX is 2V.
Find a low loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite cores
are often the best choice, although powdered iron is
inexpensive and can work well at 200kHz. The core must
be large enough not to saturate at the peak inductor current
(IPEAK) :
V
IN
V
OUTx
UGATEx
PHASEx
LGATEx
R1
R2
VOUTx
FBx
⎡
⎤
IPEAK = ILOAD(MAX) + (LIR / 2)×ILOAD(MAX)
⎣
⎦
The calculation above shall serve as a general reference.
To further improve the transient response, the output
inductance can be reduced even further. This needs to be
considered along with the selection of the output capacitor.
Figure 6. Setting VOUTx with resistor divider
DS8205L/M-05 June 2011
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23
RT8205L/M
Output Capacitor Selection
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ (MAX) and thermal
resistance, θJA. For the RT8205L/M package, the derating
curve in Figure 7 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
The capacitor value and ESR determine the amount of
output voltage ripple and load transient response. Thus,
the capacitor value must be greater than the largest value
calculated from below equations :
VOUTx
(ΔILOAD)2 ×L×(K
+ tOFF(MIN)
)
V
IN
2.0
VSAG
=
Four-Layer PCB
⎡
⎤
⎥
⎦
⎛
⎜
⎝
⎞
⎟
⎠
V
IN − VOUTx
2×COUT × VOUTx × K
− t
⎢
OFF(MIN)
V
IN
1.6
1.2
0.8
0.4
0.0
⎣
(ΔILOAD)2 ×L
2×COUT × VOUTx
VSOAR
=
⎛
⎞
⎟
⎠
1
VP−P = LIR×ILOAD(MAX) × ESR +
⎜
8×COUT ×f
⎝
where VSAG and VSOAR are the allowable amount of
undershoot voltage and overshoot voltage in the load
transient, Vp-p is the output ripple voltage, tOFF(MIN) is the
minimum off-time, and K is a factor listed in from Table 1.
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 7.Derating Curve for the RT8205L/M Package
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
Layout Considerations
Layout is very important in high frequency switching
converter designs, the PCB could radiate excessive noise
and contribute to the converter instability with improper
layout. Certain points must be considered before starting
a layout using the RT8205L/M.
` Place the filter capacitor close to the IC, within 12 mm
PD(MAX) = (TJ(MAX) − TA) / θJA
(0.5 inch) if possible.
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJAis the junction to ambient
thermal resistance.
` Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high voltage switching node.
For recommended operating condition specifications of
the RT8205L/M, the maximum junction temperature is
125°C and TA is the ambient temperature. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WQFN-24L 4x4 packages, the thermal resistance, θJA, is
52°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
` Connections from the drivers to the respective gate of
the high side or the low side MOSFET should be as
short as possible to reduce stray inductance. Use 0.65
mm (25 mils) or wider trace.
` All sensitive analog traces and components such as
VOUTx, FBX, GND, ENTRIPx, PGOOD, and TONSEL
should be placed away from high voltage switching
nodes such as PHASEx, LGATEx, UGATEx, or BOOTx
nodes to avoid coupling. Use internal layer(s) as ground
plane(s) and shield the feedback trace from power traces
and components.
PD(MAX) = (125°C − 25°C) / (52°C/W) = 1.923W for
WQFN-24L 4x4 package
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24
DS8205L/M-05 June 2011
RT8205L/M
` Place the ground terminal of VIN capacitor(s), VOUTx
capacitor(s), and source of low side MOSFETs as close
as possible. The PCB trace defined as PHASEx node,
which connects to source of high side MOSFET, drain
of low side MOSFET and high voltage side of the
inductor, should be as short and wide as possible.
DS8205L/M-05 June 2011
www.richtek.com
25
RT8205L/M
Outline Dimension
D2
SEE DETAIL A
L
D
1
E
E2
1
2
1
2
e
b
DETAILA
A
Pin #1 ID and Tie Bar Mark Options
A3
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A3
b
0.700
0.000
0.175
0.180
3.950
2.300
3.950
2.300
0.800
0.050
0.250
0.300
4.050
2.750
4.050
2.750
0.028
0.000
0.007
0.007
0.156
0.091
0.156
0.091
0.031
0.002
0.010
0.012
0.159
0.108
0.159
0.108
D
D2
E
E2
e
0.500
0.020
L
0.350
0.450
0.014
0.018
W-Type 24L QFN 4x4 Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
www.richtek.com
26
DS8205L/M-05 June 2011
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