RT9014 [RICHTEK]
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor; 超低噪声300毫安双路LDO稳压器，带有POR ， NMOS驱动程序和无需旁路电容
| 型号： | RT9014 |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor |
| 文件： | 总12页 (文件大小：391K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary
RT9014/A
Ultra Low Noise 300mA Dual LDO Regulator with POR,
NMOS Driver and Requiring No Bypass Capacitor
General Description
Features
z Wide Operating Voltage Ranges : 2.5V to 5.5V
RT9014/A is a dual channel, low noise, and low dropout
with the sourcing ability up to 300mA, an open drain driver
and power-on reset function. The open-drain output is
capable of sinking 150mA for LED backlighting
applications.
z Low-Noise for RF Application
z No Noise Bypass Capacitor Required
z Fast Response in Line/Load Transient
z TTL-Logic-Controlled Shutdown Input
z Low Temperature Coefficient
The range of output voltage is from 1.2V to 3.6V by
operating from 2.5V to 5.5V input.
z Dual LDO Outputs (300mA/300mA)
z 1 Open-Drain Driver
RT9014/A offers 2% accuracy, extremely low dropout
voltage (240mV @ 300mA), and extremely low ground
current, only 27μA per LDO. The shutdown current is near
zero current which is suitable for battery-power devices.
Other features include current limiting, over temperature,
output short circuit protection.
z Ultra-low Quiescent Current 27μA/LDO
z High Output Accuracy 2%
z Short Circuit Protection
z Thermal Shutdown Protection
z Current Limit Protection
z Short Circuit Thermal Folded Back Protection
z Tiny 10-Lead WDFN Package
RT9014/A is short circuit thermal folded back protected.
RT9014/A lowers its OTP trip point from 165°C to 110°C
when output short circuit occurs (VOUT < 0.4V) providing
maximum safety to end users.
z RoHS Compliant and 100% Lead (Pb)-Free
Ordering Information
RT9014/A-
RT9014/A can operate stably with very small ceramic
output capacitors, reducing required board space and
component cost. RT9014/A is available in fixed output
voltages in the WDFN-10L 3x3 package.
Package Type
QW : WDFN-10L 3x3 (W-Type)
Operating Temperature Range
P : Pb Free with Commercial Standard
G : Green (Halogen Free with Commer-
cial Standard)
Applications
Output Voltage : VOUT1/VOUT2
FM : 1.50V/2.80V, FP : 1.50V/3.00V
GK : 1.80V/2.60V, GM : 1.80V/2.80V
GP : 1.80V/3.00V, JG : 2.50V/1.80V
JM : 2.50V/2.80V, JP : 2.50V/3.00V
JN : 2.50V/2.85V, PJ : 3.00V/2.50V
PP : 3.00V/3.00V, CS : 1.2V/3.3V
z CDMA/GSM Cellular Handsets
z Battery-Powered Equipment
z Laptop, Palmtops, Notebook Computers
z Hand-Held Instruments
z PCMCIA Cards
z Portable InformationAppliances
EN Function Independent
EN Function Dependent
Pin Configurations
Note :
(TOP VIEW)
Richtek Pb-free and Green products are :
`RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
1
2
3
4
5
10
9
1
2
3
4
5
10
9
VIN
EN
VOUT1
VOUT2
POR
VIN
EN1
EN2
SW
VOUT1
VOUT2
POR
GND
GND
8
8
NC
`Suitable for use in SnPb or Pb-free soldering processes.
`100% matte tin (Sn) plating.
7
7
SW
SET
DRV
DRV
9
9
11
11
GND
SET
GND
RT9014
RT9014A
WDFN-10L 3x3
DS9014/A-08 August 2007
www.richtek.com
1
Preliminary
RT9014/A
Typical Application Circuit
100K
100K
V
VIN
EN
V
IN
POR
DRV
VIN
IN
POR
DRV
C
C
1uF
IN
IN
1uF Chip Enable
Chip Enable
EN1
EN2
RT9014
RT9014A
V
VOUT1
V
V
OUT1
VOUT1
DRV Enable
OUT1
C
1uF
DRV Enable
C
1uF
OUT1
OUT1
SW
SW
100k
VOUT2
V
100k
SET
VOUT2
OUT2
SET
OUT2
C
1uF
C
OUT2
GND
OUT2
GND
1uF
C
C
DELAY
DELAY
Functional Pin Description
Pin No.
Pin
Pin Function
RT9014A-□□
Name
RT9014-□□PQW
1
2
1
--
2
VIN
EN
Supply Input.
Chip Enable (Active High).
Chip Enable 1 (Active High).
Chip Enable 2 (Active High).
No Internal Connection Pin.
--
--
3
EN1
EN2
NC
3
--
Active high signal drives open-drain N-MOSFET.
Note that this pin is high impedance. There should be a pull low
100kΩ resistor connected to GND when the control signal is
floating.
4
5
4
5
SW
Delay Set Input: Connect external capacitor to GND to set the
internal delay for the POR output. When left open, there is no
delay. This pin cannot be grounded.
SET
6
7
6
7
GND
DRV
Common Ground.
Open-Drain Output: Capable of sinking 150mA.
Power-On Reset Output: Open-drain output. Active low indicates
an output under-voltage condition on regulator 2.
8
8
POR
9
9
VOUT2 Channel 2 Output Voltage
VOUT1 Channel 1 Output Voltage
10
10
The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
Exposed Pad (11) Exposed Pad (11) GND
Marking Information
For marking information, contact our sales representative directly or through a Richtek distributor located in your area,
otherwise visit our website for detail.
www.richtek.com
2
DS9014/A-08 August 2007
Preliminary
RT9014/A
Available Voltage Version
Code
Voltage 1.2
Code
Voltage 2.7
C
F
W
1.6
N
G
1.8
V
D
Y
H
E
2.1
S
J
2.5
--
K
2.6
--
T
2.65
--
1.5
M
1.85
P
1.9
Q
2
R
L
2.8
2.85
2.9
3
3.1
3.2
3.3
--
--
--
Function Block Diagram
Shutdown
and
VIN
Logic Control
V
REF
MOS Driver
+
Error
Amplifier
VOUT1
GND
Current-Limit
and
Thermal
Protection
EN
Shutdown
0.2uA
and
Logic Control
V
REF
MOS Driver
+
Error
Amplifier
VOUT2
GND
Current-Limit
and
Thermal
Protection
SET
SW
POR& Delay
POR
DRV
SW Logic
RT9014
To be continued
DS9014/A-08 August 2007
www.richtek.com
3
Preliminary
RT9014/A
EN1
Shutdown
VIN
0.2uA
and
Logic Control
V
REF
MOS Driver
+
Error
Amplifier
VOUT1
GND
Current-Limit
and
Thermal
Protection
EN2
Shutdown
0.2uA
and
Logic Control
V
REF
MOS Driver
+
Error
Amplifier
VOUT2
GND
Current-Limit
and
Thermal
Protection
SET
SW
POR& Delay
POR
DRV
SW Logic
RT9014A
www.richtek.com
4
DS9014/A-08 August 2007
Preliminary
Absolute Maximum Ratings (Note 1)
RT9014/A
z Supply Input Voltage------------------------------------------------------------------------------------------------------ 6V
z Other I/O Pin Voltages --------------------------------------------------------------------------------------------------- 6V
z PowerDissipation, PD @ TA = 25°C
WDFN-10L3x3 ------------------------------------------------------------------------------------------------------------- 0.926W
z Package Thermal Resistance (Note 4)
WDFN-10L 3x3, θJA ------------------------------------------------------------------------------------------------------- 108°C/W
z Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C
z Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 2)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions (Note 3)
z Supply Input Voltage------------------------------------------------------------------------------------------------------ 2.5V to 5.5V
z Enable Input Voltage------------------------------------------------------------------------------------------------------ 0V to 5.5V
z Junction Temperature Range-------------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range-------------------------------------------------------------------------------------------- 0°C to 85°C
Electrical Characteristics
(VIN = VOUT + 1V, VEN = VIN, CIN = COUT = 1μF, TA = 25°C, unless otherwise specified.)
Parameter
Input Voltage
Symbol
Test Conditions
= 2.5V to 5.5V
Min
2.5
--
Typ
--
Max
5.5
--
Units
V
V
V
V
V
IN
IN
120
240
--
mV
mV
V
I
= 150mA
= 300mA
OUT
OUT
Dropout Voltage
(Note 5)
DROP
OUT
--
--
I
Output voltage range
Accuracy
1.2
-2
3.6
+2
--
%
ΔV
ΔV
ΔV
V
OUT
I
= 1mA
OUT
V
V
= (V
+ 0.3V) to 5.5V or
IN
OUT
Line Regulation
--
--
0.2
%/V
LINE
> 2.5V, whichever is larger
IN
Load Regulation
Current Limit
--
330
--
--
450
58
--
0.6
700
80
1
%
mA
uA
uA
1mA < I
< 300mA
LOAD
OUT
R
= 1Ω
LOAD
Quiescent Current
Shutdown Current
I
I
V
V
V
V
> 1.5V
< 0.4V
Q
EN
--
Q_SD
EN
1.5
--
--
V
IH
= 2.5V to 5.5V, Power On
= 2.5V to 5.5V, Shutdown
IN
IN
EN Threshold
V
--
--
--
--
--
0.4
--
V
IL
Output Voltage TC
100
170
40
ppm/°C
°C
Thermal Shutdown
--
T
SD
Thermal Shutdown Hysteresis
--
°C
ΔT
SD
To be continued
DS9014/A-08 August 2007
www.richtek.com
5
Preliminary
RT9014/A
Parameter
Symbol
Test Conditions
f =100Hz
Min
--
Typ
65
60
50
65
50
50
Max
--
Units
dB
PSRR
PSRR
f =1kHz
f =10kHz
f =100Hz
f =1kHz
f =10kHz
--
--
dB
I
= 10mA
LOAD
--
--
dB
--
--
dB
PSRR
PSRR
--
--
dB
I
= 150mA
LOAD
--
--
dB
Power Good
Low Threshold, % of nominal
(Flag On)
V
V
85
92
90
95
93
98
%
%
THL
V
OUT2
Reset Threshold
High Threshold, % of nominal
(Flag Off)
THH
OL
V
OUT2
POR Output Logic Low Voltage
POR Leakage Current
Set pin current source
Set pin threshold
V
I
I
= 250uA
--
-1
0.02
0.01
1.25
1.4
0.1
1
V
μA
μA
V
LOW
Flag Off
= 0
POR
V
0.60
--
1.70
--
SET
POR = high
DRV output
Voltage Low
--
-1
-1
-1
--
0.2
0.01
0.01
0.01
--
0.5
1
V
μA
μA
μA
V
I
I
= 150mA
= 0mA, V
DRV
Leakage current
= 5V, SW = 0V
DRV
DRV
1
V
V
< 0.6V(DRV Shutdown)
> 2.5V(DRV Enable)
IL
SW input current
SW input voltage
1
IH
VIL
VIH
Logic Low
Logic High
0.4
--
1.5
--
V
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 5. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) − 100mV.
www.richtek.com
6
DS9014/A-08 August 2007
Preliminary
Typical Operating Characteristics
RT9014/A
Output Voltage vs. Temperature
Output Voltage vs. Temperature
3.4
3.35
3.3
1.9
1.85
1.8
RT9014-GS, VOUT2
RT9014/A-GS, VOUT1
3.25
3.2
1.75
1.7
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
(°C)
Temperature
(°C)
Temperature
Quiescent Current vs. Temperature
Dropout Voltage vs. Load Current
70
65
60
55
50
350
300
250
200
150
100
50
RT9014/A-GS
RT9014/A-GS, VOUT2
VIN = VEN = VSW = 4.3V
CIN = COUT1 = COUT2 = 1uF/X7R
TJ = 125°C
TJ = 25°C
TJ = -40°C
0
0
50
100
150
200
250
300
-50
-25
0
25
50
75
100
125
Temperature (°C)
Load Current (mA)
POR Delay
PSRR
10000
1000
100
10
20
0
RT9014/A-FM
RT9014-FM, VOUT1
VIN = 4.3V 0.1V
CIN = COUT1 = COUT2 = 1uF/X7R
ILOAD = 100mA
ILOAD = 50mA
-20
-40
-60
-80
1
ILOAD = 10mA
0.1
0.01
0.01
0.1
1
10k
100k
1000k
0.0001
0.0010
0.0100
0.1000
1.0000
Frequency
(Hz)
POR Setting Capacitance (uF)
DS9014/A-08 August 2007
www.richtek.com
7
Preliminary
RT9014/A
Line Transient Response
Line Transient Response
RT9014/A-GS, Both ILOAD = 10mA
VIN = 3.8V to 4.8V
RT9014/A-GS, Both ILOAD = 1mA
VIN = 3.8V to 4.8V
4.8
3.8
4.8
3.8
VIN
(V)
VIN
(V)
VOUT2
VOUT2
(10mV/Div)
(10mV/Div)
VOUT1
VOUT1
(10mV/Div)
(10mV/Div)
Time (100μs/Div)
Time (100μs/Div)
Line Transient Response
Line Transient Response
RT9014/A-GS, Both ILOAD = 50mA
VIN = 3.8V to 4.8V
RT9014/A-GS, Both ILOAD = 100mA
VIN = 3.8V to 4.8V
4.8
VIN
4.8
VIN
(V)
(V)
3.8
3.8
VOUT2
VOUT2
(10mV/Div)
(10mV/Div)
VOUT1
VOUT1
(10mV/Div)
(10mV/Div)
Time (100μs/Div)
Time (100μs/Div)
Load Transient Response
Load Transient Response
RT9014/A-GS, ILOAD = 10mA to 100mA
VIN = VEN = 4.3V
CIN = COUT1 = COUT2 = 1uF/X7R
RT9014/A-GS, ILOAD = 10mA to 50mA
VIN = VEN = 4.3V
CIN = COUT1 = COUT2 = 1uF/X7R
IOUT
(100mA/Div)
IOUT
(50mA/Div)
VOUT1
VOUT1
(20mV/Div)
(20mV/Div)
VOUT2
VOUT2
(20mV/Div)
(20mV/Div)
Time (250μs/Div)
Time (250μs/Div)
www.richtek.com
8
DS9014/A-08 August 2007
Preliminary
RT9014/A
Start Up
EN Pin Shutdown Response
RT9014/A-FM, VIN = VSW = 5V
IOUT1 = IOUT2 = 50mA
RT9014/A-FM, VIN = VSW = 5V
IOUT1 = IOUT2 = 50mA
VEN
VEN
(5V/Div)
(5V/Div)
(1V/Div)
VOUT2
VOUT2
VOUT1
VOUT1
(1V/Div)
Time (50μs/Div)
Time (5μs/Div)
Noise
Power-On
RT9014/A-FM
RT9014/A-GS, No LOAD
Both ILOAD = 10mA
VIN = VEN = VSW = 4.5V(By battery)
150
100
50
CIN = COUT1 = COUT2 = 1uF/X7R
VEN
(5V/Div)
0
VOUT1
(1V/Div)
VOUT2
(2V/Div)
POR
-50
-100
-150
(5V/Div)
Time (10ms/Div)
Time (10μs/Div)
Noise
RT9014/A-GS, ILOAD = 50mA
VIN = VEN = VSW = 4.5V(By battery)
300
200
100
0
CIN = COUT1 = COUT2 = 1uF/X7R
-100
-200
-300
Time (10ms/Div)
DS9014/A-08 August 2007
www.richtek.com
9
Preliminary
RT9014/A
Applications Information
Like any low-dropout regulator, the external capacitors used
with the RT9014/A must be carefully selected for regulator
stability and performance. Using a capacitor whose value
is > 1μF on the RT9014/A input and the amount of
capacitance can be increased without limit. The input
capacitor must be located a distance of not more than 0.5
inch from the input pin of the IC and returned to a clean
analog ground. Any good quality ceramic or tantalum can
be used for this capacitor. The capacitor with larger value
and lower ESR (equivalent series resistance) provides
better PSRR and line-transient response.
Thermal Considerations
Thermal protection limits power dissipation in RT9014/A.
When the operation junction temperature exceeds 170°C,
the OTP circuit starts the thermal shutdown function and
turns the pass element off. The pass element turn on again
after the junction temperature cools by 40°C. RT9014/A
lowers its OTP trip level from 170°C to 110°C when output
short circuit occurs (VOUT < 0.4V) as shown in Figure 2. It
limits IC case temperature under 100°C and provides
maximum safety to customer while output short circuit
occurring.
The output capacitor must meet both requirements for
minimum amount of capacitance and ESR in all LDOs
application. The RT9014/Ais designed specifically to work
with low ESR ceramic output capacitor in space-saving
and performance consideration. Using a ceramic capacitor
whose value is at least 1μF with ESR is > 20mΩ on the
RT9014/A output ensures stability. The RT9014/A still
works well with output capacitor of other types due to the
wide stable ESR range. Figure 1. shows the curves of
allowable ESR range as a function of load current for various
output capacitor values. Output capacitor of larger
capacitance can reduce noise and improve load transient
response, stability, and PSRR. The output capacitor should
be located not more than 0.5 inch from the VOUT pin of
the RT9014/Aand returned to a clean analog ground.
V
Short to GND
OUT
0.4V
V
I
OUT
OUT
TSD
170 °C
OTP Trip Point
110 C
°
110 °C
80 °C
IC Temperature
Figure 2. Short Circuit Thermal Folded Back Protection
when Output Short Circuit Occurs (Patent)
Region of Stable COUT ESR vs. Load Current
100
RT9014-FM, VIN = 5V
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
power dissipation definition in device is :
CIN = COUT1
=
COUT2 = 1uF/X7R
10
1
Unstable Range
Stable Range
PD = (VIN − VOUT) x IOUT + VIN x IQ
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
0.1
0.01
0.001
Simulation Verify
0
50
100
150
200
250
300
PD(MAX) = ( TJ(MAX) − TA ) /θJA
Load Current (mA)
Where TJ(MAX) is the maximum operation junction
temperature 125°C, TAis the ambient temperature and the
θJA is the junction to ambient thermal resistance.
Figure 1. Stable Cout ESR Range
www.richtek.com
10
DS9014/A-08 August 2007
Preliminary
RT9014/A
For recommended operating conditions specification of
RT9014/A, where TJ(MAX) is the maximum junction
temperature of the die (125°C) and TA is the operated
ambient temperature. The junction to ambient thermal
resistance (θJA is layout dependent) for WDFN-10L 3x3
package is 108°C/W on the standard JEDEC 51-3 single-
layer thermal test board. The maximum power dissipation
at TA = 25°C can be calculated by following formula :
PD(MAX) = ( 125°C − 25°C ) / 108 = 0.926W for
WDFN-10L 3x3 packages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA . For RT9014/A packages, the Figure 3 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
1
0.9
0.8
0.7
WDFN-10L 3x3
0.6
0.5
0.4
0.3
0.2
0.1
0
0
25
50
75
100
125
Ambient Temperature(°C)
Figure 3. Derating Curves for RT9014/APackages
DS9014/A-08 August 2007
www.richtek.com
11
Preliminary
RT9014/A
Outline Dimension
D2
D
L
E
E2
SEE DETAIL A
1
e
b
2
1
2
1
A
A3
DETAILA
Pin #1 ID and Tie Bar Mark Options
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A3
b
0.700
0.000
0.175
0.180
2.950
2.300
2.950
1.500
0.800
0.050
0.250
0.300
3.050
2.650
3.050
1.750
0.028
0.000
0.007
0.007
0.116
0.091
0.116
0.059
0.031
0.002
0.010
0.012
0.120
0.104
0.120
0.069
D
D2
E
E2
e
0.500
0.020
L
0.350
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
8F, No. 137, Lane 235, Paochiao Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)89191466 Fax: (8862)89191465
Email: marketing@richtek.com
www.richtek.com
12
DS9014/A-08 August 2007
相关型号：
RT9014-DKPQV
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-FMGQW
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-FMPQV
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-FMPQW
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-GKGQW
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-GKPQW
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-GMPQV
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-GPGQW
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-GPPQW
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-GSPQV
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-JMGQW
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
RT9014-JMPQW
Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor
RICHTEK
©2020 ICPDF网 联系我们和版权申明