RT9194PE [RICHTEK]

Low-Dropout Linear Regulator Controller with PGOOD Indication; 低压差线性稳压器控制器的PGOOD指示
RT9194PE
型号: RT9194PE
厂家: RICHTEK TECHNOLOGY CORPORATION    RICHTEK TECHNOLOGY CORPORATION
描述:

Low-Dropout Linear Regulator Controller with PGOOD Indication
低压差线性稳压器控制器的PGOOD指示

稳压器 控制器
文件: 总10页 (文件大小:222K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
RT9194  
Low-Dropout Linear Regulator Controller with PGOOD  
Indication  
General Description  
Features  
z 4.5V to 13.5V Operation Voltage  
z High Accuracy 2% 0.8V Voltage Reference  
z Quick Transient Response  
The RT9194 is a low-dropout voltage regulator controller  
with a specific PGOOD indicating scheme, it acts as a  
power supervisor of the power regulated. The part could  
drive an external N-Channel MOSFET for various  
applications accordingly; especially, the part is operated  
with VCC power ranging from 4.5V to 13.5V. With such a  
topology, it's with advantages of flexible and cost-effective.  
The part comes to a small footprint package of SOT-23-6.  
z Power Good Indicator with Delay  
z Enable Control  
z Compliant with Intel Grantsdale Chipset Platform  
Design GuideSpecification  
z Small Footprint Package SOT-23-6  
z RoHS Compliant and 100% Lead (Pb)-Free  
Ordering Information  
Applications  
RT9194  
z Special Designed for Intel® Grantsdale platform  
Package Type  
E : SOT-23-6  
FSB_VTT power regulation  
z Processor Power-Up Sequening  
Operating Temperature Range  
P : Pb Free with Commercial Standard  
G : Green (Halogen Free with Commer-  
cial Standard)  
z Notebook and laptop PC  
z Other Power regulation with Power Good indication.  
Note :  
Pin Configurations  
RichTek Pb-free and Green products are :  
`RoHS compliant and compatible with the current require-  
ments of IPC/JEDEC J-STD-020.  
(TOP VIEW)  
VCC DRI PGOOD  
`Suitable for use in SnPb or Pb-free soldering processes.  
`100%matte tin (Sn) plating.  
6
1
5
2
4
3
Marking Information  
EN GND  
FB  
For marking information, contact our sales representative  
directly or through a RichTek distributor located in your  
area, otherwise visit our website for detail.  
SOT-23-6  
Note : There is no pin1 indicator on top mark for SOT-23-6  
type, and pin 1 will be lower left pin when reading top mark  
from left to right.  
Typical Application Circuit  
V
V
IN  
CC  
Ccc  
Chip Enable  
1
6
5
EN  
VCC  
DRI  
C
IN  
2
3
RT9194  
Q1  
GND  
FB  
R
PGOOD  
4
V
PGOOD  
OUT  
R1  
C
OUT  
PGOOD  
R2  
R1+R2  
R2  
VOUT = 0.8×  
DS9194-08 March 2007  
www.richtek.com  
1
RT9194  
Test Circuit  
V
CC  
V
IN  
12V  
Ccc  
1uF  
Chip Enable  
C
100uF  
IN  
EN  
VCC  
DRI  
RT9194  
Q1  
PHD3055  
GND  
FB  
100k  
V
PGOOD  
OUT  
R
PGOOD  
C
R1  
1k  
OUT  
100uF  
PGOOD  
R2  
2k  
R1+R2  
VOUT = 0.8×  
R2  
Figure 1. Typical Test Circuit  
V
CC  
12V  
Ccc  
1uF  
Chip Enable  
5V  
EN  
VCC  
DRI  
RT9194  
V
A
DRI  
GND  
FB  
V
PGOOD  
FB  
C
FB  
V
= 1V for current sink at DRI  
FB  
V
= 0.6V for current source at DRI  
FB  
Figure 2. DRI Source/Sink Current Test Circuit  
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2
DS9194-08 March 2007  
RT9194  
Functional Pin Description  
Pin Name  
Pin No.  
Pin Function  
EN  
1
2
3
4
5
6
Chip Enable (Active High)  
GND  
FB  
Ground  
Output Voltage Feedback  
Power Good Open Drain Output  
Driver Output  
PGOOD  
DRI  
VCC  
Power Supply Input  
Function Block Diagram  
EN  
VCC  
PGOOD  
GND  
Reference  
Voltage  
0.8V  
0.7V  
+
DRI  
-
Driver  
+
-
3ms  
Delay  
FB  
DS9194-08 March 2007  
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3
RT9194  
Absolute Maximum Ratings (Note 1)  
z Supply Input Voltage, VCC ------------------------------------------------------------------------------------------- 15V  
z Enable Voltage --------------------------------------------------------------------------------------------------------- 7V  
z PowerGood Output Voltage ---------------------------------------------------------------------------------------- 7V  
z Power Dissipation, PD @ TA = 25°C  
SOT-23-6 ---------------------------------------------------------------------------------------------------------------- 0.4W  
z Package Thermal Resistance  
SOT-23-6, θJA ----------------------------------------------------------------------------------------------------------- 250°C/W  
z Lead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------------- 260°C  
z Junction Temperature ------------------------------------------------------------------------------------------------- 150°C  
z Storage Temperature Range ---------------------------------------------------------------------------------------- 65°C to 150°C  
z ESD Susceptibility (Note 2)  
HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 2kV  
MM (Machine Mode) -------------------------------------------------------------------------------------------------- 200V  
Recommended Operating Conditions (Note 3)  
z Supply Input Voltage, VCC ------------------------------------------------------------------------------------------- 4.5V to 13.5V  
z Enable Voltage --------------------------------------------------------------------------------------------------------- 0V to 5.5V  
z Junction Temperature Range---------------------------------------------------------------------------------------- 40°C to 125°C  
z Ambient Temperature Range---------------------------------------------------------------------------------------- 40°C to 85°C  
Electrical Characteristics  
(VCC = 5V/12V, TA = 25°C, unless otherwise specified)  
Parameter  
Symbol  
Test Conditions  
input range  
Min  
Typ  
Max Units  
V
Operation Voltage Range  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
4.5  
4.0  
--  
--  
4.2  
0.2  
0.3  
--  
13.5  
4.5  
--  
V
V
CC  
POR Threshold  
POR Hysteresis  
rising  
falling  
V
V
CC  
Supply Current  
= 12V  
--  
0.8  
--  
mA  
mA  
mA  
V
Driver Source Current  
Driver Sink Current  
= 12V, V  
= 12V, V  
= 12V, V  
= 6V  
= 6V  
= 5V  
5
DRI  
DRI  
DRI  
5
--  
--  
Reference Voltage (V  
)
0.784 0.8 0.816  
FB  
Reference Line Regulation (V  
Amplifier Voltage Gain  
PSRR at 100Hz, No Load  
Power Good  
)
= 4.5V to 15V  
= 12V, no load  
= 12V, no load  
--  
--  
3
70  
--  
6
--  
--  
mV  
dB  
dB  
FB  
50  
Rising Threshold  
Hysteresis  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 12V  
--  
--  
--  
1
90  
15  
0.2  
3
--  
--  
%
%
= 12V  
Sink Capability  
= 12V @ 1mA  
= 12V  
0.4  
10  
--  
V
Delay Time  
ms  
us  
Falling Delay  
= 12V  
--  
15  
To be Continued  
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4
DS9194-08 March 2007  
RT9194  
Parameter  
Chip Enable  
Test Conditions  
Min  
Typ  
Max Units  
EN Rising Threshold  
EN Hysteresis  
V
CC  
V
CC  
V
CC  
= 12V  
= 12V  
--  
--  
--  
0.7  
30  
--  
--  
--  
5
V
mV  
uA  
Standby Current  
= 12V, V = 0V  
EN  
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for  
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the  
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended  
periods may remain possibility to affect device reliability.  
Note 2. Devices are ESD sensitive. Handling precaution recommended.  
Note 3. The device is not guaranteed to function outside its operating conditions.  
DS9194-08 March 2007  
www.richtek.com  
5
RT9194  
Typical Operating Characteristics  
Feedback Voltage vs. Temperature  
Quiescent Current vs. Temperature  
0.9  
0.85  
0.8  
0.5  
0.49  
0.48  
0.47  
0.46  
0.75  
0.7  
VIN = 1.5V, VCC = 12V, RPGOOD = 100k  
CIN = COUT = 100uF, R1 = 1k, R2 = 2k  
VIN = 1.5V, VCC = 12V, RPGOOD = 100k  
CIN = COUT = 100uF, R1 = 1k, R2 = 2k  
0.45  
-50  
-25  
0
25  
50  
75  
100  
125  
-50  
-25  
0
25  
50  
75  
100  
125  
(°C)  
Temperature  
(°C)  
Temperature  
DRI Source Current vs. Temperature  
DRI Sink Current vs. Temperature  
60  
55  
50  
45  
40  
35  
30  
27  
24  
21  
18  
15  
12  
VFB = 1V, VCC = 12V, VDRI = 6V  
-50 -25 25 50  
VFB = 0.6V, VCC = 12V, VDRI = 6V  
-50 -25 25 50  
0
75  
100  
125  
0
75  
100  
125  
(°C)  
Temperature  
(°C)  
Temperature  
Sink Current vs. DRI Voltage  
PGOOD Delay Time vs. Temperature  
4
3.5  
3
25  
20  
15  
10  
5
VIN = 1.5V, VCC = 12V  
RPGOOD = 100k  
R1 = 1k, R2 = 2k  
2.5  
2
TA = 25°C  
2.5 3  
1.5  
0
-50  
-25  
0
25  
50  
75  
100  
125  
0
0.5  
1
1.5  
2
(°C)  
Temperature  
DRI Voltage (V)  
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6
DS9194-08 March 2007  
RT9194  
PGOOD Delay Time  
PGOOD Delay Time  
VCC = 12V, ILOAD = 1A  
IN = COUT = 100uF  
VCC = 12V, CIN = COUT = 100uF, ILOAD = 100mA  
C
VOUT  
VOUT  
ILoad (A)  
VPGOOD  
VPGOOD  
VEN (V)  
VEN (V)  
Time (500us/Div)  
Time (500us/Div)  
PGOOD Off  
Enable Threshold Voltage vs. Temperature  
1
VCC = 12V  
CIN = COUT = 100uF  
VIN = 1.5V, VCC = 12V, RPGOOD = 100kΩ  
VOUT  
CIN = COUT = 100uF, R1 = 1k, R2 = 2k  
0.95  
0.9  
0.85  
0.8  
Turn on  
ILoad (A)  
Turn off  
0.75  
0.7  
VPGOOD  
VEN (V)  
0.65  
0.6  
-50  
-25  
0
25  
50  
75  
100  
125  
Time (50us/Div)  
Temperature  
(°C)  
Load Transient Response  
Line Transient Response  
VIN = 2.5V, VOUT = 1.2V  
CIN = COUT = 100uF  
VIN = 1.5V to 2.5V, ILOAD = 100mA  
IN = 2.2uF, COUT = 100uF  
C
20  
0
10  
0
-20  
-10  
5
0
2.5  
1.5  
Time (250us/Div)  
Time (100us/Div)  
DS9194-08 March 2007  
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7
RT9194  
Application Information  
Capacitors Selection  
the output voltage decay rate. Drive the EN pin high to  
turn on the device again.  
Careful selection of the external capacitors for RT9194 is  
highly recommended in order to remain high stability and  
performance.  
Under Voltage Protection  
RT9194 equips the VOUT under-voltage (UV) protection  
function. The UV protection circuits will start monitoring  
the power status after the PGOOD pin goes high. If the  
output voltage drops to below 75% of its setting value,  
the PGOOD and DRI pins will be pulled low and latch  
RT9194. The UV latch status will be released only when  
VCC or Enable pin goes low and returns high again, which  
will also cause RT9194 to re-activate.  
Regarding the supply voltage capacitor, connecting a  
capacitor which is 1μF between VCC and ground is a must.  
The capacitor improves the supply voltage stability to  
provide chip normally operating.  
Regarding the input capacitor, connecting a capacitor which  
100μF between VIN and ground is recommended to  
increase stability. With large value of capacitance could  
result in better performance for both PSRR and line  
transient response.  
MOSFET Selection  
The RT9194 are designed to driver external N-Channel  
MOSFET pass element. MOSFET selection criteria  
include threshold voltage VGS (VTH), maximum  
continuous drain current ID, on-resistance RDS(ON)  
,maximum drain-to-source voltage VDS and package  
When driving external pass element, connecting a  
capacitor 100μF between VOUT and ground is  
recommended for stability. With larger capacitance can  
reduce noise and improve load transient response and  
PSRR.  
thermal resistance θ(JA)  
.
Output Voltage Setting  
The most critical specification is the MOSFET RDS(ON).  
Calculate the required RDS(ON) from the following formula:  
The RT9194 develop a 0.8V reference voltage; especially  
suit for low voltage application. As shown in application  
circuit, the output voltage could easy set the output  
voltage by R1 & R2 divider resistor.  
V
V  
IN  
OUT  
NMOSFETR  
=
DS(ON)  
I
LOAD  
For example, the MOSFET operate up to 2A when the  
input voltage is 1.5V and set the output voltage is 1.2V,  
RON = (1.5V-1.2V) / 2A = 150mΩ, the MOSFET's  
RON have to select lower than 150mΩ.APhilip PHD3055E  
MOSFET with an RDS(ON) of 120mΩ(typ.) is a close  
match.  
Power Good Function  
The RT9194 has the power good function with delay. The  
power good output is an open drain output. Connect a  
100kΩ pull up resistor to VOUT to obtain an output voltage.  
When the output voltage arrive 90% of normal value the  
power good will output voltage with 3ms delay time.  
And carry on consider the thermal resistance from  
junction to ambient θ(JA) of the MOSFET's package. The  
power dissipation calculate by :  
When the output voltage falling arrive 75% of normal value  
the power good will turn off with less than 1ms delay time.  
But, there are two exceptions. One is the enable pull low  
the power good will turn off quickly. The second is the  
VCC falling arrive POR value (4V typ.) the power good  
also will turn off quickly.  
PD = (VIN VOUT) x ILOAD  
The thermal resistance from junction to ambient θ(JA)  
calculate by :  
(T T )  
J
A
θ
=
(JA)  
P
D
In this example, PD = (1.5V 1.2V) x 2A = 0.6W. The  
PHD3055E's θ(JA) is 75°C/W for itsD-PAK package, which  
translates to a 45°C temperature rise above ambient. The  
package provides exposed backsides that directly transfer  
heat to the PCB board.  
Chip Enable Operation  
Pull the EN pin low to drive the device into shutdown mode.  
During shutdown mode, the standby current drops to  
5μA(MAX). The external capacitor and load current determine  
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8
DS9194-08 March 2007  
RT9194  
PNP Transistor Selection  
The RT9194 could driver the PNP transistor to sink output current. PNP transistor selection criteria include DC current  
gain hFE, threshold voltage VEB, collector-emitter voltage VCE, maximum continues collector current IC, package thermal  
resistance θ(JA).  
For example, the PNP transistor operates sink current up to 0.5A when the input voltage is 1.5V and set the output  
voltage is 1.2V. As show in Figure 3. A KSB772 PNP transistor, the VCE = 1.2V, VBE = -1V, IC = 0.5A, IB = 0.5/160 ]  
3.125mA, when the DRI pin voltage is 0.2V could sink 6.8mA(MAX) is a close match.  
Sink Current vs. DRI Voltage  
25  
V
IN  
20  
15  
10  
5
PGOOD  
R
C
IN  
VCC  
Q1  
DRI  
V
CC  
Ccc  
PGOOD  
V
PGOOD  
GND  
EN  
OUT  
RT9194  
Chip Enable  
FB  
C
R1  
R2  
OUT  
Q2  
TA = 25°C  
0
0
0.5  
1
1.5  
2
2.5  
3
Figure 3  
DRI Voltage (V)  
Figure 4  
Layout Considerations  
There are three critical layout considerations. One is the divider resistors should be located to RT9194 as possible to  
avoid inducing any noise. The second is capacitors place. The CIN and COUT have to put at near the NMOS for improve  
performance. The third is the copper area for pass element. We have to consider when the pass element operating  
under high power situation that could rise the junction temperature. In addition to the package thermal resistance limit,  
we could add the copper area to improve the power dissipation. As show in Figure 5 and Figure 6.  
V
IN  
V
IN  
PGOOD  
C
IN  
VCC  
Q1  
DRI  
V
GND  
CC  
Ccc  
R
PGOOD  
PGOOD  
GND  
EN  
V
OUT  
PGOOD  
FB  
V
RT9194  
CC  
Chip Enable  
FB  
R1  
R2  
C
OUT  
V
OUT  
EN  
GND  
Figure 5  
Figure 6  
DS9194-08 March 2007  
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9
RT9194  
Outline Dimension  
H
D
L
C
A
B
b
A1  
e
Dimensions In Millimeters  
Dimensions In Inches  
Symbol  
Min  
Max  
Min  
Max  
A
A1  
B
0.889  
0.000  
1.397  
0.250  
2.591  
2.692  
0.838  
0.080  
0.300  
1.295  
0.152  
1.803  
0.560  
2.997  
3.099  
1.041  
0.254  
0.610  
0.031  
0.000  
0.055  
0.010  
0.102  
0.106  
0.033  
0.003  
0.012  
0.051  
0.006  
0.071  
0.022  
0.118  
0.122  
0.041  
0.010  
0.024  
b
C
D
e
H
L
SOT-23-6 Surface Mount Package  
Richtek Technology Corporation  
Headquarter  
Richtek Technology Corporation  
Taipei Office (Marketing)  
5F, No. 20, Taiyuen Street, Chupei City  
Hsinchu, Taiwan, R.O.C.  
8F, No. 137, Lane 235, Paochiao Road, Hsintien City  
Taipei County, Taiwan, R.O.C.  
Tel: (8863)5526789 Fax: (8863)5526611  
Tel: (8862)89191466 Fax: (8862)89191465  
Email: marketing@richtek.com  
www.richtek.com  
10  
DS9194-08 March 2007  

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