RT9214 [RICHTEK]
5V/12V Synchronous Buck PWM DC-DC Controller; 5V / 12V同步降压PWM DC- DC控制器
| 型号： | RT9214 |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | 5V/12V Synchronous Buck PWM DC-DC Controller |
| 文件： | 总17页 (文件大小：345K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RT9214
5V/12V Synchronous Buck PWM DC-DC Controller
General Description
Features
z Operating with 5V or 12V Supply Voltage
z Drives All Low Cost N-Channel MOSFETs
z Voltage Mode PWM Control
z 300kHz Fixed Frequency Oscillator
z Fast Transient Response :
The RT9214 is a high efficiency synchronous buck PWM
controllers that generate logic-supply voltages in PC based
systems. These high performance , single output devices
include internal soft-start, frequency compensation
networks and integrates all of the control, output
adjustment, monitoring and protection functions into a
single package.
`High-Speed GM Amplifier
`Full 0 to 100% Duty Ratio
z Internal Soft-Start
The device operating at fixed 300kHz frequency provides
an optimum compromise between efficiency, external
component size, and cost.
z Adaptive Non-Overlapping Gate Driver
z Over-Current Fault Monitor on MOSFET, No
Current Sense Resistor Required
Adjustable over-current protection (OCP) monitors the
voltage drop across the RDS(ON) of the lower MOSFET for
synchronous buck PWM DC-DC controller. The over-
current function cycles the soft-start in 4-times hiccup
mode to provide fault protection, and in an always hiccup
mode for under-voltage protection.
z RoHS Compliant and 100% Lead (Pb)-Free
Applications
z Graphic Card
z Motherboard, Desktop Servers
z IA Equipments
z Telecomm Equipments
z High PowerDC-DC Regulators
Ordering Information
RT9214
Pin Configurations
Package Type
S : SOP-8
(TOP VIEW)
SP : SOP-8 (Exposed Pad-Option 1)
BOOT
UGATE
GND
PHASE
OPS
FB
8
7
6
5
Operating Temperature Range
P : Pb Free with Commercial Standard
G : Green (Halogen Free with Commer-
cial Standard)
2
3
4
LGATE
VCC
Note :
SOP-8
Richtek Pb-free and Green products are :
`RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
BOOT
UGATE
GND
PHASE
OPS
FB
8
7
6
5
2
3
4
NC
`Suitable for use in SnPb or Pb-free soldering processes.
`100% matte tin (Sn) plating.
9
LGATE
VCC
SOP-8 (Exposed Pad)
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DS9214-13 September 2007
RT9214
Typical Application Circuit
V
IN
+3.3V/+5V/+12V
+5V to +12V
D1
1N4148
R
BOOT
2.2
C3
1uF
C4
470uF
C2
0.1uF
R1
10
R
1
5
6
3
UGATE
Q1
2
8
BOOT
UGATE
MU
2.2
V
L1
3uH
VCC
FB
PHASE
RT9214
OUT
C1
1uF
ROCSET
7
4
OPS
R
Q2
ML
GND
LGATE
C
C6 to C8
1000uFx3
Q3
3904
Disable
>
R3
68
R3
R2
R2
32
VOUT = VREF ×(1+
)
VREF :Internal reference voltage
C5
R4
200-1k 0.1-0.33uF
(0.8V ± 2%)
Functional Pin Description
BOOT (Pin 1)
FB (Pin 6)
Bootstrap supply pin for the upper gate driver. Connect
the bootstrap capacitor between BOOT pin and the PHASE
pin. The bootstrap capacitor provides the charge to turn
on the upper MOSFET.
Switcher feedback voltage. This pin is the inverting input
of the error amplifier. FB senses the switcher output
through an external resistor divider network.
OPS (OCSET, POR and Shut-Down) (Pin 7)
UGATE (Pin 2)
This pin provides multi-function of the over-current setting,
UGATE turn-on POR sensing, and shut-down features.
Connecting a resistor (ROCSET) between OPS and
PHASE pins sets the over-current trip point.
Upper gate driver output. Connect to the gate of high-
side powerN-Channel MOSFET. This pin is monitored by
the adaptive shoot-through protection circuitry to
determine when the upper MOSFET has turned off.
Pulling the pin to ground resets the device and all external
MOSFETs are turned off allowing the output voltage power
rails to float.
GND (Pin 3)
Both signal and power ground for the IC. All voltage levels
are measured with respect to this pin. Ties the pin directly
to the low-side MOSFET source and ground plane with
the lowest impedance.
This pin is also used to detect VIN in power on stage and
issues an internal POR signal.
PHASE (Pin 8)
Connect this pin to the source of the upper MOSFET and
the drain of the lower MOSFET.
LGATE (Pin 4)
Lower gate drive output. Connect to the gate of low-side
power N-Channel MOSFET. This pin is monitored by the
adaptive shoot-through protection circuitry to determine
when the lower MOSFET has turned off.
NC [Exposed Pad (9)]
No Internal Connection.
VCC (Pin 5)
Connect this pin to a well-decoupled 5V or 12V bias
supply. It is also the positive supply for the lower gate
driver, LGATE.
DS9214-13 September 2007
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2
RT9214
Function Block Diagram
VCC
+
-
EN
0.1V
1.5V
+
-
PH_M
Power On
Reset
Bias & Regulators
(3V_Logic & 3VDD_Analog)
Reference
0.8VREF
3V
+
-
Soft-Start
&
Fault Logic
40uA
0.6V
UV_S
OPS
-
+
OC
0.4V
+
-
BOOT
UGATE
PHASE
+
EO
+
-
Gate
Control
Logic
GM
-
FB
VCC
LGATE
Oscillator
(300kHz)
GND
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DS9214-13 September 2007
RT9214
Absolute Maximum Ratings (Note 1)
z Supply Voltage, VCC -------------------------------------------------------------------------------------- 16V
z BOOT, VBOOT - VPHASE------------------------------------------------------------------------------------ 16V
z PHASE to GND
DC------------------------------------------------------------------------------------------------------------- −5V to 15V
< 200ns ------------------------------------------------------------------------------------------------------ −10V to 30V
z BOOT to PHASE ------------------------------------------------------------------------------------------ 15V
z BOOT toGND
DC------------------------------------------------------------------------------------------------------------- −0.3V to VCC+15V
< 200ns ------------------------------------------------------------------------------------------------------ −0.3V to 42V
z UGATE ------------------------------------------------------------------------------------------------------- VPHASE - 0.3V to VBOOT + 0.3V
z LGATE ------------------------------------------------------------------------------------------------------- GND - 0.3V to VVCC + 0.3V
z Input, Output or I/O Voltage ----------------------------------------------------------------------------- GND-0.3V to 7V
z Power Dissipation, PD @ TA = 25°C (Note 4)
SOP-8 -------------------------------------------------------------------------------------------------------- 0.625W
SOP-8 (Exposed Pad) ----------------------------------------------------------------------------------- 1.33W
z Package Thermal Resistance
SOP-8, θJA -------------------------------------------------------------------------------------------------- 160°C/W
SOP-8 (Exposed Pad), θJA ------------------------------------------------------------------------------ 75°C/W
z Junction Temperature ------------------------------------------------------------------------------------- 150°C
z Lead Temperature (Soldering, 10 sec.)--------------------------------------------------------------- 260°C
z Storage Temperature Range ---------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 2)
HBM (Human Body Mode) ------------------------------------------------------------------------------ 2kV
MM (Machine Mode) -------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 3)
z Supply Voltage, VCC -------------------------------------------------------------------------------------- 5V 5%,12V 10%
z Junction Temperature Range---------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range---------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VCC = 5V/12V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ Max Units
V
CC
Supply Current
Nominal Supply Current
Power-On Reset
POR Threshold
UGATE and LGATE Open
--
6
15
mA
I
CC
--
4.1
0.5
4.5
--
V
V
V
V
Rising
= 12V
CC
CC
CCRTH
Hysteresis
0.35
V
CCHYS
Switcher Reference
Reference Voltage
0.784 0.8 0.816
V
V
V
REF
To be continued
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RT9214
Parameter
Symbol
Test Conditions
Min
Typ Max Units
Oscillator
Free Running Frequency
Ramp Amplitude
250
--
300
1.5
350
--
kHz
f
V
V
= 12V
OSC
CC
ΔV
V
P-P
= 12V
OSC
CC
Error Amplifier (GM)
E/A Transconductance
Open Loop DC Gain
--
--
0.2
90
--
--
ms
dB
g
m
A
O
PWM Controller Gate Drivers (VCC = 12V)
V
V
V
V
− V
= 12V,
= 6V
BOOT
PHASE
Upper Gate Source
0.6
--
1
4
--
8
A
I
UGATE
− V
UGATE
PHASE
PHASE
− V
= 12V,
= 1V
BOOT
Upper Gate Sink
R
Ω
UGATE
− V
UGATE
PHASE
Lower Gate Source
Lower Gate Sink
Dead Time
0.6
--
1
3
--
5
A
Ω
I
V
= 12V, V
= 6V
= 1V
LGATE
CC
CC
LGATE
R
V
= 12V, V
LGATE
LGATE
--
--
100
ns
T
DT
Protection
FB Under-Voltage Trip
OC Current Source
Soft-Start Interval
FB Falling
= 0V
70
35
--
75
40
80
45
--
%
Δ
FBUVT
SS
I
V
μA
ms
OC
PHASE
3.5
T
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
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DS9214-13 September 2007
RT9214
Typical Operating Characteristics
(VOUT = 2.5V, unless otherwise specified )
Efficiency vs. Output Current
1
Efficiency vs. Output Current
1
0.95
0.9
0.95
0.9
0.85
0.8
0.85
0.8
0.75
0.7
0.75
0.7
0.65
0.65 VCC = 5V
VCC = 12V
V
IN = 5V
VIN = 5V
0.6
0.6
0
5
10
15
20
25
0
5
10
15
20
25
Output Current (A)
Output Current (A)
Reference Voltage vs. Temperature
Frequency vs. Temperature
0.812
0.81
350
330
310
290
270
250
VCC = 12V
VIN = 5V
0.808
0.806
0.804
0.802
0.8
0.798
-40
-10
20
50
80
110
140
-40 -25 -10
5
20 35 50 65 80 95 110 125
(°C)
Temperature
Temperature
(°C)
POR vs. Temperature
VCC Switching
4.75
4.5
Rising
(100mV/Div)
(10A/Div)
VOUT
IOUT
4.25
4
UGATE
VCC
Falling
(20V/Div)
(10V/Div)
3.75
3.5
VCC = 12Vto 5V
IOUT= 10A
VIN = 5V
-40
-10
20
50
80
110
140
Time (10ms/Div)
Temperature
(°C)
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RT9214
Power On
VCC Switching
(100mV/Div)
(10A/Div)
VOUT
IOUT
(500mV/Div)
VOUT
UGATE
VCC
(2A/Div)
IOUT
(20V/Div)
(10V/Div)
UGATE
VCC = 5V to 12V
IOUT= 10A, VIN = 5V
(10V/Div)
Time (500us/Div)
Time (10ms/Div)
Power Off
Dead Time (Rising)
VCC = VIN = 5V
IOUT = 25A
VCC
(10V/Div)
VOUT
UGATE
(2V/Div)
(2V/Div)
VIN
PHASE
LGATE
(5V/Div)
UGATE
(10V/Div)
IOUT = 2A
Time (5ms/Div)
Time (25ns/Div)
Dead Time (Falling)
Transient Response (Rising)
VCC = 12V
VIN = 5V
IOUT= 25A
UGATE
(10V/Div)
UGATE
VOUT
(100mV/Div)
PHASE
VCC = VIN = 12V
IOUT= 0A to 15A
(5V/Div)
LGATE
IL
L = 2.2uH
C = 2000uF
(10A/Div)
Freq. = 1/20ms, SR = 2.5A/us
Time (10ns/Div)
Time (5us/Div)
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DS9214-13 September 2007
RT9214
Transient Response (Falling)
L = 2.2uH
C = 2000uF
UGATE
(10V/Div)
VOUT
(100mV/Div)
VCC = VIN = 12V
IOUT= 15A to 0A
Freq. = 1/20ms
SR = 2.5A/us
IL
(10A/Div)
Time (25us/Div)
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RT9214
Application Information
Inductor Selection
According to Figure 1 the ripple current of inductor can be
calculated as follows :
The selection of output inductor is based on the
considerations of efficiency, output power and operating
frequency. Low inductance value has smaller size, but
results in low efficiency, large ripple current and high output
ripple voltage. Generally, an inductor that limits the ripple
current (ΔIL) between 20% and 50% of output current is
appropriate. Figure 1 shows the typical topology of
synchronous step-down converter and its related
waveforms.
ΔI
VOUT
D
V − VOUT = L L ; Δt = ; D =
IN
Δt
fs
VOUT
V × fs× ΔIL
V
IN
(1)
L = (V − VOUT )×
IN
IN
Where :
VIN = Maximum input voltage
VOUT = Output Voltage
Δt = S1 turn on time
i
I
S1
L
L
+
-
V
ΔIL = Inductor current ripple
fS = Switching frequency
D = Duty Cycle
L
I
i
OUT
C
i
S2
+
S1
V
+
r
OR
-
C
V
R
V
S2
IN
L
OUT
+
OC
-
V
rC = Equivalent series resistor of output capacitor
-
C
OUT
Output Capacitor
The selection of output capacitor depends on the output
ripple voltage requirement. Practically, the output ripple
voltage is a function of both capacitance value and the
equivalent series resistance (ESR) rC. Figure 2 shows
the related waveforms of output capacitor.
T
S
T
V
V
T
g1
ON OFF
g2
V
- V
IN
OUT
di
di
L
dt
V
-V
V
L
IN OUT
OUT
L
i
L
=
=
L
dt
V
L
I
- V
OUT
OUT
T
S
i
i
L
C
I = I
L
OUT
1/2ΔI
ΔI
L
L
0
ΔI
L
i
V
S1
OC
ΔV
OC
i
S2
V
OR
ΔI x r
L
c
0
Figure 1. The waveforms of synchronous step-down
converter
t1
t2
Figure 2. The related waveforms of output capacitor
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DS9214-13 September 2007
RT9214
The AC impedance of output capacitor at operating
frequency is quite smaller than the load impedance, so
the ripple current (ΔIL) of the inductor current flows mainly
through output capacitor. The output ripple voltage is
described as :
ZOUT is the shut impedance at the output node to ground
(see Figure 3 and Figure 4),
V
GM
OUT
C
R
1
(2)
(3)
ΔVOUT = ΔVOR + ΔVOC
C
2
1
t2
1
ΔVOUT = ΔIL ×rc +
ic dt
∫
t1
CO
1 VOUT
8 COL
ΔVOUT = ΔIL × ΔIL ×rc +
(1−D)TS2
(4)
Figure 3. A Type 2 error-amplifier with shut network to
ground
where ΔVOR is caused by ESR and ΔVOC by capacitance.
For electrolytic capacitor application, typically 90 to 95%
of the output voltage ripple is contributed by the ESR of
output capacitor. So Equation (4) could be simplified as :
V
OUT
+
R
O
+
EA+
EA-
GM
-
(5)
ΔVOUT = ΔIL x rc
Users could connect capacitors in parallel to get calculated
ESR.
Figure 4. Equivalent circuit
Pole and Zero :
1
Input Capacitor
1
2π ×R C
1 1
The selection of input capacitor is mainly based on its
maximum ripple current capability. The buck converter
draws pulsewise current from the input capacitor during
the on time of S1 as shown in Figure 1. The RMS value of
ripple current flowing through the input capacitor is
described as :
F =
P
; F =
Z
2π ×R C
1
2
We can see the open loop gain and the Figure 3 whole
loop gain in Figure 5.
(6)
Irms = IOUT D(1−D) (A)
Open Loop, Unloaded Gain
The input capacitor must be cable of handling this ripple
current. Sometime, for higher efficiency the low ESR
capacitor is necessarily.
A
Closed Loop, Unloaded Gain
F
F
Z
P
Gain = GMR1
PWM Loop Stability
B
RT9214 is a voltage mode buck converter using the high
gain error amplifier with transconductance (OTA,
Operational TransconductanceAmplifier).
100
1000 10k
100k
Frequency (Hz)
The transconductance :
Figure 5. Gain with the Figure 2 circuit
dI
OUT
GM =
dVm
RT9214 internal compensation loop :
The mid-frequency gain :
GM = 0.2ms, R1=75kΩ, C1 = 2.5nF, C2 = 10pF
dVOUT = dIOUTZOUT = GMdVINZOUT
dVOUT
G =
= GMZOUT
dV
IN
DS9214-13 September 2007
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10
RT9214
OPS (Over Current Setting, VIN_POR and Shutdown)
1.OCP
Sense the low-side MOSFET’ s RDS(ON) to set over-current trip point.
Connecting a resistor (ROCSET) from this pin to the source of the upper MOSFET and the drain of the lower MOSFET
sets the over-current trip point. ROCSET, an internal 40μAcurrent source, and the lower MOSFET on resistance, RDS(ON)
,
set the converter over-current trip point (IOCSET) according to the following equation :
40uA × ROCSET − 0.4V
IOCSET =
RDS(ON) of the lower MOSFET
OPS pin function is similar to RC charging or discharging circuit, so the over-current trip point is very sensitive to
parasitic capacitance (ex. shut-down MOSFET) and the duty ratio.
Below Figures say those effect. And test conditions are Rocset = 15kΩ (over -current trip point = 20.6A), Low-side
MOSFET is IR3707.
OCP
OCP
UGATE
(10V/Div)
UGATE (10V/Div)
I
(10A/Div)
L
I
(10A/Div)
L
OPS (200mV/Div)
= 5V, VCC = 12V
V
V
= 5V, VCC = 12V
= 1.5V
V
V
IN
OUT
IN
OUT
= 1.5V
Time (5μs/Div)
Time (5μs/Div)
OCP
OCP
OPS
(200mV/Div)
UGATE (10V/Div)
UGATE
(10V/Div)
I
(10A/Div)
L
I
(10A/Div)
L
V
= 12V, VCC = 12V
= 1.5V
IN
V
V
= 12V, VCC = 12V
IN
V
OUT
= 1.5V
OUT
Time (2.5μs/Div)
Time (2.5μs/Div)
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DS9214-13 September 2007
RT9214
2. VIN_POR
1) Mode 1 (SS< Vramp_valley)
UGATE will continuously generate a 10kHz clock with
1% duty cycle before VIN is ready. VIN is recognized ready
by detecting VOPS crossing 1.5V four times (rising &
falling). ROCSET must be kept lower than 37.5kΩ for large
ROCSET will keep VOPS always higher than 1.5V. Figure 6
shows the detail actions of OCP and POR. It is highly
recommend-ed that ROCSET be lower than 30kΩ.
Initially the COMP stays in the positive saturation. When
SS< VRAMP_Valley, there is no non-inverting input available
to produce duty width. So there is no PWM signal and
VOUT is zero.
2) Mode 2 (VRAMP_Valley< SS< Cross-over)
When SS>VRAMP_Valley, SS takes over the non-inverting
input and produce the PWM signal and the increasing
duty width according to its magnitude above the ramp
signal. The output follows the ramp signal, SS. However
while VOUT increases, the difference between VOUT and
SSE (SS − VGS) is reduced and COMP leaves the
saturation and declines. The takeover of SS lasts until it
meets the COMP. During this interval, since the feedback
path is broken, the converter is operated in the open loop.
3V
40uA
R
OCSET
PHASE
-
+
OPS
OC
0.4V
10pF
Q2
DISABLE
+
-
Cparasitic
1st 2nd3rd 4th
OPS
waveform
3) Mode3 ( Cross-over< SS < VGS + VREF
)
V
POR_H
+
-
IN
UGATE
PHASE_M
(1) Internal Counter will count (V
> 1.5V)
1.5V
OPS
When the Comp takes over the non-inverting input for PWM
Amplifier and when SSE (SS − VGS) < VREF, the output of
the converter follows the ramp input, SSE (SS − VGS).
Before the crossover, the output follows SS signal. And
when Comp takes over SS, the output is expected to follow
SSE (SS − VGS). Therefore the deviation of VGS is
represented as the falling of VOUT for a short while. The
COMP is observed to keep its decline when it passes the
cross-over, which shortens the duty width and hence the
falling of VOUT happens.
four times (rising & falling) to recognize
V
is ready.
IN
(2) R
canꢀbe set too large. Or canꢀ
OCSET
detect V is ready (counter = 1, not equal 4)
IN
Figure 6. OCP and VIN_POR actions
3. Shutdown
Pulling low the OPS pin by a small single transistor can
shutdown the RT9214 PWM controller as shown in typical
application circuit.
Soft Start
Since there is a feedback loop for the error amplifier, the
output’ s response to the ramp input, SSE (SS − VGS) is
lower than that in Mode 2.
A built-in soft-start is used to prevent surge current from
power supply input during power on. The soft-start voltage
is controlled by an internal digital counter. It clamps the
ramping of reference voltage at the input of error amplifier
and the pulse-width of the output driver slowly. The typical
soft-start duration is 3ms.
4) Mode 4 (SS > VGS + VREF
)
When SS > VGS + VREF, the output of the converter follows
the desired VREF signal and the soft start is completed
now.
COMP
V
RAMP_Valley
Cross-over
SS_Internal
VCORE
SSE_Internal
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12
RT9214
Under Voltage Protection
placement layout and printed circuit design can minimize
the voltage spikes induced in the converter. Consider, as
an example, the turn-off transition of the upper MOSFET
prior to turn-off, the upper MOSFET was carrying the full
load current. During turn-off, current stops flowing in the
upper MOSFET and is picked up by the low side MOSFET
or schottky diode. Any inductance in the switched current
path generates a large voltage spike during the switching
interval. Careful component selections, layout of the
critical components, and use shorter and wider PCB traces
help in minimizing the magnitude of voltage spikes.
The voltage at FB pin is monitored and protected against
UV (under voltage). The UV threshold is the FB or FBL
under 80%. UV detection has 15μs triggered delay. When
OC is trigged, a hiccup restart sequence will be initialized,
as shown in Figure 7 Only 4 times of trigger are allowed
to latch off. Hiccup is disabled during soft-start interval,
but UV_FB has some difference from OC, it will always
trigger VIN power sensing after 4 times hiccup, as shown
in Figure 8.
COUNT = 1
COUNT = 2
COUNT = 3
COUNT = 4
There are two sets of critical components in a DC-DC
converter using the RT9214. The switching power
components are most critical because they switch large
amounts of energy, and as such, they tend to generate
equally large amounts of noise. The critical small signal
components are those connected to sensitive nodes or
those supplying critical bypass current.
4V
2V
0V
OVERLOAD
APPLIED
0A
T0
T1
T2
T3
T4
The power components and the PWM controller should
be placed firstly. Place the input capacitors, especially
the high-frequency ceramic decoupling capacitors, close
to the power switches. Place the output inductor and
output capacitors between the MOSFETs and the load.
Also locate the PWM controller near by MOSFETs.
TIME
Figure 7. UV and OC trigger hiccup mode
Power Off
A multi-layer printed circuit board is recommended.
UGATE
FB
(20V/Div)
Figure 9 shows the connections of the critical components
in the converter. Note that the capacitors CIN and COUT
each of them represents numerous physical capacitors.
Use a dedicated grounding plane and use vias to ground
all critical components to this layer. Apply another solid
layer as a power plane and cut this plane into smaller
islands of common voltage levels. The power plane should
support the input power and output power nodes. Use
copper filled polygons on the top and bottom circuit layers
for the PHASE node, but it is not necessary to oversize
this particular island. Since the PHASE node is subjected
to very high dV/dt voltages, the stray capacitance formed
between these island and the surrounding circuitry will
tend to couple switching noise. Use the remaining printed
circuit layers for small signal routing. The PCB traces
between the PWM controller and the gate of MOSFET
and also the traces connecting source of MOSFETs should
be sized to carry 2A peak currents.
UV
VIN Power
Sensing
(500mV/Div)
VOUT
VIN
(2V/Div)
(2V/Div)
IOUT = 2A
Time (10ms/Div)
Figure 8, UV_FB trigger VIN power sensing
PWM Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. The voltage
spikes can degrade efficiency and radiate noise, that results
in over-voltage stress on devices. Careful component
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13
DS9214-13 September 2007
RT9214
IQ1
IL
V
5V/12V
GND
OUT
Q1
LOAD
IQ2
Q2
VCC
GND
RT9214
FB
LGATE
UGATE
Figure 9. The connections of the critical components in the converter
Below PCB gerber files are our test board for your reference :
DS9214-13 September 2007
www.richtek.com
14
RT9214
According to our test experience, you must still notice two items to avoid noise coupling :
1.The ground plane should not be separated.
2.VCC rail adding the LC filter is recommended.
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15
DS9214-13 September 2007
RT9214
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
B
C
D
F
H
I
4.801
3.810
1.346
0.330
1.194
0.170
0.050
5.791
0.400
5.004
3.988
1.753
0.508
1.346
0.254
0.254
6.200
1.270
0.189
0.150
0.053
0.013
0.047
0.007
0.002
0.228
0.016
0.197
0.157
0.069
0.020
0.053
0.010
0.010
0.244
0.050
J
M
8-Lead SOP Plastic Package
DS9214-13 September 2007
www.richtek.com
16
RT9214
H
A
Y
M
EXPOSED THERMAL PAD
(Bottom of Package)
J
B
X
F
C
I
D
Dimensions In Millimeters Dimensions In Inches
Symbol
Min
Max
Min
Max
0.197
0.157
0.069
0.020
0.053
0.010
0.006
0.244
0.050
0.091
0.091
0.098
0.138
A
B
C
D
F
H
I
4.801
3.810
1.346
0.330
1.194
0.170
0.000
5.791
0.406
2.000
2.000
2.100
3.000
5.004
4.000
1.753
0.510
1.346
0.254
0.152
6.200
1.270
2.300
2.300
2.500
3.500
0.189
0.150
0.053
0.013
0.047
0.007
0.000
0.228
0.016
0.079
0.079
0.083
0.118
J
M
X
Y
X
Y
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
8F, No. 137, Lane 235, Paochiao Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)89191466 Fax: (8862)89191465
Email: marketing@richtek.com
www.richtek.com
17
DS9214-13 September 2007
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