RT9232B中文资料_数据手册_规格书

RT9232B

Programmable Frequency Synchronous Buck PWM Controller

General Description

Features

^ꢀSingle IC Supply Voltage : 12V

^ꢀSingle phase DC/DC Buck Converter with

`High Output Current (up to 25A )

`Low Output Voltage (down to 0.8V )

`High Input Voltage (up to 12V )

The RT9232B is a single-phase synchronous buck PWM

DC-DC converter controller designed to drive two

N- MOSFETs. It provides a highly accurate, programmable

output voltage precisely regulated to low voltage

requirement with an internal 0.8V ± ±1% reference.

^ꢀOperate from 12V, 5V or 3.3V Input

ꢀ 0.8V ± 1% Internal Reference

The RT9232B uses an external compensated, single

feedback loop voltage mode PWM control for fast transient

response. An oscillator with Programmable frequency

(50kHz to 800kHz) reduces the external inductor and

capacitor component size for saving PCB board area.

^ꢀAdaptive Non-Overlapping Gate Drivers

^ꢀIntegrated High-Current, HV Gate Drivers

^ꢀExternal Programmable Soft Start

^ꢀExternal Programmable Frequency

(Range : 50kHz to 800kHz, 200kHz Free Run )

ꢀ Provide Over Current Protection by Sensing

MOSFET R_DS(ON)

The RT9232B provides fast transient response to satisfy

high current output applications (up to 25A) while

minimizing external components. It is suitable for high-

performance graphic processors, DDR and VTT power.

ꢀ On/Off Control by Enable Pin

ꢀ Drives Two N-MOSFET

The RT9232B integrates complete protect functions such

as Soft Start, Output Enable, UVLO(under-voltage lockout)

and OCP into a small 14-pin package.

ꢀ Full 0 to 100% Duty Cycle

ꢀ Fast Transient Response

ꢀ Voltage Mode PWM Control with External

Feedback Loop Compensation

Applications

ꢀ RoHS Compliant and 100% Lead (Pb)-Free

ꢀ System (Graphic, MB) with 12V Power.

ꢀ Graphic Cards (AGP 8X, 4X, PCI Express*16) :

`High-Current for High-PerformanceGraphic Processors

(GPU, VPU)

Ordering Information

RT9232B

Package Type

S : SOP-14

`Middle Current for High-PerformanceGraphic Memory

Power (DDR, DDR II)

Operating Temperature Range

P : Pb Free with Commercial Standard

G : Green (Halogen Free with Commer-

cial Standard)

`Low Current with Sink Capacity for High-Performance

Graphic Memory Power (DDR/VTT)

ꢀ 3.3V to 12V InputDC-DC Regulators

ꢀ Low VoltageDistributed Power Supplies

Note :

RichTek Pb-free and Green products are :

`RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

Pin Configurations

(TOP VIEW)

14

13

12

11

10

9

RT

OCSET

SS

COMP

FB

VCC

`Suitable for use in SnPb or Pb-free soldering processes.

`100% matte tin (Sn) plating.

2

3

4

PVCC

LGATE

PGND

BOOT

UGATE

PHASE

5

6

7

EN

GND

8

SOP-14

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RT9232B

Typical Application Circuit

V

IN

3.3V - 12V

L1

V

CC

1uH

CE0

+

470uF

R4

3.01k

D1

R1

1N4148

C1

2.2

0.22uF

14

10

2

C6

10uF

CE2

C5

CE1

1000uF

VCC

BOOT

OCSET

0.1uF

1000uF

C3

1nF

13

PVCC

R5

C2 0.22uF

C

Q1

9

0

UGATE

IPD09N03LA

3

1

0.1uF

SS

C4

0.1uF

L2

2.2uH

SS

RT

8

V

PHASE

OUT

R2

51k

R6

V

R7

2.2

CE3 CE4

C8

C9

C10

CC

0

6

7

4

12

11

EN

Q2

LGATE

PGND

FB

R3

10k

C7

1nF

IPD06N03LA

GND

COMP

5

0.1uF

10uF

2200uF 510uF 22uF

RT9232B

R9

1k

C11

33pF

R8

15k

R11

1k

C13

C12

10nF

R10

562

Functional Pin Description

Pin No. Pin Name

Pin Function

Oscillator Frequency Setting

1

2

3

4

5

6

7

RT

OCSET

SS

Set Over Current Protection Triggering Level

Soft Start Time Interval Setting

Feedback Compensation

COMP

FB

Voltage Feedback

EN

Chip Enable (Active High)

GND

IC Signal Reference Ground

8

PHASE

UGATE

BOOT

PGND

LGATE

PVCC

VCC

Return Path for Upper MOSFET

Upper MOSFET Gate Drive

Input Supply for Upper Gate Drive

Power Ground

9

10

11

12

13

14

Lower MOSFET Gate Drive

Input Supply for Lower Gate Drive

Internal IC Supply (12V Bias)

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DS9232B-03 March 2007

RT9232B

Function Block Diagram

VCC EN

Power-On

Reset (POR)

OCSET

-

+

POR

10uA

Soft Start

and

Fault Logic

SS

200uA

UV

0.6V

+

-

BOOT

UGATE

INHIBIT

PHASE

+

-

+

PWM

Driver Logic

EA

FB

-

+

0.8V

Reference

PVCC

LGATE

PGND

GND

COMP

Oscillator

RT

Operation

Startup

OCP

RT9232B initializes automatically after receiving both V_CC

and V_INpower. Special power-on sequence is not

necessary. The Power-On Reset (POR) function

continually monitors input supply voltages and enable

voltage. POR function monitors IC power via VCC pin and

external MOSFET power via OCSET pin. Voltage on

OCSET pin is a fixed voltage drop less than V_IN. When

voltages on VCC, OCSET, and EN pins exceed their

thresholds, POR function initializes soft-start operation.

POR inhibits driver operation while EN pin pulls low.

Transitioning ENpin high after input supply voltages ready

initializes soft-start operation.

The OCP function monitors output current by using upper

MOSFET R_DS(ON). The OCP function cycles soft-start

function in a hiccup mode. Overcurrent triggering level

can be arbitrarily set by adjusting R_OCSET.An Internal 200μA

current sink makes a voltage drop across R_OCSETfrom

V_IN. When V_PHASEis lower than V_OCSET, OCP function

initializes soft-start cycles. The soft-start function

discharges C_SSwith 10μAcurrent sink and disable PWM

function. Then soft-start function recharges Css and PWM

operation resumes. The soft-start hiccup restarts after

SS voltage fully charges to 4V if the output short event

still remains. The converter is shutdown permanently after

3 times hiccup and only restarting supply voltages can

enable the converter. The OCP funcion will be triggered

as inductor current reach :

Soft-Start

After POR function releases soft-start operation, an internal

10uAcurrent source charges an external capacitor on SS

pin (Css) to 5V. Soft-start function clamps both COMP &

FB pins to SS pin voltage & a fixed voltage drop less than

SS pin voltage respectively. Thus upper MOSFET turns

on at a limited duty and output current overshoot can be

reduced. This method provides a rapid and controlled

output voltage rise.

I_OCSET×R_OCSET

I_L(MAX)

=

R_DS(ON)

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RT9232B

To prevent OC form tripping in normal operation, R_OCSET

must be carefully chosen with :

1. Maximum R_DS(ON)at highest junction temperature

2. MInimum I_OCSETfrom specification table

Δ

3. I_L(MAX)> I_OUT(MAX)

+

I_L/2

Δ

I_L= inductor ripple current

Under Voltage Protection

The under voltage protection function protects the converter

from an shorted output by detecting the voltage on FB pin

to monitor the output voltage. The UVP function cycles

soft-start function in a hiccup mode. When output voltage

lower than 75% of designated voltage, UVP function

initializes soft-start cycles. The soft-start function

discharges Css with 10μAcurrent sink and disable PWM

operation. Then soft-start function recharges Css and

PWM operation resumes. The soft-start hiccup restarts

after SS voltage fully charges to 4V if the output short

event still remains. The converter is shutdown permanently

after 3 times hiccup and only restarting supply voltages

can enable the converter.

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DS9232B-03 March 2007

RT9232B

Absolute Maximum Ratings (Note 1)

ꢀ Supply Input Voltage, V_CC, PVCC--------------------------------------------------------------------------- 15V

ꢀ PHASE to GND

DC------------------------------------------------------------------------------------------------------------------- −5V to 15V

< 200ns ------------------------------------------------------------------------------------------------------------ −10V to 30V

ꢀ BOOT to PHASE ------------------------------------------------------------------------------------------------ 15V

ꢀ BOOT toGND

DC------------------------------------------------------------------------------------------------------------------- −0.3V to V_CC+15V

< 200ns ------------------------------------------------------------------------------------------------------------ −0.3V to 42V

ꢀ SS, FB, COMP, RT --------------------------------------------------------------------------------------------- 6V

ꢀ Input, Output or I/O Voltage ----------------------------------------------------------------------------------- GND−0.3V to V_CC+ 0.3V

ꢀ Package Thermal Resistance (Note 4)

SOP-14, θ_JA----------------------------------------------------------------------------------------------------- 100°C/W

ꢀ Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------- 260°C

ꢀ Junction Temperature ------------------------------------------------------------------------------------------ 150°C

ꢀ Storage Temperature Range---------------------------------------------------------------------------------- −65°C to 150°C

ꢀ ESD Susceptibility (Note 2)

HBM (Human Body Mode) ----------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ------------------------------------------------------------------------------------------- 150V

Recommended Operating Conditions (Note 3)

ꢀ Supply Input Voltage, V_CC------------------------------------------------------------------------------------ 12V ± 10%

ꢀ Supply Voltage to Drain of Upper MOSFETs, V_IN------------------------------------------------------- 3.3V, 5V to 12V ± 10%

ꢀ Ambient Temperature Range --------------------------------------------------------------------------------- −40°C to 85°C

ꢀ Junction Temperature Range --------------------------------------------------------------------------------- −40°C to 125°C

Electrical Characteristics

(V_CC= 12V, T_A= 25°C, Unless otherwise specified.)

Parameter

Supply Current

Symbol

Min Typ. Max Units

Test Conditions

V

CC

Nominal Supply Current

--

3

--

mA

I

EN = V , UGATE, LGATE open

CC

Power-On Reset (POR)

V

Rising Threshold

8.4

--

10.4

V

= 4.5V

CC_ON

OCSET

CC

Power On Reset Hysteresis

0.3

--

0.7

1.5

--

2

OCSET

OCSET Rising Threshold for start up

Enable Input Threshold (ON)

Enable Input Threshold (OFF)

Oscillator

V

OCSET_ON

--

2

V

= 4.5V

EN_ON

OCSET

0.8

--

V

EN,_OFF

OCSET

RT9232B

Free Running Frequency

Variation

170

−20

--

200

--

230

20

--

kHz

%

f

OSC

6k < (RT to GND) < 200k

Ramp Amplitude

1.5

ΔV

V

P-P

OSC

To be continued

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RT9232B

Parameter

Symbol

Test Conditions

Min

Typ Max Units

Reference

Error Amplifier Reference Voltage

0.792 0.8 0.808

V

REF

Error Amplifier

DC gain

--

88

15

6

--

dB

Gain-Bandwidth product

Slew Rate

GBW

SR

MHz

V/μs

COMP=10pF

Soft Start

External SS Source Current

PWM Controller Gate Driver

I

7

10

--

μA

SS

V

= 12V

= 1V

BOOT − PHASE

Upper Drive Source

R

--

5.2

--

Ω

UG_SC

BOOT − UGATE

Upper Drive Sink

Lower Drive Source

Lower Drive Sink

Driving Capability

Upper Drive Source

Upper Drive Sink

Lower Drive Source

Lower Drive Sink

Protection

R

V

= 1V

--

2.7

3.5

1.7

--

Ω

UG_SK

LG_SC

LG_SK

BOOT − PHASE

PVCC − LGATE

= 1V

LGATE

I

V

= 12V

--

1.0

2.0

1.6

3.2

--

A

UG_SC

UG_SK

LG_SC

LG_SK

BOOT − UGATE

= 12V

UGATE − PHASE

PVCC − LGATE

= 12V

LGATE − GND

OCSET Current Source

I

V

= 11.5V

170

0.5

--

200

0.6

30

230

0.7

--

μA

V

OCSET

Under-Voltage Protection

Under-Voltage Protection Delay

FB Falling

μs

Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may remain possibility to affect device reliability.

Note 2. Devices are ESD sensitive. Handling precaution recommended.

Note 3. The device is not guaranteed to function outside its operating conditions.

Note 4. θ_JAis measured in the natural convection at T_A= 25°C on a low effective thermal conductivity test board of

JEDEC 51-3 thermal measurement standard.

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DS9232B-03 March 2007

RT9232B

Typical Operating Characteristics

R_RTvs. Oscillator Frequency

Efficiency vs. Output Current

10000

1000

100

10

100

V_OUT= 1.6V

Pull high to V_CC12

f = 300kHz

90

V_IN= 3.3V

V_IN= 5V

80

V_IN= 12V

Pull down to GND

70

60

50

1

0

100

200

300

400

500

600

700

0

5

10

15

20

25

Frequency (kHz)

Output Current (A)

Power On

SS

(2V/Div)

V_OUT

(2V/Div)

EN

(10V/Div)

I_L

COMP

(1A/Div)

(500mV/Div)

Time (10ms/Div)

Power On

Power Off

UGATE

(20V/Div)

LGATE

(10V/Div)

SS

(2V/Div)

V_OUT

(2V/Div)

V_OUT

(500mV/Div)

EN

(10V/Div)

I_L

(10A/Div)

(1A/Div)

Time (25ms/Div)

Time (10μs/Div)

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RT9232B

Load Transient Response

UGATE

(20V/Div)

LGATE

(10V/Div)

V_OUT

(100mV/Div)

V_OUT

(100mV/Div)

I_L

(10A/Div)

Falling

Rising

Time (5μs/Div)

Time (25μs/Div)

Load Transient Response

OCP

UGATE

(20V/Div)

V_OUT

UGATE

(5V/Div)

(500mV/Div)

V_OUT

(500mV/Div)

LGATE

(10V/Div)

SS

(5V/Div)

I_L

(20A/Div)

(10A/Div)

Time (1ms/Div)

Time (25ms/Div)

Dead Time

Falling

UGATE

Rising

UGATE

PHASE

UGATE−PHASE

LGATE

UGATE−PHASE

(5/Div)

LGATE

Time (25ns/Div)

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DS9232B-03 March 2007

RT9232B

V_REFvs. Temperature

F_SWvs. Temperature

230

220

210

200

190

180

170

160

150

0.804

0.803

0.802

0.801

0.800

0.799

0.798

0.797

0.796

0.795

0.794

-40 -20

0

20

40

60

80 100 120 140

-40 -20

0

20

40

60

80 100 120 140

Temperature (°C)

(°C)

Temperature

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9

RT9232B

Application Information

whichever is smaller dominates the behavior of the devices.

During T0~T1, since SS is smaller than the sawtooth valley,

the PWM comparator outputs low no matter what the

COMP voltage is.

The RT9232B is a single-phase synchronous buck PWM

DC-DC controller designed to drive two N-MOSFETs. It

provides a highly accurate, programmable output voltage

precisely regulated to low voltage requirement with an

internal 0.8V ± 1% reference.

T1~T2

SSE ramps up and dominates the behavior of EA during

T1~T2. EA regulates COMP appropriately so that FB

ramps up along the SSE curve. The output voltage ramps

up accordingly. Thus upper MOSFET turns on at a limited

duty and output current overshoot can be reduced.

Initialization

The RT9232B automatically initiates its softstart cycle

only after V_CCand V_INpower and chip enabling signals

are ready. There is no special power-on sequence should

be took care especially while implement the chip in. The

internal Power-On Reset (POR) logic continually monitors

the voltage level of input power and enabling pin; in which

the IC supply power is monitored via VCC pin and input

power V_INis via OCSET pin. An internal current source

with driving capability of 200uA causes a fixed voltage

drop across the resistor connecting V_INto OCSET pin.

The RT9232B internal logic will deem the input voltage

ready once the voltage of OCSET pin is high than 1.5V.

The preferred V_INready level could be set by selecting an

appropriate resistor R_OCSETas :

It is noted that lower MOSFET keeps off before the upper

MOSFET starts switching. This method provides smooth

start up when there is residual voltage on output capacitors.

The output voltage delay time and ramp up time are

calculated as Equation (1) and (2) respectively.

0.8V × C_SS

(1)

(2)

T1− T0 =

T2 − T1=

(s)

10μA

0.8V × C_SS

10μA

V

−1.5V

200μA

IN_READY

R

<

Ω

SENSE

SSE

SS

Once all voltages of VCC, OCSET, and EN pins ramp

higher than the internal specific thresholds. The internal

POR logic will initialize the softstart operation then.

Moreover, the POR inhibits driver operation while pulling

the ENpin low. Transitioning ENpin high after input supply

voltages ready to initialize soft-start operation.

FB

COMP

EA

PWM

0.8V

SS

Soft-Start

5V

SSE

The behavior of RT9232B Soft-Start can be simply

described as shown in Figure.1 below; and the Soft-Start

can be sliced to several time-frames with specific operation

respectively.

COMP

FB

T0~T1

0.8V

T0

T1

T2

The RT9232B initiates the softstart cycle as shown in

Figure 1 when POR function is OK.An internal 10uAcurrent

source charges an external capacitor on SS pin (Css) to

5V. The softstart function produces an SSE signal that is

equal to SS−0.8V. Error Amplifier (EA) and PWM

comparator are triple-input devices. The non-inverting input

Figure 1. Timing diagram of softstart

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DS9232B-03 March 2007

RT9232B

Switching Frequency Setting

Output Inductor Selection

The default switching frequency is 200kHz when RT pin

left open.Aresistor connected (R_RT) from RT pin to ground

increases the switching frequency as Equation (3).

The selection of output inductor is based on the

considerations of efficiency, output power and operating

frequency. For a synchronous buck converter, the ripple

current of inductor (ΔI_L) can be calculated as follows :

2.9×10⁶

R_RT(Ω)

(3) (R_RTto GND)

kHz

f_OSC= 200kHz +

V_OUT

_IN× f_OSC×L

ΔI_L= (V_IN− V_OUT)×

(5)

V

Conversely, connecting a pull-up resistor (R_RT) from RT pin

reduces the switching frequency according to Equation (4)

Generally, an inductor that limits the ripple current between

20% and 50% of output current is appropriate. Make sure

that the output inductor could handle the maximum output

current and would not saturate over the operation

temperature range.

33×10⁶

R_RT(Ω)

(4) (R_RTto V_CC= 12V)

kHz

f_OSC= 200kHz −

Under Voltage Protection

Output Capacitor Selection

The under voltage protection is enabled when the RT9232B

is activated and SS voltage is higher than 4V. The UVP

function is specified for protecting the converter from an

instant output short circuit during normal operation. The

RT9232B continuously monitors the output voltage by

detecting the voltage on FB pin. The UVP function is

triggered and initiates the hiccup cycles when output

voltage lower than 75% of designated voltage with a 30us

delay.

The output capacitors determine the output ripple voltage

(ΔV_OUT) and the initial voltage drop after a high slew-rate

load transient. The selection of output capacitor depends

on the output ripple requirement. The output ripple voltage

is described as Equation (6).

V

OUT

1

8

(6)

ΔV

= ΔI ×ESR +

×

(1−D)

OUT

L

f²×L×C

OUT

OSC

For electrolytic capacitor application, typically 90~95%

of the output voltage ripple is contributed by the ESR of

output capacitors. Paralleling lower ESR ceramic capacitor

with the bulk capacitors could dramatically reduce the

equivalent ESR and consequently the ripple voltage.

Hiccup cycle turns off both upper and lower MOSFET first.

An internal 10uA current sink discharges the softstart

capacitor C_SS. SS pin voltage ramps down linearly. When

SS pin voltage touches 0V, hiccup cycle releases and

normal softstart cycle takes over. When SS voltage is

higher than 4V, the UVP function is enabled again. The

hiccup cycle restarts if the output short event still remains.

The converter is shutdown permanently after 3 times hiccup

and only restarting supply voltages can enable the

converter.

Input Capacitor Selection

Use mixed types of input bypass capacitors to control

the input voltage ripple and switching voltage spike across

the MOSFETs. The buck converter draws pulsewise

current from the input capacitor during the on time of upper

MOSFET. The RMS value of ripple current flowing through

the input capacitor is described as :

Note that triggering the POR function or EN will reset the

hiccup counter. Make sure that V_CC, EN and OCSET pin

voltages are higher than their respective trip level when

output short circuit occurs or the UVP function may not

latch up the converter causing permanent damage to the

converter.

(7)

I_IN(RMS)= I_OUT× D×(1− D)

The input bulk capacitor must be cable of handling this

ripple current. Sometime, for higher efficiency the low ESR

capacitor is necessarily. Appropriate high frequency

ceramic capacitors physically near the MOSFETs

effectively reduce the switching voltage spikes.

Component Selection

Components should be appropriately selected to ensure

stable operation, fast transient response, high efficiency,

minimum BOM cost and maximum reliability.

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11

RT9232B

MOSFET Selection

The break frequency F_LCand F_ESRare expressed as

Equation (10) and (11) respectively.

The selection of MOSFETs is based upon the

considerations of R_DS(ON), gate driving requirements, and

thermal management requirements. The power loss of

upper MOSFET consists of conduction loss and switching

loss and is expressed as :

1

(10)

(11)

F_{P_LC}

=

2π LC_OUT

1

F_{Z_ESR}

=

2π ×ESR× C_OUT

The compensation network consists of the error amplifier

EAand the impedance networks Z_INand Z_FB. The goal of

the compensation network is to provide a closed loop

transfer function with the highest DC gain, the highest

0dB crossing frequency (F_C) and adequate phase margin.

Typically, F_Cin range 1/5~1/10 of switching frequency is

adequate. The higher F_Cis, the faster dynamic response

is.Aphase margin in the range of 45°C~ 60°C is desirable.

P_UPPER= P_{COND_UPPER}+ P_{SW_UPPER}

(8)

= I²_OUT×R_DS(ON)×D + I_OUT

1

2

× V_IN×(T_RISE+ T_FALL)× f_OSC

where T_RISEand T_FALLare rising and falling time of V_DSof

upper MOSFET respectively. R_DS(ON)and Q_Gshould be

simultaneously considered to minimize power loss of upper

MOSFET.

The equations below relate the compensation network’s

poles, zeros and gain to the components (R1, R2, R3,

C1, C2, and C3) in Figure 2.

The power loss of lower MOSFET consists of conduction

loss, reverse recovery loss of body diode, and conduction

loss of body diode and is expressed as :

P

= P

+ P + P

DIODE

(9)

LOWER

COND_LOWER

RR

1

(12)

(13)

(14)

F_Z1

F_Z2

=

2π ×R2× C1

= I²

×R

×(1-D) + Q × V × f

OUT

DS(ON)

RR

OSC

IN

OSC

1

I

2π ×(R1+ R3)× C3

+

× V × T

× f

OUT

F

DIODE

2

1

where T_DIODEis the conducting time of lower body diode.

F_P1

=

C1× C2

C1+ C2

2π ×R2×

Special control scheme is adopted to minimize body diode

conducting time. As a result, the R_DS(ON)loss dominates

the power loss of lower MOSFET. Use MOSFET with

adequate R_DS(ON)to minimize power loss and satisfy

thermal requirements.

1

(15)

F_P2

2π ×R3× C3

V

IN

OSC

Driver

PWM

Comparator

L

V

Feedback Compensation

OUT

-

ΔV

OSC

PHASE

C

+

Figure 2 highlights the voltage-mode control loop for a

synchronous buck converter. Figure 3 shows the

corresponding Bode plot. The output voltage (V_OUT) is

regulated to the reference voltage. The error amplifier EA

output (COMP) is compared with the oscillator (OSC)

sawtooth wave to provide a pulse-width modulated (PWM)

wave with an amplitude of V_INat the PHASE node. The

PWM wave is smoothed by the output filter (L and C_OUT).

OUT

ESR

Z

FB

V

E/A

-

Z

IN

EA

+

REF

Z

V

FB

C2

OUT

Z

IN

C1

C3

R2

R3

The modulator transfer function is the small-signal transfer

function of V_OUT/COMP. This function is dominated by a

DC gain and the output filter (L and C_OUT), with a double

pole break frequency at F_{P_LC}and a zero at F_{Z_ESR}. The

DC gain of the modulator is simply the input voltage (V_IN)

R1

COMP

FB

-

EA

+

REF

divided by the peak-to-peak oscillator voltage ΔV_OSC

.

Figure 2

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12

DS9232B-03 March 2007

RT9232B

of high-side MOSFET. The MOSFETs of linear regulator

should have wide pad to dissipate the heat. In multilayer

PCB, use one layer as power ground and have a separate

control signal ground as the reference of the all signal. To

avoid the signal ground is effect by noise and have best

load regulation, it should be connected to the ground

terminal of output. Furthermore, follows below guidelines

can get better performance of IC :

100

80

F

P2

Z1 Z2

P1

60

40

20

0

Open Loop Error

AMP Gain

20LOG

(R1/R2)

20LOG

(V /ΔV

)

IN

OSC

Compensation

Gain

Modulator

Gain

-20

(1). The IC needs a bypassing ceramic capacitor as a R-C

filter to isolate the pulse current from power stage

and supply to IC, so the ceramic capacitor should be

placed adjacent to the IC.

Closed Loop Gain

-40

-60

F

LC

ESR

10

100

1K

10K

100K

1M

10M

Frequency (Hz)

(2). Place the high frequency ceramic decoupling close

to the power MOSFETs.

Figure 3

Feedback Loop Design Procedure

(3). The feedback part should be placed as close to IC as

possible and keep away from the inductor and all noise

sources.

Use these guidelines for locating the poles and zeros of

the compensation network :

(4). The components of bootstraps should be closed to

each other and close to MOSFETs.

1. Pick Gain (R2/R1) for desired 0dB crossing frequency

(F_C).

2. Place 1^STzero F_Z1below modulator's double pole F_LC

(~75% F_LC).

(5).The PCB trace from Ug and Lg of controller to

MOSFETs should be as short as possible and can

carry 1A peak current.

3. Place 2^NDzero F_Z2at modulator's double pole F_LC.

4. Place 1^STpole F_Z1at the ESR zero F_{Z_ESR.}

5. Place 2^NDpole F_Z2at half the switching frequency.

6. Check gain against error amplifier's open-loop gain.

7. Pick R_FBfor desired output voltage.

(6). Place all of the components as close to IC as possible.

8. Estimate phase margin and repeat if necessary.

Layout Consideration

Layout is very important in high frequency switching

converter design. If designed improperly, the PCB could

radiate excessive noise and contribute to the converter

instability. First, place the PWM power stage components.

Mount all the power components and connections in the

top layer with wide copper areas. The MOSFETs of Buck,

inductor, and output capacitor should be as close to each

other as possible. This can reduce the radiation of EMI

due to the high frequency current loop. If the output

capacitors are placed in parallel to reduce the ESR of

capacitor, equal sharing ripple current should be

considered. Place the input capacitor directly to the drain

DS9232B-03 March 2007

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13

RT9232B

Outline Dimension

H

A

M

J

B

F

C

I

D

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

A

B

C

D

F

H

I

8.534

3.810

1.346

0.330

1.194

0.178

0.102

5.791

0.406

8.738

3.988

1.753

0.508

1.346

0.254

6.198

1.270

0.336

0.150

0.053

0.013

0.047

0.007

0.004

0.228

0.016

0.344

0.157

0.069

0.020

0.053

0.010

0.244

0.050

J

M

14–Lead SOP Plastic Package

Richtek Technology Corporation

Headquarter

Richtek Technology Corporation

Taipei Office (Marketing)

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

8F, No. 137, Lane 235, Paochiao Road, Hsintien City

Taipei County, Taiwan, R.O.C.

Tel: (8863)5526789 Fax: (8863)5526611

Tel: (8862)89191466 Fax: (8862)89191465

Email: marketing@richtek.com

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14

DS9232B-03 March 2007

型号	制造商	描述	价格	文档
RT9232BGS	RICHTEK	Programmable Frequency Synchronous Buck PWM Controller	获取价格
RT9232BPS	RICHTEK	Programmable Frequency Synchronous Buck PWM Controller	获取价格
RT9232GS	RICHTEK	Programmable Frequency Synchronous Buck PWM Controller	获取价格
RT9232PS	RICHTEK	Programmable Frequency Synchronous Buck PWM Controller	获取价格
RT9232_07	RICHTEK	Programmable Frequency Synchronous Buck PWM Controller	获取价格
RT9233	ETC	4 BIT PROGRAMMABLE SYNCHRONOUS PWM BUCK CONVERTER CONTROLLER	获取价格
RT9233-CS	ETC	4 BIT PROGRAMMABLE SYNCHRONOUS PWM BUCK CONVERTER CONTROLLER	获取价格
RT9233-MS	ETC	4 BIT PROGRAMMABLE SYNCHRONOUS PWM BUCK CONVERTER CONTROLLER	获取价格
RT9237	ETC	MULTI-PHASE DC/DC CONTROLLER FOR CPU CORE POWER SUPPLY	获取价格
RT9237A	ETC		获取价格

RT9232B

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