RT9259PQV [RICHTEK]
12V Synchronous Buck PWM DC-DC and Linear Power Controller; 12V同步降压PWM DC -DC和线性电源控制器
| 型号： | RT9259PQV |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | 12V Synchronous Buck PWM DC-DC and Linear Power Controller |
| 文件： | 总15页 (文件大小：304K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RT9259
12V Synchronous Buck PWM DC-DC and
Linear Power Controller
General Description
Features
z Single 12V Bias Supply
The RT9259 is a dual-channelDC/DC controller specifically
designed to deliver high quality power where 12V power
source is available. This part consists of a synchronous
buck controller and an LDO controller. The synchronous
buck controller integrates MOSFET drivers that support
12V+12V bootstrapped voltage for high efficiency power
conversion. The bootstrap diode is built-in to simplify the
circuit design and minimize external part count. The LDO
controller drives an external N-MOSFET for lower power
requirement.
z Support Dual Channel Power Conversion
`One Synchronous Rectified Buck PWM Controller
`One Linear Controller
z Both Controllers Drive Low Cost N-MOSFETs
z Adjustable Frequency from 150kHz to 1MHz
and Free-Run Frequency at 230kHz
z Small External Component Count
z Output Voltage Regulation
`PWM Controller : 1% Accuracy
`LDO Controller : 2% Accuracy
Other features include adjustable operation frequency,
internal soft start, under voltage protection, over current
protection and shut down function. With the above
functions, this part provides customers a compact, high
efficiency, well-protected and cost-effective solution. This
part comes to VQFN-16L 4x4, SOP14 and SSOP-16
packages.
z Two Internal VREF Power Support Lower to 0.8V
z Adjustable External Compensation
z Linear Controller Drives N-MOSFET Pass
Transistor
z Fully-Adjustable Outputs
z Under Voltage Protection for Both Outputs
z Over Current Fault Monitor on MOSFET; No Current
Sense Resistor is Required.
Ordering Information
RT9259
z RoHS Compliant and 100% Lead (Pb)-Free
Package Type
Applications
S : SOP-14
A : SSOP-16
z Graphic CardGPU, Memory Core Power
z Graphic Card Interface Power
z Motherboard,Desktop and Servers Chipset and Memory
Core Power
QV : VQFN-16 4x4 (V-Type)
Operating Temperature Range
P : Pb Free with Commercial Standard
G : Green (Halogen Free with Commer-
cial Standard)
z IA Equipments
Note :
z Telecomm Equipments
Richtek Pb-free and Green products are :
`RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
z High PowerDC-DC Regulators
`Suitable for use in SnPb or Pb-free soldering processes.
`100% matte tin (Sn) plating.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area, otherwise visit our website for detail.
DS9259-03T00 August 2007
www.richtek.com
1
RT9259
Pin Configurations
(TOP VIEW)
16
15
14
13
12
11
10
9
UGATE
PHASE
PGND
LGATE
NC
BOOT
BOOT
RT_DIS
COMP
FB
14
13
12
11
10
9
UGATE
PHASE
PGND
LGATE
NC
RT_DIS
COMP
FB
2
3
4
5
6
7
8
16 15 14 13
2
3
4
12 PGND
COMP
FB
1
2
3
4
11
LGATE
DRV
FBL
10 NC
DRV
FBL
DRV
FBL
GND
5
6
7
17
NC
VCC12
VCC12
NC
9
NC
VCC12
GND
GND
5
6
7
8
8
SOP-14
SSOP-16
VQFN-16L 4x4
Typical Application Circuit
V
+12V
CC
V
IN1
+3.3V/+ V
5 /+12V
C
RT9259
IN
V
IN2
BOOT
+5V to +12V
UGATE
PHASE
LGATE
PGND
Q1
L
OUT
1
VCC12
DRV
Q3
V
OUT1
V
OUT2
FBL
Q2
C
OUT
C
OUT2
RT_DIS
GND
FB
NC
NC
COMP
Functional Pin Description
Pin No.
Pin Name
Pin Function
RT9259ꢀS RT9259ꢀA RT9259PQV
Bootstrap supply for the upper gate driver. Connect the
bootstrap capacitor between BOOT pin and the PHASE pin.
The bootstrap capacitor provides the charge to turn on the
upper MOSFET.
1
1
15
BOOT
Connect a resistor from RT_DIS to GND to set frequency. In
2
3
4
5
2
3
4
5
16
1
RT_DIS addition, if this pin is pulled down towards GND, it will disable
both regulator outputs until released.
Buck converter external compensation. This pin is used to
compensate the control loop of the buck converter.
COMP
Buck converter feedback voltage. This pin is the inverting input
2
FB
of the PWM error amplifier. FB senses the switcher output
through an external resistor divider network.
Connect this pin to the gate of an external MOSFET. This pin
provides the drive for the linear regulator’s pass MOSFET.
3
DRV
To be continued
www.richtek.com
2
DS9259-03T00 August 2007
RT9259
Pin No.
Pin Name
Pin Function
RT9259ꢀS RT9259ꢀA
RT9259PQV
4
Linear regulator feedback voltage. This pin is the inverting
input of the LDO error amplifier and protection monitor.
Connect this pin to an external resistor divider network of
the linear regulator.
6
6
FBL
7
8
7, 8
5
7
GND
Ground.
Connect this pin to a well-decoupled 12V bias supply. It is
also the positive supply for the lower gate driver, LGATE.
9, 10
VCC12
6, 8, 9, 10,
Exposed Pad (17)
9, 10
11, 12
NC
No Internal Connection.
Lower gate driver output. Connect to the gate of the
low-side power N-MOSFET. This pin is monitored by the
adaptive shoot-through protection circuitry to determine
when the lower MOSFET has turned off.
11
12
13
13
14
15
11
12
13
LGATE
PGND
Power ground return for the lower gate driver.
Connect this pin to the source of the upper MOSFET and
the drain of the lower MOSFET. This pin is monitored by the
adaptive shoot-through protection circuitry to determine
when the upper MOSFET has turned off.
PHASE
Connect this pin to a well-decoupled 12V bias supply. It is
also the positive supply for the lower gate driver, LGATE.
14
16
14
UGATE
Function Block Diagram
VCC12
Power
On Reset
5V
Regulator
Voltage
Reference
Bias
5VDD
V
0.4V
REF2
POR
-
FBL
40uA
+
-
0.4V
OC
+
VCC12
Soft-Start
-
-
&
R
+
+
DRV
OCSET
+
Fault Logic
20k
Inhibit
SSE
PH_M
-
1.5V
+
BOOT
UGATE
PHASE
Shutdown
Oscillator
SSE
+
+
-
+
-
EA
Driver
Logic
V
REF1
PWM
LGATE
PGND
RT_DIS
GND
COMP
FB
DS9259-03T00 August 2007
www.richtek.com
3
RT9259
Absolute Maximum Ratings (Note 1)
z Supply Voltage, VCC -------------------------------------------------------------------------------------- 15V
z PHASE to GND
DC------------------------------------------------------------------------------------------------------------- −5V to 15V
< 200ns ------------------------------------------------------------------------------------------------------ −10V to 30V
z BOOT to PHASE ------------------------------------------------------------------------------------------ 15V
z BOOT toGND
DC------------------------------------------------------------------------------------------------------------- −0.3V to VCC+15V
< 200ns ------------------------------------------------------------------------------------------------------ −0.3V to 42V
z UGATE ------------------------------------------------------------------------------------------------------- VPHASE − 0.3V to VBOOT + 0.3V
z LGATE ------------------------------------------------------------------------------------------------------- GND − 0.3V to VCC + 0.3V
z DRV ---------------------------------------------------------------------------------------------------------- GND − 0.3V to VCC + 0.3V
z Input, Output or I/O Voltage ----------------------------------------------------------------------------- GND − 0.3V to 7V
z PowerDissipation, PD @ TA = 25°C
SOP-14 ------------------------------------------------------------------------------------------------------ 1.000W
SSOP-16 ---------------------------------------------------------------------------------------------------- 0.909W
VQFN-16L 4x4 --------------------------------------------------------------------------------------------- 1.852W
z Package Thermal Resistance (Note 4)
SOP-14, θJA ------------------------------------------------------------------------------------------------- 100°C/W
SSOP-16, θJA ----------------------------------------------------------------------------------------------- 110°C/W
VQFN-16L 4x4, θJA ---------------------------------------------------------------------------------------- 54°C/W
z Junction Temperature ------------------------------------------------------------------------------------- 150°C
z Lead Temperature (Soldering, 10 sec.)--------------------------------------------------------------- 260°C
z Storage Temperature Range ---------------------------------------------------------------------------- −40°C to 150°C
z ESD Susceptibility (Note 2)
HBM (Human Body Mode) ------------------------------------------------------------------------------ 2kV
MM (Machine Mode) -------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 3)
z Supply Voltage, VCC -------------------------------------------------------------------------------------- 12V 10%
z Junction Temperature Range---------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range---------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VCC = 12V, TA = 25°C unless otherwise specified)
Parameter
Supply Input
Symbol
Test Conditions
Min
Typ
Max Units
Power Supply Voltage
Power On Reset
V
--
8.8
0.4
--
12
9.6
0.78
3
15
10.4
1.2
--
V
V
CC
V
VCC Rising
VCCRTH
Power On Reset Hysteresis
Power Supply Current
V
V
VCCHYS
VCC
I
UGATE, LGATE Open
mA
To be continued
www.richtek.com
4
DS9259-03T00 August 2007
RT9259
Parameter
Symbol
Test Conditions
Min
Typ
Max Units
Oscillator
Free Running Frequency
Ramp Amplitude
f
R
= 110kΩ
RT
250
--
300
1.6
350
--
kHz
V
OSC
Reference Voltage
PWM Error Amplifier Reference
Linear Driver Reference
Error Amplifier
V
V
0.792
0.784
0.8
0.8
0.808
0.816
V
V
REF1
REF2
DC Gain
70
6
88
15
6
--
--
--
dB
Gain-Bandwidth Product
Slew Rate
GBW
SR
MHz
V/us
C
= 5pF
LOAD
3
Gate Driver
V
V
− V
= 12V,
= 1V
BOOT
PHASE
Upper Drive Source
R
--
4
8
Ω
UGATE
− V
BOOT
UGATE
Upper Drive Sink
Lower Drive Source
Lower Drive Sink
Protection
R
R
R
V
V
V
= 1V
--
--
--
4
4
2
8
6
4
Ω
Ω
Ω
UGATE
LGATE
LGATE
UGATE
– V
= 1V
CC
LGATE
= 1V
LGATE
Under Voltage Protection
Soft-Start Time Interval
Over Current Threshold
RT_DIS Shutdown Threshold
Linear Regulator
0.36
2
0.4
3
0.45
4
V
ms
mV
V
V
UVP
T
SS
--
-400
0.4
--
V
OC
0.35
--
Output High Voltage
Output Low Voltage
Source Current
9.5
--
10.3
0.1
--
--
1
V
V
V
V
DRV
DRV
2
--
--
mA
mA
I
I
DRVSR
Sink Current
0.5
--
DRVSC
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a high effective 4-layers 2S2P thermal conductivity test board
of JEDEC 51-7 thermal measurement standard.
DS9259-03T00 August 2007
www.richtek.com
5
RT9259
Typical Operating Characteristics
Dead Time
Dead Time
No Load, Falling
No Load, Rising
UGATE
UGATE
VIN1
VIN1
PHASE
LGATE
PHASE
(5V/Div)
(5V/Div)
LGATE
Time (25ns/Div)
Time (25ns/Div)
OCP
Power Off
No Load
UGATE
VOUT1
(10V/Div)
(10V/Div)
(2V/Div)
VREF
IL
LGATE
(0.5A/Div)
IL
(10A/Div)
(200mV/Div)
Time (2.5ms/Div)
Time (5μs/Div)
Start Up
Shut Down
Full Load
No Load
VIN1
UGATE
(20V/Div)
(5V/Div)
LGATE
VOUT1
RT_Dis
(10V/Div)
(500mV/Div)
(500mV/Div)
PHASE
VOUT1
(10V/Div)
RT_Dis
(1V/Div)
(500mV/Div)
Time (1ms/Div)
Time (5μs/Div)
www.richtek.com
6
DS9259-03T00 August 2007
RT9259
Start Up
Start Up
No Load
ILOAD = 20A
RT_Dis
ILOAD
(2.5A/Div)
(500mV/Div)
(500mV/Div)
VOUT1
VOUT1
(500mV/Div)
Time (1ms/Div)
Time (1ms/Div)
Transient Response
Transient Response
UGATE
VOUT
(20V/Div)
(100mV/Div)
(20V/Div)
(100mV/Div)
VOUT1
UGATE
IL
IL
VIN1 = 12V, VOUT1 = 2V
VIN1 = 12V, VOUT1 = 2V
LOAD = 1A to 20A
(10A/Div)
(10A/Div)
ILOAD = 20A to 1A
I
Time (2.5μs/Div)
Time (10μs/Div)
Transient Response
Under Voltage Protection
LDO
VIN2 = 12V, VOUT2 = 2.5V
LOAD = 1A to 100mA
VIN2 = 0V
LDO
I
LGATE
UGATE
(2mV/Div)
(10V/Div)
(20V/Div)
VOUT2
IL
COMP
VOUT2
(500mV/Div)
(1V/Div)
(0.5A/Div)
Time (100μs/Div)
Time (10ms/Div)
DS9259-03T00 August 2007
www.richtek.com
7
RT9259
Application Information
Introduction
When let open, the free running frequency is 230kHz
typically. Figure 1 shows the operation frequency vs. RRT
for quick reference.
The RT9259 is a dual-channelDC/DC controller specifically
designed to deliver high quality power where 12V power
source is available. This part consists of a synchronous
buck controller and an LDO controller. The synchronous
buck controller integrates internal MOSFET drivers that
support 12V+12V bootstrapped voltage for high efficiency
power conversion. The bootstrap diode is built-in to simplify
the circuit design and minimize external part count. The
LDO controller drives an external N-MOSFET for lower
power requirement.
1400
1200
1000
800
600
400
200
0
Internal 5VDD Regulator
It is highly recommended to power the RT9259 with well-
decoupled 12V to VCC12 pin. VCC12 powers the RT9259
control circuit, low side gate driver and bootstrap circuit for
high side gate driver. A bootstrap diode is embedded to
facilitates PCB design and reduce the total BOM cost. No
external Schottky diode is required. The RT9259 integrates
MOSFET gate drives that are powered from the VCC12
pin and support 12V + 12V driving capability. Converters
that consist of RT9259 feature high efficiency without
special consideration on the selection of MOSFETs.
10
100
1000
R
RT ((kΩ))
Figure 1. RT vs. fsw at Low Frequency
Shorting the RT_DIS pin to GND with an external signal-
level MOSFET shuts down the device. This allows flexible
power sequence control for specified application. The
RT_DIS pin threshold voltage is 0.4V typically.
An internal linear regulator regulates VCC12 input to a
5VDDvoltage for internal control logic circuit. No external
bypass capacitor is required for filtering the 5VDDvoltage.
This further facilitates PCB design and reduces the total
BOM cost.
VIN1 Detection
The RT9259 continuously generates a 10kHz pulse train
with 1μs pulse width to turn on the upper MOSFET for
detecting the existence of VIN1 after VCC12V POR and
RT_DIS enabled as shown in Figure 2. PHASE pin voltage
is monitored during the detection duration.
Power On Reset
If the PHASE voltage crosses 1.5V four times, VIN1
existence is recognized and the RT9259 initiates its soft
start cycle as described in next section.
The RT9259 automatically initializes upon applying input
power (at the VCC12) pin. The power on reset function
(POR) continually monitors the input bias supply voltage
at the VCC12 pin. The VCC12V POR level is typically
9.6V at VCC12V rising.
V
POR_H
PHASE
+
-
IN1
PHASE_M
1.5V
UGATE
Frequency Setting and Shut Down
1st 2nd 3rd4th
PHASE
waveform
Internal Counter will count (V
four times (rising & falling) to recognize
Connecting a resistor RRT from the RT_DIS pin to GND
sets the operation frequency. The relation can be roughly
expressed in the equation.
> 1.5V)
PHASE
V
is ready.
IN1
7700
Figure 2
f
≅ 230kHz +
(kHz)
OSC
R
RT
www.richtek.com
8
DS9259-03T00 August 2007
RT9259
Soft Start for Synchronous Buck Converter
VIN1 = 12V to 0V
A built-in soft-start is used to prevent surge current from
power supply input during power on (referring to the
Functional BlockDiagram). The error amplifier EAis a three-
input device. SSE or VREF1 whichever is smaller dominates
the behavior non-inverting input. The internal soft start
voltage SSE linearly ramps up to about 4V after VIN1
existence is recognized with about 2ms delay. According,
the output voltage ramps up smoothly to its target level.
The rise time of output voltage is about 2ms as shown in
Figure 3. VREF1 takes over the behavior EA when SSE >
UGATE
(20V/Div)
FB
(500mV/Div)
VOUT
(20V/Div)
Time (10ms/Div)
VREF1
.
Figure 4. UVP triggered by FB
SSE is also used for LDO soft start. LDO input voltage
VIN2 MUST be ready before SSE starts to ramp up.
Otherwise UVP function of LDO may be triggered and shut
down the RT9259.
VIN2 = 0V
LGATE
(10V/Div)
UGATE
(20V/Div)
RT_DIS
(500mV/Div)
COMP
(500mV/Div)
UGATE
(20V/Div)
VOUT1
(500mV/Div)
VOUT1
(1V/Div)
LGATE
(10V/Div)
Time (10ms/Div)
Time (1ms/Div)
Figure 5. UVP hiccups triggered by FBL
Figure 3 : Start up by RT_DIS
Over Current Protection
The RT9259 senses the current flowing through lower
MOSFET for over current protection (OCP) by sensing the
PHASE pin voltage as shown in the Functional Block
Diagram.A40uAcurrent source flows through internal 20kΩ
ROCSET to PHASE pin causes 0.8V voltage drop across
the resistor. OCP is triggered if the voltage at PHASE pin
(drop of lower MOSFETVDS) is lower than −0.4V when low
side MOSFET conducting. Accordingly inductor current
threshold for OCP is a function of conducting resistance
of lower MOSFET RDS(ON) as :
Under Voltage Protection
The voltages at FB and FBL pin are monitored for under
voltage protection (UVP) after the soft start is completed.
UVP is triggered if one of the feedback voltages is under
(50% x VREFX) with a 30us delay. As shown in Figure 4,
the RT9259 PWM controller is shut down when VFB drops
lower than the UVP threshold. In Figure 5, the RT9259
shuts down after 4 time UVP hiccups triggered by FBL.
40μA ×R
(20kΩ)- 0.4V
DS(ON)
OCSET
0.4V
DS(ON)
I
=
=
OCSET
R
R
DS9259-03T00 August 2007
www.richtek.com
9
RT9259
If MOSFET with RDS(ON) = 16mΩ is used, the OCP
threshold current is about 25A. Once OCP is triggered,
the RT9259 enters hiccup mode and re-soft starts again.
The RT9259 shuts down after 4 time OCP hiccups.
A well-designed compensator regulates the output voltage
to the reference voltage VREF with fast transient response
and good stability.
In order to achieve fast transient response and accurate
output regulation, an adequate compensator design is
necessary. The goal of the compensation network is to
provide adequate phase margin (greater than 45 degrees)
and the highest 0dB crossing frequency. It is also
recommended to manipulate loop frequency response that
its gain crosses over 0dB at a slope of −20dB/dec.
V
IN
OSC
Driver
Driver
PWM
Inductor Current
(20A/Div)
Comparator
L
V
OUT
-
+
ΔV
OSC
PHASE
C
Time (2.5ms/Div)
OUT
ESR
Figure 6. Shorted then Start Up
Z
FB
COMP
-
Z
IN
EA
+
IL
REF
(20A/Div)
Z
V
FB
C2
C1
OUT
Z
IN
C3
R2
R3
LGATE
(5V/Div)
R1
COMP
FB
-
UGATE
(5V/Div)
EA
+
REF
Time (5μs/Div)
Figure 8. Closed Loop
1) Modulator Frequency Equations
Figure 7. Shorted then Start Up (Extended Figure 3)
Feedback Compensation
The modulator transfer function is the small-signal transfer
function of VOUT/VCOMP (output voltage over the error
amplifier output. This transfer function is dominated by a
DC gain, a double pole, and a zero as shown in Figure 10.
The DC gain of the modulator is the input voltage (VIN)
divided by the peak to peak oscillator voltage VOSC. The
output LC filter introduces a double pole, 40dB/decade
gain slope above its corner resonant frequency, and a total
phase lag of 180 degrees. The resonant frequency of the
The RT9259 is a voltage mode controller. The control loop
is a single voltage feedback path including a compensator
and modulator as shown Figure 8. The modulator consists
of the PWM comparator and power stage. The PWM
comparator compares error amplifier EA output (COMP)
with oscillator (OSC) sawtooth wave to provide a pulse-
width modulated (PWM) with an amplitude of VIN at the
PHASE node. The PWM wave is smoothed by the output
filter LOUT and COUT. The output voltage (VOUT) is sensed
and fed to the inverting input of the error amplifier.
LC filter expressed as :
1
f
LC
=
2π L
× C
OUT
OUT
www.richtek.com
10
DS9259-03T00 August 2007
RT9259
The ESR zero is contributed by the ESR associated with
the output capacitance. Note that this requires that the
output capacitor should have enough ESR to satisfy stability
requirements. The ESR zero of the output capacitor
but often jeopardize the system stability. In order to cancel
one of the LC filter poles, place the zero before the LC
filter resonant frequency. In the experience, place the zero
at 75% LC filter resonant frequency. Crossover frequency
should be higher than the ESR zero but less than 1/5 of
the switching frequency. The second pole is placed at half
the switching frequency.
expressed as follows :
1
f
=
ESR
2π × C
×ESR
OUT
2) Compensation Frequency Equations
Thermal Considerations
The compensation network consists of the error amplifier
and the impedance networks ZC and ZF as shown in
Figure 9.
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
Z
F
C1
Z
C
C2
R2
R1
V
OUT
PD(MAX) = ( TJ(MAX) − TA ) / θJA
FB
Where TJ(MAX) is the maximum operation junction
temperature 125°C, TAis the ambient temperature and the
θJA is the junction to ambient thermal resistance.
-
EA
+
COMP
R
F
V
REF
For recommended operating conditions specification of
RT9259, where TJ(MAX) is the maximum junction
temperature of the die (125°C) and TA is the maximum
ambient temperature. The junction to ambient thermal
resistance θJA is layout dependent. For VQFN-16L 4x4
packages, the thermal resistance θJA is 54°C/W on the
standard JEDEC 51-7 four-layers thermal test board.
Figure 9. Compensation Loop
1
f
=
Z1
2π x R2 x C2
1
fP1
=
C1x C2
C1+ C2
2π x R2 x
80
60
Loop Gain
The maximum power dissipation at TA = 25°C can be
calculated by following formula :
40
20
Compensation
Gain
PD(MAX) = ( 125°C − 25°C ) / 54°C/W = 1.852 W for
QFN-16L 4x4 packages
0
PD(MAX) = ( 125°C − 25°C) / 100°C/W = 1.000 W for
SOP-14 packages
Modulator
Gain
-20
PD(MAX) = ( 125°C − 25°C ) / 110°C/W = 0.909 W for
-40
SSOP-16 packages
10
-60
100k
1M
100
1k
10k
The maximum power dissipation depends on operating
ambient temperature for fixedTJ (MAX) and thermal resistance
θJA. For RT9259 packages, the Figure 11 of derating curves
allows the designer to see the effect of rising ambient
temperature on the maximum power allowed.
Frequency (Hz)
Figure 10. Bode Plot
Figure 10 shows theDC-DC converter's gain vs. frequency.
The compensation gain uses external impedance networks
ZC and ZF to provide a stable, high bandwidth loop. High
crossover frequency is desirable for fast transient response,
DS9259-03T00 August 2007
www.richtek.com
11
RT9259
2
1.75
1.5
The power components and the PWM controller should
be placed firstly. Place the input capacitors, especially the
high-frequency ceramic decoupling capacitors, close to the
power switches. Place the output inductor and output
capacitors between the MOSFETs and the load.Also locate
the PWM controller near by MOSFETs.Amulti-layer printed
circuit board is recommended. Figure 12 shows the
connections of the critical components in the converter.
Note that the capacitors CIN and COUT each of them
represents numerous physical capacitors.
4-Layers PCB
QFN-16L 4x4
1.25
SOP-14
1
SSOP-16
0.75
0.5
0.25
0
Use a dedicated grounding plane and use vias to ground
all critical components to this layer. Apply another solid
layer as a power plane and cut this plane into smaller islands
of common voltage levels. The power plane should support
the input power and output power nodes. Use copper filled
polygons on the top and bottom circuit layers for the PHASE
node, but it is not necessary to oversize this particular
island. Since the PHASE node is subjected to very high
dV/dt voltages, the stray capacitance formed between
these islands and the surrounding circuitry will tend to couple
switching noise. Use the remaining printed circuit layers
for small signal routing. The PCB traces between the PWM
controller and the gate of MOSFET and also the traces
connecting source of MOSFETs should be sized to carry
2A peak currents.
0
25
50
75
100
125
Ambient Temperature
(°C)
Figure 11.Derating Curves for RT9259 Packages
PCB Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. The voltage
spikes can degrade efficiency and radiate noise, that results
in over-voltage stress on devices. Careful component
placement layout and printed circuit design can minimize
the voltage spikes induced in the converter. Consider, as
an example, the turn-off transition of the upper MOSFET
prior to turn-off, the upper MOSFET was carrying the full
load current. During turn-off, current stops flowing in the
upper MOSFET and is picked up by the low side MOSFET
or schottky diode.
IQ1
IL
V
5V/12V
GND
OUT
Q1
LOAD
IQ2
Q2
Any inductance in the switched current path generates a
large voltage spike during the switching interval. Careful
component selections, layout of the critical components,
and use shorter and wider PCB traces help in minimizing
the magnitude of voltage spikes.
VCC
GND
RT9259
FB
LGATE
UGATE
There are two sets of critical components in a DC-DC
converter using the RT9259. The switching power
components are most critical because they switch large
amounts of energy, and as such, they tend to generate
equally large amounts of noise. The critical small signal
components are those connected to sensitive nodes or
those supplying critical bypass current.
Figure 12. The connections of the critical components in
the converter
www.richtek.com
12
DS9259-03T00 August 2007
RT9259
Outline Dimension
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
B
C
D
F
H
I
8.534
3.810
1.346
0.330
1.194
0.178
0.102
5.791
0.406
8.738
3.988
1.753
0.508
1.346
0.254
0.254
6.198
1.270
0.336
0.150
0.053
0.013
0.047
0.007
0.004
0.228
0.016
0.344
0.157
0.069
0.020
0.053
0.010
0.010
0.244
0.050
J
M
14–Lead SOP Plastic Package
DS9259-03T00 August 2007
www.richtek.com
13
RT9259
c
D
L
E
E1
e
A2
A
A1
b
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
1.753
0.254
Min
Max
0.069
0.010
A
A1
A2
b
1.346
0.102
0.053
0.004
1.499
0.635
0.059
0.025
0.203
0.178
4.801
0.305
0.254
5.004
0.008
0.007
0.189
0.012
0.010
0.197
C
D
e
E
5.791
3.810
0.406
6.198
3.988
1.270
0.228
0.150
0.016
0.244
0.157
0.050
E1
L
16-Lead SSOP Plastic Package
www.richtek.com
14
DS9259-03T00 August 2007
RT9259
SEE DETAIL A
D
D2
L
1
E
E2
1
2
1
2
e
b
DETAILA
A
A3
Pin #1 ID and Tie Bar Mark Options
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A3
b
0.800
0.000
0.175
0.250
3.950
2.000
3.950
2.000
1.000
0.050
0.250
0.380
4.050
2.450
4.050
2.450
0.031
0.000
0.007
0.010
0.156
0.079
0.156
0.079
0.039
0.002
0.010
0.015
0.159
0.096
0.159
0.096
D
D2
E
E2
e
0.650
0.026
L
0.500
0.600
0.020
0.024
V-Type 16L QFN 4x4 Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
8F, No. 137, Lane 235, Paochiao Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)89191466 Fax: (8862)89191465
Email: marketing@richtek.com
DS9259-03T00 August 2007
www.richtek.com
15
相关型号：
©2020 ICPDF网 联系我们和版权申明