RT9403C [RICHTEK]
暂无描述;型号: | RT9403C |
厂家: | RICHTEK TECHNOLOGY CORPORATION |
描述: | 暂无描述 |
文件: | 总17页 (文件大小:199K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
RT9403A/B/C
I2C Programmable High Precision Reference Voltage Generator
General Description
Features
z 5V Supply Voltage
The RT9403A/B/C is a high precision reference voltage
generating console consisting of three I2C programmable
DACs. EachDAC output voltage is controlled by 7 digital
bits that are programmed by the I2C interface. The
RT9403A/B/C features adjustable output slew rate, low
switching glitch and adequate driving capability. The
RT9403A/B/C is available in SOT-23-8 package.
z Provide 3 Precise Voltage DACs
z I2C Programmable 128-Steps Output Voltage
z Output Range and Resolution
` DAC1 & DAC2 : 0.6V to 2.1875V, 12.5mV/Step
` DAC3 : 1.2V to 3.375V, 12.5mV (or 25mV)/Step for
Different Segments
z High Output Accuracy Up to 1% (VOUT 1V)
≥
z Low External Component Count
z Small Footprint SOT-23-8 Package
z RoHS Compliant and Halogen Free
Ordering Information
RT9403A/B/C
Package Type
V8 : SOT-23-8
Lead Plating System
G : Green (Halogen Free and Pb Free)
Applications
z Power SupplyAdjustment for Motherboard andGraphic
Address Bit [A1,A0]
A : [0,1]
B : [1,0]
Card
z Low Voltage, High Accuracy Reference Voltage Circuit
C : [1,1]
Pin Configurations
Note :
(TOP VIEW)
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
8
7
2
6
3
5
4
Marking Information
RT9403AGV8
01= : Product Code
01=DNN
DNN : Date Code
SOT-23-8
RT9403BGV8
02= : Product Code
02=DNN
DNN : Date Code
RT9403CGV8
04= : Product Code
04=DNN
DNN : Date Code
DS9403A/B/C-00 May 2011
www.richtek.com
1
RT9403A/B/C
Typical Application Circuit
V
IN1
REFIN
REFIN
REFIN
DC/DC
Converter
V1
V2
V3
3.3V/5V
5V
C
C
C
OUT1
OUT2
OUT3
RT9403A/B/C
V
1
IN2
VDD
5
VOUT1
VOUT2
VOUT3
GND
C
IN
DC/DC
Converter
6
7
2
4
3
Data Bus Line
Clock Bus Line
SDA
SCL
V
IN3
8
S3/EN
S3/EN
DC/DC
Converter
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
2
3
4
5
6
7
VDD
Power Supply Input. Default connected to 5V.
GND
Ground.
2
SCL
Serial Clock Input. This pin receives I C serial bus clock signal.
2
SDA
Serial Data Input. This pin is input or output of I C serial bus data signal.
2
VOUT1
VOUT2
VOUT3
I C Programmed VTT Output Voltage. Default = 1.1V
2
I C Programmed PCH_CORE Output Voltage. Default = 1.05V
2
I C Programmed DDR Output Voltage. Default = 1.5V
ACPI S3 State/Enable. Active low for entering ACPI S3 State(suspend to RAM),
VOUT1/VOUT2 are internally pulled down to zero, only VOUT3 is active.
8
S3/EN
Function Block Diagram
VDD
POR
DAC1
7 bit
VOUT1
S3/EN
SCL
2
DAC2
7 bit
Control and
Monitoring Unit
I C
VOUT2
VOUT3
Interface
SDA
DAC3
7 bit
GND
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2
DS9403A/B/C-00 May 2011
RT9403A/B/C
Table 1. DAC1/DAC2 Serial Code Table
SVID6
0
SVID5
0
SVID4
0
SVID3
0
SVID2
0
SVID1
0
SVID0
0
Output Voltage ( V )
2.1875
2.1750
2.1625
2.1500
2.1375
2.1250
2.1125
2.1000
2.0875
2.0750
2.0625
2.0500
2.0375
2.0250
2.0125
2.0000
1.9875
1.9750
1.9625
1.9500
1.9375
1.9250
1.9125
1.9000
1.8875
1.8750
1.8625
1.8500
1.8375
1.8250
1.8125
1.8000
1.7875
1.7750
1.7625
1.7500
1.7375
1.7250
1.7125
1.7000
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
1
1
1
0
0
0
1
0
0
0
0
0
0
1
0
0
1
0
0
0
1
0
1
0
0
0
0
1
0
1
1
0
0
0
1
1
0
0
0
0
0
1
1
0
1
0
0
0
1
1
1
0
0
0
0
1
1
1
1
0
0
1
0
0
0
0
0
0
1
0
0
0
1
0
0
1
0
0
1
0
0
0
1
0
0
1
1
0
0
1
0
1
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
0
0
0
1
0
1
1
1
0
0
1
1
0
0
0
0
0
1
1
0
0
1
0
0
1
1
0
1
0
0
0
1
1
0
1
1
0
0
1
1
1
0
0
0
0
1
1
1
0
1
0
0
1
1
1
1
0
0
0
1
1
1
1
1
0
1
0
0
0
0
0
0
1
0
0
0
0
1
0
1
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
1
0
0
0
1
0
0
1
0
1
0
1
0
0
1
1
0
0
1
0
0
1
1
1
To be continued
DS9403A/B/C-00 May 2011
www.richtek.com
3
RT9403A/B/C
Table 1. DAC1/DAC2 Serial Code Table
SVID6
0
SVID5
1
SVID4
0
SVID3
1
SVID2
0
SVID1
0
SVID0
0
Output Voltage ( V )
1.6875
1.6750
1.6625
1.6500
1.6375
1.6250
1.6125
1.6000
1.5875
1.5750
1.5625
1.5500
1.5375
1.5250
1.5125
1.5000
1.4875
1.4750
1.4625
1.4500
1.4375
1.4250
1.4125
1.4000
1.3875
1.3750
1.3625
1.3500
1.3375
1.3250
1.3125
1.3000
1.2875
1.2750
1.2625
1.2500
1.2375
1.2250
1.2125
1.2000
0
1
0
1
0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
1
0
0
0
1
0
1
1
0
1
0
1
0
1
1
1
0
0
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
0
0
0
1
0
1
1
0
0
1
0
0
1
1
0
0
1
1
0
1
1
0
1
0
0
0
1
1
0
1
0
1
0
1
1
0
1
1
0
0
1
1
0
1
1
1
0
1
1
1
0
0
0
0
1
1
1
0
0
1
0
1
1
1
0
1
0
0
1
1
1
0
1
1
0
1
1
1
1
0
0
0
1
1
1
1
0
1
0
1
1
1
1
1
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
0
1
0
1
0
0
0
0
1
1
1
0
0
0
1
0
0
1
0
0
0
1
0
1
1
0
0
0
1
1
0
1
0
0
0
1
1
1
1
0
0
1
0
0
0
1
0
0
1
0
0
1
1
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
0
1
1
0
0
1
0
0
1
1
0
1
1
0
0
1
1
1
0
1
0
0
1
1
1
1
To be continued
www.richtek.com
4
DS9403A/B/C-00 May 2011
RT9403A/B/C
Table 1. DAC1/DAC2 Serial Code Table
SVID6
1
SVID5
0
SVID4
1
SVID3
0
SVID2
0
SVID1
0
SVID0
0
Output Voltage ( V )
1.1875
1.1750
1.1625
1.1500
1.1375
1.1250
1.1125
1.1000
1.0875
1.0750
1.0625
1.0500
1.0375
1.0250
1.0125
1.0000
0.9875
0.9750
0.9625
0.9500
0.9375
0.9250
0.9125
0.9000
0.8875
0.8750
0.8625
0.8500
0.8375
0.8250
0.8125
0.8000
0.7875
0.7750
0.7625
0.7500
0.7375
0.7250
0.7125
0.7000
1
0
1
0
0
0
1
1
0
1
0
0
1
0
1
0
1
0
0
1
1
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
0
1
1
1
1
0
1
1
0
0
0
1
0
1
1
0
0
1
1
0
1
1
0
1
0
1
0
1
1
0
1
1
1
0
1
1
1
0
0
1
0
1
1
1
0
1
1
0
1
1
1
1
0
1
0
1
1
1
1
1
1
1
0
0
0
0
0
1
1
0
0
0
0
1
1
1
0
0
0
1
0
1
1
0
0
0
1
1
1
1
0
0
1
0
0
1
1
0
0
1
0
1
1
1
0
0
1
1
0
1
1
0
0
1
1
1
1
1
0
1
0
0
0
1
1
0
1
0
0
1
1
1
0
1
0
1
0
1
1
0
1
0
1
1
1
1
0
1
1
0
0
1
1
0
1
1
0
1
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
0
0
0
1
1
1
1
0
0
1
0
1
1
1
0
0
1
1
1
1
1
0
1
0
0
1
1
1
0
1
0
1
1
1
1
0
1
1
0
1
1
1
0
1
1
1
To be continued
DS9403A/B/C-00 May 2011
www.richtek.com
5
RT9403A/B/C
Table 1. DAC1/DAC2 Serial Code Table
SVID6
SVID5
SVID4
SVID3
SVID2
SVID1
SVID0
Output Voltage ( V )
0.6875
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0.6750
0.6625
0.6500
0.6375
0.6250
0.6125
0.6000
Note: (1) 0 : Pull Low to GND
(2) 1 : Open
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6
DS9403A/B/C-00 May 2011
RT9403A/B/C
Table 2. DAC3 Serial Code Table
SVID6
0
SVID5
0
SVID4
0
SVID3
0
SVID2
0
SVID1
0
SVID0
0
Output Voltage ( V )
3.3750
3.3500
3.3250
3.3000
3.2750
3.2500
3.2250
3.2000
3.1750
3.1500
3.1250
3.1000
3.0750
3.0500
3.0250
3.0000
2.9750
2.9500
2.9250
2.9000
2.8750
2.8500
2.8250
2.8000
2.7750
2.7500
2.7250
2.7000
2.6750
2.6500
2.6250
2.6000
2.5750
2.5500
2.5250
2.5000
2.4750
2.4500
2.4250
2.4000
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
1
1
1
0
0
0
1
0
0
0
0
0
0
1
0
0
1
0
0
0
1
0
1
0
0
0
0
1
0
1
1
0
0
0
1
1
0
0
0
0
0
1
1
0
1
0
0
0
1
1
1
0
0
0
0
1
1
1
1
0
0
1
0
0
0
0
0
0
1
0
0
0
1
0
0
1
0
0
1
0
0
0
1
0
0
1
1
0
0
1
0
1
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
0
0
0
1
0
1
1
1
0
0
1
1
0
0
0
0
0
1
1
0
0
1
0
0
1
1
0
1
0
0
0
1
1
0
1
1
0
0
1
1
1
0
0
0
0
1
1
1
0
1
0
0
1
1
1
1
0
0
0
1
1
1
1
1
0
1
0
0
0
0
0
0
1
0
0
0
0
1
0
1
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
1
0
0
0
1
0
0
1
0
1
0
1
0
0
1
1
0
0
1
0
0
1
1
1
To be continued
DS9403A/B/C-00 May 2011
www.richtek.com
7
RT9403A/B/C
Table 2. DAC3 Serial Code Table
SVID6
0
SVID5
1
SVID4
0
SVID3
1
SVID2
0
SVID1
0
SVID0
0
Output Voltage ( V )
2.3750
2.3625
2.3500
2.3375
2.3250
2.3125
2.3000
2.2875
2.2750
2.2625
2.2500
2.2375
2.2250
2.2125
2.2000
2.1875
2.1750
2.1625
2.1500
2.1375
2.1250
2.1125
2.1000
2.0875
2.0750
2.0625
2.0500
2.0375
2.0250
2.0125
2.0000
1.9875
1.9750
1.9625
1.9500
1.9375
1.9250
1.9125
1.9000
1.8875
0
1
0
1
0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
1
0
0
0
1
0
1
1
0
1
0
1
0
1
1
1
0
0
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
0
0
0
1
0
1
1
0
0
1
0
0
1
1
0
0
1
1
0
1
1
0
1
0
0
0
1
1
0
1
0
1
0
1
1
0
1
1
0
0
1
1
0
1
1
1
0
1
1
1
0
0
0
0
1
1
1
0
0
1
0
1
1
1
0
1
0
0
1
1
1
0
1
1
0
1
1
1
1
0
0
0
1
1
1
1
0
1
0
1
1
1
1
1
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
0
1
0
1
0
0
0
0
1
1
1
0
0
0
1
0
0
1
0
0
0
1
0
1
1
0
0
0
1
1
0
1
0
0
0
1
1
1
1
0
0
1
0
0
0
1
0
0
1
0
0
1
1
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
0
1
1
0
0
1
0
0
1
1
0
1
1
0
0
1
1
1
0
1
0
0
1
1
1
1
To be continued
www.richtek.com
8
DS9403A/B/C-00 May 2011
RT9403A/B/C
Table 2. DAC3 Serial Code Table
SVID6
1
SVID5
0
SVID4
1
SVID3
0
SVID2
0
SVID1
0
SVID0
0
Output Voltage ( V )
1.8750
1.8625
1.8500
1.8375
1.8250
1.8125
1.8000
1.7875
1.7750
1.7625
1.7500
1.7375
1.7250
1.7125
1.7000
1.6875
1.6750
1.6625
1.6500
1.6375
1.6250
1.6125
1.6000
1.5875
1.5750
1.5625
1.5500
1.5375
1.5250
1.5125
1.5000
1.4875
1.4750
1.4625
1.4500
1.4375
1.4250
1.4125
1.4000
1.3875
1
0
1
0
0
0
1
1
0
1
0
0
1
0
1
0
1
0
0
1
1
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
0
1
1
1
1
0
1
1
0
0
0
1
0
1
1
0
0
1
1
0
1
1
0
1
0
1
0
1
1
0
1
1
1
0
1
1
1
0
0
1
0
1
1
1
0
1
1
0
1
1
1
1
0
1
0
1
1
1
1
1
1
1
0
0
0
0
0
1
1
0
0
0
0
1
1
1
0
0
0
1
0
1
1
0
0
0
1
1
1
1
0
0
1
0
0
1
1
0
0
1
0
1
1
1
0
0
1
1
0
1
1
0
0
1
1
1
1
1
0
1
0
0
0
1
1
0
1
0
0
1
1
1
0
1
0
1
0
1
1
0
1
0
1
1
1
1
0
1
1
0
0
1
1
0
1
1
0
1
1
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
0
0
0
1
1
1
1
0
0
1
0
1
1
1
0
0
1
1
1
1
1
0
1
0
0
1
1
1
0
1
0
1
1
1
1
0
1
1
0
1
1
1
0
1
1
1
To be continued
DS9403A/B/C-00 May 2011
www.richtek.com
9
RT9403A/B/C
Table 2. DAC3 Serial Code Table
SVID6
SVID5
SVID4
SVID3
SVID2
SVID1
SVID0
Output Voltage ( V )
1.3750
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1.3500
1.3250
1.3000
1.2750
1.2500
1.2250
1.2000
Note :
(1) VOUT = 1.2V to 1.375V and VOUT = 2.375V to 3.375V, Step = 25mV.
(2) VOUT = 1.375V to 2.375V, Step = 12.5mV.
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10
DS9403A/B/C-00 May 2011
RT9403A/B/C
Absolute Maximum Ratings (Note 1)
z Supply Voltage, VDD ------------------------------------------------------------------------------------------------------ 6.5V
z Input Voltage, SCL, SDA, S3/EN-------------------------------------------------------------------------------------- 6.5V
z Output Voltage, VOUT1, VOUT2, VOUT3 --------------------------------------------------------------------------------------------------------------------- 4V
z Power Dissipation, PD @ TA = 25°C
SOT-23-8 -------------------------------------------------------------------------------------------------------------------- 0.4W
z Package Thermal Resistance (Note 4)
SOT-23-8, θJA --------------------------------------------------------------------------------------------------------------- 250°C/W
z Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C
z Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C
z Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 2)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V
Recommended Operating Conditions (Note 3)
z Supply Voltage, VDD ------------------------------------------------------------------------------------------------------ 5V 5%
z Junction Temperature Range-------------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range-------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VDD = 5V, TA = 25°C, unless otherwise specification)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Input Voltage
V
4.75
5
5.25
V
DD
POR Threshold
V
V
4
--
--
4.25
250
0.65
4.4
--
V
POR_TH
POR Hysteresis
Supply Input Current
mV
mA
POR_HYS
VDD
I
--
V
REF
& DAC
DAC OutputAccuracy
Under Voltage Lockout
Hysteresis
V
≥ 1V, I
= 0A
= 0A
−1
--
--
1
%
OUT
OUT
V
OUT
< 1V, I
−10
10
mV
OUT
Output Buffer
DC Gain
Capacitive Load Only
--
70
1.64
11
--
--
--
--
--
dB
MHz
mV/μs
Ω
Bandwidth
GBW
SR
C = 1nF
L
--
Slew Rate
C = 0.1μF
L
--
--
Impedance
R
90
OUT
Output Driving Capability
I
--
1.1
--
mA
OUT
Loading Effect Regulation
−0.002
0.002 %/μA
2
I C Signal
Input High Threshold
Input Low Threshold
SCL Clock Speed
V
V
2.4
--
--
--
--
--
--
--
0.8
400
--
V
V
IH
IL
--
k/bit/s
EN Threshold Logic-High V
V
− 0.3
EN_H
EN_L
DD
V
Voltage
Logic-Low
V
--
0.3
DS9403A/B/C-00 May 2011
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11
RT9403A/B/C
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution is recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
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12
DS9403A/B/C-00 May 2011
RT9403A/B/C
Typical Operating Characteristics
VOUT1 vs. Temperature
VOUT2 vs. Temperature
1.112
1.062
1.060
1.058
1.056
1.054
1.052
1.050
1.048
1.046
1.044
1.042
1.040
1.110
1.108
1.106
1.104
1.102
1.100
1.098
1.096
1.094
1.092
VDD = 5V, S3/EN = H, SDA = SCL = H
VDD = 5V. S3/EN = H, SDA = SCL = H
1.090
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
VOUT3 vs. Temperature
Star Up from VDD
1.514
1.512
1.510
1.508
1.506
1.504
1.502
1.500
1.498
1.496
1.494
1.492
VDD
(5V/Div)
VOUT1
(1V/Div)
VOUT2
(1V/Div)
VOUT3
(1V/Div)
VDD = 5V, S3/EN = H, SDA = SCL = H
0 25 50 75 100 125
COUT = 0.1μF
-50
-25
Time (40μs/Div)
Temperature (°C)
S3 State
Power Off from VDD
VDD
S3/EN
(5V/Div)
(5V/Div)
VOUT1
(1V/Div)
VOUT1
(1V/Div)
VOUT2
(1V/Div)
VOUT2
(1V/Div)
VOUT3
(1V/Div)
VOUT3
(1V/Div)
COUT = 0.1μF
COUT = 0.1μF, S3/EN = H to L
Time (4μs/Div)
Time (4μs/Div)
DS9403A/B/C-00 May 2011
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13
RT9403A/B/C
VOUT1 Ramp-Up by VID
VOUT1 Ramp-Down by VID
VOUT1
(1V/Div)
VOUT1
(1V/Div)
VOUT1 = 1 to 1.325V, COUT = 0.1μF
Time (10μs/Div)
VOUT1 = 1.325 to 1V, COUT = 0.1μF
Time (10μs/Div)
VOUT2 Ramp-Up by VID
VOUT2 Ramp-Down by VID
VOUT2
VOUT2
(1V/Div)
(1V/Div)
VOUT2 = 0.925 to 1.25V, COUT = 0.1μF
Time (10μs/Div)
VOUT2 = 1.25 to 0.925V, COUT = 0.1μF
Time (10μs/Div)
VOUT3 Ramp-Down by VID
VOUT3 Ramp-Up by VID
VOUT3
(1V/Div)
VOUT3
(1V/Div)
VOUT3 = 1.825 to 1.5V, COUT = 0.1μF
Time (10μs/Div)
VOUT3 = 1.5 to 1.825V, COUT = 0.1μF
Time (10μs/Div)
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14
DS9403A/B/C-00 May 2011
RT9403A/B/C
Applications Information
Output Capacitor
S3/EN Function
The output capacitance value determines the slew rate of
output voltage during voltage transition. For example, if
COUT = 0.1μF and the voltage step is 1.1V, the rising slew
rate can be calculated as the following.
The RT9403A/B/C can be enabled or set to S3 state by
the voltage of S3/EN pin. If the applied voltage of S3/EN
pin is greater than enable threshold, the RT9403A/B/C
will be enabled and all outputs ramp up to its own default
preset voltage (VOUT1 = 1.1V, VOUT2 = 1.05V, VOUT3 = 1.5V).
Then the RT9403A/B/C is available to decode the SCL
and SDAinputs to determine the programmed voltage for
each output. Pulling down this pin below the enable
threshold will set the RT9403A/B/C in S3 state. In the S3
state, both VOUT1 and VOUT2 will be turned off, only VOUT3
is active. If S3/EN goes high again, VOUT1 and VOUT2 will
return to its previous active level. Table 3 shows the S3/
EN state and output status.
1.1×10−3
I
OUT
Slew Rate =
=
= 11mV/μs
0.1×10−6
C
OUT
For stability consideration, the recommended minimum
output capacitance is 10nF. This capacitor should be
located as close to the output pin as possible to minimize
the PCB trace parasitic inductance and resistance.
I2C Interface
The RT9403A/B/C receives and decodes the SCLand SDA
inputs from the master using the standard I2C 2-wire
interface to program each output voltage. SCL and SDA
must be pulled-up to typically 3.3V or 5V by external pull-
up resistors with value is between 10kΩ and 20kΩ. Figure
1 shows the data format of the RT9403A/B/C. After the
START bit, the I2C master sends an address byte. This
address byte includes a 7-bits long address code followed
by an eighth bit which is a data direction bit (R/W).The
RT9403A/B/C's address is 01100xx and is a write-only
(slave) device. Table 4 represent different address mapping
to specific part number of RT9403A/B/C. After the address
byte, the following 1stData byte determines whichDAC's
output voltage will be programmed. Then, the 2nd Data
byte is written to set the target output voltage of that
selected DAC according to the VID table1 and table 2.
After the STOP bit, the output voltage of the selected
DAC ramps up/down to the programmed target level.
Table 3. S3/EN State and Output Status
S3/EN
VOUT1
Active
OFF
VOUT2
Active
OFF
VOUT3
Active
Active
H (Enable)
L (S3 State)
Table 4. Address Mapping to Specific Part Number
of RT9403A/B/C
Part
A1
0
A0
1
RT9403A
RT9403B
RT9403C
1
0
1
1
Address Byte
A1 A0
The 1st Data Byte
The 2nd Data Byte
Stop
E03
0
1
1
0
0
0
AC
K
0
0
0
X
X
X
G1 G0
ACK
X
E06E05 E04
E02 E01 E00
ACK
START
Fixed for Write
G1
0
0
1
1
G0
0
1
0
1
Rail to be Programmed
Note :
VOUT1
VOUT2
VOUT3
None
1. X = Don't Care
2. E [6:0] : Follow Serial Code Table
Figure 1. RT9403A/B/CData Transfer Format
DS9403A/B/C-00 May 2011
www.richtek.com
15
RT9403A/B/C
Layout Considerations
Thermal Considerations
For best performance of the RT9403A/B/C, the following
layout guideline should be strictly followed
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
` The input capacitor should be placed as close to VDD
pin as possible.
` The output capacitor should be placed as close to VOUT
pin as possible.
Place the input and output capacitors
as close to the IC possible
PD(MAX) = (TJ(MAX) − TA ) / θJA
Where TJ(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the θJA
is the junction to ambient thermal resistance. For
recommended operating conditions specification of
RT9403A/B/C, the maximum junction temperature is
125°C and TA is the maximum ambient temperature. The
junction to ambient thermal resistance θJA is layout
dependent. For SOT-23-8 package, the thermal resistance
5V
GND
C
OUT3
1
2
3
4
8
7
S3/EN
VDD
GND
SCL
SDA
C
IN
VOUT3
VOUT2
VOUT1
C
OUT2
6
5
C
OUT1
3.3V5V
GND
θ
JA is 250°C/W on the standard JEDEC 51-3 single layer
thermal test board. The maximum power dissipation at
Figure 3. PCB Layout Guide
TA = 25°C can be calculated by following formula :
PD(MAX) = (125°C − 25°C) / (250°C/W) = 0.4W for
SOT-23-8 package
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal resistance
θJA. For RT9403A/B/C package, the Figure 2 of derating
curve allows the designer to see the effect of rising ambient
temperature on the maximum power dissipation allowed.
0.50
Single Layer PCB
0.45
0.40
0.35
SOT-23-8
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2.Derating Curve for RT9403A/B/C Package
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16
DS9403A/B/C-00 May 2011
RT9403A/B/C
Outline Dimension
H
D
L
C
A
B
b
A1
e
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
B
1.000
0.000
1.500
0.220
2.600
2.800
0.585
0.100
0.300
1.450
0.150
1.700
0.500
3.000
3.000
0.715
0.220
0.600
0.039
0.000
0.059
0.009
0.102
0.110
0.023
0.004
0.012
0.057
0.006
0.067
0.020
0.118
0.118
0.028
0.009
0.024
b
C
D
e
H
L
SOT-23-8 Surface Mount Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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17
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