RT9711 [RICHTEK]
80mヘ, 1.5A High-Side Power Switches with Flag; 80mΩ ， 1.5A的高侧电源开关与国旗
| 型号： | RT9711 |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | 80mヘ, 1.5A High-Side Power Switches with Flag |
| 文件： | 总15页 (文件大小：249K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary
RT9711
80mΩ, 1.5A High-Side Power Switches with Flag
General Description
Features
z Compliant to USB Specifications
The RT9711 is a low voltage, singleN-Channel MOSFET
high-side power switch, optimized for self-powered and
bus- powered Universal Serial Bus (USB) applications.
The RT9711 equipped with a charge pump circuitry to drive
z Built-In N-Channel MOSFET
`Typical RDS(ON) : 80mΩ (SOT-23-5), 90mΩ (SOP-8)
z Output Can Be Forced Higher Than Input (Off-State)
z Low Supply Current :
the internal MOSFET switch; the switch's low RDS(ON)
,
25μA Typical at Switch On State
1μA Typical at Switch Off State
z Guaranteed 1.5A Continuous Load Current
z Wide Input Voltage Ranges : 2.5V to 5.5V
z Open-Drain Fault Flag Output
80mΩ, meets USB voltage drop requirements; and a flag
output is available to indicate fault conditions to the local
USB controller.
Additional features include soft-start to limit inrush current
during plug-in, thermal shutdown to prevent catastrophic
switch failure from high-current loads, under-voltage
lockout (UVLO) to ensure that the device remains off
unless there is a valid input voltage present. The maximum
current is limited to typically 2.5A in dual ports in
accordance with the USB power requirements, lower
quiescent current as 25μA making this device ideal for
portable battery-operated equipment.
z Hot Plug-In Application (Soft-Start)
z 1.7V Typical Under-Voltage Lockout (UVLO)
z Current Limiting Protection
z Thermal Shutdown Protection
z Reverse Current Flow Blocking (no body diode)
z UL Approved−E219878
z RoHS Compliant and 100% Lead (Pb)-Free
The RT9711 is available in SOT-23-5 and SOP-8 packages
requiring minimum board space and smallest components.
Applications
z USB Bus/Self Powered Hubs
z USB Peripherals
Ordering Information
z ACPI PowerDistribution
z PC Card Hot Swap
RT9711
Package Type
B : SOT-23-5
S : SOP-8
z Notebook, Motherboard PCs
z Battery-Powered Equipment
z Hot-Plug Power Supplies
z Battery-Charger Circuits
Operating Temperature Range
P : Pb Free with Commercial Standard
G : Green (Halogen Free with Commer-
cial Standard)
Pin Configurations
Note :
(TOP VIEW)
RichTek Pb-free and Green products are :
`RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
VOUT
VIN
FLG
GND
EN
1
2
3
5
`Suitable for use in SnPb or Pb-free soldering processes.
`100% matte tin (Sn) plating.
4
SOT-23-5
Marking Information
GND
8
VOUT
For marking information, contact our sales representative
directly or through a RichTek distributor located in your
area, otherwise visit our website for detail.
VIN
VIN
EN
2
3
4
7
6
5
VOUT
VOUT
FLG
SOP-8
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1
Preliminary
Test Circuits
RT9711
Typical Application Circuit
Pull-Up Resistor (10K to 100K)
R
FG
USB Controller
Over -Current
Supply
Voltage 5V
VIN
EN
FLG
V
V
VIN
FLG
IN
FLG
1uF
RT9711
C
RT9711
IN
V
OUT
VOUT
GND
V
OFF
ON
BUS
VOUT
GND
OFF
D+
EN
150uF
10uF
D-
ON
C
R
I
OUT
L
L
GND
Ferrite
Beads
Data
Note:Alow-ESR 150μF aluminum electrolytic or tantalum
between VOUT andGNDis strongly recommended to meet
the 330mV maximum droop requirement in the hub VBUS
.
(seeApplication Information Section for further details)
Functional Pin Description
Pin No.
Pin Name
Pin Function
□
□
RT9711 B RT9711 S
1
2
3
4
5
5
1
FLG
GND
EN
Open-Drain Fault Flag Output
Ground
4
Chip Enable (Active Low)
Power Input Voltage
Output Voltage
2, 3
6, 7, 8
VIN
VOUT
Function Block Diagram
VIN
Bias
EN
Current
UVLO
Limiting
Gate
Control
Charge
Pump
Oscillator
Output Voltage
Detection
VOUT
FLG
Thermal
Protection
Delay
GND
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DS9711-04 March 2007
Preliminary
Absolute Maximum Ratings (Note 1)
RT9711
z Supply Voltage --------------------------------------------------------------------------------------------------------- 6.5V
z Chip Enable Input Voltage ------------------------------------------------------------------------------------------- −0.3V to 6.5V
z Flag Voltage ------------------------------------------------------------------------------------------------------------ 6.5V
z Power Dissipation, PD @ TA = 25°C
SOT-23-5 ---------------------------------------------------------------------------------------------------------------- 0.4W
SOP-8 -------------------------------------------------------------------------------------------------------------------- 0.625W
z Package Thermal Resistance (Note 5)
SOT-23-5, θJA ---------------------------------------------------------------------------------------------------------- 250°C/W
SOP-8, θJA -------------------------------------------------------------------------------------------------------------- 160°C/W
z Junction Temperature ------------------------------------------------------------------------------------------------- 125°C
z Lead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------------- 260°C
z Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 2)
HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 2kV
MM (Machine Mode) -------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 3)
z Supply Input Voltage-------------------------------------------------------------------------------------------------- 2.5V to 5.5V
z Chip Enable Input Voltage ------------------------------------------------------------------------------------------- 0V to 5.5V
z Junction Temperature Range---------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range---------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 5V, CIN = COUT = 1μF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
= 5V, I = 1A
Min
Typ
Max Units
SOT23-5
SOP-8
--
--
80
90
100
mΩ
110
Switch On Resistance
R
V
IN
DS(ON)
OUT
--
--
25
0.1
--
45
μA
1
I
I
switch on, V
switch off, V
= Open
SW_ON
OUT
Supply Current
= Open
SW_OFF
OUT
Logic-Low Voltage
Logic-High Voltage
--
0.8
--
V
V
V
V
I
V
V
V
V
= 2V to 5.5V, switch on
= 2V to 5.5V, switch off
= 0V to 5.5V
IL
IN
EN Threshold
2.0
--
--
IH
IN
0.01
0.5
400
2.5
--
μA
μA
μs
A
EN Input Current
EN
EN
EN
= 5V, R
= 0Ω
LOAD
Output Leakage Current
Output Turn-On Rise Time
Current Limit
--
10
--
I
LEAKAGE
--
T
10% to 90% of V
rising
ON_RISE
OUT
1.6
3.2
I
I
Current Ramp (< 0.1A/ms) on V
OUT
LIM
Short Circuit Fold-Back Current
(Hysteresis)
V
OUT
= 0V, measured prior to
--
1.0
--
A
SC_FB
thermal shutdown
R
I
FLAG Output Resistance
FLAG Off Current
--
--
20
400
1
Ω
FLG
I
= 1mA
= 5V
SINK
0.01
μA
FLG_OFF
V
FLG
To be continued
DS9711-04 March 2007
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3
Preliminary
RT9711
Parameter
FLAG Delay Time (Note 4)
Symbol
Test Conditions
From fault condition to FLG
Min
5
Typ
12
Max Units
20
--
ms
V
t
D
Under-Voltage Lockout
1.3
--
1.7
0.1
130
20
V
UVLO
V
V
increasing
decreasing
IN
Under-Voltage Hysteresis
Thermal Shutdown Protection
Thermal Shutdown Hysteresis
--
V
ΔV
UVLO
IN
--
--
T
°C
°C
SD
--
--
ΔT
SD
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. The FLAG delay time is input voltage dependent, see“ Typical Operating Characteristics” graph for further details.
Note 5. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
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DS9711-04 March 2007
Preliminary
Typical Operating Characteristics
RT9711
Switch On Resistance vs. Temperature
Switch On Resistance vs. Temperature
0.25
0.2
0.25
0.2
SOT-23-5, VIN = 5V, ILOAD = 1.5A
CIN = 1μF/X7R, COUT = 10μF/X7R
SOP-8, VIN = 5V, ILOAD = 1.5A
CIN = 1μF/X7R, COUT = 10μF/X7R
0.15
0.1
0.15
0.1
0.05
0
0.05
0
-40
-20
0
20
40
60
80
100 120
-40
-20
0
20
40
60
80
100 120
Temperature
(°C)
Temperature
(°C)
Switch on Resistance vs. Input Voltage
Supply Current vs. Input Voltage
140
120
100
80
40
35
30
25
20
15
10
5
SOT-23-5, ILOAD = 1.5A
CIN = COUT = 33μF/Electrolytic
SOT-23-5, VEN = 0V, RL = Open
CIN = COUT = 33μF/Electrolytic
60
40
20
0
2
2.5
3
3.5
4
4.5
5
5.5
2
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
Input Voltage (V)
Supply Current vs. Temperature
Current Limit vs. Input Voltage
30
25
20
15
10
5
3
2.5
2
SOT-23-5
VIN = 5V, VEN = 0V, RL = 2.2Ω
CIN = 1μF/X7R, COUT = 10μF/X7R
1.5
1
SOT-23-5
VIN = 5V, VEN = 0V, RL = Open
CIN = COUT = 33μF/Electrolytic
0.5
0
0
-40
-20
0
20
40
60
80
100 120
2
2.5
3
3.5
4
4.5
5
5.5
Temperature
(°C)
Input Voltage (V)
DS9711-04 March 2007
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5
Preliminary
RT9711
EN PinThreshold Voltage vs. Input Voltage
Current Limit vs. Temperature
3.25
2
VIN = 5V, VEN = 0V, RL = 2.2Ω
CIN = 1μF/X7R, COUT = 10μF/X7R
SOT-23-5, Switch Off
IN = COUT = 33μF/Electrolytic
ILOAD = 100mA
C
3
2.75
2.5
1.6
1.2
0.8
0.4
0
SOP-8
SOT-23-5
2.25
2
1.75
1.5
-40
-20
0
20
40
60
80
100 120
2
2.5
3
3.5
4
4.5
5
5.5
Temperature (°C)
Input Voltage (V)
Turn-Off Leakage Current vs. Temperature
EN Pin Threshold Voltage vs. Temperature
2.4
4
SOT-23-5, VIN = VEN = 5V
CIN = 33μF/Electrolytic
COUT = 1uF/X7R
SOT-23-5, VIN = 5V, ILOAD = 100mA
IN = COUT = 33μF/Electrolytic
C
3.5
3
2
RL = 0Ω
1.6
1.2
0.8
0.4
0
2.5
2
1.5
1
0.5
0
-40
-20
0
20
40
60
80
100 120
-40
-20
0
20
40
60
80
100 120
(°C)
Temperature
Temperature
(°C)
Turn-Off Falling Time vs. Temperature
Turn-On Rising Time vs. Temperature
100
80
60
40
20
0
700
600
500
400
300
200
100
0
SOT-23-5, VIN = 5V, RL = 30Ω
CIN = 33μF/Electrolytic
SOT-23-5, VIN = 5V, RL = 30Ω
CIN = 33μF/Electrolytic
COUT = 1μF/Electrolytic
COUT = 1μF/Electrolytic
-40
-20
0
20
40
60
80
100 120
-40
-20
0
20
40
60
80
100 120
Temperature
(°C)
Temperature (°C)
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DS9711-04 March 2007
Preliminary
RT9711
Swith Off Supply Current vs. Temperature
UVLO Threshold vs. Temperature
2.4
2
1
0.8
0.6
0.4
0.2
0
SOT-23-5, VIN = VEN = 5V
CIN = COUT = 33μF/Electrolytic
RL = Open
1.6
1.2
0.8
0.4
0
-0.2
-0.4
-0.6
-0.8
-1
SOT-23-5, VIN Increasing
VEN = 0V, ILOAD = 15mA
C
IN = COUT = 33uF/Electrolytic
-40
-20
0
20
40 60 80 100 120
-40
-20
0
20
40
60
80
100 120
Temperature
Temperature (°C)
(°C)
FLAG Delay Time vs. Input Voltage
Flag Delay Time vs. Temperature
16
15
14
13
12
11
10
9
20
16
12
8
4
SOT-23-5, VIN = 5V, VEN = 0V
CIN = COUT = 33μF/Electrolytic
SOT-23-5, VEN = 0V
CIN = COUT = 33uF/Electrolytic
8
7
0
-40
-20
0
20
40
60
80
100 120
2
2.5
3
3.5
4
4.5
5
5.5
Temperature
Input Voltage(V)
Current Limit Transient Response
Load Transient Response
SOT-23-5, VIN = 5V
VEN = 0V, RL = 2Ω
CIN = COUT = 33μF/Electrolytic
4.8V
1.5A
VOUT
(1V/Div)
IOUT
(1A/Div)
SOT-23-5, VIN = 5V
VEN = 0V, COUT = 1μF
IOUT
(1A/Div)
C
IN = 33μF/Electrolytic
RL = 1kΩ≥ 2.2Ω
Time (50μs/Div)
Time (1ms/Div)
DS9711-04 March 2007
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7
Preliminary
RT9711
Turn On Response
Turn Off Response
SOT-23-5, VIN = 5V, RL = 30Ω
SOT-23-5, VIN = 5V, RL = 30Ω
CIN = 33μF/Electrolytic
OUT = 1μF/Electrolytic
CIN = 33μF/Electrolytic
COUT = 1μF/Electrolytic
C
VEN
(5V/Div)
VEN
(5V/Div)
VOUT
(5V/Div)
VOUT
(5V/Div)
IOUT
(200mA/Div)
Time (100μs/Div)
Time (100μs/Div)
UVLO at Falling
UVLO at Rising
SOT-23-5, VIN = 5V, VEN = 0V
CIN = 33μF/Electrolytic, COUT = 1μF
RL = 30Ω
SOT-23-5, VIN = 5V, VEN = 0V
C
IN = 33μF/Electrolytic, COUT = 1μF
RL = 30Ω
VIN
(1V/Div)
VIN
(1V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
Time (5ms/Div)
Time (1ms/Div)
Flag Response during Short Circuit
Flag Response during Over Load
SOT-23-5, VIN = 5V, RL = 0Ω
SOT-23-5, VIN = 5V, RL = 2Ω
CIN = COUT = 33μF/Electrolytic
C
IN = COUT = 33μF/Electrolytic
VEN
(5V/Div)
VOUT
(5V/Div)
12ms
10ms
VFLG
(5V/Div)
VFLG
(5V/Div)
IOUT
(1A/Div)
IOUT
(1A/Div)
Time (5ms/Div)
Time (5ms/Div)
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DS9711-04 March 2007
Preliminary
RT9711
Flag Response with Ramped Load
SOT-23-5, VIN = 5V, VEN = 0V
IN = COUT = 33μF/Electrolytic
C
VEN
(5V/Div)
VLAG
(5V/Div)
VOUT
(5V/Div)
IOUT
(1A/Div)
Time (2.5ms/Div)
DS9711-04 March 2007
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9
Preliminary
RT9711
Applications Information
Soft Start for Hot Plug-In Applications
The RT9711 is a single N-Channel MOSFET high-side
power switch with active-low enable input, optimized for
self-powered and bus-powered Universal Serial Bus (USB)
applications. The RT9711 equipped with a charge pump
circuitry to drive the internal NMOS switch; the switch's
low RDS(ON), 80mΩ, meets USB voltage drop requirements;
and a flag output is available to indicate fault conditions
to the local USB controller.
In order to eliminate the upstream voltage droop caused
by the large inrush current during hot-plug events, the
“soft-start” feature effectively isolates the power source
from extremely large capacitive loads, satisfying the USB
voltage droop requirements.
Fault Flag
The RT9711 provides a FLG signal pin which is an
N-Channel open drain MOSFET output. This open drain
output goes low when VOUT < VIN − 1V, current limit or
the die temperature exceeds 130°C approximately. The
FLG output is capable of sinking a 10mA load to typically
200mV above ground. The FLG pin requires a pull-up
resistor, this resistor should be large in value to reduce
energy drain.A100kΩ pull-up resistor works well for most
applications. In the case of an over-current condition, FLG
will be asserted only after the flag response delay time,
tD, has elapsed. This ensures that FLG is asserted only
upon valid over-current conditions and that erroneous error
reporting is eliminated.
Input and Output
VIN (input) is the power source connection to the internal
circuitry and the drain of the MOSFET. VOUT (output) is
the source of the MOSFET. In a typical application, current
flows through the switch from VIN to VOUT toward the load.
If VOUT is greater than VIN, current will flow from VOUT to
VIN since the MOSFET is bidirectional when on.
Unlike a normal MOSFET, there is no a parasitic body
diode between drain and source of the MOSFET, the
RT9711 prevents reverse current flow if VOUT being
externally forced to a higher voltage than VIN when the
output disabled (VEN > 2V).
For example, false over-current conditions may occur
during hot-plug events when extremely large capacitive
loads are connected and causes a high transient inrush
current that exceeds the current limit threshold. The FLG
response delay time tD is typically 12ms.
S
D
S
D
Under-Voltage Lockout
G
G
Under-voltage lockout (UVLO) prevents the MOSFET
switch from turning on until input voltage exceeds
approximately 1.7V. If input voltage drops below
approximately 1.6V, UVLO turns off the MOSFET switch,
FLG will be asserted accordingly. Under-voltage detection
functions only when the switch is enabled.
Normal MOSFET
RT9711
Chip Enable Input
The switch will be disabled when the EN pin is in a logic
high condition. During this condition, the internal circuitry
and MOSFET are turned off, reducing the supply current
to 0.1μA typical. The maximum guaranteed voltage for a
logic low at the EN pin is 0.8V. A minimum guaranteed
voltage of 2V at the ENpin will turn the RT9711 off. Floating
the input may cause unpredictable operation. EN should
not be allowed to go negative with respect to GND.
Current Limiting and Short-Circuit Protection
The current limit circuitry prevents damage to the MOSFET
switch and the hub downstream port but can deliver load
current up to the current limit threshold of typically 2.5A
through the switch of RT9711. When a heavy load or short
circuit is applied to an enabled switch, a large transient
current may flow until the current limit circuitry responds.
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DS9711-04 March 2007
Preliminary
RT9711
Once this current limit threshold is exceeded the device
enters constant current mode until the thermal shutdown
occurs or the fault is removed.
PD(MAX) = ( 125°C − 25°C) / 160°C/W = 0.625 W for
SOP-8 packages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. For RT9711 packages, the Figure 1 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Thermal Shutdown
Thermal shutdown is employed to protect the device from
damage if the die temperature exceeds approximately
130°C. The power switch will auto-recover when the IC is
coolng down. The thermal hysteresis temperature is about
20°C.
0.7
Single Layer PCB
Power Dissipation
0.6
SOP-8
The device’ s junction temperature depends on several
factors such as the load, PCB layout, ambient temperature
and package type. The output pin of RT9711 can deliver a
current up to 1.5A, respectively over the full operating
junction temperature range. However, the maximum output
current must be derated at higher ambient temperature to
ensure the junction temperature does not exceed 125°C.
With all possible conditions, the junction temperature must
be within the range specified under operating conditions.
Power dissipation can be calculated based on the output
0.5
0.4
0.3
0.2
0.1
0
SOT-23-5
0
25
50
75
100
125
(°C)
Ambient Temperature
current and the RDS(ON) of switch as below.
Figure 1. Derating Curves for RT8008 Package
2
)
PD = RDS(ON) x (IOUT
Although the devices are rated for 1.5A of output current,
but the application may limit the amount of output current
based on the total power dissipation and the ambient
temperature. The final operating junction temperature for
any set of conditions can be estimated by the following
thermal equation :
Universal Serial Bus (USB) & Power Distribution
The goal of USB is to enable devices from different vendors
to interoperate in an open architecture. USB features
include ease of use for the end user, a wide range of
workloads and applications, robustness, synergy with the
PC industry, and low-cost implement- ation. Benefits
include self-identifying peripherals, dynamically attachable
and reconfigurable peripherals, multiple connections
(support for concurrent operation of many devices), support
for as many as 127 physical devices, and compatibility
with PC Plug-and-Play architecture.
PD (MAX) = ( TJ(MAX) − TA ) / θJA
Where TJ(MAX) is the maximum operation junction
temperature 125°C, TAis the ambient temperature and the
θJA is the junction to ambient thermal resistance.
The junction to ambient thermal resistance θJA is layout
dependent. For SOT-23-5 packages, the thermal
resistance θJA is 250°C/W on the standard JEDEC 51-3
single-layer thermal test board.
The Universal Serial Bus connects USB devices with a
USB host: each USB system has one USB host. USB
devices are classified either as hubs, which provide
additional attachment points to the USB, or as functions,
which provide capabilities to the system (for example, a
digital joystick). Hub devices are then classified as either
Bus-Power Hubs or Self-Powered Hubs.
And for SOP-8 packages, the thermal resistance θJA is
160°C/W. The maximum power dissipation at TA = 25°C
can be calculated by following formula :
PD(MAX) = ( 125°C − 25°C) / 250°C/W = 0.4 W for
SOT-23-5 packages
DS9711-04 March 2007
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11
Preliminary
RT9711
ABus-Powered Hub draws all of the power to any internal
functions and downstream ports from the USB connector
power pins. The hub may draw up to 500mA from the
upstream device. External ports in a Bus-Powered Hub
can supply up to 100mAper port, with a maximum of four
external ports.
Output Filter Capacitor
A low-ESR 150μF aluminum electrolytic or tantalum
between VOUT andGNDis strongly recommended to meet
the 330mV maximum droop requirement in the hub VBUS
(Per USB 2.0, output ports must have a minimum 120μF
of low-ESR bulk capacitance per hub). Standard bypass
methods should be used to minimize inductance and
resistance between the bypass capacitor and the
downstream connector to reduce EMI and decouple voltage
droop caused when downstream cables are hot-insertion
transients. Ferrite beads in series with VBUS, the ground
line and the 0.1μF bypass capacitors at the power
connector pins are recommended for EMI and ESD
protection. The bypass capacitor itself should have a low
dissipation factor to allow decoupling at higher frequencies.
Self-Powered Hub power for the internal functions and
downstream ports does not come from the USB, although
the USB interface may draw up to 100mA from its
upstream connect, to allow the interface to function when
the remainder of the hub is powered down. The hub must
be able to supply up to 500mA on all of its external
downstream ports. Please refer to Universal Serial
Specification Revision 2.0 for more details on designing
compliant USB hub and host systems.
Over-Current protection devices such as fuses and PTC
resistors (also called polyfuse or polyswitch) have slow
trip times, high on-resistance, and lack the necessary
circuitry for USB-required fault reporting.
Voltage Drop
The USB specification states a minimum port-output
voltage in two locations on the bus, 4.75V out of a Self-
Powered Hub port and 4.4V out of a Bus-Powered Hub
port. As with the Self-Powered Hub, all resistive voltage
drops for the Bus-Powered Hub must be accounted for to
guarantee voltage regulation (see Figure 7-47 of Universal
Serial Specification Revision 2.0 ).
The faster trip time of the RT9711 power distribution allow
designers to design hubs that can operate through faults.
The RT9711 have low on-resistance and internal fault-
reporting circuitry that help the designer to meet voltage
regulation and fault notification requirements.
The following calculation determines VOUT (MIN) for multi-
ple ports (NPORTS) ganged together through one switch (if
using one switch per port, NPORTS is equal to 1) :
Because the devices are also power switches, the designer
of self-powered hubs has the flexibility to turn off power to
output ports. Unlike a normal MOSFET, the devices have
controlled rise and fall times to provide the needed inrush
current limiting required for the bus-powered hub power
switch.
VOUT (MIN) = 4.75V − [ II x ( 4 x RCONN + 2 x RCABLE ) ] −
(0.1A x NPORTS x RSWITCH ) − VPCB
Where
RCONN : Resistance of connector contacts
(two contacts per connector)
Supply Filter/Bypass Capacitor
A 1μF low-ESR ceramic capacitor from VIN to GND,
located at the device is strongly recommended to prevent
the input voltage drooping during hot-plug events. However,
higher capacitor values will further reduce the voltage droop
on the input. Furthermore, without the bypass capacitor,
an output short may cause sufficient ringing on the input
(from source lead inductance) to destroy the internal
control circuitry. The input transient must not exceed 6.5V
of the absolute maximum supply voltage even for a short
duration.
RCABLE : Resistance of upstream cable wires
(one 5V and oneGND)
RSWITCH : Resistance of power switch
(80mΩ typical for RT9711)
VPCB : PCB voltage drop
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12
DS9711-04 March 2007
Preliminary
RT9711
V
V
V
The USB specification defines the maximum resistance
BUS
OUT
IN
per contact (RCONN) of the USB connector to be 30mΩ
and the drop across the PCB and switch to be 100mV.
This basically leaves two variables in the equation : the
resistance of the switch and the resistance of the cable.
If the hub consumes the maximum current (II) of 500mA,
the maximum resistance of the cable is 90mΩ.
EN
The resistance of the switch is defined as follows :
GND_BUS
RSWITCH = { 4.75V − 4.4V − [ 0.5A x ( 4 x 30mΩ + 2 x
90mΩ) ] − VPCB
}
( 0.1A x NPORTS
)
÷
÷
FLG
GND
Board Layout
= (200mV − V
)
( 0.1A x NPORTS )
PCB
If the voltage drop across the PCB is limited to 100mV,
the maximum resistance for the switch is 250mΩ for four
ports ganged together. The RT9711, with its maximum
100mΩ on-resistance over temperature, easily meets this
requirement.
PCB Layout
In order to meet the voltage drop, droop, and EMI
requirements, careful PCB layout is necessary. The
following guidelines must be considered :
z Keep all VBUS traces as short as possible and use at
least 50-mil, 2 ounce copper for all VBUS traces.
z Avoid vias as much as possible. If vias are necessary,
make them as large as feasible.
z Place a ground plane under all circuitry to lower both
resistance and inductance and improveDC and transient
performance (Use a separate ground and power plans if
possible).
z Place cuts in the ground plane between ports to help
reduce the coupling of transients between ports.
z Locate the output capacitor and ferrite beads as close
to the USB connectors as possible to lower impedance
(mainly inductance) between the port and the capacitor
and improve transient load performance.
z Locate the RT9711 as close as possible to the output
port to limit switching noise.
z Locate the ceramic bypass capacitors as close as
possible to the VIN pins of the RT9711.
DS9711-04 March 2007
www.richtek.com
13
Preliminary
RT9711
Outline Dimension
H
D
L
B
C
A
b
A1
e
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
B
0.889
0.000
1.397
0.356
2.591
2.692
0.838
0.080
0.300
1.295
0.152
1.803
0.559
2.997
3.099
1.041
0.254
0.610
0.035
0.000
0.055
0.014
0.102
0.106
0.033
0.003
0.012
0.051
0.006
0.071
0.022
0.118
0.122
0.041
0.010
0.024
b
C
D
e
H
L
SOT-23-5 Surface Mount Package
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14
DS9711-04 March 2007
Preliminary
RT9711
H
A
M
J
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
B
C
D
F
H
I
4.801
3.810
1.346
0.330
1.194
0.170
0.050
5.791
0.400
5.004
3.988
1.753
0.508
1.346
0.254
0.254
6.200
1.270
0.189
0.150
0.053
0.013
0.047
0.007
0.002
0.228
0.016
0.197
0.157
0.069
0.020
0.053
0.010
0.010
0.244
0.050
J
M
8-Lead SOP Plastic Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
8F, No. 137, Lane 235, Paochiao Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)89191466 Fax: (8862)89191465
Email: marketing@richtek.com
DS9711-04 March 2007
www.richtek.com
15
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