RT9715EGS [RICHTEK]

IC PWR SWITCH USB 1.1A 8SOP;


型号：	RT9715EGS
厂家：	RICHTEK TECHNOLOGY CORPORATION
描述：	IC PWR SWITCH USB 1.1A 8SOP
文件：	总15页 (文件大小：332K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

RT9715

90mΩ, 2A/1.5A/1.1A/0.7A High-Side Power Switches

with Flag

General Description

Features

^z90mΩ (typ.) N-MOSFET Switch

^zOperating Range : 2.7V to 5.5V

^zReverse Blocking Current

^zUnder Voltage Lockout

The RT9715 is a cost-effective, low-voltage, single

N-MOSFET high-side Power Switch IC for USB application.

Low switch-on resistance (typ. 90mΩ) and low supply

current (typ. 50uA) are realized in this IC.

^zDeglitched Fault Report (FLG)

^zThermal Protection with Foldback

^zOver Current Protection

The RT9715 integrates an over-current protection circuit,

a short fold back circuit, a thermal shutdown circuit and an

under-voltage lockout circuit for overall protection. Besides,

a flag output is available to indicate fault conditions to the

local USB controller. Furthermore, the chip also integrates

an embedded delay function to prevent miss-operation from

happening due to inrush-current. The RT9715 is an ideal

solution for USB power supply and can support flexible

applications since it is available in various packages such

as SOT-23-5, SOP-8, MSOP-8 and WDFN-8L 3x3.

^zShort Circuit Protection

^zUL Approved−E219878

^zNemko Approved−NO49621

^zRoHS Compliant and Halogen Free

Applications

z USB Peripherals

z Notebook PCs

Ordering Information

RT9715

Pin Configurations

Package Type

B : SOT-23-5

(TOP VIEW)

VIN

EN/EN

VIN

EN/EN

BG : SOT-23-5 (G-Type)

BR : SOT-23-5 (R-Type)

S : SOP-8

F : MSOP-8

QW : WDFN-8L 3x3 (W-Type)

VOUT GND FLG

SOT-23-5

VOUT GND NC

SOT-23-5 (G-Type)

Lead Plating System

G : Green (Halogen Free and Pb Free)

VOUT

VIN

Output Current/EN Function

A : 2A/Active High

B : 2A/Active Low

C : 1.5A/Active High

D : 1.5A/Active Low

E : 1.1A/Active High

F : 1.1A/Active Low

G : 0.7A/Active High

GND

VOUT

FLG

VIN

EN/EN

FLG GND

SOP-8/MSOP-8

SOT-23-5 (R-Type)

H : 0.7A/Active Low

GND

VIN

VOUT

FLG

Note :

Richtek products are :

EN/EN

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

WDFN-8L 3x3

` Suitable for use in SnPb or Pb-free soldering processes.

Marking Information

For marking information, contact our sales representative

directly or through a Richtek distributor located in your

area.

DS9715-03 April 2011

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RT9715

Typical Application Circuit

Pull-Up Resistor (10K to 100K)

USB Controller

Over -Current

Supply Voltage

2.7V to 5.5V

VIN

FLG

1uF

RT9715

RT9715A/C/E/G

Chip Enable

VOUT

BUS

EN/EN

D+

10uF

OUT

150uF

GND

D-

RT9715B/D/F/H

Chip Enable

GND

Ferrite

Beads

Data

Note : Alow-ESR 150uF aluminum electrolytic or tantalum between V_OUTand GND is strongly recommended to meet

the 330mV maximum droop requirement in the hub V_BUS. (see Application Information Section for further details)

Functional Pin Description

Pin No.

Pin Name

Pin Function

SOT-23-5 SOT-23-5 SOP-8 / WDFN-8L

SOT-23-5

(G-Type) (R-Type) MSOP-8

3X3

6 , 7 , 8 VOUT

6 , 7 , 8

Output Voltage.

Ground.

GND

FLG

EN/EN

VIN

Fault FLAG Output.

Chip Enable (Active High/Low).

Power Input Voltage.

2 , 3

No Internal Connection.

The exposed pad must be soldered to a large

PCB and connected to GND for maximum

power dissipation.

9 (Exposed

Pad)

Function Block Diagram

VIN

Bias

EN/EN

Current

Limiting

UVLO

Gate

Control

Charge

Pump

Oscillator

Output Voltage

Detection

VOUT

Thermal

Protection

Auto Discharge

FLG

Delay

GND

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DS9715-03 April 2011

RT9715

Absolute Maximum Ratings (Note 1)

z Supply Input Voltage, V_IN-------------------------------------------------------------------------------------------- 6V

z ENVoltage -------------------------------------------------------------------------------------------------------------- −0.3V to 6V

z FLAGVoltage ---------------------------------------------------------------------------------------------------------- 6V

z Power Dissipation, P_D@ T_A= 25°C

SOT-23-5 ---------------------------------------------------------------------------------------------------------------- 300mW

SOP-8 -------------------------------------------------------------------------------------------------------------------- 469mW

MSOP-8 ----------------------------------------------------------------------------------------------------------------- 469mW

WDFN-8L 3x3 ---------------------------------------------------------------------------------------------------------- 694mW

z Package Thermal Resistance (Note 2)

SOT-23-5, θ_JA----------------------------------------------------------------------------------------------------------- 250°C/W

SOP-8, θ_JA-------------------------------------------------------------------------------------------------------------- 160°C/W

MSOP-8, θ_JA------------------------------------------------------------------------------------------------------------ 160°C/W

WDFN-8L 3x3, θ_JA----------------------------------------------------------------------------------------------------- 108°C/W

z Junction Temperature ------------------------------------------------------------------------------------------------- 150°C

z Lead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------------- 260°C

z Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C

z ESD Susceptibility (Note 3)

HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 2kV

MM (Machine Mode) -------------------------------------------------------------------------------------------------- 200V

Recommended Operating Conditions (Note 4)

z Supply Input Voltage, V_IN-------------------------------------------------------------------------------------------- 2.7V to 5.5V

z ENVoltage -------------------------------------------------------------------------------------------------------------- 0V to 5.5V

z Junction Temperature Range---------------------------------------------------------------------------------------- −40°C to 100°C

z Ambient Temperature Range---------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics

(V_IN= 5V, C_IN= 1uF, C_OUT= 10uF, T_A= 25°C, unless otherwise specified)

Parameter

Input Quiescent Current

Input Shutdown Current

RT9715A/B

Symbol

I_Q

Test Conditions

Min

Typ

Max

Unit

Switch On, V_OUT= Open

Switch Off, V_OUT= Open

V_IN= 5V, I_OUT= 1.5A

V_IN= 5V, I_OUT=1.3A

V_IN= 5V, I_OUT= 1A

0.1

I_SHDN

110

RT9715C/D

RT9715E/F

RT9715G/H

Switch On

Resistance

R_DS(ON)

mΩ

_IN= 5V, I_OUT= 0.6A

RT9715A/B

RT9715C/D

RT9715E/F

RT9715G/H

RT9715A/B

RT9715C/D

RT9715E/F

RT9715G/H

1.5

1.1

0.7

2.5

3.2

2.8

2.1

1.4

Current

Limit

I_LIM

V_OUT= 4V

1.5

1.7

1.4

Short

Current

V_OUT= 0V, Measured Prior to

Thermal Shutdown

I_{SC_FB}

0.7

To be continued

DS9715-03 April 2011

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RT9715

Parameter

Symbol

Test Conditions

V_IN= 2.7V to 5.5V

Min

Typ

Max

Unit

Logic_High Voltage V_IH

Logic_Low Voltage V_IL

EN/EN

Threshold

V_IN= 2.7V to 5.5V

0.8

0.1

0.01

0.5

200

EN/EN Input Current

Output Leakage Current

Output Turn-On Rise Time

FLG Output Resistance

FLG Off Current

I_EN/EN

V_EN= 5V

I_LEAKAGE

V_EN= 0V, R_LOAD= 0Ω

10% to 90% of V_OUTRising

T_{ON_RISE}

R_FLG

I_{FLG_OFF}

_SINK= 1mA

0.01

V_FLG= 5V

From fault condition to FLG

assertion

FLG Delay Time

T_D

V_EN= 0V, V_EN= 5V

Shutdown Auto-Discharge

Resistance

R_Discharge

100

150

Under-Voltage Lockout

V_UVLO

V_INRising

1.3

1.7

0.1

120

100

Under-Voltage Hysteresis

ΔV_UVLO

V_INDecreasing

V_OUT> 1V

°C

Thermal Shutdown Protection

Thermal Shutdown Hysteresis

T_SD

V_OUT= 0V

Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.

These are stress ratings only, and functional operation of the device at these or any other conditions beyond those

indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability.

Note 2. θ_JAis measured in the natural convection at T_A= 25°C on a low effective single layer thermal conductivity test board of

JEDEC 51-3 thermal measurement standard.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

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DS9715-03 April 2011

RT9715

Typical Operating Characteristics

On Resistance vs. Input Voltage

On Resistance vs. Temperature

108

125

120

115

110

105

100

I_OUT= 2A

V_IN= 5V, I_OUT= 2A

106

SOP-8

104

102

100

SOP-8

SOT-23-5

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

-40

-25

-10

Input Voltage (V)

(°C)

Temperature

Quiescent Current vs. Input Voltage

Quiescent Current vs. Temperature

No Load

V_IN= 5V,No Load

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

-40 -25 -10

20 35 50 65 80 95 110

Input Voltage (V)

Temperature (°C)

Shutdown Current vs. Input Voltage

Shutdown Current vs. Temperature

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

No Load

V_IN= 5V

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

-40 -25 -10

20 35 50 65 80 95 110

Input Voltage (V)

Temperature

(°C)

DS9715-03 April 2011

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RT9715

UVLO Threshold vs. Temperature

Output Voltage vs. Output Current

6.0

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

2.2

2.0

1.8

1.6

1.4

1.2

1.0

V_IN= 5V

Rising

Falling

V_IN= 3.3V

0.25 0.5 0.75

1.25 1.5 1.75

2.25 2.5

-40 -25 -10

20 35 50 65 80 95 110

(°C)

Temperature

Output Current (A)

Current Limit vs. Input Voltage

Current Limit vs. Temperature

2.4

2.3

2.2

2.1

2.0

1.9

1.8

1.7

1.6

2.40

2.35

2.30

2.25

2.20

2.15

2.10

2.05

2.00

V_IN= 5V

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

-40 -25 -10

20 35 50 65 80 95 110

Input Voltage (V)

Temperature (°C)

Short Current vs. Input Voltage

Short Current vs. Temperature

2.0

1.9

1.8

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1.0

2.00

1.90

1.80

1.70

1.60

1.50

1.40

1.30

1.20

1.10

1.00

V_IN= 5V

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

-40 -25 -10

20 35 50 65 80 95 110

Input Voltage (V)

Temperature

(°C)

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DS9715-03 April 2011

RT9715

FLG Delay Time vs. Temperature

FLG Delay Time vs. Input Voltage

12.0

11.5

11.0

10.5

10.0

9.5

V_IN= 5V

9.0

8.5

8.0

-40 -25 -10

20 35 50 65 80 95 110

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

Input Voltage (V)

Temperature (°C)

Power On from V_IN

Power Off from V_IN

EN = 0V, No Load

V_IN

(2V/Div)

V_IN

(2V/Div)

V_OUT

(2V/Div)

V_OUT

(2V/Div)

Time (25ms/Div)

FLG Response

Power On from EN

V_IN= 5V, R_LOAD= 2.7Ω

V_OUT

(2V/Div)

V_OUT

(2V/Div)

I_IN

(1A/Div)

(5V/Div)

I_IN

(1A/Div)

FLG

(5V/Div)

V_IN= 5V, R_LOAD= 0.5Ω

Time (2.5ms/Div)

Time (100us/Div)

DS9715-03 April 2011

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RT9715

Applications Information

Fault Flag

The RT9715 is a single N-MOSFET high-side power

switches with enable input, optimized for self-powered and

bus-powered Universal Serial Bus (USB) applications. The

RT9715 is equipped with a charge pump circuitry to drive

The RT9715 series provides a FLGsignal pin which is an

N-Channel open drain MOSFET output. This open drain

output goes low when current limit or the die temperature

exceeds 120°C approximately. The FLGoutput is capable

of sinking a 10mA load to typically 200mV above ground.

The FLGpin requires a pull-up resistor, this resistor should

be large in value to reduce energy drain. A100kΩ pull-up

resistor works well for most applications. In the case of an

over-current condition, FLGwill be asserted only after the

flag response delay time, t_D, has elapsed. This ensures

that FLGis asserted only upon valid over-current conditions

and that erroneous error reporting is eliminated.

the internal N-MOSFET switch; the switch's low R_DS(ON)

90mΩ, meets USB voltage drop requirements; and a flag

output is available to indicate fault conditions to the local

USB controller.

Input and Output

V_IN(input) is the power source connection to the internal

circuitry and the drain of the MOSFET. V_OUT(output) is

the source of the MOSFET. In a typical application, current

flows through the switch from V_INto V_OUTtoward the load.

If V_OUTis greater than V_IN, current will flow from V_OUTto

V_INsince the MOSFET is bidirectional when on.

For example, false over-current conditions may occur

during hot-plug events when extremely large capacitive

loads are connected and causes a high transient inrush

current that exceeds the current limit threshold. The FLG

response delay time t_Dis typically 12ms.

Unlike a normal MOSFET, there is no parasitic body diode

between drain and source of the MOSFET, the RT9715

prevents reverse current flow if V_OUTis externally forced to

Under-Voltage Lockout

a higher voltage than V_INwhen the chip is disabled (V_EN

0.8V or V_EN> 2V).

Under-voltage lockout (UVLO) prevents the MOSFETswitch

from turning on until input the voltage exceeds

approximately 1.7V. If input voltage drops below

approximately 1.3V, UVLO turns off the MOSFET switch.

Under-voltage detection functions only when the switch is

enabled.

Current Limiting and Short-Circuit Protection

Normal MOSFET

RT9715

The current limit circuitry prevents damage to the MOSFET

switch and the hub downstream port but can deliver load

current up to the current limit threshold of typically 2A

through the switch of the RT9715A/B, 1.5A for

RT9715C/D, 1.1A for RT9715E/F and 0.7A for

RT9715G/H respectively. When a heavy load or short circuit

is applied to an enabled switch, a large transient current

may flow until the current limit circuitry responds. Once

this current limit threshold is exceeded, the device enters

constant current mode until the thermal shutdown occurs

or the fault is removed.

Chip Enable Input

The switch will be disabled when the EN/EN pin is in a

logic low/high condition.During this condition, the internal

circuitry and MOSFETwill be turned off, reducing the supply

current to 0.1uA typical. Floating the EN/EN may cause

unpredictable operation. EN should not be allowed to go

negative with respect to GND. The EN/EN pin may be

directly tied to V_IN(GND) to keep the part on.

Soft Start for Hot Plug-In Applications

In order to eliminate the upstream voltage droop caused

by the large inrush current during hot-plug events, the “soft-

start” feature effectively isolates the power source from

extremely large capacitive loads, satisfying the USB voltage

droop requirements.

Thermal Shutdown

Thermal protection limits the power dissipation in RT9715.

When the operation junction temperature exceeds 120°C,

the OTP circuit starts the thermal shutdown function and

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DS9715-03 April 2011

RT9715

turns the pass element off. The pass element turn on again

after the junction temperature cools to 80°C. The RT9715

lowers its OTP trip level from 120°C to 100°C when output

short circuit occurs (V_OUT< 1V) as shown in Figure 1.

The junction to ambient thermal resistance (θ_JA) for

SOT-23-5/TSOT-23-5, SOP-8/MSOP-8 and WDFM-8L3x3

packages at recommended minimum footprint are 250°C/

W, 160°C/W and 108°C/W respectively (θ_JAis layout

dependent).

Short to GND

OUT

Universal Serial Bus (USB) & Power Distribution

OUT

The goal of USB is to enable device from different vendors

to interoperate in an open architecture. USB features

include ease of use for the end user, a wide range of

workloads and applications, robustness, synergy with the

PC industry, and low-cost implementation. Benefits include

self-identifying peripherals, dynamically attachable and

reconfigurable peripherals, multiple connections (support

for concurrent operation of many devices), support for as

many as 127 physical devices, and compatibility with PC

Plug-and-Play architecture.

OUT

Thermal

Shutdown

120°C

100 C

OTP Trip Point

100 °C

80 °C

IC Temperature

Figure 1. Short Circuit Thermal Folded Back Protection

when Output Short Circuit Occurs (Patent)

The Universal Serial Bus connects USB devices with a

USB host: each USB system has one USB host. USB

devices are classified either as hubs, which provide

additional attachment points to the USB, or as functions,

which provide capabilities to the system (for example, a

digital joystick). Hub devices are then classified as either

Bus-Power Hubs or Self-Powered Hubs.

Power Dissipation

The junction temperature of the RT9715 series depend on

several factors such as the load, PCB layout, ambient

temperature and package type. The output pin of the

RT9715 can deliver the current of up to 2A (RT9715A/B),

1.5A(RT9715C/D), 1.1A(RT9715E/F) and 0.7A(RT9715G/

H) respectively over the full operating junction temperature

range. However, the maximum output current must be

derated at higher ambient temperature to ensure the

junction temperature does not exceed 100°C. With all

possible conditions, the junction temperature must be within

the range specified under operating conditions. Power

dissipation can be calculated based on the output current

and the R_DS(ON)of the switch as below.

ABus-Powered Hub draws all of the power to any internal

functions and downstream ports from the USB connector

power pins. The hub may draw up to 500mA from the

upstream device. External ports in a Bus-Powered Hub

can supply up to 100mA per port, with a maximum of four

external ports.

Self-Powered Hub power for the internal functions and

downstream ports does not come from the USB, although

the USB interface may draw up to 100mAfrom its upstream

connect, to allow the interface to function when the

remainder of the hub is powered down. The hub must be

able to supply up to 500mA on all of its external

downstream ports. Please refer to Universal Serial

Specification Revision 2.0 for more details on designing

compliant USB hub and host systems.

P_D= R_DS(ON)x I_OUT

Although the devices are rated for 2A, 1.5A, 1.1Aand 0.7A

of output current, but the application may limit the amount

of output current based on the total power dissipation and

the ambient temperature. The final operating junction

temperature for any set of conditions can be estimated by

the following thermal equation :

Over-Current protection devices such as fuses and PTC

resistors (also called polyfuse or polyswitch) have slow

trip times, high on-resistance, and lack the necessary

circuitry for USB-required fault reporting.

P_{D (MAX)}= ( T_{J (MAX)}- T ) / θ_JA

Where T_{J (MAX)}is the maximum junction temperature of

the die (100°C) andT_Ais the maximum ambient temperature.

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RT9715

The faster trip time of the RT9715 power distribution allows

designers to design hubs that can operate through faults.

The RT9715 provides low on-resistance and internal fault-

reporting circuitry to meet voltage regulation and fault

notification requirements.

the Bus-Powered Hub must be accounted for to guarantee

voltage regulation (see Figure 7-47 of Universal Serial

Specification Revision 2.0 ).

The following calculation determines V_{OUT (MIN)}for multi-

ple ports (N_PORTS) ganged together through one switch (if

using one switch per port, N_PORTSis equal to 1) :

Because the devices are also power switches, the designer

of self-powered hubs has the flexibility to turn off power to

output ports. Unlike a normal MOSFET, the devices have

controlled rise and fall times to provide the needed inrush

current limiting required for the bus-powered hub power

switch.

V_{OUT (MIN)}= 4.75V − [ I_Ix ( 4 x R_CONN+ 2 x R_CABLE) ] −

(0.1A x N_PORTSx R_SWITCH) − V_PCB

Where

R_CONN= Resistance of connector contacts

(two contacts per connector)

Supply Filter/Bypass Capacitor

R_CABLE= Resistance of upstream cable wires

(one 5V and one GND)

A1uF low-ESR ceramic capacitor from V_INtoGND, located

at the device is strongly recommended to prevent the input

voltage drooping during hot-plug events. However, higher

capacitor values will further reduce the voltage droop on

the input. Furthermore, without the bypass capacitor, an

output short may cause sufficient ringing on the input (from

source lead inductance) to destroy the internal control

circuitry. The input transient must not exceed 6V of the

absolute maximum supply voltage even for a short duration.

R_SWITCH= Resistance of power switch

(90mΩ typical for RT9715)

V_PCB= PCB voltage drop

The USB specification defines the maximum resistance

per contact (R_CONN) of the USB connector to be 30mΩ and

the drop across the PCB and switch to be 100mV. This

basically leaves two variables in the equation: the

resistance of the switch and the resistance of the cable.

Output Filter Capacitor

A low-ESR 150uF aluminum electrolytic or tantalum

between V_OUTandGNDis strongly recommended to meet

the 330mV maximum droop requirement in the hub V_BUS

(Per USB 2.0, output ports must have a minimum 120uF

of low-ESR bulk capacitance per hub). Standard bypass

methods should be used to minimize inductance and

resistance between the bypass capacitor and the

downstream connector to reduce EMI and decouple voltage

droop caused when downstream cables are hot-insertion

transients. Ferrite beads in series with V_BUS, the ground

line and the 0.1uF bypass capacitors at the power connector

pins are recommended for EMI and ESD protection. The

bypass capacitor itself should have a low dissipation factor

to allow decoupling at higher frequencies.

If the hub consumes the maximum current (I_I) of 500mA,

the maximum resistance of the cable is 90mΩ.

The resistance of the switch is defined as follows :

R_SWITCH= { 4.75V − 4.4V − [ 0.5A x ( 4 x 30mΩ + 2 x

90mΩ) ] − V_PCB} _÷( 0.1A x N_PORTS)

= (200mV − V ) ( 0.1A x N_PORTS

)

PCB

If the voltage drop across the PCB is limited to 100mV,

the maximum resistance for the switch is 250mΩ for four

ports ganged together. The RT9715, with its maximum

100mΩ on-resistance over temperature, can fit the demand

of this requirement.

Thermal Considerations

Voltage Drop

For continuous operation, do not exceed absolute

maximum operation junction temperature. The maximum

power dissipation depends on the thermal resistance of IC

package, PCB layout, the rate of surroundings airflow and

temperature difference between junction to ambient. The

The USB specification states a minimum port-output voltage

in two locations on the bus, 4.75V out of a Self-Powered

Hub port and 4.40V out of a Bus-Powered Hub port. As

with the Self-Powered Hub, all resistive voltage drops for

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DS9715-03 April 2011

RT9715

maximum power dissipation can be calculated by following

formula :

PCB Layout Guide

In order to meet the voltage drop, droop, and EMI

requirements, careful PCB layout is necessary. The

following guidelines must be followed :

P_D(MAX)= (T_J(MAX)− T_A) / θ_JA

Where T_J(MAX)is the maximum operation junction

temperature 100°C, T_Ais the ambient temperature and the

θ_JAis the junction to ambient thermal resistance.

` Locate the ceramic bypass capacitors as close as

possible to the VIN pins of the RT9715.

` Place a ground plane under all circuitry to lower both

resistance and inductance and improveDC and transient

performance (Use a separate ground and power plans if

possible).

For recommended operating conditions specification of

RT9715, where T_J(MAX)is the maximum junction

temperature of the die (100°C) and T_Ais the maximum

ambient temperature. The junction to ambient thermal

resistance θ_JAis layout dependent. For SOT-23-5

packages, the thermal resistance θ_JAis 250°C/W on the

standard JEDEC 51-3 single-layer thermal test board.And

for SOP-8 and MSOP-8 packages, the thermal resistance

` Keep all V_BUStraces as short as possible and use at

least 50-mil, 2 ounce copper for all V_BUStraces.

` Avoid vias as much as possible. If vias are necessary,

make them as large as feasible.

θ_JAis 160°C/W. The maximum power dissipation at T_A=

` Place cuts in the ground plane between ports to help

25°C can be calculated by following formula :

reduce the coupling of transients between ports.

P_D(MAX)= (100°C - 25°C) / (250°C/W) = 0.3W for

` Locate the output capacitor and ferrite beads as close to

the USB connectors as possible to lower impedance

(mainly inductance) between the port and the capacitor

and improve transient load performance.

SOT-23-5 packages

P_D(MAX)= (100°C - 25°C) / (160°C/W) = 0.469W for

SOP-8/MSOP-8 packages

P_D(MAX)= (100°C - 25°C) / (108°C/W) = 0.694W for

WDFN-8L 3x3 packages

` Locate the RT9715 as close as possible to the output

port to limit switching noise.

The maximum power dissipation depends on operating

ambient temperature for fixedT_J(MAX)and thermal resistance

θ_JA. For RT9715 packages, the Figure 2 of derating curves

allows the designer to see the effect of rising ambient

temperature on the maximum power allowed.

The input capacitor should

be placed as close as

possible to the IC.

BUS

OUT

0.8

Single Layer PCB

WDFN-8L 3x3

GND

0.7

0.6

SOP-8/MSOP-8

0.5

GND_BUS

FLG

0.4

SOT-23-5

0.3

Figure 3

0.2

0.1

10 20 30 40 50 60 70 80 90 100

Ambient Temperature (°C)

Figure 2. Derating Curves for RT9715 Package

DS9715-03 April 2011

www.richtek.com

RT9715

Outline Dimension

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

0.889

0.000

1.397

0.356

2.591

2.692

0.838

0.080

0.300

1.295

0.152

1.803

0.559

2.997

3.099

1.041

0.254

0.610

0.035

0.000

0.055

0.014

0.102

0.106

0.033

0.003

0.012

0.051

0.006

0.071

0.022

0.118

0.122

0.041

0.010

0.024

SOT-23-5 Surface Mount Package

www.richtek.com

DS9715-03 April 2011

RT9715

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

4.801

3.810

1.346

0.330

1.194

0.170

0.050

5.791

0.400

5.004

3.988

1.753

0.508

1.346

0.254

6.200

1.270

0.189

0.150

0.053

0.013

0.047

0.007

0.002

0.228

0.016

0.197

0.157

0.069

0.020

0.053

0.010

0.244

0.050

8-Lead SOP Plastic Package

DS9715-03 April 2011

www.richtek.com

RT9715

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

0.810

0.000

0.750

0.220

2.900

1.100

0.150

0.950

0.380

3.100

0.032

0.000

0.030

0.009

0.114

0.043

0.006

0.037

0.015

0.122

0.650

0.026

4.800

2.900

0.400

5.000

3.100

0.800

0.189

0.114

0.016

0.197

0.122

0.031

8-Lead MSOP Plastic Package

www.richtek.com

DS9715-03 April 2011

RT9715

SEE DETAIL A

DETAILA

Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

0.700

0.000

0.175

0.200

2.950

2.100

2.950

1.350

0.800

0.050

0.250

0.300

3.050

2.350

3.050

1.600

0.028

0.000

0.007

0.008

0.116

0.083

0.116

0.053

0.031

0.002

0.010

0.012

0.120

0.093

0.120

0.063

0.650

0.026

0.425

0.525

0.017

0.021

W-Type 8L DFN 3x3 Package

Richtek Technology Corporation

Headquarter

Richtek Technology Corporation

Taipei Office (Marketing)

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

5F, No. 95, Minchiuan Road, Hsintien City

Taipei County, Taiwan, R.O.C.

Tel: (8863)5526789 Fax: (8863)5526611

Tel: (8862)86672399 Fax: (8862)86672377

Email: marketing@richtek.com

Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,

specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed

by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.

DS9715-03 April 2011

www.richtek.com

RT9715EGS [RICHTEK]

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