RT9833A-20GY [RICHTEK]
Micro-Power Voltage Detectors;
| 型号： | RT9833A-20GY |
| 厂家： | 
RICHTEK TECHNOLOGY CORPORATION |
| 描述： | Micro-Power Voltage Detectors |
| 文件： | 总11页 (文件大小：185K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
RT9833
Micro-Power Voltage Detectors with Manual Reset
General Description
Features
z Internally Fixed Threshold 1V to 5V in 0.1V Step
The RT9833 is a micro-power voltage detector with
deglitched manual reset input supervising the power supply
voltage level for microprocessors (μP) or digital systems.
It provides internally fixed threshold levels with 0.1V per
step ranging from 1V to 5V, which covers most digital
applications. It features low supply current of 3μA. The
RT9833 performs supervisory function by sending out a
reset signal whenever the VDD voltage falls below a preset
threshold level. This reset signal will last the whole period
before VDD recovering. Once VDD recovered upcrossing
the threshold level, the reset signal will be released after
a certain delay time. To pull reset signal low manually,
just pull the manual reset input (MR) below the specified
VIL level. The RT9833 is available in the SC-82 package.
z High Accuracy 1.5%
z Low Supply Current 3μA
z No External Components Required
z Quick Reset within 20μs
z Built-in Recovery Delay : 0ms, 55ms, 220ms, 450ms
Options
z 800ns Glitch Immunity of Manual Reset Input
z Low Functional Supply Voltage 0.9V
z N-Channel Open-Drain Output
z Small SC-82 Package
z RoHS Compliant and Halogen Free
Applications
z Computers
z Controllers
Ordering Information
-
z Intelligent Instruments
z Critical μP and μC Power Monitoring
z Portable/Battery-Powered Equipment
RT9833
Package Type
Y : SC-82
Lead Plating System
G : Green (Halogen Free and Pb Free)
Marking Information
Threshold Voltage
12 : 1.2V
13 : 1.3V
:
49 : 4.9V
50 : 5.0V
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
Reset Active Timeout Period
A = 0ms (RESET)
B = 55ms (RESET)
C = 220ms (RESET)
D = 450ms (RESET)
E = 0ms (RESET)
F = 55ms (RESET)
G = 220ms (RESET)
H = 450ms (RESET)
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Simplified Application Circuit
RT9833
VDD
µp
VDD
MR
RESET/
RESET
RESET/
RESET
GND
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
www.richtek.com
1
RT9833
Pin Configurations
(TOP VIEW)
VDD
MR
4
3
2
GND
RESET/
RESET
SC-82
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
GND
Ground.
RESET
RESET
MR
Active Low Open Drain Reset Output.
Active High Open Drain Reset Output.
Manual Reset.
2
3
4
VDD
Power.
Function Block Diagram
VDD
MR
RESET/
RESET
Timer
CMP
N MOS
VSET
GND
Threshold
Voltage Setting
POR
Power On Reset
Operation
VSET
When VDD is lower than threshold voltage set by VSET
circuit, the RESET output becomes high. If VDD remains
higher than the threshold voltage with a hysteresis voltage,
Timer will be active.After a specific delay time, the RESET
output becomes low. There is an internal pull-high resistor
connected to the MR pin. MR resets the RT9833 only
when it is pulled low. When MR releases and waits for a
delay time, output returns to its normal state related to
VDD. It is an open drain output type of Reset IC.
The VSET generates a fixed threshold voltage.
CMP
Voltage Comparator which compares the voltage difference
between threshold voltage and VDD.
POR
Power on reset. It will set all digital logic to the right state
when power on.
Timer
The Timer provides four kinds of delay time options
including 0ms, 55ms, 220ms, and 450ms.
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS9833-00 May 2013
RT9833
Absolute Maximum Ratings (Note 1)
z Terminal Voltage (with Respect to GND)
VDD ------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
z All Other Inputs ---------------------------------------------------------------------------------------------------- −0.3V to (V + 0 .3V)
DD
z Input Current, IVDD ------------------------------------------------------------------------------------------------- 20mA
z Power Dissipation, PD @ TA = 25°C
SC-82 ---------------------------------------------------------------------------------------------------------------- 0.29W
z Package Thermal Resistance (Note 2)
SC-82, θJA ----------------------------------------------------------------------------------------------------------- 345.6°C/W
z Lead Temperature (Soldering, 10sec.)------------------------------------------------------------------------ 260°C
z Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to 125°C
z ESD Susceptibility (Note 3)
HBM (Human Body Model)-------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions (Note 4)
z Junction Temperature Range------------------------------------------------------------------------------------ −40°C to 125°C
z Ambient Temperature Range------------------------------------------------------------------------------------ −40°C to 85°C
Electrical Characteristics
(VDD = 3V, unless otherwise specified)
Parameter
Operating V (V
Symbol
Test Conditions
Min
0.9
--
Typ
--
Max
Unit
V
) Range
OUT
V
I
6
8
DD
DD
Supply Current
VTH = 3V, V = 4.5V, TA = 27°C
3
μA
V
DD
DD
Reset Threshold
V
V
V
TA = 27°C
--
1.2 to 5
--
--
TH
TA = 27°C, VTH > 1.2V
TA = 27°C, VTH > 1.2V
--
0.25V
IL
DD
MR Input Threshold
V
0.7V
--
--
--
IH
DD
MR Glitch Rejection
--
−1.5
--
800
--
ns
%
Threshold Voltage Accuracy
Drop to Reset Delay
ΔV
T = 27°C
1.5
--
TH
A
V
DD
t
Drop = V −125mV
20
μs
RD
TH
RT9833A/E
--
0
--
RT9833B/F
RT9833C/G
RT9833D/H
35
55
75
297
608
MR Active
Timeout Period
t
MR
ms
V
143
292
0.75 x
220
450
Logic-High
Logic-Low
V
V
> V
> V
--
--
V
DD
V
V
DD
DD
TH(MAX)
TH(MAX)
MR_H
MR Input Voltage
Threshold
V
DD
0.25 x
--
MR_L
V
DD
RT9833A/E
RT9833B/F
RT9833C/G
RT9833D/H
--
35
143
292
--
0
55
--
75
Reset Active
Time Out Period
t
V
≥ 1.02×V
TH
ms
RP
DD
220
450
--
297
608
0.4
--
RESET Output Voltage Low
Hysteresis Width
V
V
3 = V < V I > 3.5mA
TH SINK
V
V
OL
DD
--
0.01VTH
HYS
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
www.richtek.com
3
RT9833
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS9833-00 May 2013
RT9833
Typical Application Circuit
RT9833
VDD
4
2
3
VDD
µp
MR
100k
Pull Up
RESET/
RESET
1
RESET/
RESET
GND
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
www.richtek.com
5
RT9833
Typical Operating Characteristics
RESET Sink Current vs. VDS
RESET Sink Output Current vs. VDS
60
50
40
30
20
10
0
2.4
RT9833C-30
RT9833A-12
VDD = 2.8V
VDD = 1.1V
2.0
VDD = 2.5V
1.6
1.2
VDD = 2V
VDD = 1V
0.8
VDD = 1.5V
0.4
0.0
0
0
0
0.5
1
1.5
2
2.5
3
3.5
0
0.3
0.6
0.9
1.2
1.5
VDS (V)
VDS (V)
RESET Sink Current vs. VDS
Output Voltage vs. Input Voltage
120
100
80
60
40
20
0
7
6
5
4
3
2
1
0
RT9833A-45
RT9833
VDD = 4.4V
= 4V
= 3.5V
= 3V
= 2.5V
= 2V
4.5V
1.2V
= 1.5V
0
1
2
3
4
5
1
2
3
4
5
6
VDS (V)
Input Voltage (V)
Supply Current vs. Input Voltage
Supply Current vs. Input Voltage
6
5
4
3
2
1
0
4.0
RT9833A-12
RT9833C-30
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
80°C
25°C
80°C
25°C
−30°C
−30°C
0
1
2
3
4
5
6
1
2
3
4
5
6
Input Voltage (V)
Input Voltage (V)
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
6
DS9833-00 May 2013
RT9833
Power Down Reset Delay vs. Temperature
Supply Current vs. Input Voltage
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
14
12
10
8
RT9833A-12
RT9833A-45
80°C
25°C
VDROP = 200mV
VDROP = 150mV
−30°C
6
VDROP = 250mV
4
2
0
0
1
2
3
4
5
6
-50
-25
0
25
50
75
100
125
Input Voltage (V)
Temperature (°C)
Power Down Reset Delay vs. Temperature
Power Down Reset Delay vs. Temperature
45
40
35
30
25
20
15
10
5
45
RT9833A-45
RT9833C-30
40
35
30
25
20
15
10
5
VDROP = 200mV
VDROP = 200mV
VDROP = 150mV
VDROP = 150mV
VDROP = 250mV
VDROP = 250mV
0
0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Reset Threshold Deviation vs. Temperature
RESET Sink Current vs. Input Voltage
6
40
35
30
25
20
15
10
5
RT9833
RT9833C-30, VDS = 0.5V
5V
5
4
3
2
1
−30°C
25°C
4.5V
4.2V
2.2V
80°C
1.2V
75
0
-50
-25
0
25
50
100
125
0
0.5
1
1.5
2
2.5
3
3.5
Input Voltage (V)
Temperature (°C)
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
www.richtek.com
7
RT9833
Power Up Reset Timeout vs. Temperature
RESET Sink Current vs. Input Voltage
500
50
40
30
20
10
0
RT9833A-45, VDS = 0.5V
RT9833C
−30°C
400
300
200
100
0
25°C
VTH = 2.9V
80°C
VTH = 3V
-50
-25
0
25
50
75
100
125
0
1
2
3
4
5
Temperature (°C)
Input Voltage (V)
Power Up Reset Timeout vs. Temperature
Output Delay Time vs. Load Capacitance
100
1000
100
10
RT9833A
80
60
40
20
0
VTH = 5V
VTH = 1.2V
1
VTH = 4.5V
0.1
VTH = 4.5V
0.0010
0.01
0.0001
0.0100
0.1000
1.0000
-50
-25
0
25
50
75
100
125
Load Capacitance (µF)
Temperature (°C)
RESET Sink Current vs. VDS
RESET Sink Current vs. Input Voltage
160
140
120
100
80
60
50
40
30
20
10
0
RT9833G-31
RT9833G-31
VDS = 0.5V
−30°C
25°C
VDD = 6V
= 5.5V
80°C
= 5V
= 4.5V
= 4.V
= 3.5V
60
40
20
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Input Voltage (V)
VDS (V)
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
8
DS9833-00 May 2013
RT9833
Power Up Reset Timeout vs. Temperature
Output Voltage vs. Input Voltage
7
6
5
4
3
2
1
0
500
RT9833G-31
RT9833G-31
400
300
200
100
0
0
1
2
3
4
5
6
-50
-25
0
25
50
75
100
125
Temperature (°C)
Input Voltage (V)
Power Down Reset Delay vs. Temperature
30
RT9833G-31
25
20
15
10
5
VDROP = 200mV
VDROP = 150mV
VDROP = 250mV
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
www.richtek.com
9
RT9833
Application Information
0.5
0.4
0.3
0.2
0.1
0.0
Multiple Supplies
Four-Layer PCB
Mainly, the pull-up connected to the RT9833 will connect
to the supply voltage that is being monitored at the IC's
VCC pin. However, some systems may use the open-
drain output to level-shift from the monitored supply to
reset circuitry powered by some other supply.
Benefits of Highly Accurate Reset Threshold
Most μP supervisor ICs have reset threshold voltages
between 1% and 1.5% below the value of nominal supply
voltages. This ensures a reset will not occur within 1% of
the nominal supply, but will occur when the supply is 1.5%
below nominal.
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 1. Derating Curve of Maximum PowerDissipation
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent.
SC-82 package, the thermal resistance, θJA, is 345.6°C/
Won a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (345.6°C/W) = 0.29W for
SC-82 package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. The derating curve in Figure 1 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
10
DS9833-00 May 2013
RT9833
Outline Dimension
D
e
H
L
B
C
A
b1
b
A1
e
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
B
0.800
0.000
1.150
0.150
0.350
1.800
1.800
1.100
0.100
1.350
0.400
0.500
2.450
2.200
0.031
0.000
0.045
0.006
0.014
0.071
0.071
0.043
0.004
0.053
0.016
0.020
0.096
0.087
b
b1
C
D
e
1.300
0.051
H
L
0.080
0.200
0.260
0.460
0.003
0.008
0.010
0.018
SC-82 Surface Mount Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS9833-00 May 2013
www.richtek.com
11
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