RTQ2822B_技术文档

®

RTQ2822A/B

12A, 17V, High Efficiency Synchronous Step-Down Converter

General Description

Features

^4.5V to 17V Input Voltage Range

^Integrated 9.8mΩ/4.5mΩ MOSFETs

^0.6V 1% Voltage Reference

The RTQ2822A/B is a high-performance, synchronous

step-down converter that can deliver up to 12A output

current with an input supply voltage range of 4.5V to 17V.

The device integrates low R_DS(ON)power MOSFETs,

accurate 0.6V reference and an integrated diode for

bootstrap circuit to offer a very compact solution.

^Adjustable Output Voltage from 0.6V to 5.5V

^Supports Ceramic Output Capacitor

^ACOT^TMControl for Fast Transient Response

^Selectable Switching Frequency (400kHz/800kHz/

1200kHz)

The RTQ2822A/B adopts Advanced Constant On-Time

(ACOT^TM) control architecture that provides ultrafast

transient response and further reduce the external-

component count. In steady states, theACOT^TMoperates

in nearly constant switching frequency over line, load and

output voltage ranges and makes the EMI filter design

easier.

^Selectable Current Limit Level

^Power Good Indicator

^Programmable Soft-Start Time with a Default 1ms

^Monotonic Start-Up into Pre-Biased Outputs

 18-Lead VQFN (FC) Package

The device offers a variety of functions for more design

flexibility. The selectable switching frequency, current limit

level and PWM operation modes makes the

RTQ2822A/B easy-to-use over wide application range.

Independent enable control input pin and power good

indicator are also provided for easy sequence control. To

control the inrush current during the startup, the device

provides a programmable soft start-up by an external

capacitor connected to the SS pin. Fully protection

features are also integrated in the device including the

cycle-by-cycle current limit, OVP, UVP, input UVLO and

OTP.

Applications

 Server, Storage andNetwork Equipment

 Telecom Infrastructure

 Point of Load (POL) Power Modules

 HighDensityDC-DC Converters

 High End Digital TV

Pin Configuration

(TOP VIEW)

18 17 16 15 14 13

The RTQ2822A/B is available in a thermally enhanced

VQFN-18L 3.5x3.5 (FC) package.

12

11

10

1

2

AGND

VIN

BOOT

VIN

3

4

5

PGND

9

8

6

7

VQFN-18L 3.5x3.5 (FC)

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RTQ2822A/B

Ordering Information

Marking Information

RTQ2822AGQVF

RTQ2822A/B

Package Type

17= : Product Code

QVF : VQFN-18L 3.5x3.5 (FC) (V-Type)

YMDNN : Date Code

17=YM

DNN

Lead Plating System

G : Green (Halogen Free and Pb Free)

Enable Pin

A : Internal Pull High

B : Internal Pull Low

RTQ2822BGQVF

16= : Product Code

YMDNN : Date Code

16=YM

DNN

Note :

Richtek products are :

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

Functional Pin Description

Pin No.

Pin Name

Pin Function

Bootstrap, supply for high-side gate driver. Connect a 0.1F ceramic capacitor

between BOOT and SW pins.

1

BOOT

Input voltage. Support 4.5V to 17V input voltage. Suggest to place equal-value

input capacitors on each side of the IC and as close to the VIN and PGND pins as

possible.

2, 11

VIN

System GND. The power GND of the controller circuit and the regulated output

voltage. Use wide PCB traces to make the connections. AGND and PGND are

connected with a short trace and at only one point to reduce circulating currents.

3, 4, 5, 8, 9, 10 PGND

6, 7

12

SW

Switch node. Connect to the power inductor.

Analog GND. AGND and PGND are connected with a short trace and at only one

point to reduce circulating currents.

AGND

Feedback input. The pin is used to set the output voltage of the converter via a

resistor divider. Suggest to place the FB resistor divider as close to FB pin and

AGND as possible.

13

14

15

FB

SS

EN

Soft-start time control pin. Connect a capacitor between the SS pin and AGND to

set the soft-start time. The default internal start-up time is 1ms without external

capacitor.

IC enable.

RTQ2822A : Internal pull high.

RTQ2822B : Internal pull low.

Open-drain, power-good indication output. It is pulled low if the feed-back voltage

is out of PGOOD threshold, IC shutdown from OTP and EN goes low, and before

the soft start is finished. A pull-up resistor of 10k to 100k is recommended if this

function is used.

16

PGOOD

4.7V internal LDO output. Connect a 4.7F capacitor as close to the VCC pin as

possible. It does not recommend to connect VCC to supply others rails.

17

18

VCC

Switching frequency, current limit selection and light load operation mode selection

pin. Connect this pin to a resistor divider from VCC and AGND for different MODE

options.

MODE

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RTQ2822A/B

Functional Block Diagram

RTQ2822A

PGOOD

VCC

MODE

BOOT

VIN

LDO/

UVLO

MODE

Control

VCC

UV/OV/PG

FB

HSFET

Current Limit

SW

Driver

VIBIAS

V

REF

Minoff

LSFET

AGND

PGND SW

PGND

VCC

Ripple Gen

SW

VIN

+

-

VCC

SW

On Time

COMP

SS

FB

I

SS Control

ENP1

(I

- I

)

ENP2 ENP1

EN

RTQ2822B

PGOOD

VCC

MODE

BOOT

VIN

LDO/

UVLO

MODE

Control

VCC

UV/OV/PG

FB

HSFET

LSFET

Current Limit

SW

Driver

VIBIAS

V

REF

Minoff

AGND

PGND SW

PGND

VCC

Ripple Gen

SW

VIN

+

-

SW

On Time

COMP

SS

FB

SS Control

EN

I

ENDN

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RTQ2822A/B

Operation

for internal chip bias and gate drive for the LSFET. The

gate drive for the HSFET is supplied by a floating supply

(C_BOOT) between the BOOT and SW pins, which is charged

by an internal synchronous diode from VCC. In addition,

an internal charge pump maintains the C_BOOTvoltage is

sufficient to turn-on the HSFET.

The RTQ2822A/B is a high efficiency synchronous step-

down converter utilizes the proprietaryAdvanced Constant

On-Time (ACOT^TM) control architecture. The ultrafast

ACOT^TMcontrol enables the use of small capacitance to

save the PCB size.

During normal operation, the internal high-side power

switch (HSFET) turns on for a fixed interval determined

by a one-shot timer at the beginning of each clock cycle.

When the HSFET turns off, the low-side power switch

(LSFET) turns on. Due to the output capacitor ESR, the

voltage ripple on the output has similar shape as the

inductor current. Via the feedback resistor network, this

voltage ripple compared with the internal reference. When

the minimum off-time one-shot (310ns, max.) has timed

out and the inductor current is below the current limit

threshold, the One-shot is triggered again if the feedback

voltage falls below the feedback reference voltage (0.6V,

typ.). To achieve stable operation with low-ESR ceramic

output capacitors, an internal ramp signal is added to the

feedback reference voltage to simulate the output voltage

ripple. ACOT^TMcontrol architecture features ultrafast

transient response. When a load is suddenly increased,

the output voltage drops quickly, and almost immediately,

a new On-time is triggered, and inductor current rises

again.

To improve efficiency and limit power dissipation in the

VIN, an external voltage that is above the LDO's internal

output voltage can override the internal LDO. When using

an external bias on the VCC rail, any power-up and power-

down sequencing can be applied but it is important to

understand that if there is a discharge path on the VCC

rail that can pull a current higher than the internal LDO's

current limit from the VCC, then the VCC drops below the

UVLO falling threshold and thereby shutting down the

output of the RTQ2822A/B.

Enable, Start-Up, Shutdown and UVLO

The RTQ2822A/B implements Under-Voltage Lock Out

protection (UVLO) to prevent operation without fully turn-

on the internal power MOSFETs. The UVLO monitors the

internal VCC regulator voltage. When the VCC voltage is

lower than UVLO threshold voltage, the device stops

switching. UVLO is non-latching protection.

The EN pin is provided to control the device turn-on and

turn-off. When EN pin voltage is above the turn-on

threshold (V_ENH), the device starts switching and when

Traditional COT controller implements the on-time to be

inversely proportional to input voltage and directly

proportional to the output voltage to achieve pseudo-fixed

frequency over the input voltage range. But even with

defined input and output voltages, a fixed ON time will

mean that frequency will have to increase at higher load

levels to compensate for the power losses in the MOSFETs

and Inductor. ACOT^TMcontrol further added a frequency

locked loop system, which slowly adjusts the ON time to

compensate the power losses, without influencing the fast

transient behavior of the COT topology.

the EN pin voltage falls below the turn-off threshold (V_ENL

)

it stops switching. The EN pin of the RTQ2822A has

internally pull-up with current source. However, the

RTQ2822B internally week pull-down the EN pin.

When appropriate voltages are present on the VIN, VCC,

and EN pins, the RTQ2822A/B will begin switching and

initiate a soft-start ramp of the output voltage. An internal

soft-start ramp of 1.045ms will limit the ramp rate of the

output voltage to prevent excessive input current during

start-up. If a longer ramp time is desired, a capacitor can

be placed from the SS pin to ground. The 6μAcurrent that

is sourced from the SS pin will create a smooth voltage

ramp on the capacitor. If this external ramp rate is slower

than the internal 1.045ms soft-start, the output voltage

will be limited by the ramp rate on the SS pin instead.

Power and Bias Supply

The VIN pins on the RTQ2822A/B are used to supply

voltage to the drain terminal of the internal HSFET. These

pins also supply bias voltage for an internal regulator that

generates 4.7V at VCC. The voltage on VCC pin is used

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RTQ2822A/B

Once both of the external and internal soft-start ramps

have exceeded 0.7V, the output voltage will be in

regulation. The typical external soft start time can be

calculated by the equation below.

Pre-Bias

If there is a residual voltage on output voltage before start-

up, both of the internal HSFET and LSFET are prohibited

switching until the soft start ramp is higher than feedback

voltage. When the soft start ramp cross above the feedback

voltage, switching will begin and the output voltage will

smoothly rise from the pre-biased level to its regulated

target.

t_SSms I

μA









SS

C_SSnF =





V_REF

V





Where I_SS= 6μA, V_REF= 0.6V

When the V_ENis lower than V_ENL, the SS pin voltage is

reset to GND.

Mode Selection for Light Load Operation,

Switching Frequency and Current Limit

VCC

0.7V

MODE pin offers 12 different states of operation as a

combination of Light Load operation, Switching Frequency

and Current Limit. As shown in the Figure 3, use a resistor

divider from VCC toAGNDcan set the MODE pin voltage.

It is important that the voltage for the MODE pin is derived

from the VCC rail only since internally this voltage is

referenced to detect the MODE option. The device reads

the voltage on the MODE pin during start-up and latches

onto one of the MODE options listed below in Table 1.

The MODE pin setting can be reset only by a VIN power

cycling. The two resistors (R_M1and R_M2) are suggested to

use 1% resistors.

I

SS

0.1V

SS

V

SS

C

SS

FB

t

SS

Figure 1. External Soft-Start Time Setting

Figure 2 below shows the typical power-up sequence of

the device when the EN pin voltage crosses the EN Input

rising threshold.After the voltage on VCC pin crosses the

UVLO rising threshold it takes 400μs to read the first

MODE setting and approximately 55μs from there to finish

the last MODE setting. The output voltage starts ramping

after the MODE setting reading is completed.

VCC

C

VCC

RTQ2822A/B

R

M1

M2

MODE

AGND

PGND

V

IN

Figure 3. MODE Connection

V

ENH

V

EN

CC

V

UVLOH

V

When the V

< Internal

MODE

DAC, the Mode is latched.

V

MODE

Mode12

Mode1

Internal DAC

V

OUT

400µs

55µs

t

SS

(1.045ms)

Figure 2. Power Up Sequence

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RTQ2822A/B

Table 1. MODE Setting

Light Load Mode Current Limit

Mode R_M1(k) R_M2(k)

Switching Frequency (kHz)

1

2

300

200

160

120

200

180

150

120

91

5.1

10

20

51

FCCM

DCM

I_{LIM_2}

I_{LIM_1}

I_{LIM_2}

I_{LIM_1}

I_{LIM_2}

I_{LIM_1}

I_{LIM_2}

I_{LIM_1}

I_{LIM_2}

I_{LIM_1}

I_{LIM_2}

I_{LIM_1}

400

3

800

4

800

5

1200

400

6

7

8

DCM

400

9

DCM

800

10

11

12

82

DCM

800

62

DCM

1200

51

DCM

Light Load Operation

on-time is the smallest duration of time in which the high-

side power MOSFET (HSFET) can be in its “on” state.

This time is typically 54ns. In continuous mode operation,

the minimum duty cycle can be estimated by ignoring

component losses as follows

At low load current, the inductor current can drop to zero

and become negative. This is detected by internal zero-

current-detect circuitry which utilizing the LSFET R_DS(ON)

to sense the inductor current. The LSFET is turned off

when the inductor current drops to zero, resulting in

discontinuous operation (DCM). Both power MOSFETs

will remain off with the output capacitor supplying the load

current until the feedback voltage falls below the feedback

reference voltage.DCM operation maintains high efficiency

at light load, while setting MODE to Forced PWM (FCCM)

operation helps meet tight voltage regulation accuracy

requirements.

D_MIN= f_SWt_{ON_MIN}

Where t_{ON_MIN}is the minimum on-time. As the equation

shows, reducing the operating frequency will alleviate the

minimum duty cycle constraint.

The minimum off-time, t_{OFF_MIN}, is the smallest amount of

time that the RTQ2822A/B is capable of turning on the

low-side power MOSFET (LSFET), tripping the current

comparator and turning the power MOSFET back off. This

time is 310ns (max.). The minimum off-time limit imposes

a maximum duty cycle of t_ON/( t_ON+ t_{OFF_MIN}).

Switching Frequency, Minimum On-Time and

Minimum Off-Time

The RTQ2822A/B offers three different switching frequency

of 400kHz, 800kHz and 1200kHz by setting the MODE

pin voltage. Selection of the operating frequency is a trade-

off between efficiency and component size. High frequency

operation allows the use of smaller inductor and capacitor

values. Operation at lower frequencies improves efficiency

by reducing internal gate charge and transition losses,

but requires larger inductance values and/or capacitance

to maintain low output ripple voltage.

Current Limit and Output Under-Voltage Protection

As shown in Table 1, the RTQ2822A/B can operate at two

different current limits I_{LIM_1}and I_{LIM_2}to support an output

continuous current of 12Aand 10Arespectively. The device

cycle-by-cycle compares the valley current of the inductor

against the current limit threshold, hence the output

current will be half the ripple current higher than the valley

current.

The inductor current level is monitored by measuring the

low-side MOSFET voltage between the SW pin andGND,

An additional constraint on operating frequency is the

minimum controllable on-time and off-time. The minimum

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RTQ2822A/B

which is proportional to the switch current, during the on-

time of LSFET. To improve the current measurement

accuracy, temperature compensation is added internally.

If the measured drain to source voltage of the LSFET is

above the voltage proportional to current limit, the LSFET

stays on until the current level becomes lower than the

OCL level which reduces the output current available.

When the current is limited the output voltage tends to

drop because the load demand is higher than what the

converter can support.

a pull-up resistor. The power-good function is activated

after soft-start is finished and is controlled by the feedback

signal V_FB. During soft-start, PGOOD is actively held low

and only allowed to transition high after soft-start is over.

If V_FBrises above a power-good threshold V_{TH_PGLH}

(typically 93% of the target value), the PGOOD pin will be

in high impedance and V_PGOODwill be held high after a

certain delay elapsed. When V_FBdrops by a V_FBfalling

hysteresis ΔV_{TH_PGLH}(typically 9% of the target value) or

exceeds V_FBrising threshold V_{TH_PGHL}typically 116% of

the target value), the PGOOD pin will be pulled low. For

V_FBabove V_FBfalling hysteresis, V_PGOODwill be pulled

high again when V_FBdrops back by a power-good

hysteresis ΔV_{TH_PGHL}(typically 9% of the target value).

Once being started-up, if any protection is triggered (UVP

and OTP) or ENis from high to low, PGOODwill be pulled

to GND. The internal open-drain pull down device with

250Ω resistance will pull the PGOOD pin low. To prevent

unwanted PGOOD glitches during transients or dynamic

VOUT changes, the RTQ2822A/B's PGOODfalling edge

includes a blanking delay of approximately 1μs.

When the output voltage falls below Output UVP Threshold

(V_UVP), the UVP comparator detects it and shuts down

the device to avoid the excessive heat. If the UVP condition

remains for a period of time, a soft-start sequence for

auto-recovery will be initiated. It is shown in Figure 4.

When the overcurrent condition is removed, the output

voltage returns to the regulated value.

V_OUT, 1V/Div

Fault condition removed

Resume normal operation

Output Short

I_L, 10A/Div

V

TH_PGHL

V

 V

TH_PGHL

V

TH_PGLH

V_PGOOD,4V/Div

V

 V

TH_PGLH

V_SW, 10V/Div

V

FB

50ms/Div

V

PGOOD

Figure 4. Current Limit and UVP

Figure 5. The Logic of PGOOD

Similar to the forward overcurrent, the reverse current

protection is realized by monitoring the current across

the low-side MOSFET. When the LSFET current reaches

negative current limit, the synchronous rectifier is turned

off. This limits the ability of the regulator to actively pull-

down on the output.

Output Over-Voltage Protection (OVP)

The RTQ2822A/B provides an over-voltage protection

(OVP), If the FB voltage (V_FB) rises above 121% of the

internal reference voltage, the over-voltage protection is

triggered, the discharging switch from SW toGNDis turned

on to discharge output voltage.

Note. In order to prevent the NOC is triggered on light

load operation, the inductor valley current should be

designed to higher than I_{LIM_NEG}when the MODE selection

is FCCM.

Over-Temperature Protection (OTP)

The RTQ2822A/B monitors the internal die temperature.

If this temperature exceeds the thermal shutdown

threshold value (T_SD, typically 160°C), the RTQ2822A/B

stops switching with SS reset to ground and an internal

discharge switch turns on to quickly discharge the output

Power-Good Output

The PGOOD pin is an open-drain power-good indication

which is connected to an external voltage source through

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RTQ2822A/B

voltage.During start up, if the device temperature is higher

than 160°C the device does not start switching. The device

re-starts switching when the temperature drops more than

15°C (typ.) but the MODE settings are not re-loaded again.

If the temperature continues to rise and above LDO thermal

shutdown threshold (T_{SD_LDO}, typically 171°C), the

converter shuts down completely.

Note that the over temperature protection is intended to

protect the device during momentary overload conditions.

The protection is activated outside of the absolute

maximum range of operation as a secondary fail-safe and

therefore should not be relied upon operationally.

Continuous operation above the specified absolute

maximum operating junction temperature may impair

device reliability or permanently damage the device.

Output Voltage Discharge

An internal 500Ω discharge switch that discharges the

V_OUTthrough SW node during any fault events like OVP,

UVP, OTP , VCC voltage below UVLO and when the EN

pin voltage (V_EN) is below the turn-on threshold.

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RTQ2822A/B

Absolute Maximum Ratings (Note 1)

 Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------- −0.3V to 20V

 Enable Pin Voltage, EN -------------------------------------------------------------------------------------------------- −0.3V to 20V

 Switch Voltage, SW ------------------------------------------------------------------------------------------------------ −0.3V to 20V

SW (t ≤ 100ns)------------------------------------------------------------------------------------------------------------- −5V to 25V

 Boot Voltage, BOOT ------------------------------------------------------------------------------------------------------ −0.3V to 26V

 BOOT to SW (BOOT−SW)---------------------------------------------------------------------------------------------- −0.3V to 6V

 All Other Pins -------------------------------------------------------------------------------------------------------------- −0.3V to 6V

 PowerDissipation, P_D@ T_A= 25°C

VQFN-18L 3.5x3.5 (FC) -------------------------------------------------------------------------------------------------- 3.57W

 Package Thermal Resistance (Note 2)

VQFN-18L 3.5x3.5 (FC), θ_JA-------------------------------------------------------------------------------------------- 28°C/W

VQFN-18L 3.5x3.5 (FC), θ_JC-------------------------------------------------------------------------------------------- 2.7°C/W

 Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C

 Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C

 Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C

 ESD Susceptibility (Note 3)

HBM (Human Body Model)---------------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

 Supply Voltage, VIN ------------------------------------------------------------------------------------------------------ 4.5V to 17V

 Junction Temperature Range-------------------------------------------------------------------------------------------- −40°C to 125°C

Electrical Characteristics

(V_IN= 12V, T_J= −40°C to 125°C, unless otherwise specified.)

Parameter

Input Voltage Range

Supply Current

Symbol

V_IN

Test Conditions

Min

Typ

Max

Unit

4.5

--

17

V

Supply Current (Shutdown)

I_SHDN

I_Q

T_J= 25C, V_EN= 0V

--

7

--

A

T_J= 25C, V_EN= 5V,

non-switching

Supply Current (Quiescent)

600

700

Logic Threshold

EN Input Rising Threshold

EN Input Falling Threshold

EN Hysteresis

V_ENH

V_ENL

V_EN

I_ENP1

I_ENP2

1.175 1.225

1.3

V

1.025 1.104 1.15

--

0.35

3

0.121

2

--

V

V_EN= 1V

2.95

5.5

A

EN Pull-Up Current

RTQ2822A

V_EN= 1.3V

4.2

EN Pull-Down

Current

RTQ2822B I_ENDN

T_J= 25C, V_EN= 2V

--

2.5

--

A

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RTQ2822A/B

Parameter

V_FBVoltage

FB Voltage

Symbol

Test Conditions

Min

Typ

Max

Unit

V_FB

0.594

0.6

0.606

V

R_DS(ON)

High-Side Switch On

Resistance

R_{DS(ON)_H}T_J= 25C, V_CC= 4.7V

R_{DS(ON)_L}T_J= 25C, V_CC= 4.7V

--

9.8

4.5

--

m

Low-Side Switch On

Resistance

Current Limit

I_{LIM_1}

11.73

9.775

13.8

11.5

15.87

Low-Side Switch

Sourcing Current Limit

Valley current

I_{LIM_2}

A

13.225

Low-Side Switch

Negative Current Limit

I_{LIM_NEG}

Valley current

--

4

--

Switching Frequency

f_SW1

f_SW2

f_SW3

T_J= 25C, CCM

--

400

800

--

kHz

Switching Frequency

1200

On-Time Timer Control

V

_IN= 17V, V_OUT= 0.6V,

Minimum On Time

t_{ON_MIN}

--

54

--

ns

f

_SW= 1200kHz

Minimum Off Time

Soft Start

t_{OFF_MIN}

T_J= 25C, V_FB= 0.5V

310

Soft-Start Time

t_SS

Internal soft-start time

--

1.045

6

--

ms

Soft-Start Charge Current I_SS

4.9

7.1

A

UVLO

UVLO Rising Threshold

UVLO Hysteresis

LDO Output

V_UVLOH

V_LDOrising

--

4.3

--

V

V_UVLO

V_LDOhysteresis

730

mV

LDO Output Voltage

V_CC

4.58

50

4.7

--

4.83

200

V

LDO Output Current Limit I_{LIM_LDO}

mA

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RTQ2822A/B

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Output Under-Voltage and Over-Voltage Protections

Output OVP Threshold

Output UVP Threshold

Power Good

V_OVP

V_UVP

OVP detect

UVP detect

--

121

68

--

%V_FB

V_FBrising threshold, PGOOD

from low to high (GOOD)

V_{TH_PGLH}

V_{TH_PGLH}

V_{TH_PGHL}

V_{TH_PGHL}

--

93

9

--

%V_FB

V_FBfalling hysteresis, PGOOD

from high to low (FAULT)

Power Good Threshold

V_FBrising threshold, PGOOD

from high to low (FAULT)

116

9

V_FBfalling hysteresis, PGOOD

from low to high (GOOD)

Thermal Shutdown

Threshold

T_SD

--

160

15

--

C

Thermal Shutdown

Hysteresis

T_HYS

LDO Thermal Shutdown

Threshold

T_{SD_LDO}

171

18

LDO Thermal Shutdown

Hysteresis

T_{SD_LDO}

Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.

These are stress ratings only, and functional operation of the device at these or any other conditions beyond those

indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating

conditions may affect device reliability.

Note 2. θ_JAis measured in the natural convection at T_A= 25°C on a Four-layer Richtek Evaluation Board. θ_JCis measured at the

top of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

©

is a registered trademark of Richtek Technology Corporation.

DSQ2822A/B-01 June 2019

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11

RTQ2822A/B

Typical Application Circuit

C

0.1µF

R

T

BOO

BOOT

0

RTQ2822A/B

2, 11

1

V

IN

L1

0.47µH

VIN

BOOT

4.5V to 17V

C1

0.1µF

C2

0.1µF

C3

22µF

C4

22µF

C5

22µF

C6

22µF

6, 7

V

SW

OUT

1.2V/12A

C10

47µF

C11

47µF

C12

47µF

C13

47µF

R

0

FF

15

EN

Enable Signal

PGOOD

R1

10k

16

R

T

100

PGOOD

C

FF

R

10k

13

14

PGOOD

FB

SS

17

R2

10k

VCC

C

4.7µF

VCC

R

51k

M1

C

SS

18

47nF

MODE

R

51k

M2

AGND

12

PGND

3, 4, 5, 8, 9, 10

Note:

(1) All the input and output capacitors are the suggested values, referring to the effective capacitances, subject to any de-

rating effect, like a DC bias.

(2) Considering the noise immunity when the C_FFis soldered on PCB, it is necessary to add R_T= 100Ω between feedback

network and chip FB pin.

Table 2. Suggested Component Selections for the Application of 400kHz

V_OUT(V)

R1 (k)

0

R2 (k)

L1(H)

0.68

1.2

C_{OUT_MIN}(F)

C_{OUT_TYPICAL}(F)

C_FF(pF)

NC

0.6

1.2

3.3

5

88

188

10

NC

10

45.2

73.2

2.4

100 to 200

3.3

Table 3. Suggested Component Selections for the Application of 800kHz

V_OUT(V)

R1 (k)

0

R2 (k)

L1 (H)

0.47

0.68

1.5

C_{OUT_MIN}(F)

C_{OUT_ TYPICAL}(F)

C_FF(pF)

NC

0.6

1.2

3.3

5

88

188

10

NC

10

45.2

73.2

100 to 200

2.4

Table 4. Suggested Component Selections for the Application of 1200kHz

V_OUT(V)

R1 (k)

0

R2 (k)

L1 (H)

0.33

0.47

1.2

C_{OUT_MIN}(F)

C_{OUT_ TYPICAL}(F)

C_FF(pF)

NC

0.6

1.2

3.3

5

88

188

10

NC

10

45.2

73.2

100 to 200

1.5

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Table 5. Suggested Inductors for Typical Application Circuit

Component

Supplier

Inductance (H)

Part No.

I_SAT(A)

DCR (m)

Dimensions (mm)

0.47

0.68

1.2

744314047

744311068

744325120

7443552150

744325240

744325330

20

25

17

15

1.35

3.1

7.0 x 7.0 x 5.0

7.0 x 7.0 x 4.0

10.5 x 10.5 x 5

10.5 x 10.5 x 4

10.5 x 10.5 x 5

WE-HCI

1.8

1.5

5.3

2.4

4.75

5.9

3.3

Table 6. Suggested Capacitor for Typical Application Circuit

Capacitance (F)

Part No.

Case Size

0805

Component Supplier

22

47

C2012X5R1V226M125AC

GRM21BR61A476ME15

GRM31CR61C476ME44

GRM188R61E475KE11

C1608X7R1H104K080AA

TDK

Murata

TDK

0805

47

1206

4.7

0.1

0603

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13

RTQ2822A/B

Typical Operating Characteristics

Efficiency vs. Output Current

95

90

85

80

75

70

65

60

90

85

80

f_SW= 400kHz, L = WE-744325120, 1.2μH

f

_SW= 800kHz, L = WE-744311068, 0.68μH

75

70

65

60

f_SW= 400kHz, L = WE-744325120, 1.2μH

_SW= 800kHz, L = WE-744311068, 0.68μH

_SW= 1200kHz, L = WE-744314047, 0.47μH

f_SW= 1200kHz, L = WE-744314047, 0.47μH

f

V_IN= 12V, V_OUT= 1.2V, Mode = FPWM

V_IN= 12V, V_OUT= 1.2V, Mode = DCM

0

1

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

f_SW= 400kHz, L = WE-744325240, 2.4μH

f_SW= 800kHz, L = WE-7443552150, 1.5μH

f_SW= 1200kHz, L = WE-744325120, 1.2μH

f_SW= 400kHz, L = WE-744325240, 2.4μH

f_SW= 800kHz, L = WE-7443552150, 1.5μH

f_SW= 1200kHz, L = WE-744325120, 1.2μH

V_IN= 12V, V_OUT= 3.3V, Mode = FPWM

V_IN= 12V, V_OUT= 3.3V, Mode = DCM

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

f_SW= 400kHz, L = WE-744325330, 3.3μH

f_SW= 800kHz, L = WE-744325240, 2.4μH

_SW= 1200kHz, L = WE-7443552150, 1.5μH

f_SW= 400kHz, L = WE-744325330, 3.3μH

f_SW= 800kHz, L = WE-744325240, 2.4μH

_SW= 1200kHz, L = WE-7443552150, 1.5μH

f

V_IN= 12V, V_OUT= 5.5V, Mode = DCM

V_IN= 12V, V_OUT= 5.5V, Mode = FPWM

0

1

2

3

4

5

6

7

8

9

10 11 12

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 4.5V

V_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 17V

V_IN= 4.5V

V_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 400kHz, V_OUT= 1.2V, Mode = DCM

L = WE-744325120, 1.2μH

f_SW= 400kHz, V_OUT= 1.2V, Mode = FPWM

L = WE-744325120, 1.2μH

0

1

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 4.5V

V_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 17V

V

_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 800kHz, V_OUT= 1.2V, Mode = FPWM

L = WE-744311068, 0.68μH

f_SW= 800kHz, V_OUT= 1.2V, Mode = DCM

L = WE-744311068, 0.68μH

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 4.5V

V_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 4.5V

V

V_IN= 12V

V_IN= 15V

_IN= 7V

f_SW= 1200kHz, V_OUT= 1.2V, Mode = FPWM

L = WE-744314047, 0.47μH

f_SW= 1200kHz, V_OUT= 1.2V, Mode = DCM

L = WE-744314047, 0.47μH

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

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RTQ2822A/B

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 17V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 400kHz, V_OUT= 3.3V, Mode = DCM

L = WE-744325240, 2.4μH

f_SW= 400kHz, V_OUT= 3.3V, Mode = FPWM

L = WE-744325240, 2.4μH

0

1

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 17V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 800kHz, V_OUT= 3.3V, Mode = FPWM

L = WE-7443552150, 1.5μH

f_SW= 800kHz, V_OUT= 3.3V, Mode = DCM

L = WE-7443552150, 1.5μH

2

3

4

5

6

7

8

9

10 11 12

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 17V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 1200kHz, V_OUT= 3.3V, Mode = FPWM

L = WE-744325120, 1.2μH

f_SW= 1200kHz, V_OUT= 3.3V, Mode = DCM

L = WE-744325120, 1.2μH

2

3

4

5

6

7

8

9

10 11 12

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 12V

V_IN= 15V

V_IN= 17V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 400kHz, V_OUT= 5.5V, Mode = DCM

L = WE-744325330, 3.3μH

f_SW= 400kHz, V_OUT= 5.5V, Mode = FPWM

L = WE-744325330, 3.3μH

0

1

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 12V

V_IN= 15V

V_IN= 17V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 800kHz, V_OUT= 5.5V, Mode = DCM

L = WE-744325240, 2.4μH

f_SW= 800kHz, V_OUT= 5.5V, Mode = FPWM

L = WE-744325240, 2.4μH

0

1

2

3

4

5

6

7

8

9

10 11 12

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Efficiency vs. Output Current

100

95

90

85

80

75

70

65

60

100

95

90

85

80

75

70

65

60

V_IN= 12V

V_IN= 15V

V_IN= 17V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 1200kHz, V_OUT= 5.5V, Mode = FPWM

f_SW= 1200kHz, V_OUT= 5.5V, Mode = DCM

L = WE-7443552150, 1.5μH

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

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RTQ2822A/B

Output Voltage vs. Input Voltage

Output Voltage vs. Output Current

1.202

1.201

1.200

1.199

1.198

1.197

1.196

1.195

1.194

1.193

1.192

1.200

1.199

1.198

1.197

1.196

1.195

1.194

1.193

1.192

1.191

1.190

V_IN= 4.5V

V_IN= 7V

V_IN= 12V

V_IN= 15V

V_IN= 17V

f_SW= 800kHz, V_OUT= 1.2V, I_OUT= 6A,

Mode = FPWM

f_SW= 800kHz, V_OUT= 1.2V, Mode = FPWM

0

1

2

3

4

5

6

7

8

9

10 11 12

4

5

6

7

8

9

10 11 12 13 14 15 16 17

Input Voltage (V)

Output Current (A)

Output Voltage vs. Input Voltage

3.320

3.318

3.316

3.314

3.312

3.310

3.308

3.306

3.304

3.302

3.300

5.525

5.524

5.523

5.522

5.521

5.520

5.519

5.518

5.517

5.516

5.515

f_SW= 800kHz, V_OUT= 3.3V, I_OUT= 6A,

Mode = FPWM

f_SW= 800kHz, V_OUT= 5.5V, I_OUT= 6A,

Mode = FPWM

4

5

6

7

8

9

10 11 12 13 14 15 16 17

8

9

10

11

12

13

14

15

16

17

Input Voltage (V)

Input Voltage (A)

Switching Frequency vs. Output Current

450

440

430

420

410

400

390

380

370

360

350

880

860

840

820

800

780

760

740

720

V_IN= 12V, V_OUT= 1.2V, f_SW= 800kHz

V_IN= 12V, V_OUT= 1.2V, f_SW= 400kHz

0

1

2

3

4

5

6

7

8

9

10 11 12

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Switching Frequency vs. Temperature

Switching Frequency vs. Output Current

450

440

430

420

410

400

390

380

370

360

350

1400

1380

1360

1340

1320

1300

1280

1260

1240

1220

1200

V_IN= 12V, V_OUT= 1.2V, f_SW= 400kHz

V_IN= 12V, V_OUT= 1.2V, f_SW= 1200kHz

-50

-25

0

25

50

75

100

125

0

1

2

3

4

5

6

7

8

9

10 11 12

Output Current (A)

Temperature (°C)

Switching Frequency vs. Temperature

900

890

880

870

860

850

840

830

820

810

800

1400

1380

1360

1340

1320

1300

1280

1260

1240

1220

1200

V_IN= 12V, V_OUT= 1.2V, f_SW= 1200kHz

V_IN= 12V, V_OUT= 1.2V, f_SW= 800kHz

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (°C)

Quiescent Current vs. Temperature

Shutdown Current vs. Temperature

700

680

660

640

620

600

580

560

540

520

500

30

25

20

15

10

5

V_IN= 12V, V_OUT= 1.2V

50 75 100 125

V_IN= 12V, V_OUT= 1.2V

50 75 100 125

0

-50

-25

0

25

-50

-25

0

25

Temperature (°C)

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RTQ2822A/B

UVLO Threshold vs. Temperature

Enable Threshold vs. Temperature

4.6

4.4

4.2

4.0

3.8

3.6

3.4

3.2

3.0

1.30

1.25

1.20

1.15

1.10

1.05

1.00

UVLO Rising

UVLO Falling

EN Rising

EN Falling

V_IN= 12V, V_OUT= 1.2V

50 75 100 125

-50

-25

0

25

-50

-25

0

25

50

75

100

125

Temperature (°C)

Feedback Voltage vs. Temperature

Current Limit Threshold vs. Temperature

0.605

0.604

0.603

0.602

0.601

0.600

0.599

0.598

0.597

0.596

0.595

15

ILIM-1

14

13

12

11

10

9

ILIM-2

V_IN= 12V

100 125

V_IN= 12V, V_OUT= 1.2V

8

-50

-25

0

25

50

75

-50

-25

0

25

50

75

100

125

Temperature (°C)

Load Transient Response

V_OUT

(50mV/Div)

V_OUT

(50mV/Div)

V_IN= 12V, V_OUT= 1.2V, f_SW= 800k

L = 0.68μH, C_OUT= 47μF x 4

_OUT= 0A to 10A, T_R= T_F= 10μs, Mode = FPWM

V_IN= 12V, V_OUT= 1.2V, f_SW= 800kHz

L = 0.68μH, C_OUT= 47μF x 4

_OUT= 0A to 10A, T_R= T_F= 10μs, Mode = DCM

I

I_OUT

(5A/Div)

I_OUT

(5A/Div)

Time (100μs/Div)

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Output Ripple Voltage

V_OUT

(10mV/Div)

V_OUT

(10mV/Div)

V_IN= 12V, V_OUT= 1.2V, f_SW= 800k, I_OUT= 12A

V_IN= 12V, V_OUT= 1.2V, f_SW= 800k, I_OUT= 10mA

L = 0.68μH, C_OUT= 47μF x 4, Mode = FPWM

L = 0.68μH, C_OUT= 47μF x 4, Mode = DCM

V_SW

(5V/Div)

V_SW

(5V/Div)

Time (200μs/Div)

Time (1μs/Div)

Output Ripple Voltage

V_OUT

(10mV/Div)

V_OUT

(10mV/Div)

V_IN= 12V, V_OUT= 3.3V, f_SW= 800k, I_OUT= 12A

V_IN= 12V, V_OUT= 3.3V, f_SW= 800k, I_OUT=10mA

L = 1.5μH, C_OUT= 47μF x 4, Mode = FPWM

L = 1.5μH, C_OUT= 47μF x 4, Mode = DCM

V_SW

(5V/Div)

V_SW

(5V/Div)

Time (500μs/Div)

Time (2μs/Div)

Output Ripple Voltage

V_OUT

(10mV/Div)

V_OUT

(10mV/Div)

V_IN= 12V, V_OUT= 5.5V, f_SW= 800k, I_OUT=10mA

V_IN= 12V, V_OUT= 5.5V, f_SW= 800k, I_OUT= 12A

L = 2.4μH, C_OUT= 47μF x 4, Mode = FPWM

L = 2.4μH, C_OUT= 47μF x 4, Mode = DCM

V_SW

(5V/Div)

V_SW

(5V/Div)

Time (100μs/Div)

Time (1μs/Div)

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RTQ2822A/B

Power On from EN

Power Off from EN

V_OUT

(500mV/Div)

V_OUT

(500mV/Div)

V_PGOOD

(5V/Div)

V_PGOOD

(5V/Div)

V_IN= 12V, V_OUT= 1.2V, I_OUT= 6A

V_EN

(2V/Div)

V_EN

(2V/Div)

V_IN= 12V, V_OUT= 1.2V, I_OUT= 6A

V_SW

(10V/Div)

V_SW

(10V/Div)

Time (50μs/Div)

Time (2ms/Div)

Power On from VIN

Power Off from VIN

V_OUT

(500mV/Div)

V_OUT

(500mV/Div)

V_IN= 12V, V_OUT= 1.2V, I_OUT= 6A

V_PGOOD

(5V/Div)

V_PGOOD

(3V/Div)

V_IN= 12V, V_OUT= 1.2V, I_OUT= 6A

V_IN

(10V/Div)

V_IN

(10V/Div)

V_SW

(10V/Div)

V_SW

(10V/Div)

Time (10ms/Div)

Time (2ms/Div)

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Application Information

A general RTQ2822A/B application circuit is shown in

typical application circuit section. External component

selection is largely driven by the load requirement and

begins with the selection of the operating frequency and

light load operating mode by setting the MODE pin voltage.

Next, the inductor L is chosen and then the input capacitor

C_IN, the output capacitor C_OUT, the internal regulator

capacitor C_VCC, and the bootstrap capacitor C_BOOT, can be

selected. Next, feedback resistors are selected to set the

desired output voltage. Finally, the remaining optional

external components can be selected for functions such

as the EN and UVLO threshold, external soft-start time,

and PGOOD.

Larger inductance values result in lower output ripple

voltage and higher efficiency, but a slightly degraded

transient response. Lower inductance values allow for

smaller case size, but the increased ripple lowers the

effective current limit threshold and increases the AC

losses in the inductor. To enhance the efficiency, choose

a low-loss inductor having the lowest possible DC

resistance that fits in the allotted dimensions. The inductor

value determines not only the ripple current but also the

load-current value at whichDCM/CCM switchover occurs.

The inductor selected should have a saturation current

rating greater than the peak current limit of the device.

The core must be large enough not to saturate at the

peak inductor current (I_{L_PEAK}) :

Switching Frequency and MODE Selection

V

OUT

 V  V

IN OUT





I =

L

Switching Frequency, current limit and switching mode

(DCM or FCCM) are set by a voltage divider from, and is

only from, VCC to GND connected to the MODE pin.

Selection of the operating frequency is a trade-off between

efficiency and component size. High frequency operation

allows the use of smaller inductor and capacitor values.

Operation at lower frequencies improves efficiency by

reducing internal gate charge and transition losses, but

requires larger inductance values and/or capacitance to

maintain low output ripple voltage.

V f

L

IN SW

1

2

I_{L_PEAK}= I_{OUT_MAX}

+

I_L

The current flowing through the inductor is the inductor

ripple current plus the output current. During power up,

faults or transient load conditions, the inductor current

can increase above the calculated peak inductor current

level calculated above. In transient conditions, the inductor

current can increase up to the switch current limit of the

device. For this reason, the most conservative approach

is to specify an inductor with a saturation current rating

equal to or greater than the switch current limit rather

than the peak inductor current.

Inductor Selection

The inductor selection trade-offs among size, cost,

efficiency, and transient response requirements.Generally,

three key inductor parameters are specified for operation

with the device: inductance value (L), inductor saturation

current (I_SAT), andDC resistance (DCR).

Input Capacitor Selection

Input capacitance, C_IN, is needed to filter the pulsating

current at the drain of the high-side power MOSFET. C_IN

should be sized to do this without causing a large variation

in input voltage. The peak-to-peak voltage ripple on input

Agood compromise between size and loss is a 30% peak-

to-peak ripple current ΔI_Lto the IC rated current. The

switching frequency, input voltage, output voltage, and

selected inductor ripple current determines the inductor

value as follows :

capacitor can be estimated as equation below :

1D

IN SW

V

= DI



+ I

ESR

CIN

OUT

C

 f

Where

D =

V

 V  V

IN OUT





OUT

L =

V

OUT

V f

I

L

IN SW

V η

IN

For ceramic capacitors, the equivalent series resistance

(ESR) is very low, the ripple which is caused by ESR can

be ignored, and the minimum input capacitance can be

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23

RTQ2822A/B

estimated as equation below :

The input capacitor should be placed as close as possible

to the VIN pins, with a low inductance connection to the

PGNDof the IC. In addition to a larger bulk capacitor, two

small ceramic capacitors of 0.1μF should be placed close

to the part; one at the VIN1/PGND1 pins and a second at

VIN2/PGND2 pins. These capacitors should be 0402 or

0603 in size.

D 1D





C

IN_MIN

= I



OUT_MAX

V

 f

CIN_MAX SW

Where ΔV_{CIN_MAX}= 2 00mV for typical application (V_IN>

7V)

V

CIN

C

Ripple Voltage

IN

Output Capacitor Selection

V

= D x I

x ESR

OUT

ESR

The selection of C_OUTis determined by considering to

satisfy the voltage ripple, the transient loads and to ensure

that control loop is stable. Loop stability can be checked

by viewing the load transient response. The peak-to-peak

output ripple, ΔV_OUT, is characterized by two components,

which are ESR ripple ΔV_{P−P_ESR}and capacitive ripple

ΔV_{P−P_C}, can be expressed as below :

(1-D) x I

OUT

C

Ripple Current

IN

D x I

OUT

D x t_SW

(1-D) x t_SW

Figure 6. C_INRipple Voltage and Ripple Current

V_OUT= V_{PP_ESR}+ V_{PP_C}

In addition, the input capacitor needs to have a very low

ESR and must be rated to handle the worst-case RMS

input current of :

V_{PP_ESR}= I_LR_ESR

I_L

V_{PP_C}

=

8C_OUTf_SW

V

IN

V

OUT

Where the ΔI_Lis the peak-to-peak inductor ripple current

and R_ESRis the equivalent series resistance of C_OUT. The

output ripple is highest at maximum input voltage since

ΔI_Lincreases with input voltage. Multiple capacitors placed

in parallel may be needed to meet the ESR and RMS

current handling requirements.

I

 I



1

RMS

OUT_MAX

IN

It is commonly to use the worse I_RMS≅ I_OUT/2 at V_IN=

2V_OUTfor design. Note that ripple current ratings from

capacitor manufacturers are often based on only 2000

hours of life which makes it advisable to further de-rate

the capacitor, or choose a capacitor rated at a higher

temperature than required.

Regarding to the transient loads, the V_SAGand V_SOAR

requirement should be taken into consideration for

choosing the output capacitance value. The amount of

output sag is a function of the maximum duty factor, which

can be calculated from the on-time and minimum off-time.

Several capacitors may also be paralleled to meet size,

height and thermal requirements in the design. For low

input voltage applications, sufficient bulk input capacitance

is needed to minimize transient effects during output load

changes.

V

OUT

t

=

ON

V f

IN SW

t

ON

Ceramic capacitors are ideal for switching regulator

applications due to its small, robust and very low ESR.

However, care must be taken when these capacitors are

used at the input. A ceramic input capacitor combined

with trace or cable inductance forms a high quality (under

damped) tank circuit. If the RTQ2822A/B circuit is plugged

into a live supply, the input voltage can ring to twice its

nominal value, possibly exceeding the device's rating. This

situation is easily avoided by placing the low ESR ceramic

input capacitor in parallel with a bulk capacitor with higher

ESR to damp the voltage ringing.

D

=

MAX

t

+ t

OFF_MIN

ON

The worst-case output sag voltage can be determined by :

2

L I





L_PEAK

V_{OUT_SAG}

=

2C_OUT V_IND_MAX V_OUT





The amount of overshoot due to stored inductor energy

when the load is removed can be calculated as :

2

L I

2C





L_PEAK

V

=

OUT_SOAR

 V

OUT

Ceramic capacitors have very low equivalent series

resistance (ESR) and provide the best ripple performance.

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Be careful to consider the voltage coefficient of ceramic

capacitors when choosing the value and case size. Most

ceramic capacitors lose 50% or more of their rated value

when used near their rated voltage.

that the BOOT voltage V_BOOTmust be lower than 5.5V.

The figure 8 shows the efficiency with/without an external

5V supply.

5V

D

BOOT

Internal VCC Regulator

R

BOOT

Good bypassing at VCC pin is necessary to supply the

high transient currents required by the power MOSFET

gate drivers. Place a low ESR MLCC capacitor with

capacitance ≥ 4.7μF (or effective capacitance ≥ 1.5μF) as

close as possible to VCC pin, the rated voltage of C_VCC

should be higher than 10V with 0603 or 0402 in size.

C

0.1µF

BOOT

RTQ2822A/B

SW

Figure 7. External Bootstrap Diode and Resistor at the

BOOT Pin

96

94

92

Applications with high input voltage and high switching

frequency will increase die temperature because of the

higher power dissipation across the LDO. Do not connect

VCC to provide power to other devices or loads.

90

88

86

84

82

80

With External 5V

Without External 5V

HSFET Bootstrap Driver Supply

The bootstrap capacitor (C_BOOT) between BOOT pin and

SW pin is used to create a voltage rail above the applied

input voltage, VIN. Specifically, the bootstrap capacitor is

charged through an internal MOSFET switch to a voltage

equal to approximately V_VCCeach time the LSFET is

turned on. The charge on this capacitor is then used to

supply the required current during the remainder of the

switching cycle.

V_IN= 4.5V, V_OUT= 1.2V with BAT54

4.0 6.0 8.0 10.0 12.0

0.0

2.0

Output Current (A)

Figure 8. Efficiency Comparison with/without external

5V supply

The selection of C_BOOTconsiders the voltage variation

allowed on the high-side MOSFET driver after turn-on.

Choose ΔV_BOOTsuch that the available gate-drive voltage

is not significantly degraded when determining C_BOOT. A

typical range of ΔV_BOOTis 100mV to 300mV. The bootstrap

capacitor should be a low-ESR ceramic capacitor. For most

applications a 0.1μF ceramic capacitor with X5R or better

grade dielectric is recommended. The capacitor should

have a 10V or higher voltage rating.

EMI issue is worse when the switch is turned on rapidly

due to high di/dt noises induced. In some cases, it is

desirable to reduce EMI further, even at the expense of

some additional power dissipation. The turn-on rate of the

high-side switch can be slowed by placing a small (< 20Ω)

resistor between the BOOT pin and the external bootstrap

capacitor. This will slow down the rates of the high-side

switch turn-on and the rise of V_SW. The recommended

application circuit is shown in Figure 8, which includes an

external bootstrap diode for charging the bootstrap

capacitor and a bootstrap resistor R_BOOTbeing placed

between the BOOT pin and the capacitor/diode connection.

It is recommended to add an external bootstrap Schottky

diode between an external 5Vvoltage supply and the BOOT

pin as shown in Figure 7 to improve enhancement of the

internal MOSFET switch and improve efficiency when the

input voltage, V_IN, is below 5V. The bootstrap Schottky

diode can be a low-cost one, such as BAT54. The external

5V can be a fixed 5V voltage supply from the system, or

a 5V output voltage generated by the RTQ2822A/B. Note

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RTQ2822A/B

Output Voltage Programming

Figure 10, adding a feedforward capacitor (C_FF) across

the upper feedback resistor is recommended. This

increases the damping of the control system.

The output voltage is set by an external resistive divider

according to the following equation :

R1

R2











L

V_OUT= V_REF 1 +



SW

V

OUT

C

OUT

V

C

RTQ2822A/B

OUT

FF

R1

R2

FB

R1

GND

FB

RTQ2822A/B

R2

Figure 10. Feedback Loop with Feedforward Capacitor

GND

Loop stability can be checked by viewing the load transient

response. A load step with a speed that exceeds the

converter bandwidth must be applied. For ACOT^TM, loop

bandwidth can be in the order of 100 to 200kHz, so a load

Figure 9. Output Voltage Setting

For a given R2, the resistance of R1 can be calculated as

below :



step with 500ns maximum rise time (di/dt 2A/μs) ensures

R2 V

 V

REF





OUT

R1 =

the excitation frequency is sufficient. It is important that

the converter operates in PWM mode, outside the light

load efficiency range, and below any current limit threshold.

A load transient from 30% to 60% of maximum load is

reasonable which is shown in Figure 11.

V

REF

1% resistors are recommended to maintain output voltage

accuracy. The total resistance of the FB resistor divider

should be selected to be as large as possible when good

low load efficiency is desired: The resistor divider

generates a small load on the output, which should be

minimized to optimize the quiescent current at low loads.

Place resistors R1 and R2 very close to the FB pin to

minimize PCB trace length and noise. Great care should

be taken to route the FB trace away from noise sources,

such as the inductor or the SW trace. To improve frequency

response, a feed-forward capacitor (C_FF) may be used.

f

CO

60% Load

30% Load

Feedforward Capacitor (C_FF)

Figure 11. Example of Measuring the Converter BW by

Fast Load Transient

The RTQ2822A/B is optimized for low duty-cycle

applications and the control loop is stable with low ESR

ceramic output capacitors. In higher duty-cycle

applications (higher output voltages or lower input voltage),

the internal ripple signal will increase in amplitude. Before

the ACOT^TMcontrol loop can react to an output voltage

fluctuation, the voltage change on the feedback signal must

exceed the internal ripple amplitude. Because of the large

internal ripple in this condition, the response may become

too slow, and may show an under-damped response. This

can cause some ringing in the output, and is especially

visible at higher output voltage applications like 12V to

5V where duty-cycle is high and the feedback network

attenuation is large, adding to the delay. As shown in

C_FFcan be calculated basing on below equation :

1







C

=



+

FF





2 BW

R1 R1 R2



Figure 12. shows the transient performance with and

without feedfoward capacitor.

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Enable

V

EN

V

ENH

RTQ2822A

Enable

Q1

V

ENL

V

EN

GND

V

OUT

Figure 14. Logic Control for the EN Pin

Figure 15 shows the internal block of the RTQ2822A EN

pin. A resistor divider between VIN and EN can set a

different turn-on (V_START) and turn-off thresholds (V_STOP

)

respectively. The EN pin has a pull-up current I_ENP1that

sets the default state of the pin when it is floating. This

current increases to I_ENP2when the ENpin voltage crosses

the turn-on threshold. The UVLO thresholds can be set

as below :

Figure 12. Load Transient Response With and Without

Feedforward Capactior

Note that, after defining the C_FFplease also check the

load regulation, because feedforward capacitor might inject

an offset voltage into V_OUTto cause V_OUTinaccuracy. If

the output voltage is over specification caused by

calculated C_FF, please decrease the value of feedforward

capacitor C_FF.

RTQ2822A

VCC

V

VCC

START

VIN

V

STOP

I

ENP1

V

IN

R

EN1

V

ENH

V

ENL

(I

- I )

ENP2 ENP1

V

EN

Enable and Adjustable UVLO

R

EN2

V

OUT

The ENpin controls the turn-on and turn-off of the device.

When EN pin voltage is above the turn-on threshold (V_ENH),

the device starts switching, and it stop switching when

the EN pin voltage falls below the turn-off threshold (V_ENL).

The EN pin of the RTQ2822A has internally pull-up with

current source. However, the RTQ2822B internally week

pull-down the EN pin. Figure 13. shows example if an

enable time delay is required.

Figure 15. Adjustable VIN UVLO

V_ENL

V_START



 V_STOP

V_ENH

R_EN1

=





V_ENL

I

1

+ I_ENP2I_ENP1





_ENP1





V_{ENH }

R

 V

ENH

EN1

R

EN2

V

+ R

I

 V





START

EN1 ENP1 ENH

R

EN

V

CNTL

EN

RTQ2822A/B

GND

V

CNTL

Where

V

ENH

C

EN

V

ENL

I_ENP2= 4.2μA

I_ENP1= 2μA

V

EN

V

OUT

V_ENL= 1.104V

V_ENH= 1.225V

Figure 13. Enable Timing Control

Figure 14 shows examples of configurations for driving

the EN pin from logic.

Thermal Consideration

In many applications, the RTQ2822A/B does not generate

much heat due to its high efficiency and low thermal

resistance of its flip-chip VQFN-18L 3.5x3.5 package.

However, in applications which the RTQ2822A/B is running

at a high ambient temperature, high input voltage and high

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RTQ2822A/B

switching frequency, the generated heat may exceed the

maximum junction temperature of the part.

As an example, consider the case when the

RTQ2822A/B is used in applications where V_IN= 12V,

I_OUT= 12A, f_SW= 800kHz, V_OUT= 1.2V.

The junction temperature should never exceed the

absolute maximum junction temperature listed under

Absolute Maximum Ratings, to avoid permanent damage

to the device. If the junction temperature reaches

approximately 160°C, the RTQ2822A/B stop switching the

power MOSFETs until the temperature drops about 15°C

cooler.

The efficiency at 1.2V, 12A is 84% by using WE-

744311068 (0.68μH, 3.1mΩ DCR) as the inductor and

measured at room temperature. The core loss 0.125W

can be obtained from its website. In this case, the power

dissipation of the RTQ2822A/B is

1 η

η

P_{D, RT}

=

P_OUT I²DCR + P_CORE= 2.17W





O

The maximum power dissipation can be calculated by

the following formula :

Considering the θ_{JA(EFFECTIVE)}is 33.6°C/W by using the

RTQ2822A/B evaluation board with 4 layers PCB and 2oz

copper thickness, the junction temperature of the regulator

operating in a 25°C ambient temperature is approximately :

P

= T



 T / θ

A



D MAX

J MAX



JA EFFECTIVE





Where

T_J= 2.17W  33.6C/W + 25C = 98C

T_J(MAX)is the maximum allowed junction temperature of

the die. For recommended operating condition

specifications, the maximum junction temperature is

125°C. T_Ais the ambient operating temperature,

θ_{JA(EFFECTIVE)}is the system-level junction to ambient

thermal resistance. It can be estimated from thermal

modeling or measurements in the system.

Layout Guideline

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the RTQ2822A/B :

 Four-layer or six-layer PCB with maximum ground plane

is strongly recommended for good thermal performance.

The device thermal resistance depends strongly on the

surrounding PCB layout and can be improved by providing

a heat sink of surrounding copper ground. The addition of

backside copper with thermal vias, stiffeners, and other

enhancements can also help reduce thermal resistance.

 Keep the traces of the main current paths wide and

short.

 VIN pins should have equal input capacitors on each

side of IC. Place these input capacitors as close to VIN

pins as possible.

Table 7 shows the simulated thermal resistance of the

RTQ2822A/B which is mounted on PCB with difference

tack-up and copper thickness. The layout of thermal model

refers to the RTQ2822A/B evaluation board.

 Place the VCC decoupling capacitor, C_VCC, as close to

VCC pin as possible.

 Place bootstrap capacitor, C_BOOT, as close to IC as

Table 7. Simulated Thermal Resistance with

Difference Tack-Up and Copper Thickness

possible. Routing the trace with width of 20mil or wider.

 Place multiple vias under the device near VINand PGND

and near input capacitors to reduce parasitic inductance

and improve thermal performance. To keep thermal

resistance low, extend the ground plane as much as

possible, and add thermal vias under and near the

RTQ2822A/B to additional ground planes within the

circuit board and on the bottom side.

Simulated _JA

4 Layer with 2oz copper

4 Layer with 1oz copper

2 Layer with 1oz copper

θ_JA(C/W)

28

40

52.5

 The high frequency switching nodes, SW and BOOT,

should be as small as possible. Keep analog

components away from the SW and BOOT nodes.

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DSQ2822A/B-01 June 2019

RTQ2822A/B

 Connect the feedback sense network behind via of output

capacitor.

 Place the feedback components R1/R2/C_FFnear the

IC.

 The ground connection between analog ground and power

ground should be close to IC to minimum the ground

current loops. If there is only one ground plane, it should

keep enough isolation between analog return signals

and high power signals.

Figure 16 is the layout example which uses 3"x3" (76mm

x76mm), four-layer PCB with 2oz copper.

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RTQ2822A/B

Power Good Indicator

Open-Drain Output.

R2

R_GPOOD

C_VCC

C_SS

R1 C_FF

The feedback components

must be connected as close

to the device as possible.

Keep sensitive components

away from this C8

C_BOOT

BOOT

VIN

AGND

VIN

C3

C5

C1

C6

C4

C2

PGND

Input capacitor must be placed

as close to IC VIN-GND as possible

Add extra vias for thermal consideration

SW should be connected to inductor by

wide and short trace. Keep sensitive

components away from this trace .

L1

Top Layer

Figure 16. LayoutGuide (Top Layer)

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DSQ2822A/B-01 June 2019

RTQ2822A/B

Outline Dimension

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

0.800

0.000

0.175

0.200

0.250

0.350

3.400

Max

1.000

0.050

0.250

0.300

0.350

0.450

3.600

Min

0.031

0.000

0.007

0.008

0.010

0.014

0.134

Max

0.039

0.002

0.010

0.012

0.014

0.018

0.142

A

A1

A3

b

b1

b2

D

E

e

0.500

0.575

0.650

0.550

0.600

0.020

0.023

0.026

0.022

0.024

e1

e2

e3

e4

L

0.350

0.900

2.350

0.450

1.000

2.450

0.014

0.035

0.093

0.018

0.039

0.096

L1

L2

V-Type 18L QFN 3.5x3.5 (FC) Package

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RTQ2822A/B

Footprint Information

Package

V/W/U/XQFN3.5x3.5-18(FC)

Number of Pin

18

Tolerance

±0.05

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1^stStreet, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify

that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek

product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;

nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent

or patent rights of Richtek or its subsidiaries.

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32

DSQ2822A/B-01 June 2019


型号：	RTQ2822B
厂家：	RICHTEK TECHNOLOGY CORPORATION
描述：	暂无描述
文件：	总32页 (文件大小：672K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

RTQ2822B [RICHTEK]

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