74FCT162374ETPVG [ROCHESTER]

FCT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, GREEN, SSOP-48;
74FCT162374ETPVG
型号: 74FCT162374ETPVG
厂家: Rochester Electronics    Rochester Electronics
描述:

FCT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, GREEN, SSOP-48

驱动 光电二极管 输出元件 逻辑集成电路
文件: 总8页 (文件大小:757K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
FAST CMOS 16-BIT  
REGISTER (3-STATE)  
IDT74FCT162374AT/CT/ET  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
High-speed, low-power CMOS replacement for ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
Low input and output leakage 1µA (max.)  
VCC = 5V ±10%  
• Balanced Output Drivers: ±24mA  
• Reduced system switching noise  
Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,  
TA = 25°C  
The FCT162374T 16-bit edge-triggered D-type registers are built using  
advanced dual metal CMOS technology. These high-speed, low-power  
registers are ideal for use as buffer registers for data synchronization and  
storage.TheOutputEnable(xOE)andclock(xCLK)controlsareorganizedto  
operateeachdeviceastwo8-bitregistersorone16-bitregisterwithcommon  
clock. Flow-throughorganizationofsignalpinssimplifieslayout.Allinputsare  
designedwithhysteresisforimprovednoisemargin.  
TheFCT162374Thasbalancedoutputdrivewithcurrentlimitingresistors.  
Thisofferslowgroundbounce,minimalundershoot,andcontrolledoutput fall  
times–reducing the need for external series terminating resistors.The  
FCT162374Tareplug-inreplacementsfortheFCT16374TandABT16374for  
on-boardbusinterfaceapplications.  
Available in SSOP and TSSOP packages  
FUNCTIONALBLOCKDIAGRAM  
2OE  
1OE  
2CLK  
1CLK  
D
C
D
C
1D1  
2D1  
1O1  
2
O1  
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
SEPTEMBER 2009  
1
© 2009 Integrated Device Technology, Inc.  
DSC-5453/7  
IDT74FCT162374AT/CT/ET  
FASTCMOS16-BITREGISTER(3-STATE)  
INDUSTRIALTEMPERATURERANGE  
ABSOLUTE MAXIMUM RATINGS(1)  
PINCONFIGURATION  
Symbol  
Description  
Max  
Unit  
V
(2)  
VTERM  
Terminal Voltage with Respect to GND  
–0.5 to 7  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1
OE  
1
1
1
CLK  
(3)  
VTERM  
Terminal Voltage with Respect to GND –0.5 to VCC+0.5  
V
2
1
O
1
2
D
1
2
TSTG  
IOUT  
Storage Temperature  
DC Output Current  
–65 to +150  
–60 to 120  
° C  
mA  
3
1
O
D
NOTES:  
GND  
4
GND  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause  
permanent damage to the device. This is a stress rating only and functional operation  
of the device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability.  
5
1
O
3
4
1
1
D3  
6
1
O
D4  
V
CC  
7
V
CC  
2. All device terminals except FCT162XXX Output and I/O terminals.  
3. Output and I/O terminals terminals for FCT162XXX.  
8
1
1
O5  
1
D5  
9
CAPACITANCE (TA = +25°C, F = 1.0MHz)  
O6  
1D  
6
Symbol  
CIN  
Parameter(1)  
Conditions  
VIN = 0V  
Typ.  
3.5  
Max. Unit  
GND  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
GND  
Input Capacitance  
Output Capacitance  
6
8
pF  
pF  
1
1
2
2
O7  
O8  
O1  
O2  
1
1
2
2
D7  
D8  
D1  
D2  
COUT  
VOUT = 0V  
3.5  
NOTE:  
1. This parameter is measured at characterization but not tested.  
PINDESCRIPTION  
GND  
GND  
Pin Names  
xDx  
Description  
2
2
O
3
4
2
2
D3  
Data Inputs  
O
D4  
xCLK  
xOx  
Clock Inputs  
3-State Outputs  
V
CC  
V
CC  
xOE  
3-State Outputs Enable Input (Active LOW)  
2
2
O5  
2
D5  
O6  
2D  
6
GND  
GND  
FUNCTIONTABLE(1)  
2
2
O
7
8
2
2
2
D
7
8
Inputs  
Outputs  
O
D
Function  
xDx  
X
xCLK  
xOE  
H
xOx  
Z
2OE  
CLK  
Hi-Z  
L
H
X
H
Z
Load  
L
L
L
SSOP/ TSSOP  
TOP VIEW  
Register  
H
L
H
Z
L
H
H
H
Z
NOTE:  
1. H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Don’t Care  
Z = High-Impedance  
= LOW-to-HIGH transition  
2
IDT74FCT162374AT/CT/ET  
FASTCMOS16-BITREGISTER(3-STATE)  
INDUSTRIALTEMPERATURERANGE  
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE  
FollowingConditionsApplyUnlessOtherwiseSpecified:  
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%  
Symbol  
VIH  
Parameter  
Input HIGH Level  
Test Conditions(1)  
Guaranteed Logic HIGH Level  
Min.  
2
Typ.(2)  
Max.  
0.8  
1
Unit  
V
VIL  
Input LOW Level  
Guaranteed Logic LOW Level  
VCC = Max.  
–80  
V
IIH  
Input HIGH Current (Input pins)(5)  
Input HIGH Current (I/O pins)(5)  
Input LOW Current (Input pins)(5)  
Input LOW Current (I/O pins)(5)  
High Impedance Output Current  
VI = VCC  
µA  
1
IIL  
VI = GND  
1
µA  
1
IOZH  
IOZL  
VIK  
IOS  
VCC = Max.  
VO = 2.7V  
VO = 0.5V  
1
(5)  
(3-State Output pins)  
1
Clamp Diode Voltage  
Short Circuit Current  
VCC = Min., IIN = –18mA  
–0.7  
–140  
–1.2  
–250  
V
(3)  
VCC = Max., VO = GND  
mA  
VH  
Input Hysteresis  
100  
5
mV  
µ A  
ICCL  
ICCH  
ICCZ  
Quiescent Power Supply Current  
VCC = Max.  
VIN = GND or VCC  
500  
OUTPUTDRIVECHARACTERISTICS  
Symbol  
IODL  
Parameter  
OutputLOWCurrent  
Output HIGH Current  
OutputHIGHVoltage  
Test Conditions(1)  
VCC = 5V, VIN = VIH or VIL, VO = 1.5V  
Min  
60  
Typ.(2)  
Max.  
200  
Unit  
mA  
mA  
V
(3)  
(3)  
115  
–115  
3.3  
IODH  
VCC = 5V, VIN = VIH or VIL, VO = 1.5V  
–60  
2.4  
–200  
VOH  
VCC = Min  
IOH = –24mA  
VIN = VIH or VIL  
VCC = Min  
VOL  
OutputLOWVoltage  
IOL = 24mA  
0.3  
0.55  
V
VIN = VIH or VIL  
NOTES:  
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.  
4. Duration of the condition can not exceed one second.  
5. The test limit for this parameter is ±5µA at TA = –55°C.  
3
IDT74FCT162374AT/CT/ET  
FASTCMOS16-BITREGISTER(3-STATE)  
INDUSTRIALTEMPERATURERANGE  
POWERSUPPLYCHARACTERISTICS  
Symbol  
Parameter  
Test Conditions(1)  
Min.  
Typ.(2)  
Max.  
Unit  
ΔICC  
Quiescent Power Supply Current  
TTL Inputs HIGH  
VCC = Max.  
VIN = 3.4V  
0.5  
1.5  
mA  
(3)  
ICCD  
IC  
Dynamic Power Supply  
Current(4)  
VCC = Max.  
Outputs Open  
xOE = GND  
One Input Togging  
50% Duty Cycle  
VIN = VCC  
VIN = GND  
60  
100  
µ A /  
MHz  
Total Power Supply Current(6)  
VCC = Max.  
Outputs Open  
fCP = 10MHz  
VIN = VCC  
VIN = GND  
0.6  
1.1  
1.5  
3
mA  
50% Duty Cycle  
xOE = GND  
fi = 5MHz  
VIN = 3.4V  
VIN = GND  
50% Duty Cycle  
One Bit Toggling  
VCC = Max.  
VIN = VCC  
VIN = GND  
3
5.5(5)  
Outputs Open  
fCP = 10MHz  
50% Duty Cycle  
(5)  
xOE = GND  
Sixteen BitsTogging  
fi = 2.5MHz  
VIN = 3.4V  
VIN = GND  
7.5  
19  
50% Duty Cycle  
NOTES:  
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 5.0V, +25°C ambient.  
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.  
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.  
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.  
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC  
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)  
ICC = Quiescent Current (ICCL, ICCH and ICCZ)  
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)  
DH = Duty Cycle for TTL Inputs High  
NT = Number of TTL Inputs at DH  
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)  
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)  
NCP = Number of Clock Inputs at fCP  
fi = Input Frequency  
Ni = Number of Inputs at fi  
4
IDT74FCT162374AT/CT/ET  
FASTCMOS16-BITREGISTER(3-STATE)  
INDUSTRIALTEMPERATURERANGE  
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE  
74FCT162374AT  
74FCT162374CT  
74FCT162374ET  
Symbol  
tPLH  
tPHL  
tPZH  
tPZL  
tPHZ  
tPLZ  
tSU  
Parameter  
PropagationDelay  
xCLK to xOx  
Condition(1)  
CL = 50pF  
RL = 500Ω  
Min.(2)  
Max.  
Min.(2)  
Max.  
Min.(2)  
Max.  
Unit  
2
6.5  
2
5.2  
1.5  
1.5  
1.5  
3.7  
ns  
OutputEnableTime  
1.5  
1.5  
6.5  
5.5  
1.5  
1.5  
5.5  
5
4.4  
3.6  
ns  
ns  
OutputDisableTime  
Set-up Time HIGH or LOW, xDx to xCLK  
Hold Time HIGH or LOW, xDx to xCLK  
xCLK Pulse Width HIGH or LOW  
2
1.5  
5
0.5  
2
1.5  
5
0.5  
1.5  
0
0.5  
ns  
ns  
ns  
ns  
tH  
(4)  
tW  
3
(3)  
tSK(o)  
OutputSkew  
NOTES:  
1. See test circuit and waveforms.  
2. Minimum limits are guaranteed but not tested on Propagation Delays.  
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.  
4. This limit is guaranteed but not tested.  
5
IDT74FCT162374AT/CT/ET  
FASTCMOS16-BITREGISTER(3-STATE)  
INDUSTRIALTEMPERATURERANGE  
TESTCIRCUITSANDWAVEFORMS  
SWITCHPOSITION  
Test  
Switch  
Closed  
Open  
Open Drain  
Disable Low  
Enable Low  
V
CC  
7.0V  
500Ω  
500Ω  
All Other Tests  
V
OUT  
V
IN  
DEFINITIONS:  
CL = Load capacitance: includes jig and probe capacitance.  
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.  
Pulse  
Generator  
D.U.T.  
50pF  
RT  
CL  
Test Circuit for All Outputs  
3V  
DATA  
1.5V  
INPUT  
0V  
LOW-HIGH-LOW  
tH  
tSU  
1.5V  
PULSE  
3V  
1.5V  
0V  
TIMING  
INPUT  
ASYNCHRONOUS CONTROL  
t
W
tREM  
PRESET  
CLEAR  
ETC.  
3V  
1.5V  
0V  
HIGH-LOW-HIGH  
PULSE  
1.5V  
SYNCHRONOUS CONTROL  
PRESET  
3V  
1.5V  
0V  
CLEAR  
tSU  
Pulse Width  
tH  
CLOCK ENABLE  
ETC.  
Set-up, Hold and Release Times  
ENABLE  
DISABLE  
3V  
1.5V  
0V  
3V  
SAME PHASE  
CONTROL  
INPUT  
1.5V  
0V  
INPUT TRANSITION  
t
PLH  
t
PHL  
PHL  
t
PZL  
tPLZ  
VOH  
OUTPUT  
3.5V  
1.5V  
3.5V  
1.5V  
OUTPUT  
NORMALLY  
LOW  
SWITCH  
CLOSED  
VOL  
tPLH  
t
0.3V  
0.3V  
VOL  
3V  
1.5V  
0V  
tPZH  
tPHZ  
OPPOSITE PHASE  
INPUT TRANSITION  
VOH  
OUTPUT  
NORMALLY  
HIGH  
SWITCH  
OPEN  
1.5V  
0V  
0V  
Propagation Delay  
Enable and Disable Times  
NOTES:  
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.  
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.  
6
IDT74FCT162374AT/CT/ET  
FASTCMOS16-BITREGISTER(3-STATE)  
INDUSTRIALTEMPERATURERANGE  
ORDERINGINFORMATION  
XX  
FCT  
XXXX  
XXX  
XX  
Temp. Range  
Family  
Package  
Device Type  
PVG  
PAG  
Shrink Small Outline Package - Green  
Thin Shrink Small Outline Packag - Green  
16-Bit Register (3-State)  
374AT  
374CT  
374ET  
162  
74  
Double-Density, 5 Volt, Balanced Drive  
40 C to +85 C  
DatasheetDocumentHistory  
09/06/09 Pg.6  
Updatedthe orderinginformationbyremovingthe "IDT"notationandnonRoHSpart.  
CORPORATE HEADQUARTERS  
6024 Silver Creek Valley Road  
San Jose, CA 95138  
for SALES:  
for Tech Support:  
logichelp@idt.com  
800-345-7015 or 408-284-8200  
fax: 408-284-2775  
www.idt.com  
7

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