74VHC595M [ROCHESTER]
AHC/VHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 0.150 INCH, MS-012AC, SOIC-16;
| 型号： | 74VHC595M |
| 厂家： | 
Rochester Electronics |
| 描述： | AHC/VHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 0.150 INCH, MS-012AC, SOIC-16 光电二极管 输出元件 逻辑集成电路 触发器 |
| 文件： | 总13页 (文件大小：1086K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 2007
74VHC595
tm
8-Bit Shift Register with Output Latches
Features
General Description
■ High Speed: t = 5.4ns (Typ.) at V = 5V
The VHC595 is an advanced high-speed CMOS Shift
Register fabricated with silicon gate CMOS technology.
It achieves the high-speed operation similar to equiva-
lent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
PD
CC
■ Low power dissipation: I = 4µA (Max.) at T = 25°C
CC
A
■ High noise immunity: V
= V
= 28% V (Min.)
NIH
NIL CC
■ Power down protection is provided on all inputs
■ Low noise: V = 0.9V (Typ.)
OLP
This device contains an 8-bit serial-in, parallel-out shift
register that feeds an 8-bit D-type storage register. The
storage register has eight 3-STATE outputs. Separate
clocks are provided for both the shift register and the
storage register. The shift register has a direct-overriding
clear, serial input, and serial output (standard) pins for
cascading. Both the shift register and storage register
use positive-edge triggered clocks. If both clocks are
connected together, the shift register state will always be
one clock pulse ahead of the storage register.
■ Pin and function compatible with 74HC595
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Order
Number
Package
Number
Package Description
74VHC595M
74VHC595SJ
74VHC595MTC
M16A
M16D
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
Description
SER
SCK
Serial Data Input
Shift Register Clock Input
(Active rising edge)
RCK
Storage Register Clock Input
(Active rising edge)
SCLR
G
Reset Input
3-STATE Output Enable Input
(Active LOW)
Q – Q
Parallel Data Outputs
Serial Data Output
A
H
Q’
H
Truth Table
Inputs
SER
X
RCK
SCK
SCLR
G
H
L
Function
X
X
X
X
X
↑
X
X
X
↑
X
X
L
Q thru Q 3-STATE
A H
X
Q thru Q outputs enabled
A H
X
L
Shift Register cleared: Q′ = 0
H
L
H
H
H
L
Shift Register clocked: Q = Q , Q = SER = L
N n-1 0
H
↑
L
Shift Register clocked: Q = Q , Q = SER = H
N n-1 0
X
X
L
Contents of Shift Register transferred to output latches
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
2
Timing Diagram
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
3
Logic Diagram (positive logic)
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
4
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
–0.5V to +7.0V
–0.5V to +7.0V
CC
V
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
IN
V
–0.5V to V + 0.5V
OUT
CC
I
–20mA
20mA
IK
I
OK
I
25mA
OUT
I
DC V /GND Current
75mA
CC
CC
T
Storage Temperature
–65°C to +150°C
260°C
STG
T
Lead Temperature (Soldering, 10 seconds)
L
(1)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
2.0V to +5.5V
0V to +5.5V
0V to V
CC
V
Input Voltage
IN
V
Output Voltage
OUT
CC
T
Operating Temperature
Input Rise and Fall Time
–40°C to +85°C
OPR
t , t
r
f
V
V
= 3.3V 0.3V
= 5.0V 0.5V
0
100ns/V
20ns/V
CC
CC
0
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
5
DC Electrical Characteristics
T = –40°C to
A
T = 25°C
+85°C
A
Symbol Parameter
V
(V) Conditions
Min.
Typ.
Max.
Min.
Max.
Units
CC
2.0
V
HIGH Level Input
Voltage
1.50
1.50
V
IH
3.0 – 5.5
2.0
0.7 x V
0.7 x V
CC
CC
V
LOW Level Input
Voltage
0.50
0.50
V
V
IL
3.0 – 5.5
2.0
0.3 x V
0.3 x V
CC
CC
V
HIGH Level Output
Voltage
V
= V
I
= –50µA
1.9
2.9
2.0
3.0
4.5
1.9
2.9
OH
IN
IH
OH
or V
IL
3.0
4.5
4.4
4.4
3.0
I
I
I
= –4mA
= –8mA
= 50µA
2.58
3.94
2.48
3.80
OH
OH
OL
4.5
V
LOW Level Output
Voltage
2.0
V
or V
= V
IH
0.0
0.0
0.0
0.1
0.1
0.1
0.1
V
OL
IN
IL
3.0
4.5
0.1
0.1
3.0
I
I
= 4mA
= 8mA
0.36
0.36
0.44
0.44
2.5
OL
OL
4.5
I
3-STATE Output
Off-State Current
5.5
V
V
V
= V or GND,
= V or GND,
G = V or V
IL
0.25
µA
OZ
IN
CC
OUT
CC
IN
IN
IH
I
Input Leakage
Current
0 – 5.5
5.5
V
= 5.5V or GND
0.1
4.0
1.0
µA
µA
IN
I
Quiescent Supply
Current
V
= V or GND
40.0
CC
IN
CC
Noise Characteristics
T = 25°C
A
Symbol
Parameter
V
(V)
Conditions
Typ.
Limits
Units
CC
(2)
V
Quiet Output Maximum
Dynamic V
5.0
C = 50pF
0.9
1.2
–1.2
3.5
V
V
V
V
OLP
L
OL
(2)
V
Quiet Output Minimum
Dynamic V
5.0
5.0
5.0
C = 50pF
–0.9
OLV
L
OL
(2)
V
V
Minimum HIGH Level
Dynamic Input Voltage
C = 50pF
L
IHD
(2)
Maximum LOW Level
Dynamic Input Voltage
C = 50pF
1.5
ILD
L
Note:
2. Parameter guaranteed by design.
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
6
AC Electrical Characteristics
T = –40°C
A
T = +25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions
Min. Typ. Max. Min. Max. Units
CC
t
, t
Propagation Delay Time,
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
C = 15pF
7.7
10.2
5.4
11.9
15.4
7.4
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
70
13.5
17.0
8.5
ns
PLH PHL
L
RCK to Q –Q
A
H
C = 50pF
L
C = 15pF
ns
L
C = 50pF
6.9
9.4
10.5
15.0
18.5
9.4
L
t
, t
Propagation Delay Time,
SCK–Q'H
C = 15pF
8.8
13.0
16.5
8.2
ns
PLH PHL
L
C = 50pF
11.3
6.2
L
C = 15pF
ns
L
C = 50pF
7.7
10.2
12.8
16.3
8.0
11.4
13.7
17.2
9.1
L
t
Propagation Delay Time,
SCLR –Q'H
C = 15pF
8.4
ns
PHL
L
C = 50pF
10.9
5.9
L
C = 15pF
ns
L
C = 50pF
7.4
10.0
11.5
15.0
8.6
11.1
13.5
17.0
10.0
12.0
16.2
11.0
L
t
t
, t
Output Enable Time,
3.3 0.3 R = 1kΩ
C = 15pF
7.5
ns
PZL PZH
L
L
G to Q –Q
A
H
C = 50pF
9.0
L
5.0 0.5
C = 15pF
4.8
ns
L
C = 50pF
8.3
10.6
15.7
10.3
L
, t
Output Disable Time,
G to Q –Q
3.3 0.3 R = 1kΩ
C = 50pF
12.1
7.6
ns
PLZ PHZ
L
L
A
H
5.0 0.5
3.3 0.3
C = 50pF
L
f
Maximum Clock
Frequency
C = 15pF
80
55
150
130
185
155
MHz
MHz
ns
MAX
L
C = 50pF
50
L
5.0 0.5
C = 15pF
135
95
115
85
L
C = 50pF
L
(3)
t
, t
Output to Output Skew
3.3 0.3
C = 50pF
1.5
1.0
10
1.5
1.0
10
OSLH OSHL
L
5.0 0.5
C = 50pF
L
C
Input Capacitance
Output Capacitance
V
V
= Open
= 5.0V
5.0
6.0
87
pF
pF
pF
IN
CC
CC
C
OUT
(4)
C
Power Dissipation
Capacitance
PD
Notes:
3. Parameter guaranteed by design. t
= | t
max – t
min|; t
= | t
max – t
min|
OSLH
PLH
PLH
OSHL
PHL
PHL
4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating
PD
current consumption without load. Average operating current can be obtained by the equation:
I
(Opr.) = C • V • f + I
CC
PD CC IN CC
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
7
AC Operating Requirements
T = –40°C
A
T = 25°C
to +85°C
A
Symbol
Parameter
V
(V)
Typ.
Guaranteed Minimum Units
CC
t
t
t
Minimum Setup Time (SER–SCK)
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.3 0.3
5.0 0.5
3.5
3.0
8.0
5.0
8.0
5.0
1.5
2.0
0.0
0.0
0.0
0.0
5.0
5.0
5.0
5.0
5.0
5.0
3.0
2.5
3.5
3.0
8.5
5.0
9.0
5.0
1.5
2.0
0.0
0.0
0.0
0.0
5.0
5.0
5.0
5.0
5.0
5.0
3.0
2.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
S
S
S
H
H
H
Minimum Setup Time (SCK–RCK)
Minimum Setup Time (SCLR–RCK)
Minimum Hold Time (SER–SCK)
Minimum Hold Time (SCK–RCK)
Minimum Hold Time (SCLR–RCK)
Minimum Pulse Width (SCLR)
Minimum Pulse Width (SCK)
t
t
t
t
W(L)
t
, t
W(L) W(H)
t
, t (H) Minimum Pulse Width (RCK)
W
W(L)
t
Minimum Removal Time (SCLR–SCK)
rem
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
8
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
9
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
10
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
5.00 0.10
4.55
5.90
4.45 7.35
0.65
4.4 0.1
1.45
5.00
0.11
12°
MTC16rev4
Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
11
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an
exhaustive list of all such trademarks.
ACEx®
HiSeC™
i-Lo™
Power-SPM™
PowerTrench®
Programmable Active Droop™
QFET®
TinyBuck™
TinyLogic®
TINYOPTO™
TinyPower™
TinyWire™
TruTranslation™
µSerDes™
UHC®
Across the board. Around the world.™
ActiveArray™
Bottomless™
Build it Now™
CoolFET™
CorePLUS™
CROSSVOLT™
CTL™
ImpliedDisconnect™
IntelliMAX™
ISOPLANAR™
MICROCOUPLER™
MicroPak™
MICROWIRE™
Motion-SPM™
MSX™
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
ScalarPump™
SMART START™
SPM®
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
UniFET™
VCX™
Wire™
Current Transfer Logic™
DOME™
MSXPro™
OCX™
E2CMOS™
EcoSPARK®
EnSigna™
OCXPro™
OPTOLOGIC®
OPTOPLANAR®
PACMAN™
PDP-SPM™
POP™
FACT Quiet Series™
FACT®
FAST®
FASTr™
Power220®
Power247®
PowerEdge™
PowerSaver™
TCM™
FPS™
FRFET®
The Power Franchise®
™
GlobalOptoisolator™
GTO™
TinyBoost™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
First Production
Full Production
Not In Production
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I27
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
www.fairchildsemi.com
12
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