AD8617ARMZ-REEL [ROCHESTER]
DUAL OP-AMP, 2200 uV OFFSET-MAX, 0.35 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, MO-187AA, MSOP-8;
| 型号： | AD8617ARMZ-REEL |
| 厂家： | 
Rochester Electronics |
| 描述： | DUAL OP-AMP, 2200 uV OFFSET-MAX, 0.35 MHz BAND WIDTH, PDSO8, ROHS COMPLIANT, MO-187AA, MSOP-8 放大器 光电二极管 |
| 文件： | 总17页 (文件大小：1235K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Cost Micropower, Low Noise CMOS
Rail-to-Rail, Input/Output Operational Amplifiers
AD8613/AD8617/AD8619
FEATURES
PIN CONFIGURATIONS
Offset voltage: 2.2 mV maximum
Low input bias current: 1 pA maximum
Single-supply operation: 1.8 V to 5 V
Low noise: 22 nV/√Hz
1
2
3
5
OUT
V–
V+
AD8613
TOP VIEW
(Not to Scale)
4
+IN
–IN
Micropower: 50 μA/amplifier maximum over temperature
No phase reversal
Unity gain stable
Figure 1. 5-Lead SC70 and 5-Lead TSOT-23
8
7
6
5
OUT A
–IN A
+IN A
V–
1
2
3
4
V+
AD8617
TOP VIEW
(Not to Scale)
OUT B
–IN B
+IN B
Qualified for automotive applications
APPLICATIONS
Battery-powered instrumentation
Multipole filters
Figure 2. 8-Lead MSOP and 8-Lead SOIC_N
Current shunt sense
Sensors
ADC predrivers
DAC drivers/level shifters
Low power ASIC input or output amplifiers
OUT A 1
–IN A 2
+IN A 3
V– 4
8 V+
AD8617
TOP VIEW
(Not to Scale)
7 OUT B
6 –IN B
5 +IN B
NOTES
1. PIN 4 AND THE EXPOSED PAD
MUST BE CONNECTED TO V–.
GENERAL DESCRIPTION
Figure 3. 8-Lead LFCSP_VD
The AD8613/AD8617/AD8619 are single, dual, and quad micro-
power, rail-to-rail input and output amplifiers that feature low
supply current, as well as low input voltage and current noise.
1
2
3
4
5
6
7
OUT A
–IN A
+IN A
V+
14
13
12
11
OUT D
–IN D
+IN D
V–
AD8619
TOP VIEW
(Not to Scale)
The parts are fully specified to operate from 1.8 V to 5 V single
supply, or ±±.9 V and ±ꢀ.5 V dual supply. The combination of low
noise, very low input bias currents, and low power consumption
make the AD8613/AD8617/AD8619 especially useful in
portable and loop-powered instrumentation.
+IN B
–IN B
OUT B
10 +IN C
9
8
–IN C
OUT C
Figure 4. 14-Lead TSSOP
The ability to swing rail-to-rail at both the input and output
enables designers to buffer CMOS ADCs, DACs, ASICs, and
other wide output swing devices in low power, single-supply
systems.
OUT A
–IN A
+IN A
V+
1
2
3
4
5
6
7
14 OUT D
13 –IN D
12 +IN D
11 V–
AD8619
TOP VIEW
(Not to Scale)
+IN B
–IN B
OUT B
10 +IN C
The AD8613 is available in a 5-lead SC7± package and a 5-lead
TSOT-ꢀ3 package. The AD8617 is available in 8-lead MSOP,
8-lead SOIC, and 8-lead LFCSP packages. The AD8619 is available
in 14-lead TSSOP and 14-lead SOIC packages. The AD8617W
is qualified for automotive applications and is available in an
8-lead MSOP package and an 8-lead SOIC package.
9
8
–IN C
OUT C
Figure 5. 14-Lead SOIC_N
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2005–2010 Analog Devices, Inc. All rights reserved.
AD8613/AD8617/AD8619
TABLE OF CONTENTS
Features .............................................................................................. 1
Thermal Resistance.......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions....................................................................... 1ꢀ
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... ꢀ
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
REVISION HISTORY
1/06—Rev. A to Rev. B
3/10—Rev. D to Rev. E
Added AD8613 ...................................................................Universal
Changes to Features ..........................................................................1
Changes to Table 1.............................................................................3
Changes to Table ꢀ.............................................................................4
Updated Outline Dimensions....................................................... 1ꢀ
Changes to Ordering Guide.......................................................... 13
Changes to General Description .................................................... 1
Changes to Ordering Guide .......................................................... 15
3/10—Rev. C to Rev. D
Changes to General Description .................................................... 1
Changes to Ordering Guide .......................................................... 15
10/05—Rev. 0 to Rev. A
10/09—Rev. B to Rev. C
Added AD8619 ...................................................................Universal
Change to Specifications Section ....................................................3
Updated Outline Dimensions....................................................... 1ꢀ
Changes to Ordering Guide.......................................................... 13
Added 8-Lead LFCSP Package..........................................Universal
Changes to Features Section, Figure ꢀ Caption, General
Description Section, and Figure 3.................................................. 1
Changed VS to VSY Throughout...................................................... 3
Changes to Input Characteristics, Input Voltage Range
Parameter; Dynamic Performance, Settling Time to ±.1% and
Phase Margin Parameters; and Noise Performance, Peak-to-
Peak Noise Parameter, Table 1 ........................................................ 3
Changes to Input Characteristics, Input Voltage Range
9/05—Revision 0: Initial Version
Parameter; Dynamic Performance, Settling Time to ±.1% and
Phase Margin Parameters; and Noise Performance, Peak-to-
Peak Noise Parameter, Table ꢀ ........................................................ 4
Changes to Table 3 and Table 4....................................................... 5
Changes to Figure 1ꢀ to Figure 15.................................................. 7
Changes to Figure 18 Caption......................................................... 8
Changes to Figure 3± and Figure 31............................................. 1±
Updated Outline Dimensions....................................................... 1ꢀ
Added Figure 44; Renumbered Sequentially .............................. 14
Changes to Ordering Guide .......................................................... 15
Rev. E | Page 2 of 16
AD8613/AD8617/AD8619
SPECIFICATIONS
Electrical characteristics at VSY = 5 V, VCM = VSY/ꢀ, TA = ꢀ5°C, unless otherwise noted.
Table 1.
Parameter
Symbol
VOS
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
−0.3 V < VCM < +5.3 V
−40°C < TA < +125°C, −0.3 V < VCM < +5.2 V
−40°C < TA < +125°C
0.4
2.2
2.2
4.5
7.0
1
mV
mV
μV/°C
μV/°C
pA
Offset Voltage Drift
AD8613
Input Bias Current
∆VOS/∆T
IB
1
2.5
0.2
−40°C < TA < +85°C
−40°C < TA < +125°C
110
780
0.5
50
250
5
pA
pA
pA
pA
pA
V
Input Offset Current
IOS
0.1
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Voltage Range
IVR
0
Common-Mode Rejection Ratio
CMRR
0 V < VCM < 5 V
95
dB
−40°C < TA < +125°C
RL = 10 kΩ, 0.5 V < VO < 4.5 V
68
235
dB
V/mV
pF
Large Signal Voltage Gain
Input Capacitance
AVO
CDIFF
CCM
500
1.9
2.5
pF
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
IL = 1 mA
−40°C to +125°C
IL = 10 mA
4.95
4.9
4.98
4.7
V
V
V
−40°C to +125°C
IL = 1 mA
−40°C to +125°C
IL = 10 mA
4.50
V
Output Voltage Low
VOL
20
30
50
275
335
mV
mV
mV
mV
mA
Ω
190
−40°C to +125°C
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
ISC
ZOUT
80
15
f = 10 kHz, AV = 1
Power Supply Rejection Ratio
PSRR
ISY
1.8 V < VSY < 5 V
−40°C < TA < +125°C
VO = VSY/2
67
64
94
38
dB
dB
μA
μA
Supply Current/Amplifier
−40°C <TA < +125°C
50
DYNAMIC PERFORMANCE
Slew Rate
Settling Time to 0.1%
Gain Bandwidth Product
SR
tS
GBP
RL = 10 kΩ
0.1
23
400
350
70
V/μs
ꢀs
kHz
kHz
Degrees
G = 1, VIN = 2 V step, CL = 20 pF, RL = 1 kΩ
RL = 100 kΩ
RL = 10 kΩ
Phase Margin
ØM
RL = 10 kΩ, RL = 100 kΩ, CL = 20 pF
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
en p-p
en
0.1 Hz to 10 Hz
f = 1 kHz
f = 10 kHz
f = 1 kHz
2.3
25
22
3.5
μV
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
in
0.05
Rev. E | Page 3 of 16
AD8613/AD8617/AD8619
Electrical characteristics at VSY = 1.8 V, VCM = VSY/ꢀ, TA = ꢀ5°C, unless otherwise noted.
Table 2.
Parameter
Symbol
VOS
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
−0.3 V < VCM < +1.9 V
−0.3 V < VCM < +1.8 V; −40°C < TA < +125°C
−40°C < TA < +125°C
0.4
2.2
2.2
8.5
9.0
1
mV
mV
μV/°C
μV/°C
pA
Offset Voltage Drift
AD8613
Input Bias Current
∆VOS/∆T
IB
1
3.7
0.2
−40°C < TA < +85°C
−40°C < TA < +125°C
110
780
0.5
50
250
1.8
pA
pA
pA
pA
pA
V
Input Offset Current
IOS
0.1
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Voltage Range
IVR
0
Common-Mode Rejection Ratio
CMRR
0 V < VCM < 1.8 V
−40°C < TA < +125°C
RL = 10 kΩ, 0.5 V < VO < 1.3 V
58
55
85
86
dB
dB
V/mV
pF
pF
Large Signal Voltage Gain
Input Capacitance
AVO
CDIFF
CCM
1000
2.1
3.8
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IL = 1 mA
−40°C to +125°C
1.65
1.6
1.73
44
V
V
Output Voltage Low
IL = 1 mA
−40°C to +125°C
60
80
mV
mV
mA
Ω
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
ISC
ZOUT
7
15
f = 10 kHz, AV = 1
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
1.8 V < VS < 5 V
VO = VSY/2
−40°C <TA < +125°C
67
94
38
dB
μA
μA
50
DYNAMIC PERFORMANCE
Slew Rate
Settling Time to 0.1%
Gain Bandwidth Product
SR
tS
GBP
RL = 10 kΩ
0.1
6.5
400
350
70
V/μs
μs
kHz
kHz
Degrees
G = 1, VIN = 1 V step, CL = 20 pF, RL = 1 kΩ
RL = 100 kΩ
RL = 10 kΩ
Phase Margin
ØM
RL = 10 kΩ, RL = 100 kΩ, CL = 20 pF
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
en p-p
en
0.1 Hz to 10 Hz
f = 1 kHz
f = 10 kHz
f = 1 kHz
2.3
25
22
3.5
μV
nV/√Hz
nV/√Hz
pA/√Hz
Current Noise Density
in
0.05
Rev. E | Page 4 of 16
AD8613/AD8617/AD8619
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
TA = ꢀ5°C, unless otherwise noted.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3.
Parameter
Rating
Table 4. Thermal Characteristics
Package Type
Supply Voltage
Input Voltage
6 V
VSS − 0.3 V to VDD + 0.3 V
θJA
θJC
61
126
45
43
20
36
35
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Input Current
Differential Input Voltage
10 mA
6 V
5-Lead TSOT-23 (UJ-5)
5-Lead SC70 (KS-5)
207
376
210
158
81
Output Short-Circuit Duration to GND Indefinite
8-Lead MSOP (RM-8)
8-Lead SOIC_N (R-8)
8-Lead LFCSP_VD (CP-8-9)
14-Lead SOIC_N (R-14)
14-Lead TSSOP (RU-14)
Storage Temperature Range
−65°C to +150°C
Lead Temperature (Soldering, 60 sec)
Operating Temperature Range
Junction Temperature Range
300°C
−40°C to +125°C
−65°C to +150°C
120
180
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. E | Page 5 of 16
AD8613/AD8617/AD8619
TYPICAL PERFORMANCE CHARACTERISTICS
VSY = 5 V or ±ꢀ.5 V, unless otherwise noted.
1800
400
350
300
250
200
150
100
50
V
= 5.5V
SY
–0.5V < V
V
= 5V AND 1.8V
SY
< +5.5V
CM
= 25°C
1600
1400
1200
1000
800
600
400
200
0
T
A
0
25
50
75
100
125
150
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (µV)
Figure 9. Input Bias Current vs. Temperature
Figure 6. Input Offset Voltage Distribution
50
40
30
20
10
0
40
35
30
25
20
15
10
5
–40°C < T < 125°C
A
T
= 25°C
A
V
= 2.5V
CM
0
0
1
2
3
5
0
1
2
3
4
5
6
7
8
9
10
SUPPLY VOLTAGE (V)
TCV (µV/°C)
OS
Figure 7. Input Offset Voltage Drift Distribution
Figure 10. Supply Current vs. Supply Voltage
2000
1500
1000
500
50
40
30
20
10
0
V
= 5V
SY
= 25°C
V
= ±2.5V, ±1.35V, ±0.9V
SY
T
A
0
–500
–1000
–1500
–2000
–0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
INPUT COMMON MODE VOLTAGE (V)
–40
–10
20
50
80
110
TEMPERATURE (°C)
Figure 8. Input Offset Voltage vs. Input Common-Mode Voltage
Figure 11. Supply Current vs. Temperature
Rev. E | Page 6 of 16
AD8613/AD8617/AD8619
135
1k
100
10
60
50
V
A
= 5V
SY
= 25ºC
T
V
– V
OH
SY
90
40
SOURCE
30
45
20
ΦM
1
10
SINK
0
0
V
OL
0.1
0.01
V
R
C
= ±2.5V AND ±0.9V
= 100kΩ
= 20pF
SY
–10
–20
L
L
–45
1M
0.001
0.01
0.1
LOAD CURRENT (mA)
1
10
1k
10k
100k
FREQUENCY (Hz)
Figure 12. Output Voltage to Supply Rail vs. Load Current
Figure 15. Open-Loop Gain and Phase vs. Frequency
40
120
100
80
60
40
20
0
V
= 5V
V
= 5V AND 2.7V
= 25°C
SY
SY
T
A
30
20
10
0
V
– V @ 1mA
OH
SY
V
@ 1mA
OL
–40 –25 –10
5
20
35
50
65
80
95 110 125
100
1k
10k
100k
1M
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 13. Output Voltage to Supply Rail vs. Temperature
(IL = 1 mA)
Figure 16. CMRR vs. Frequency
350
300
250
200
150
100
50
120
100
80
60
40
20
0
V
= 5V
SY
V
= ±2.5V AND ±1.35V
SY
= 25°C
T
A
V
– V @ 10mA
OH
SY
V
@ 10mA
OL
0
–40 –25 –10
5
20
35
50
65
80
95 110 125
100
1k
10k
100k
1M
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 14. Output Voltage to Supply Rail vs. Temperature
(IL = 10 mA)
Figure 17. PSRR vs. Frequency
Rev. E | Page 7 of 16
AD8613/AD8617/AD8619
1k
V
= 5V
SY
A
R
C
= 1
= 10kΩ
= 200pF
V
L
L
A
= 100
V
100
10
1
A
= 10
V
A
= 1
V
V
= 5V AND 1.8V
SY
0
100
TIME (20µs/DIV)
1k
10k
FREQUENCY (Hz)
100k
1M
Figure 18. Output Impedance vs. Frequency
Figure 21. Large Signal Transient Response
50
45
40
35
30
25
20
15
10
5
V
= 5V
= 25°C
SY
0
T
A
V
A
= ±2.5V
= –50
SY
V
–2.5
100
0
–OS
+OS
0
10
TIME (20µs/DIV)
100
LOAD CAPACITANCE (pF)
1000
Figure 19. Small Signal Overshoot vs. Load Capacitance
Figure 22. Positive Overload Recovery
V
= 5V, 2.7V, 1.8V
= 1
= 10kΩ
= 200pF
V
= ±2.5V
A = –50
V
SY
SY
2.5
A
R
C
V
L
L
0
0
–100
TIME (4µs/DIV)
TIME (20µs/DIV)
Figure 20. Small Signal Transient Response
Figure 23. Negative Overload Recovery
Rev. E | Page 8 of 16
AD8613/AD8617/AD8619
1000
100
10
V
V
= 5V
IN
SY
= 25ºC
T
A
V
OUT
1/F CORNER @ 100Hz
V
= ±2.5V
SY
A
R
= 1
= 10kΩ
V
L
V
= 6V p-p
IN
1
TIME (20ms/DIV)
1
10
100
1000
10000
FREQUENCY (Hz)
Figure 24. No Phase Reversal
Figure 26. Voltage Noise Density
140
120
100
80
V
= 5V AND 2.7V
SY
V
= 5V
SY
60
40
20
0
100
TIME (1s/DIV)
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 25. 0.1 Hz to 10 Hz Input Voltage Noise
Figure 27. Channel Separation
Rev. E | Page 9 of 16
AD8613/AD8617/AD8619
VSY = 1.8 V or ±±.9 V, unless otherwise noted.
450
80
60
40
20
0
V
= 1.8V
V
= 1.8V
SY
0V < V
SY
< 1.8V
CM
= 25°C
400
350
300
250
200
150
100
50
T
A
V
–V @ 1mA
SY OH
V
@ 1mA
OH
80
0
–40 –25 –10
5
20
35
50
65
95 110 125
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (µV)
Figure 28. Input Offset Voltage Distribution
Figure 31. Output Voltage to Supply Rail vs. Temperature
(IL = 1 mA)
2000
1500
1000
500
100
80
60
40
20
0
V
T
= 1.8V
V
T
= 1.8V
= 25°C
SY
= 25°C
SY
A
A
0
–500
–1000
–1500
–2000
–0.5 –0.2
0.1
0.4
0.7
1.0
1.3
1.6
1.9
2.2
100
1k
10k
100k
1M
FREQUENCY (Hz)
INPUT COMMON-MODE VOLTAGE (V)
Figure 29. Input Offset Voltage vs. Input Common-Mode Voltage
Figure 32. CMRR vs. Frequency
1000
120
100
80
60
40
20
0
V
= 1.8V
SY
= 25°C
V
= 1.8V
SY
= 25°C
T
A
T
A
100
10
V
–V
SY OH
SOURCE
1
SINK
V
OL
0.1
0.01
0.001
0.01
0.1
LOAD CURRENT (mA)
1
10
100
1k
1M
10k
FREQUENCY (Hz)
Figure 33. PSRR vs. Frequency
Figure 30. Output Voltage to Supply Rail vs. Load Current
Rev. E | Page 10 of 16
AD8613/AD8617/AD8619
40
30
20
10
0
V
= 1.8V
SY
V
= 1.8V
SY
= 25°C
T
A
–OS
+OS
TIME (1s/DIV)
10
100
LOAD CAPACITANCE (pF)
1k
Figure 34. Small Signal Overshoot vs. Load Capacitance
Figure 36. 0.1 Hz to 10 Hz Input Voltage Noise
1k
100
10
V
= 1.8V
= 1
= 10kΩ
= 200pF
SY
V
= 1.8V
SY
= 25°C
A
R
C
V
L
L
T
A
1/F CORNER @ 100Hz
1
TIME (20µs/DIV)
1
10
100
1k
10k
FREQUENCY (Hz)
Figure 37. Voltage Noise Density
Figure 35. Large Signal Transient Response
Rev. E | Page 11 of 16
AD8613/AD8617/AD8619
OUTLINE DIMENSIONS
3.20
3.00
2.80
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
PIN 1
IDENTIFIER
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.65 BSC
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.95
0.85
0.75
15° MAX
1.10 MAX
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.80
0.55
0.40
0.15
0.05
0.23
0.09
6°
0°
0.40
0.25
COMPLIANT TO JEDEC STANDARDS MS-012-AA
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 39. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Figure 38. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters and (inches)
Dimensions shown in millimeters
8.75 (0.3445)
8.55 (0.3366)
8
7
14
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
BSC
0.50 (0.0197)
45°
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 40. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-14)
Dimensions shown in millimeters and (inches)
Rev. E | Page 12 of 16
AD8613/AD8617/AD8619
5.10
5.00
4.90
14
8
7
4.50
4.40
4.30
6.40
BSC
1
PIN 1
0.65 BSC
1.05
1.00
0.80
1.20
MAX
0.20
0.09
0.75
0.60
0.45
8°
0°
0.15
0.05
COPLANARITY
0.10
SEATING
PLANE
0.30
0.19
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 41. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
2.20
2.00
1.80
2.40
2.10
1.80
5
1
4
3
1.35
1.25
1.15
2
0.65 BSC
1.10
1.00
0.90
0.70
0.40
0.10
0.80
0.46
0.36
0.26
0.22
0.08
SEATING
PLANE
0.10 MAX
0.30
0.15
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 42. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
Rev. E | Page 13 of 16
AD8613/AD8617/AD8619
2.90 BSC
5
1
4
3
2.80 BSC
1.60 BSC
2
0.95 BSC
1.90
BSC
*
0.90 MAX
0.70 MIN
*
1.00 MAX
0.20
0.08
8°
4°
0°
0.10 MAX
0.50
0.30
0.60
0.45
0.30
SEATING
PLANE
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 43. 5-Lead Thin Small Outline Transistor Package [TSOT-23]
(UJ-5)
Dimensions shown in millimeters
3.25
3.00 SQ
2.75
0.60 MAX
0.50
BSC
0.60 MAX
5
8
2.95
2.75 SQ
2.55
EXPOSED
PAD
1.60
1.50
1.40
PIN 1
INDICATOR
4
1
PIN 1
INDICATOR
0.50
0.40
0.30
TOP VIEW
BOTTOM VIEW
2.23
2.13
2.03
12° MAX
0.70 MAX
0.65TYP
0.90 MAX
0.85 NOM
0.05 MAX
0.01 NOM
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.30
0.23
0.18
SEATING
PLANE
SECTION OF THIS DATA SHEET.
0.20 REF
Figure 44. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-9)
Dimensions shown in millimeters
Rev. E | Page 14 of 16
AD8613/AD8617/AD8619
ORDERING GUIDE
Model1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
5-Lead SC70
5-Lead SC70
Package Option
KS-5
KS-5
KS-5
UJ-5
Branding
A0Y
A0Y
A0Y
A0Y
AD8613AKSZ-R2
AD8613AKSZ-REEL
AD8613AKSZ-REEL7
AD8613AUJZ-R2
AD8613AUJZ-REEL
AD8613AUJZ-REEL7
AD8617ACPZ-R2
AD8617ACPZ-R7
AD8617ACPZ-RL
AD8617ARMZ
5-Lead SC70
5-Lead TSOT-23
5-Lead TSOT-23
5-Lead TSOT-23
8-Lead LFCSP_VD
8-Lead LFCSP_VD
8-Lead LFCSP_VD
8-Lead MSOP
UJ-5
UJ-5
A0Y
A0Y
CP-8-9
CP-8-9
CP-8-9
RM-8
RM-8
R-8
R-8
R-8
RM-8
R-8
R-8
A0T
A0T
A0T
A0T
AD8617ARMZ-REEL
AD8617ARZ
8-Lead MSOP
A0T
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
AD8617ARZ-REEL
AD8617ARZ-REEL7
AD8617WARMZ-REEL2
AD8617WARZ-R72
AD8617WARZ-RL2
AD8619ARUZ
AD8619ARUZ-REEL
AD8619ARZ
AD8619ARZ-REEL
AD8619ARZ-REEL7
A23
RU-14
RU-14
R-14
R-14
R-14
1 Z = RoHS Compliant Part.
2 Qualified for automotive applications.
Rev. E | Page 15 of 16
AD8613/AD8617/AD8619
NOTES
©2005–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05622-0-3/10(E)
Rev. E | Page 16 of 16
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