CY74FCT574TQC [ROCHESTER]

FCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 0.150 INCH, QSOP-20;
CY74FCT574TQC
型号: CY74FCT574TQC
厂家: Rochester Electronics    Rochester Electronics
描述:

FCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 0.150 INCH, QSOP-20

驱动 光电二极管 输出元件 逻辑集成电路 触发器
文件: 总9页 (文件大小:854K)
中文:  中文翻译
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1CY54/74FCT574T  
fax id: 7026  
CY54/74FCT374T  
CY54/74FCT574T  
8-Bit Registers  
• Matched rise and fall times  
Features  
• Fully compatible with TTL input and output logic levels  
• ESD > 2000V  
• Extended commercial range of 40°C to +85°C  
• Function, pinout, and drive compatible with FCT and  
F logic  
• FCT-C speed at 5.2 ns max. (Com’l)  
FCT-A speed at 6.5 ns max. (Com’l)  
• Reduced V  
FCT functions  
• Sink Current  
Source Current  
64 mA (Com’l), 32 mA (Mil)  
32 mA (Com’l), 12 mA (Mil)  
(typically = 3.3V) versions of equivalent  
OH  
Edge-triggered D-type inputs  
• 250 MHz typical toggle rate  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
2CY54/74FCT574T  
• Power-off disable feature  
Logic Block Diagram  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP  
CP  
D
Q
CP  
D
CP  
D
CP  
D
CP  
D
CP  
D
Q
CP  
D
CP  
D
Q
Q
Q
Q
Q
Q
OE  
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
FCT374T6  
Pin Configurations  
DIP/SOIC/QSOP  
Top View  
DIP/SOIC/QSOP  
Top View  
LCC  
Top View  
LCC  
Top View  
OE  
OE  
1
1
V
V
CC  
20  
20  
19  
18  
17  
CC  
O
D
D
0
O
O
0
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
19  
18  
17  
16  
7
0
1
D
D
1
O
O
O
O
O
O
0
1
7
6
7
6 5 4  
8
7
6 5 4  
8
D
D
2
D
2
3
4
D
D
D
7
1
O
3
D
9
3
2
1
0
FCT574T  
9
3
2
1
O
O
D
D
3
O
O
D
1
2
6
5
16  
GND  
CP  
0
10  
11  
GND  
CP  
O
0
10  
11  
FCT374T  
FCT574T  
OE  
D
4
FCT374T  
15  
14  
15  
14  
OE  
V
O
7
V
CC  
D
5
12  
13  
O
4
2
3
20  
19  
5
4
5
6
7
CC  
12  
13  
20  
19  
O
6
O
0
D
4
O
D
D
D
6
13  
12  
11  
13  
12  
7
1516 17 18  
14  
1516 17 18  
14  
O
3
D
7
O
O
4
GND  
GND  
10  
CP  
10  
11  
CP  
FCT374T1  
FCT374T2  
FCT374T3  
FCT374T4  
Logic Symbol  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP  
OE  
O
O
1
O
2
O
3
O
4
O
5
O
6
O
7
0
FCT374T5  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
May 1994 – Revised March 18, 1997  
CY54/74FCT374T  
CY54/74FCT574T  
Functional Description  
Maximum Ratings[2, 3]  
The FCT374T and FCT574T are high-speed low-power octal  
D-type flip-flops featuring separate D-type inputs for each  
flip-flop. Both devices have three-state outputs for bus orient-  
ed applications. A buffered clock (CP) and output enable (OE)  
are common to all flip-flops. The FCT574T is identical to  
FCT374T except for flow-through pinout to simplify board de-  
sign. The eight flip-flops contained in the FCT374T and  
FCT574T will store the state of their individual D inputs that  
meet the set-up and hold time requirements on the  
LOW-to-HIGH clock (CP) transition. When OE is LOW, the  
contents of the eight flip-flops are available at the outputs.  
When OE is HIGH, the outputs will be in the high-impedance  
state. The state of output enable does not affect the state of  
the flip-flops.  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
Storage Temperature .................................. -65°C to +150°C  
Ambient Temperature with  
Power Applied ............................................ –65°C to +135°C  
Supply Voltage to Ground Potential ...............–0.5V to +7.0V  
DC Input Voltage ............................................–0.5V to +7.0V  
DC Output Voltage .........................................–0.5V to +7.0V  
DC Output Current (Maximum Sink Current/Pin) ...... 120 mA  
Power Dissipation.......................................................... 0.5W  
Static Discharge Voltage ........................................... >2001V  
(per MIL-STD-883, Method 3015)  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
Operating Range  
Function Table[1]  
Ambient  
Inputs  
CP  
Outputs  
Range  
Range  
Temperature  
V
CC  
D
H
L
OE  
L
O
H
L
Commercial DT  
0°C to +70°C  
5V ± 5%  
5V ± 5%  
5V ± 10%  
Commercial T, AT, CT  
–40°C to +85°C  
–55°C to +125°C  
L
[4]  
Military  
All  
X
X
H
Z
Electrical Characteristics Over the Operating Range  
[5]  
Parameter  
Description  
Test Conditions  
Min.  
2.0  
Typ.  
Max.  
Unit  
V
V
Output HIGH Voltage  
V
V
V
V
V
=Min., I =–32 mA  
Com’l  
Com’l  
Mil  
OH  
CC  
CC  
CC  
CC  
CC  
OH  
=Min., I =–15 mA  
2.4  
3.3  
3.3  
0.3  
0.3  
V
OH  
=Min., I =–12 mA  
2.4  
V
OH  
V
Output LOW Voltage  
=Min., I =64 mA  
Com’l  
Mil  
0.55  
0.55  
V
OL  
OL  
=Min., I =32 mA  
V
OL  
V
V
V
V
Input HIGH Voltage  
Input LOW Voltage  
2.0  
V
IH  
IL  
H
0.8  
V
[6]  
Hysteresis  
All inputs  
0.2  
V
Input Clamp Diode Voltage  
Input HIGH Current  
Input HIGH Current  
Input LOW Current  
V
V
V
V
V
=Min., I =–18 mA  
–0.7  
–1.2  
5
V
IK  
CC  
CC  
CC  
CC  
CC  
IN  
I
I
I
I
=Max., V =V  
CC  
µA  
µA  
µA  
µA  
I
IN  
=Max., V =2.7V  
±1  
±1  
10  
IH  
IN  
=Max., V =0.5V  
IL  
IN  
Off State HIGH-Level Output  
Current  
= Max., V  
= 2.7V  
OZH  
OUT  
I
Off State LOW-Level  
Output Current  
V
= Max., V  
= 0.5V  
–10  
µA  
OZL  
CC  
OUT  
[7]  
I
I
Output Short Circuit Current  
Power-Off Disable  
V
V
=Max., V =0.0V  
OUT  
–60  
–120  
–225  
mA  
OS  
CC  
=0V, V  
=4.5V  
±1  
µA  
OFF  
CC  
OUT  
Notes:  
1. H = HIGH Voltage Level. L = LOW Voltage Level X = Don’t Care Z = HIGH Impedance = LOW-to-HIGH clock transition  
2. Unless otherwise noted, these limits are over the operating free-air temperature range.  
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.  
4.  
TA is the “instant on” case temperature.  
5. Typical values are at VCC=5.0V, TA=+25°C ambient.  
6. This parameter is guaranteed but not tested.  
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample  
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of  
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameters tests. In any sequence of parameter  
tests, IOS tests should be performed last.  
2
CY54/74FCT374T  
CY54/74FCT574T  
Capacitance[2]  
[5]  
Parameter  
Description  
Typ.  
Max.  
10  
Unit  
pF  
C
C
Input Capacitance  
Output Capacitance  
5
9
IN  
12  
pF  
OUT  
Power Supply Characteristics  
[5]  
Parameter  
Description  
Test Conditions  
=Max., V 0.2V, V V –0.2V  
Typ.  
Max.  
0.2  
Unit  
I
Quiescent Power Supply Current  
V
V
0.1  
0.5  
mA  
mA  
CC  
CC  
CC  
IN  
IN  
CC  
[8]  
I  
Quiescent Power Supply Current  
(TTL inputs HIGH)  
=Max., V =3.4V,  
2.0  
CC  
IN  
f =0, Outputs Open  
1
[9]  
I
I
Dynamic Power Supply Current  
V
=Max., One Bit Toggling,  
CC  
0.06  
0.7  
0.12  
1.4  
mA/MHz  
mA  
CCD  
50% Duty Cycle, Outputs Open,  
OE=GND, V 0.2V or V V –0.2V  
IN  
IN  
CC  
[10]  
Total Power Supply Current  
V
=Max., f =10 MHz,  
CC 0  
C
50% Duty Cycle, Outputs Open,  
One Bit Toggling at f =5 MHz,  
1
OE=GND, V 0.2V or V V –0.2V  
IN  
IN  
CC  
V
=Max., f =10 MHz,  
1.2  
1.6  
3.9  
3.4  
mA  
mA  
mA  
CC  
0
50% Duty Cycle, Outputs Open,  
One Bit Toggling at f =5 MHz,  
OE=GND, V =3.4V or V =GND  
1
IN  
IN  
[11]  
V
=Max., f =10 MHz,  
3.2  
CC  
0
50% Duty Cycle, Outputs Open,  
Eight Bits Toggling at f =2.5 MHz,  
OE=GND, V 0.2V or V V –0.2V  
1
IN  
IN  
CC  
[11]  
V
=Max., f =10 MHz,  
12.2  
CC  
0
50% Duty Cycle, Outputs Open,  
Eight Bits Toggling at f =2.5 MHz,  
1
OE=GND, V =3.4V or V =GND  
IN  
IN  
Notes:  
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.  
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.  
10. IC  
IC  
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC  
ICC+ICCDHNT+ICCD(f0/2 + f1N1)  
Quiescent Current with CMOS input levels  
Power Supply Current for a TTL HIGH input (VIN=3.4V)  
Duty Cycle for TTL inputs HIGH  
ICC  
ICC  
DH  
NT  
ICCD  
f0  
Number of TTL inputs at DH  
Dynamic Current caused by an input transition pair (HLH or LHL)  
Clock frequency for registered devices, otherwise zero  
Input signal frequency  
f1  
N1  
Number of inputs changing at f1  
All currents are in milliamps and all frequencies are in megahertz.  
11. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.  
3
CY54/74FCT374T  
CY54/74FCT574T  
Switching Characteristics[12] Over the Operating Range  
FCT374T/FCT574T  
FCT374AT/FCT574AT  
Military Commercial  
Military  
Commercial  
Fig.  
[13]  
Parameter  
Description  
Min.  
Max.  
Min.  
Max.  
Min.  
Max.  
Min.  
Max.  
Unit  
No.  
t
t
Propagation Delay  
Clock to Output  
2.0  
1.5  
1.5  
2.0  
11.0  
2.0  
10.0  
2.0  
1.5  
1.5  
2.0  
7.2  
2.0  
6.5  
ns  
1, 5  
1, 7, 8  
1, 7, 8  
4
PLH  
PHL  
t
t
Output Enable Time  
14.0  
8.0  
1.5  
1.5  
2.0  
12.5  
8.0  
7.5  
6.5  
1.5  
1.5  
2.0  
6.5  
5.5  
ns  
ns  
ns  
PZH  
PZL  
t
t
Output Disable  
Time  
PHZ  
PLZ  
t
t
t
Set–Up Time  
HIGH or LOW  
D to CP  
S
Hold Time  
HIGH or LOW  
D to CP  
1.5  
7.0  
1.5  
7.0  
1.5  
6.0  
1.5  
5.0  
ns  
ns  
4
5
H
W
Clock Pulse  
[14]  
Width  
LOW  
HIGH or  
FCT374DT/  
FCT574DT  
FCT374CT/FCT574CT  
Military Commercial  
Commercial  
Fig.  
[13]  
Parameter  
Description  
Min.  
Max.  
Min.  
Max.  
Min.  
Max.  
Unit  
No.  
t
t
Propagation Delay Clock to Output  
2.0  
1.5  
1.5  
6.2  
2.0  
5.2  
2.0  
4.2  
ns  
1, 5  
PLH  
PHL  
t
t
Output Enable Time  
6.2  
5.7  
1.5  
1.5  
5.5  
5.0  
1.5  
1.5  
4.8  
4.0  
ns  
ns  
1, 7, 8  
1, 7, 8  
PZH  
PZL  
t
t
Output Disable Time  
PHZ  
PLZ  
t
t
t
Set-Up Time, HIGH or LOW D to CP  
2.0  
1.5  
6.0  
2.0  
1.5  
5.0  
2.0  
1.5  
3.0  
ns  
ns  
ns  
4
4
5
S
Hold Time, HIGH or LOW D to CP  
H
W
[14]  
Clock Pulse Width  
HIGH or LOW  
Shaded areas contain preliminary information.  
Notes:  
12. Minimum limits are guaranteed but not tested on Propagation Delays.  
13. See “Parameter Measurement Information” in the General Information section.  
14. With one data channel toggling, tW(L)=tW(H)=4.0 ns and tr=tf=1.0 ns.  
4
CY54/74FCT374T  
CY54/74FCT574T  
Ordering Information—FCT374T  
Speed  
Package  
Name  
Operating  
Range  
(ns)  
Ordering Code  
CY74FCT374DTQC  
Package Type  
20-Lead (150-Mil) QSOP  
4.2  
Q5  
S5  
Commercial  
Commercial  
Military  
CY74FCT374DTSOC  
CY74FCT374CTQC  
CY74FCT374CTSOC  
CY54FCT374CTDMB  
CY54FCT374CTLMB  
CY74FCT374ATPC  
CY74FCT374ATQC  
CY74FCT374ATSOC  
CY54FCT374ATLMB  
CY74FCT374TQC  
20-Lead (300-Mil) Molded SOIC  
20-Lead (150-Mil) QSOP  
5.2  
6.2  
6.5  
Q5  
S5  
20-Lead (300-Mil) Molded SOIC  
20-Lead (300-Mil) CerDIP  
D6  
L61  
P5  
20-Pin Square Leadless Chip Carrier  
20-Lead (300-Mil) Molded DIP  
20-Lead (150-Mil) QSOP  
Commercial  
Q5  
S5  
20-Lead (300-Mil) Molded SOIC  
20-Pin Square Leadless Chip Carrier  
20-Lead (150-Mil) QSOP  
7.2  
L61  
Q5  
S5  
Military  
10.0  
Commercial  
CY74FCT374TSOC  
CY54FCT374TDMB  
CY54FCT374TLMB  
20-Lead (300-Mil) Molded SOIC  
20-Lead (300-Mil) CerDIP  
11.0  
D6  
L61  
Military  
20-Pin Square Leadless Chip Carrier-  
Ordering Information—FCT574T  
Speed  
Package  
Name  
Operating  
Range  
(ns)  
Ordering Code  
CY74FCT574DTQC  
Package Type  
20-Lead (150-Mil) QSOP  
4.2  
Q5  
S5  
Q5  
S5  
D6  
P5  
Q5  
S5  
D6  
Q5  
S5  
D6  
Commercial  
CY74FCT574DTSOC  
CY74FCT574CTQC  
CY74FCT574CTSOC  
CY54FCT574CTDMB  
CY74FCT574ATPC  
CY74FCT574ATQC  
CY74FCT574ATSOC  
CY54FCT574ATDMB  
CY74FCT574TQC  
20-Lead (300-Mil) Molded SOIC  
20-Lead (150-Mil) QSOP  
5.2  
Commercial  
20-Lead (300-Mil) Molded SOIC  
20-Lead (300-Mil) CerDIP  
20-Lead (300-Mil) Molded DIP  
20-Lead (150-Mil) QSOP  
6.2  
6.5  
Military  
Commercial  
20-Lead (300-Mil) Molded SOIC  
20-Lead (300-Mil) CerDIP  
20-Lead (150-Mil) QSOP  
7.2  
Military  
10.0  
Commercial  
CY74FCT574TSOC  
CY54FCT574TDMB  
20-Lead (300-Mil) Molded SOIC  
20-Lead (300-Mil) CerDIP  
11.0  
Military  
Shaded areas contain preliminary information.  
Document #: 38-00278-B  
5
CY54/74FCT374T  
CY54/74FCT574T  
Package Diagrams  
20-Lead (300-Mil) CerDIP D6  
MIL-STD-1835 D- 8Config.A  
20-Pin Square Leadless Chip Carrier L61  
MIL-STD-1835 C-2A  
6
CY54/74FCT374T  
CY54/74FCT574T  
Package Diagrams (continued)  
20-Lead (300-Mil) Molded DIP P5  
20-Lead Quarter Size Outline Q5  
7
CY54/74FCT374T  
CY54/74FCT574T  
Package Diagrams (continued)  
20-Lead (300-Mil) Molded SOIC S5  
© Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of anycircuitry other than circuitry embodied in a CypressSemiconductor product. Nor does it conveyor imply any license under patent or other rights. CypressSemiconductor does not authorize  
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.  

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