DS1345WP-100IND+ [ROCHESTER]
128KX8 NON-VOLATILE SRAM MODULE, 100ns, DMA34, ROHS COMPLIANT, POWERCAP MODULE-34;
| 型号： | DS1345WP-100IND+ |
| 厂家： | 
Rochester Electronics |
| 描述： | 128KX8 NON-VOLATILE SRAM MODULE, 100ns, DMA34, ROHS COMPLIANT, POWERCAP MODULE-34 静态存储器 内存集成电路 |
| 文件： | 总11页 (文件大小：1014K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5587; Rev 10/10
DS1345W
3.3V 1024k Nonvolatile SRAM
with Battery Monitor
www.maxim-ic.com
FEATURES
. 10 years minimum data retention in the
absence of external power
PIN ASSIGNMENT
. Data is automatically protected during power
loss
. Power supply monitor resets processor when
BW
A15
A16
RST
VCC
WE
OE
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
NC
NC
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
1
2
3
4
5
6
7
8
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
VCC power loss occurs and holds processor in
reset during VCC ramp-up
9
. Battery monitor checks remaining capacity
daily
10
11
12
13
14
15
16
17
. Read and write access times of 100 ns
. Unlimited write cycle endurance
. Typical standby current 50 µA
. Upgrade for 128k x 8 SRAM, EEPROM or
Flash
. Lithium battery is electrically disconnected to
retain freshness until power is applied for the
first time
. Optional industrial temperature range of
-40°C to +85°C, designated IND
. PowerCap Module (PCM) package
- Directly surface-mountable module
- Replaceable snap-on PowerCap provides
lithium backup battery
A4
A3
A2
A1
VBAT
GND
A0
34-Pin PowerCap Module (PCM)
(Uses DS9034PC+ or DS9034PCI+ PowerCap)
PIN DESCRIPTION
A0-A16
DQ0-DQ7
CE
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
WE
- Output Enable
- Reset Output
OE
RST
- Battery Warning Output
- Power (+3.3 Volts)
- Ground
BW
VCC
GND
NC
- Standardized pinout for all nonvolatile
SRAM products
- Detachment feature on PowerCap allows
easy removal using a regular screwdriver
- No Connect
DESCRIPTION
The DS1345W 3.3V 1024k Nonvolatile SRAM is a 1,048,576-bit, fully static, nonvolatile SRAM
organized as 131,072 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and
control circuitry, which constantly monitors VCC for an out-of-tolerance condition. When such a condition
occurs, the lithium energy source is automatically switched on and write protection is unconditionally
enabled to prevent data corruption. Additionally, the DS1345W has dedicated circuitry for monitoring the
status of VCC and the status of the internal lithium battery. DS1345W devices in the PowerCap Module
package are directly surface mountable and are normally paired with a DS9034PC PowerCap to form a
complete Nonvolatile SRAM module. The devices can be used in place of 128k x 8 SRAM, EEPROM or
Flash components.
1 of 10
DS1345W
READ MODE
The DS1345W executes a read cycle whenever
(Write Enable) is inactive (high) and
(Chip
CE
WE
Enable) and
(Output Enable) are active (low). The unique address specified by the 17 address inputs
OE
(A0 - A16) defines which of the 131,072 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within tACC(Access Time) after the last address input signal is stable, providing
that
and
(Output Enable) access times are also satisfied. If
and
access times are not
CE
CE
OE
OE
satisfied, then data access must be measured from the later occurring signal (
or
) and the limiting
OE
CE
parameter is either tCO for
or tOE for
rather than address access.
OE
CE
WRITE MODE
The DS1345W executes a write cycle whenever the
and
signals are in the active (low) state after
CE
WE
address inputs are stable. The later occurring falling edge of
or
will determine the start of the
CE
WE
write cycle. The write cycle is terminated by the earlier rising edge of
be kept valid throughout the write cycle.
or
. All address inputs must
WE
CE
must return to the high state for a minimum recovery time
WE
(tWR) before another cycle can be initiated. The
control signal should be kept inactive (high) during
OE
write cycles to avoid bus contention. However, if the output drivers are enabled (
and
active) then
OE
CE
will disable the outputs in tODW from its falling edge.
WE
DATA RETENTION MODE
The DS1345W provides full functional capability for VCC greater than 3.0 volts and write protects by 2.8
volts. Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatile
static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically
write protect themselves, all inputs become “don’t care,” and all outputs become high impedance. As VCC
falls below approximately 2.5 volts, the power switching circuit connects the lithium energy source to
RAM to retain data. During power-up, when VCC rises above approximately 2.5 volts, the power
switching circuit connects external VCC to the RAM and disconnects the lithium energy source. Normal
RAM operation can resume after VCC exceeds 3.0 volts.
SYSTEM POWER MONITORING
The DS1345W has the ability to monitor the external VCC power supply. When an out-of-tolerance power
supply condition is detected, the NV SRAM warns a processor-based system of impending power failure
by asserting
. On power up,
is held active for 200ms nominal to prevent system operation
RST
RST
during power-on transients and to allow tREC to elapse.
has an open-drain output driver.
RST
BATTERY MONITORING
The DS1345W automatically performs periodic battery voltage monitoring on a 24-hour time interval.
Such monitoring begins within tREC after VCC rises above VTP and is suspended when power failure
occurs.
After each 24-hour period has elapsed, the battery is connected to an internal 1MΩ test resistor for 1
second. During this 1 second, if battery voltage falls below the battery voltage trip point (2.6V), the
battery warning output
is asserted. Once asserted,
remains active until the module is replaced.
BW
BW
The battery is still retested after each VCC power-up, however, even if
is active. If the battery voltage
BW
is found to be higher than 2.6V during such testing,
is de-asserted and regular 24-hour testing
BW
resumes.
has an open-drain output driver.
BW
2 of 10
DS1345W
FRESHNESS SEAL
Each DS1345W is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When VCC is first applied at a level greater than VTP, the lithium
energy source is enabled for battery backup operation.
PACKAGES
The 34-pin PowerCap Module integrates SRAM memory and nonvolatile control into a module base
along with contacts for connection to the lithium battery in the DS9034PC PowerCap. The PowerCap
Module package design allows a DS1345W device to be surface mounted without subjecting its lithium
backup battery to destructive high-temperature reflow soldering. After a DS1345W is reflow soldered, a
DS9034PC is snapped on top of the PCM to form a complete Nonvolatile SRAM module. The
DS9034PC is keyed to prevent improper attachment. DS1345W module bases and DS9034PC
PowerCaps are ordered separately and shipped in separate containers. See the DS9034PC data sheet for
further information.
3 of 10
DS1345W
ABSOLUTE MAXIMUM RATINGS
Voltage on Any Pin Relative to Ground
Operating Temperature Range
Commercial:
-0.3V to +4.6V
0°C to +70°C
-40°C to +85°C
-55°C to +125°C
+260°C
Industrial:
Storage Temperature Range
Lead Temperature (soldering, 10s)
Soldering Temperature (reflow)
+260°C
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(TA: See Note 10)
PARAMETER
Power Supply Voltage
Logic 1
SYMBOL
VCC
MIN
3.0
2.2
TYP
3.3
MAX
3.6
VCC
0.4
UNITS
NOTES
V
V
V
VIH
Logic 0
VIL
0.0
DC ELECTRICAL CHARACTERISTICS
±
(TA: See Note 10) (VCC = 3.3V 0.3V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Input Leakage Current
I/O Leakage Current
IIL
-1.0
+1.0
µA
IIO
-1.0
+1.0
µA
≥ VIH ≤ VCC
CE
Output Current @ 2.2V
Output Current @ 0.4V
IOH
IOL
ICCS1
-1.0
2.0
mA
mA
µA
14
14
50
30
250
150
Standby Current
Standby Current
= 2.2V
CE
ICCS2
µA
= VCC -0.2V
CE
Operating Current
Write Protection Voltage
ICCO1
VTP
50
3.0
mA
V
2.8
2.9
CAPACITANCE
PARAMETER
Input Capacitance
(TA = +25°C)
SYMBOL
CIN
MIN
TYP
5
5
MAX
10
10
UNITS
pF
NOTES
Input/Output Capacitance
CI/O
pF
4 of 10
DS1345W
AC ELECTRICAL CHARACTERISTICS
±
(TA: See Note 10) (VCC =3.3V 0.3V)
DS1345W-100
PARAMETER
SYMBOL
UNITS
NOTES
MIN
MAX
Read Cycle Time
Access Time
tRC
tACC
tOE
tCO
tCOE
100
ns
ns
ns
ns
ns
100
50
100
to Output Valid
to Output Valid
OE
CE
OE
5
5
5
5
or
to Output Active
CE
Output High Z
tOD
35
ns
ns
from Deselection
Output Hold from
Address Change
Write Cycle Time
Write Pulse Width
Address Setup Time
tOH
tWC
tWP
100
75
0
ns
ns
ns
3
tAW
tWR1
tWR2
tODW
tOEW
tDS
5
20
12
13
5
5
4
Write Recovery Time
ns
35
ns
ns
ns
Output High Z from
Output Active from
Data Setup Time
WE
WE
5
40
0
tDH1
tDH2
12
13
Data Hold Time
ns
20
READ CYCLE
SEE NOTE 1
5 of 10
DS1345W
WRITE CYCLE 1
SEE NOTES 2, 3, 4, 6, 7, 8 AND 12
WRITE CYCLE 2
SEE NOTES 2, 3, 4, 6, 7, 8 AND 13
6 of 10
DS1345W
POWER-DOWN/POWER-UP CONDITION
BATTERY WARNING DETECTION
SEE NOTE 14
7 of 10
DS1345W
POWER-DOWN/POWER-UP TIMING
(TA: See Note 10)
PARAMETER
SYMBOL
MIN
150
TYP
MAX
UNITS
NOTES
VCC Fail Detect to
and
CE
tPD
tF
tRPD
tR
1.5
µs
11
Inactive
WE
VCC slew from VTP to 0V
µs
VCC Fail Detect to
Active
RST
15
µs
14
VCC slew from 0V to VTP
150
µs
VCC Valid to
Inactive
and
WE
CE
tPU
2
ms
VCC Valid to End of Write
Protection
tREC
125
ms
tRPU
tBPU
150
200
350
1
ms
s
14
14
VCC Valid to
VCC Valid to
Inactive
Valid
RST
BW
BATTERY WARNING TIMING
(TA: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Battery Test Cycle
Battery Test Pulse Width
tBTC
tBTPW
tBW
24
hr
s
s
1
1
Battery Test to
Active
BW
(TA= +25°C)
PARAMETER
Expected Data
Retention Time
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
tDR
10
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
is high for a read cycle.
WE
2.
= VIH or VIL . If
= VIH during write cycle, the output buffers remain in a high impedance state.
OE
OE
3. tWP is specified as the logical AND of
and
. t is measured from the latter of
or
CE WE
CE
WE
WP
going low to the earlier of
or
going high.
WE
CE
4. tDS is measured from the earlier of
or
going high.
WE
CE
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the low transition occurs simultaneously with or latter than the
low transition, the output
high transition, the output
CE
WE
WE
buffers remain in a high impedance state during this period.
7. If the high transition occurs prior to or simultaneously with the
CE
buffers remain in high impedance state during this period.
8. If is low or the low transition occurs prior to or simultaneously with the low transition,
CE
WE
WE
the output buffers remain in a high impedance state during this period.
9. Each DS1345W has a built-in switch that disconnects the lithium source until VCC is first applied by
the user. The expected tDR is defined as accumulative time in the absence of VCC starting from the
time power is first applied by the user.
8 of 10
DS1345W
10. All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0°C to 70°C. For industrial products (IND), this range is -40°C to
+85°C.
11. In a power-down condition the voltage on any pin may not exceed the voltage on VCC.
12. tWR1 and tDH1 are measured from
13. tWR2 and tDH2 are measured from
going high.
going high.
WE
CE
14.
and
are open-drain outputs and cannot source current. External pullup resistors should be
BW
RST
connected to these pins for proper operation. Both pins will sink 10mA.
15. DS1345 modules are recognized by Underwriters Laboratory (U.L.®) under file E99151.
DC TEST CONDITIONS
Outputs Open
Cycle = 200ns for operating current
All voltages are referenced to ground
AC TEST CONDITIONS
Output Load: 100 pF + 1TTL Gate
Input Pulse Levels: 0 to 2.7V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input pulse Rise and Fall Times: 5ns
ORDERING INFORMATION
SUPPLY
PART
TEMP RANGE
PIN-PACKAGE
TOLERANCE
3.3V ± 0.3V
3.3V ± 0.3V
DS1345WP-100+
0°C to +70°C
34 PCAP*
34 PCAP*
DS1345WP-100IND+
-40°C to +85°C
+ Denote sa lead(Pb)-free/RoHS-compliant package.
* DS9034PC+ or DS9034PCI+ (PowerCap) required. Must be ordered separately.
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a
different suffix character, but the drawing pertains to the package regardless of RoHS status.
LAND
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
21-0246
PATTERN NO.
34 PCAP
PC2+3
—
9 of 10
DS1345W
REVISION HISTORY
REVISION
PAGES
CHANGED
DESCRIPTION
DATE
Updated the soldering information in the Absolute Maximum Ratings
section, removed the unused AC timing specs in the AC Electrical
Characteristics table, updated the Ordering Information table,
replaced the package outline drawing with the Package Information
table
10/10
1, 4, 5, 9
10 of 10
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses
are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products
Maxim and the Dallas logo are registered trademarks of Maxim Integrated Products, Inc.
相关型号：
DS1345WP-150+
128KX8 NON-VOLATILE SRAM MODULE, 150ns, DMA34, ROHS COMPLIANT, POWERCAP MODULE-34
ROCHESTER
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