ISL5120IB-T [ROCHESTER]
DUAL 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO8, PLASTIC, MS-012-AA, SOIC-8;
| 型号： | ISL5120IB-T |
| 厂家： | 
Rochester Electronics |
| 描述： | DUAL 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO8, PLASTIC, MS-012-AA, SOIC-8 光电二极管 输出元件 |
| 文件： | 总16页 (文件大小：1213K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL5120, ISL5121, ISL5122, ISL5123
®
Data Sheet
November 17, 2004
FN6022.6
Low-Voltage, Single Supply, Dual SPST,
SPDT Analog Switches
The Intersil ISL5120, ISL5121, ISL5122, ISL5123 devices are
precision, bidirectional, dual analog switches designed to
operate from a single +2.7V to +12V supply. Targeted
applications include battery powered equipment that benefit
from the devices’ low power consumption (5µW), low leakage
Features
• Improved (lower R , faster switching), pin compatible
replacements for ISL84541–44
ON
• Fully specified at 3.3V, 5V, and 12V supplies
• ON resistance (R ) . . . . . . . . . . . . . . . . . . . . . . . . . 19Ω
ON
• R
ON
matching between channels . . . . . . . . . . . . . . . . . ≤ 1Ω
currents (100pA max), and fast switching speeds (t
OFF
= 28ns,
= 20ns). Cell phones, for example, often face ASIC
ON
• Low charge injection. . . . . . . . . . . . . . . . . . . . . . . . 5pC (Max)
• Single supply operation . . . . . . . . . . . . . . . . . .+2.7V to +12V
t
functionality limitations. The number of analog input or GPIO
pins may be limited and digital geometries are not well suited
to analog switch performance. This family of parts may be
used to “mux-in” additional functionality while reducing ASIC
design risk. Some of the smallest packages are available,
alleviating board space limitations, and making Intersil’s
newest line of low-voltage switches an ideal solution.
• Low power consumption (P ) . . . . . . . . . . . . . . . . . . . .<5µW
D
• Low leakage current. . . . . . . . . . . . . . . . . . . . . . . . . .10nA
• Fast switching action
- t
- t
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28ns
ON
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns
OFF
The ISL5120, ISL5121, ISL5122 are dual single-pole/single-
throw (SPST) devices. The ISL5120 has two normally open
(NO) switches; the ISL5121 has two normally closed (NC)
switches; the ISL5122 has one NO and one NC switch and
can be used as an SPDT. The ISL5123 is a committed SPDT,
which is perfect for use in 2-to-1 multiplexer applications.
• Guaranteed break-before-make (ISL5122/ISL5123 only)
• Minimum 2000V ESD protection per method 3015.7
• TTL, CMOS compatible
• Available in SOT-23 packaging
• Pb-Free Available (RoHS Compliant)
TABLE 1. FEATURES AT A GLANCE
Applications
ISL5120
ISL5121
ISL5122
ISL5123
• Battery powered, handheld, and portable equipment
- Cellular/mobile phones
Number of
Switches
2
2
2
1
- Pagers
SW 1/SW 2
NO/NO
NC/NC
NO/NC
SPDT
- Laptops, notebooks, palmtops
3.3V R
32Ω
32Ω
32Ω
32Ω
ON
• Communications systems
- Military radios
- PBX, PABX
3.3V t /t
40ns /20ns 40ns /20ns 40ns /20ns 40ns /20ns
19Ω 19Ω 19Ω 19Ω
28ns/2y0ns 28ns/20ns 28ns/20ns 28ns/20ns
11Ω 11Ω 11Ω 11Ω
25ns/17ns 25ns/17ns 25ns/17ns 25ns/17ns
ON OFF
5V R
ON
5V t /t
ON OFF
• Test equipment
- Ultrasound
- Electrocardiograph
12V R
ON
12V t /t
ON OFF
8 Ld SOIC,
8 Ld SOT-23
8 Ld SOIC,
8 Ld SOT-23
8 Ld SOIC,
6 Ld SOT-23
• Heads-up displays
Packages
• Audio and video switching
• Various circuits
Related Literature
- +3V/+5V DACs and ADCs
- Sample and hold circuits
- Digital filters
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
- Operational amplifier gain switching networks
- High frequency analog switching
- High speed multiplexing
- Integrator reset circuits
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002-2004. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL5120, ISL5121, ISL5122, ISL5123
Pinouts (Note 1)
ISL5120 (SOIC)
ISL5120 (SOT-23)
TOP VIEW
TOP VIEW
NO
1
1
2
3
4
8
V+
IN
NO
1
8
7
6
5
COM
1
1
COM
1
7
6
5
V+
2
3
4
IN
1
1
IN
2
IN
COM
GND
2
2
2
GND
COM
NO
2
NO
2
ISL5121 (SOIC)
TOP VIEW
ISL5121 (SOT-23)
TOP VIEW
NC
1
1
2
3
4
8
7
6
5
V+
NC
1
2
3
4
8
COM
1
1
COM
1
V+
7
6
5
IN
1
IN
1
IN
2
IN
2
COM
GND
2
GND
COM
2
NC
NC
2
2
ISL5122 (SOIC)
ISL5122 (SOT-23)
TOP VIEW
TOP VIEW
NO
1
1
2
3
4
8
V+
IN
NO
1
8
7
6
5
COM
1
1
COM
1
7
6
5
V+
2
3
4
IN
1
1
IN
2
IN
COM
GND
2
2
2
GND
COM
NC
2
NC
2
ISL5123 (SOIC)
TOP VIEW
ISL5123 (SOT-23)
TOP VIEW
NO
COM
NC
1
2
3
4
8
7
6
5
V+
IN
IN
V+
1
6
5
4
NO
2
3
COM
NC
GND
N.C.
N.C.
GND
NOTE:
1. Switches Shown for Logic “0” Input.
Truth Table
Pin Descriptions
ISL5120 ISL5121
ISL5122
ISL5123
PIN
FUNCTION
LOGIC SW 1,2
SW 1,2
ON
SW 1 SW 2 PIN NC PIN NO
V+
GND
IN
System Power Supply Input (+2.7V to +12V)
Ground Connection
0
1
OFF
ON
OFF
ON
ON
ON
OFF
ON
OFF
OFF
OFF
Digital Control Input
NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V.
COM
NO
Analog Switch Common Pin
Analog Switch Normally Open Pin
Analog Switch Normally Closed Pin
No Internal Connection
NC
N.C.
FN6022.6
November 17, 2004
2
ISL5120, ISL5121, ISL5122, ISL5123
Ordering Information
PART NO.
TEMP.
PKG.
(BRAND)*
RANGE (°C)
PACKAGE
8 Ld SOIC
DWG. #
ISL5120CB
0 to 70
0 to 70
M8.15
ISL5120CBZ (Note)
ISL5120IB
8 Ld SOIC (Pb-free) M8.15
8 Ld SOIC M8.15
8 Ld SOIC (Pb-free) M8.15
-40 to 85
-40 to 85
-40 to 85
ISL5120IBZ (Note)
ISL5120IH-T
(120I)
8 Ld SOT-23
P8.064
P8.064
M8.15
ISL5120IHZ-T (Note)
(120I)
-40 to 85
8 Ld SOT-23
(Pb-free)
ISL5121CB
0 to 70
0 to 70
8 Ld SOIC
ISL5121CBZ (Note)
ISL5121IB
8 Ld SOIC (Pb-free) M8.15
8 Ld SOIC M8.15
8 Ld SOIC (Pb-free) M8.15
-40 to 85
-40 to 85
-40 to 85
ISL5121IBZ (Note)
ISL5121IH-T
(121I)
8 Ld SOT-23
P8.064
P8.064
M8.15
ISL5121IHZ-T(Note)
(121I)
-40 to 85
8 Ld SOT-23
(Pb-free)
ISL5122CB
0 to 70
0 to 70
8 Ld SOIC
ISL5122CBZ (Note)
ISL5122IB
8 Ld SOIC (Pb-free) M8.15
8 Ld SOIC M8.15
8 Ld SOIC (Pb-free) M8.15
-40 to 85
-40 to 85
-40 to 85
ISL5122IBZ (Note)
ISL5122IH-T
(122I)
8 Ld SOT-23
P8.064
P8.064
M8.15
ISL5122IHZ-T (Note)
(122I)
-40 to 85
8 Ld SOT-23
(Pb-free)
ISL5123CB
0 to 70
0 to 70
8 Ld SOIC
ISL5123CBZ (Note)
ISL5123IB
8 Ld SOIC (Pb-free) M8.15
8 Ld SOIC M8.15
8 Ld SOIC (Pb-free) M8.15
-40 to 85
-40 to 85
-40 to 85
-40 to 85
ISL5123IBZ (Note)
ISL5123IH-T (123I)
6 Ld SOT-23
P6.064
P6.064
ISL5123IHZ-T(Note)
(123I)
6 Ld SOT-23
(Pb-free)
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
*Most surface mount devices are available on tape and reel;
add “-T” to suffix.
FN6022.6
3
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Absolute Maximum Ratings
Thermal Information
Thermal Resistance (Typical, Note 4)
6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
8 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C
Moisture Sensitivity (See Technical Brief TB363)
All Other Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
8 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V
θ
(°C/W)
JA
Input Voltages
230
215
170
IN (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
NO, NC (Note 3) . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 40mA
ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV
Operating Conditions
Temperature Range
ISL512XCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
ISL512XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. Signals on NC, NO, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
3. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications - 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, V
Unless Otherwise Specified
= 2.4V, V
= 0.8V (Note 5),
INH
INL
TEMP (NOTE 6)
(NOTE 6)
MAX
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
-
V+
30
40
2
V
Ω
ON Resistance, R
V+ = 4.5V, I
= 1.0mA, V
or V = 3.5V,
NC
19
ON
COM
(See Figure 5)
NO
Full
25
-
23
Ω
R
Matching Between Channels, V+ = 5V, I
ON
= 1.0mA, V
NO
or V = 3.5V
NC
-
0.8
Ω
ON
∆R
COM
Full
Full
25
-
1
4
Ω
R
Flatness, R
V+ = 5V, I
= 1.0mA, V
or V = 1V, 2V, 3V
NC
-
7
8
Ω
ON
NO or NC OFF Leakage Current,
or I
FLAT(ON)
COM
NO
V+ = 5.5V, V
(Note 7)
= 1V, 4.5V, V
or V
= 4.5V, 1V,
-0.1
-5
-0.1
-5
-0.2
-10
0.01
0.1
5
nA
nA
nA
nA
nA
nA
COM
COM
COM
NO
NC
I
NO(OFF)
NC(OFF)
Full
25
-
-
-
-
-
COM OFF Leakage Current,
V+ = 5.5V, V
(Note 7)
= 4.5V, 1V, V
or V
= 1V, 4.5V,
0.1
5
NO
NC
I
COM(OFF)
Full
25
COM ON Leakage Current,
V+ = 5.5V, V
or Floating, (Note 7)
= 1V, 4.5V, or V
NO
or V
= 1V, 4.5V,
0.2
10
NC
I
COM(ON)
Full
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
V
or V
= 3V, R =1kΩ, C = 35pF, V = 0 to 3V,
IN
25
Full
25
-
-
28
40
20
30
10
75
150
50
ns
ns
ns
ns
ns
ON
NO
NC
L
L
(See Figure 1)
Turn-OFF Time, t
V
or V
= 3V, R =1kΩ, C = 35pF, V = 0 to 3V,
-
OFF
NO
NC
L
L
IN
(See Figure 1)
Full
Full
-
100
-
Break-Before-Make Time Delay
R = 300Ω, C = 35pF, V
(See Figure 3)
= V = 3V, V = 0 to 3V,
NC IN
3
L
L
NO
(ISL5122, ISL5123), t
Charge Injection, Q
OFF Isolation
D
C
R
R
= 1.0nF, V = 0V, R = 0Ω, (See Figure 2)
25
25
25
-
-
-
3
5
-
pC
dB
dB
L
L
L
G
G
= 50Ω, C = 5pF, f = 1MHz, (See Figure 4)
76
L
Crosstalk (Channel-to-Channel)
= 50Ω, C = 5pF, f = 1MHz, (See Figure 6)
-105
-
L
FN6022.6
4
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Electrical Specifications - 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, V
= 2.4V, V
= 0.8V (Note 5),
(NOTE 6)
INH
INL
Unless Otherwise Specified (Continued)
TEMP (NOTE 6)
PARAMETER
TEST CONDITIONS
(°C)
25
MIN
TYP
60
8
MAX
UNITS
dB
Power Supply Rejection Ratio
NO or NC OFF Capacitance, C
COM OFF Capacitance,
R
= 50Ω, C = 5pF, f = 1MHz
-
-
-
-
-
-
L
L
f = 1MHz, V
f = 1MHz, V
or V
= V
= V
= 0V, (See Figure 7)
= 0V, (See Figure 7)
25
pF
OFF
NO
NO
NC
NC
COM
COM
or V
25
8
pF
C
COM(OFF)
COM ON Capacitance, C
f = 1MHz, V
or V
= V
= V
= 0V, (See Figure 7),
= 0V, (See Figure 7),
25
25
-
-
21
28
-
-
pF
pF
COM(ON)
NO
NC
NC
COM
COM
ISL5120/1/2
f = 1MHz, V
ISL5123
or V
NO
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Full
Full
2.7
-1
12
1
V
Positive Supply Current, I+
V+ = 5.5V, V = 0V or V+, all channels on or off
IN
0.0001
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
Full
Full
Full
-
-
-
-
0.8
-
V
V
INL
Input Voltage High, V
2.4
-1
INH
Input Current, I , I
INH INL
V+ = 5.5V, V = 0V or V+
IN
1
µA
NOTES:
4. V = input voltage to perform proper function.
IN
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C.
Electrical Specifications - 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, V
Unless Otherwise Specified
= 2.4V, V
= 0.8V (Note 5),
(NOTE 6)
INH
INL
TEMP (NOTE 6)
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
32
40
0.8
1
V+
50
60
2
V
Ω
ON Resistance, R
V+ = 3V, I
= 1.0mA, V
or V = 1.5V
NC
-
-
ON
COM
NO
Full
25
Ω
R
Matching Between Channels, V+ = 3.3V, I
ON
= 1.0mA, V
NO
or V
= 1.5V
-
Ω
ON
∆R
COM
COM
NC
NC
Full
25
-
4
Ω
R
Flatness, R
V+ = 3.3V, I
= 1.0mA, V or V
NO
= 0.5V, 1V, 1.5V
-
6
8
Ω
ON
FLAT(ON)
Full
25
-
7
12
0.1
5
Ω
NO or NC OFF Leakage Current,
or I
V+ = 3.6V, V
(Note 7)
= 1V, 3V, V
or V
= 3V, 1V,
= 1V, 3V,
-0.1
-5
-0.1
-5
-0.2
-10
0.01
-
nA
nA
nA
nA
nA
nA
COM
COM
COM
NO
NC
NC
I
NO(OFF)
NC(OFF)
Full
25
COM OFF Leakage Current,
V+ = 3.6V, V
(Note 7)
= 3V, 1V, V
or V
0.01
-
0.1
5
NO
I
COM(OFF)
Full
25
COM ON Leakage Current,
V+ = 3.6V, V
floating, (Note 7)
= 1V, 3V, or V
NO
or V
= 1V, 3V, or
-
0.2
10
NC
I
COM(ON)
Full
-
FN6022.6
5
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Electrical Specifications - 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, V
= 2.4V, V
= 0.8V (Note 5),
(NOTE 6)
INH
INL
Unless Otherwise Specified (Continued)
TEMP (NOTE 6)
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
MAX
UNITS
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
V
V
or V
or V
= 1.5V, R =1kΩ, C = 35pF, V = 0 to 3V
IN
25
Full
25
-
-
40
60
20
30
20
120
200
50
ns
ns
ns
ns
ns
ON
NO
NO
NC
NC
L
L
Turn-OFF Time, t
= 1.5V, R =1kΩ, C = 35pF, V = 0 to 3V
-
OFF
L
L
IN
Full
Full
-
120
-
Break-Before-Make Time Delay
R
= 300Ω, C = 35pF, V
= 0 to 3V
or V
= 1.5V,
3
L
IN
L
NO
NC
(ISL5122, ISL5123), t
Charge Injection, Q
OFF Isolation
V
C
R
D
= 1.0nF, V = 0V, R = 0Ω
25
25
25
25
25
25
-
-
-
-
-
-
1
76
-105
56
8
5
-
pC
dB
dB
dB
pF
pF
L
L
G
G
= 50Ω, C = 5pF, f = 1MHz
L
Crosstalk (Channel-to-Channel)
Power Supply Rejection Ratio
-
R
= 50Ω, C = 5pF, f = 1MHz
-
L
L
NO or NC OFF Capacitance, C
COM OFF Capacitance,
f = 1MHz, V
f = 1MHz, V
or V
or V
= V
= V
= 0V
= 0V
-
OFF
NO
NO
NC
COM
COM
8
-
NC
C
COM(OFF)
COM ON Capacitance, C
f = 1MHz, V
f = 1MHz, V
or V
or V
= V
= V
= 0V, ISL5120/1/2
= 0V, ISL5123
25
25
-
-
21
28
-
-
pF
pF
COM(ON)
NO
NO
NC
COM
COM
NC
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 3.6V, V = 0V or V+, all channels on or off
IN
Full
-1
-
1
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
Full
Full
Full
-
-
-
-
0.8
-
V
V
INL
Input Voltage High, V
2.4
-1
INH
Input Current, I
, I
V+ = 3.6V, V = 0V or V+
IN
1
µA
INH INL
Electrical Specifications - 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, V
Unless Otherwise Specified
= 4V, V
= 0.8V (Note 5),
INH
INL
TEMP (NOTE 6)
(NOTE6)
MAX
PARAMETER
TEST CONDITIONS
(°C)
MIN
TYP
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
11
15
0.8
1
V+
20
25
2
V
Ω
ON Resistance, R
V+ = 10.8V, I
= 1.0mA, V
or V = 10V
NC
-
ON
COM
NO
Full
25
-
-
Ω
R
Matching Between Channels, V+ = 12V, I
ON
= 1.0mA, V
NO
or V
NC
= 10V
Ω
ON
∆R
COM
COM
Full
25
-
4
Ω
R
Flatness, R
V+ = 12V, I
= 1.0mA, V
or V = 3V, 6V, 9V
NC
-
1
4
Ω
ON
FLAT(ON)
NO
Full
25
-
-
6
Ω
NO or NC OFF Leakage Current,
or I
V+ = 13V, V
(Note 7
= 1V, 12V, V
= 12V, 1V, V
or V
= 12V, 1V,
= 1V, 12V,
-0.1
-5
-0.1
-5
0.01
-
0.1
5
nA
nA
nA
nA
COM
NO
NO
NC
NC
I
NO(OFF)
NC(OFF)
Full
25
COM OFF Leakage Current,
V+ = 13V, V
(Note 7
or V
0.01
-
0.1
5
COM
I
COM(OFF)
Full
FN6022.6
6
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Electrical Specifications - 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, V
= 4V, V
= 0.8V (Note 5),
(NOTE6)
INH
INL
Unless Otherwise Specified (Continued)
TEMP (NOTE 6)
PARAMETER
TEST CONDITIONS
= 1V, 12V, or V or V = 1V, 12V,
NC
(°C)
25
MIN
-0.2
-10
TYP
MAX
UNITS
COM ON Leakage Current,
COM(ON)
V+ = 13V, V
-
-
0.2
nA
nA
COM
or floating, (Note 7)
NO
I
Full
10
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
V
V
or V
or V
= 10V, R =1kΩ, C = 35pF, V = 0 to 4V
IN
25
Full
25
-
-
25
35
17
26
2
35
55
30
50
ns
ns
ns
ns
ns
ON
NO
NO
NC
NC
L
L
Turn-OFF Time, t
= 10V, R =1kΩ, C = 35pF, V = 0 to 4V
-
OFF
L
L
IN
Full
Full
-
Break-Before-Make Time Delay
R
= 300Ω, C = 35pF, V
= 0 to 4V
or V
= 10V,
0
L
IN
L
NO
NC
(ISL5122, ISL5123), t
Charge Injection, Q
OFF Isolation
V
C
R
D
= 1.0nF, V = 0V, R = 0Ω
25
25
25
25
25
25
-
-
-
-
-
-
5
15
-
pC
dB
dB
dB
pF
pF
L
L
G
G
= 50Ω, C = 5pF, f = 1MHz
76
L
Crosstalk (Channel-to-Channel)
Power Supply Rejection Ratio
-105
63
8
-
R
= 50Ω, C = 5pF, f = 1MHz
-
L
L
NO or NC OFF Capacitance, C
f = 1MHz, V
f = 1MHz, V
or V
= V
= V
= 0V
= 0V
-
OFF
NO
NO
NC
NC
COM
COM
COM OFF Capacitance,
or V
8
-
C
COM(OFF)
COM ON Capacitance, C
f = 1MHz, V
f = 1MHz, V
or V
or V
= V
= V
= 0V, ISL5120/1/2
= 0V, ISL5123
25
25
-
-
21
28
-
-
pF
pF
COM(ON)
NO
NO
NC
COM
COM
NC
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 13V, V = 0V or V+, all channels on or off
IN
Full
-1
-
1
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
Full
Full
Full
Full
-
2.9
4
-
-
0.8
V
V
INL
Input Voltage High, V
Input Voltage High, V
ISL5120CX only
-
-
INH
INH
3
-
V
Input Current, I
, I
V+ = 13V, V = 0V or V+
IN
-1
1
µA
INH INL
Test Circuits and Waveforms
V+
3V OR 4V
t < 20ns
r
t < 20ns
f
C
LOGIC
INPUT
50%
0V
NO
0V
t
V
OFF
OUT
NO or NC
SWITCH
INPUT
COM
SWITCH
INPUT
V
V
OUT
IN
90%
90%
C
35pF
R
LOGIC
INPUT
L
1kΩ
L
GND
SWITCH
OUTPUT
t
ON
Repeat test for all switches. C includes fixture and stray
L
Logic input waveform is inverted for switches that have the opposite
logic sense.
capacitance.
R
L
------------------------------
V
= V
OUT
(NO or NC)
R
+ R
L
(ON)
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
FN6022.6
7
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Test Circuits and Waveforms (Continued)
V+
C
SWITCH
OUTPUT
V
OUT
R
G
∆V
OUT
COM
NO or NC
GND
V
OUT
V+
0V
V
ON
ON
IN
G
LOGIC
INPUT
C
L
OFF
LOGIC
INPUT
Q = ∆V
x C
L
OUT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
C
3V OR 4V
LOGIC
INPUT
V
0V
OUT1
NO1
V
NX
COM
COM
1
C
V
R
L1
L1
35pF
NC2
OUT2
300Ω
90%
SWITCH
OUTPUT
2
IN
1
V
0V
OUT1
R
C
35pF
L2
300Ω
L2
IN
2
90%
SWITCH
OUTPUT
LOGIC
INPUT
GND
V
OUT2
0V
t
t
D
D
C
L
includes fixture and stray capacitance.
FIGURE 3A. MEASUREMENT POINTS (ISL5122 ONLY)
FIGURE 3B. TEST CIRCUIT (ISL5122 ONLY)
V+
C
3V OR 4V
LOGIC
INPUT
NO
V
OUT
V
NX
COM
NC
IN
0V
C
R
300Ω
L
L
35pF
GND
90%
LOGIC
INPUT
SWITCH
OUTPUT
V
OUT
0V
t
D
C
includes fixture and stray capacitance.
FIGURE 3D. TEST CIRCUIT (ISL5123 ONLY)
FIGURE 3. BREAK-BEFORE-MAKE TIME
L
FIGURE 3C. MEASUREMENT POINTS (ISL5123 ONLY)
FN6022.6
8
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Test Circuits and Waveforms (Continued)
V+
V+
C
C
R
= V /1mA
1
ON
SIGNAL
GENERATOR
NO or NC
NO or NC
V
NX
0.8V or V
1mA
INH
IN
0V or V
INH
IN
V
X
1
COM
COM
ANALYZER
GND
GND
R
L
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. R
TEST CIRCUIT
ON
V+
C
V+
C
SIGNAL
GENERATOR
50Ω
NO1 or NC1
COM1
NO or NC
IN
1
0V or V
IN
INH
X
0V or V
0V or 2.4V
INH
IN
2
IMPEDANCE
ANALYZER
COM
NO2 or NC2
GND
COM2
ANALYZER
NC
GND
R
L
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Supply Sequencing And Overvoltage Protection
Detailed Description
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and GND (See
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
The ISL5120–ISL5123 bidirectional, dual analog switches
offer precise switching capability from a single 2.7V to 12V
supply with low on-resistance (19Ω) and high speed
operation (t
= 28ns, t = 20ns). The devices are
ON
OFF
especially well suited to portable battery powered equipment
thanks to the low operating supply voltage (2.7V), low power
consumption (5µW), low leakage currents (100pA max), and
the tiny SOT-23 packaging. High frequency applications also
benefit from the wide bandwidth, and the very high off
isolation and crosstalk rejection.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (See Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
FN6022.6
9
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
produces an insignificant voltage drop during normal
Logic-Level Thresholds
operation.
This switch family is TTL compatible (0.8V and 2.4V) over a
supply range of 3V to 11V (See Figure 15). At 12V the V
IH
Adding a series resistor to the switch input defeats the
level is about 2.5V. This is still below the TTL guaranteed
high output minimum level of 2.8V, but the noise margin is
reduced. For best results with a 12V supply, use a logic
purpose of using a low R
switch, so two small signal
ON
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (See Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
family the provides a V
greater than 3V.
OH
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
OPTIONAL PROTECTION
DIODE
In 50Ω systems, signal response is reasonably flat even past
300MHz (See Figure 16). Figure 16 also illustrates that the
frequency response is very consistent over a wide V+ range,
and for varying analog signal levels.
V+
OPTIONAL
PROTECTION
RESISTOR
IN
V
X
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough, while Crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 17 details the high Off Isolation and Crosstalk
rejection provided by this family. At 10MHz, Off Isolation is
about 50dB in 50Ω systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
V
NO or NC
COM
GND
OPTIONAL PROTECTION
DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
Power-Supply Considerations
The ISL512X construction is typical of most CMOS analog
switches, except that they have only two supply pins: V+ and
GND. V+ and GND drive the internal CMOS switches and
set their analog voltage limits. Unlike switches with a 13V
maximum supply voltage, the ISL512X 15V maximum supply
voltage provides plenty of room for the 10% tolerance of 12V
supplies, as well as room for overshoot and noise spikes.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
The minimum recommended supply voltage is 2.7V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages. Refer
to the electrical specification tables and Typical Performance
curves for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
FN6022.6
10
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Typical Performance Curves T = 25°C, Unless Otherwise Specified
A
45
40
35
40
35
30
25
20
15
V+ = 3.3V
30
25
20
15
30
25
85°C
25°C
-40°C
85°C
V+ = 5V
20
15
85°C
25°C
-40°C
25°C
10
20
15
10
5
-40°C
10
5
85°C
V+ = 12V
25°C
3
4
5
6
7
8
9
10
11
12
13
-40°C
V+ (V)
0
2
4
6
8
10
12
V
(V)
COM
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE
0.5
0.4
0.3
0.2
0.1
0
0.25
0.2
0.15
V+ = 3.3V
60
25°C
50
40
30
20
10
0
85°C
-40°C
V+ = 5V
25°C
V+ = 5V
85°C
V+ = 12V
0.1
0.05
0
85°C
V+ = 3.3V
-40°C
25°C
0.15
V+ = 12V
0.1
0.05
0
-10
-20
-40°C
85°C
25°C
-40°C
0
2
4
6
8
10
12
0
2
4
6
8
10
12
V
(V)
COM
V
(V)
COM
FIGURE 11. R
MATCH vs SWITCH VOLTAGE
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
ON
100
90
80
70
60
50
40
30
20
35
30
85°C
25
85°C
-40°C
-40°C
20
-40°C
25°C
25°C
15
2
3
4
5
6
7
8
9
10
11
12
2
3
4
5
6
7
8
9
10
11
12
V+ (V)
V+ (V)
FIGURE 13. TURN-ON TIME vs SUPPLY VOLTAGE
FIGURE 14. TURN-OFF TIME vs SUPPLY VOLTAGE
FN6022.6
11
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Typical Performance Curves T = 25°C, Unless Otherwise Specified (Continued)
A
V+ = 3.3V to 12V
3.0
0
GAIN
-3
2.5
V
INH
-6
-40°C
85°C
0
2.0
1.5
1.0
0.5
PHASE
20
40
60
80
100
25°C
85°C
-40°C
25°C
11
R
= 50Ω
L
V
INL
V
V
V
= 0.2V
= 0.2V
= 0.2V
to 2.5V
to 4V
(V+ = 3.3V)
P-P
IN
IN
IN
P-P
P-P
P-P
(V+ = 5V)
85°C
4
P-P
to 5V
(V+ = 12V)
P-P
2
3
5
6
7
8
9
10
12
13
1
10
100
FREQUENCY (MHz)
600
V+ (V)
FIGURE 16. FREQUENCY RESPONSE
FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
-10
-20
-30
-40
-50
-60
-70
-80
-90
10
20
30
40
50
60
70
80
90
R
= 50Ω
L
V+ = 3V to 13V
0
10
20
30
40
50
60
70
80
V+ = 3.3V, SWITCH OFF
V+ = 12V, SWITCH OFF
ISOLATION
V+ = 12V, SWITCH ON
V+ = 3.3V, SWITCH ON
CROSSTALK
-100
-110
100
110
0.3
1
10
100
1000
1k
10k
100k
1M
10M
100M 500M
FREQUENCY (Hz)
FREQUENCY (MHz)
FIGURE 17. CROSSTALK AND OFF ISOLATION
FIGURE 18. ±PSRR vs FREQUENCY
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ISL5120: 66
ISL5121: 66
ISL5122: 66
ISL5123: 58
PROCESS:
Si Gate CMOS
FN6022.6
November 17, 2004
12
ISL5120, ISL5121, ISL5122, ISL5123
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INDEX
0.25(0.010)
M
L
B M
H
AREA
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
NOTES
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
0.0688
0.0098
0.020
-
1
2
3
-
9
SEATING PLANE
A
0.0075
0.1890
0.1497
0.0098
0.1968
0.1574
-
-A-
o
h x 45
D
3
4
-C-
α
0.050 BSC
1.27 BSC
-
e
A1
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
C
B
0.10(0.004)
5
0.25(0.010) M
C
A M B S
L
6
N
α
8
8
7
NOTES:
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN6022.6
13
November 17, 2004
ISL5120, ISL5121, ISL5122, ISL5123
Small Outline Transistor Plastic Packages (SOT23-6)
VIEW C
P6.064
0.20 (0.008)
C
M
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
C
L
INCHES
MIN
MILLIMETERS
e
b
6
SYMBOL
MAX
0.057
0.0059
0.051
0.020
0.018
0.009
0.008
0.118
0.118
0.068
MIN
0.90
0.00
0.90
0.30
0.30
0.08
0.08
2.80
2.60
1.50
MAX
1.45
0.15
1.30
0.50
0.45
0.22
0.20
3.00
NOTES
A
A1
A2
b
0.036
0.000
0.036
0.012
0.012
0.003
0.003
0.111
0.103
0.060
-
-
-
-
5
2
4
3
C
L
E1
C
E
L
1
b1
c
6
6
3
-
e1
C
c1
D
D
C
L
E
3.00
1.75
0.95 Ref
1.90 Ref
0.35 0.55
E1
e
3
-
SEATING
PLANE
0.0374 Ref
0.0748 Ref
0.014 0.022
A2
A1
A
e1
L
-
-C-
4
L1
L2
N
0.024 Ref.
0.010 Ref.
6
0.60 Ref.
0.25 Ref.
6
0.10 (0.004)
C
5
b
WITH
R
0.004
-
0.10
-
PLATING
b1
R1
α
0.004
0.010
0.10
0.25
c
c1
o
o
o
o
0
8
0
8
-
Rev. 3 9/03
BASE METAL
NOTES:
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC-74 and JEDEC MO178AB.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
GAUGE PLANE
SEATING
PLANE
L
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
C
α
L2
L1
4X θ1
VIEW C
FN6022.6
November 17, 2004
14
ISL5120, ISL5121, ISL5122, ISL5123
Small Outline Transistor Plastic Packages (SOT23-8)
P8.064
0.20 (0.008) M
C
VIEW C
8 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
C
L
e
INCHES
MIN
MILLIMETERS
b
8
SYMBOL
MAX
0.057
0.0059
0.051
0.015
0.013
0.009
0.008
0.118
0.118
0.067
MIN
0.90
0.00
0.90
0.22
0.22
0.08
0.08
2.80
2.60
1.50
MAX
1.45
0.15
1.30
0.38
0.33
0.22
0.20
3.00
3.00
1.70
NOTES
A
A1
A2
b
0.036
0.000
0.036
0.009
0.009
0.003
0.003
0.111
0.103
0.060
-
-
-
-
7
2
6
5
4
C
E1
L
C
L
E
1
3
b1
c
6
6
3
-
e1
D
c1
D
C
C
L
E
E1
e
3
-
0.0256 Ref
0.0768 Ref
0.014 0.022
0.65 Ref
1.95 Ref
0.35 0.55
SEATING
PLANE
A2
A1
A
e1
L
-
-C-
4
L1
L2
N
0.024 Ref.
0.010 Ref.
8
0.60 Ref.
0.25 Ref.
8
0.10 (0.004)
C
5
b
R
0.004
-
0.10
-
WITH
PLATING
b1
R1
α
0.004
0.010
0.10
0.25
o
o
o
o
0
8
0
8
-
c
c1
Rev. 2 9/03
NOTES:
BASE METAL
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC-74 and JEDEC MO178BA.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
GAUGE PLANE
SEATING
PLANE
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
L
C
α
L2
L1
4X θ1
VIEW C
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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For information regarding Intersil Corporation and its products, see www.intersil.com
FN6022.6
15
November 17, 2004
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