LM4873MTE/NOPB [ROCHESTER]

2.2W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO20, 6.50 X 4.40 MM, 0.90 MM HEIGHT, TSSOP-20;
LM4873MTE/NOPB
型号: LM4873MTE/NOPB
厂家: Rochester Electronics    Rochester Electronics
描述:

2.2W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO20, 6.50 X 4.40 MM, 0.90 MM HEIGHT, TSSOP-20

放大器 光电二极管
文件: 总26页 (文件大小:1645K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
October 2002  
LM4873  
Dual 2.1W Audio Amplifier Plus Stereo Headphone  
Function  
General Description  
Key Specifications  
The LM4873 is a dual bridge-connected audio power ampli-  
fier which, when connected to a 5V supply, will deliver 2.1W  
to a 4load (Note 1) or 2.4W to a 3load (Note 2) with less  
than 1.0% THD+N. In addition, the headphone input pin  
allows the amplifiers to operate in single-ended mode when  
driving stereo headphones. A MUX control pin allows selec-  
tion between the two stereo sets of amplifier inputs. The  
MUX control can also be used to select two different  
closed-loop responses.  
j
PO at 1% THD+N  
LM4873LQ, 3, 4loads  
2.4W(typ), 2.1W(typ)  
LM4873MTE-1, 3, 4loads 2.4W(typ), 2.1W(typ)  
LM4873IBL, 8load  
LM4873MTE, 4Ω  
1.1W(typ)  
1.9W(typ)  
1.1W(typ)  
0.5%(max)  
LM4873, 8Ω  
j
Single-ended mode THD+N  
at 75mW into 32Ω  
Shutdown current  
Boomer audio power amplifiers were designed specifically to  
provide high quality output power from a surface mount  
package while requiring few external components. To sim-  
plify audio system design, the LM4873 combines dual bridge  
speaker amplifiers and stereo headphone amplifiers on one  
chip.  
j
j
0.7µA(typ)  
2V to 5.5V  
Supply voltage range  
Features  
The LM4873 features an externally controlled, low-power  
consumption shutdown mode, a stereo headphone amplifier  
mode, and thermal shutdown protection. It also utilizes cir-  
cuitry to reduce “clicks and pops” during device turn-on.  
Note 1: An LM4873MTE-1, LM4873MTE, or LM4873LQ that has been  
properly mounted to a circuit board will deliver 2.1W into 4. The other  
package options for the LM4873 will deliver 1.1W into 8. See the Applica-  
tion Information sections for further information concerning the  
LM4873MTE-1, LM4873MTE, and the LM4873LQ.  
n Input mux control and two separate inputs per channel  
n Stereo headphone amplifier mode  
n “Click and pop” suppression circuitry  
n Thermal shutdown protection circuitry  
n PCB area-saving micro SMD and thin micro SMD  
packages  
n TSSOP and exposed-DAP TSSOP and LLP packages  
Note 2: An LM4873MTE-1, LM4873MTE, or LM4873LQ that has been prop-  
erly mounted to a circuit board and forced-air cooled will deliver 2.4W into 3.  
Applications  
n Multimedia monitors  
n Portable and desktop computers  
n Portable audio systems  
Connection Diagrams  
10099330  
Top View  
10099302  
Top View  
Order Number LM4873MTE-1  
See NS Package Number MXA28A for Exposed-DAP  
TSSOP  
Order Number LM4873MT, LM4873MTE  
See NS Package Number MTC20 for TSSOP  
See NS Package Number MXA20A for Exposed-DAP  
TSSOP  
Boomer® is a registered trademark of National Semiconductor Corporation.  
© 2002 National Semiconductor Corporation  
DS100993  
www.national.com  
Connection Diagrams (Continued)  
10099353  
Top View  
(Bump-side down)  
Order Number LM4873IBL, LM4873ITL  
See NS Package Number BLA20AAB for micro SMD  
See NS Package Number TLA20AAA  
10099338  
Top View  
Order Number LM4873LQ  
See NS Package Number LQA24A for Exposed-DAP LLP  
micro SMD Marking  
10099357  
Top View  
10099328  
Top View  
XY - Date Code  
XY - Date Code  
TT - Die Traceability  
G - Boomer Family  
I - LM4873IBL  
TT - Die Traceability  
G - Boomer Family  
B2 - LM4873ITL  
LM4873IBP Pin Designations  
Pin (Bump) Function Pin (Bump) Number  
Pin (Bump) Number  
Pin (Bump) Function  
VDD  
A1  
A2  
A3  
A4  
B1  
B2  
B3  
B4  
C1  
C2  
-IN A1  
-IN A2  
-IN B2  
-IN B1  
-OUT A  
GND  
C3  
C4  
D1  
D2  
D3  
D4  
E1  
E2  
E3  
E4  
+IN B  
+OUT A  
GND  
GND  
+OUT B  
MUX CTRL  
SHUTDOWN  
HP-IN  
GND  
-OUT B  
+IN A  
VDD  
BYPASS  
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2
Typical Application  
10099331  
Note: Pin out shown for the 28-pin Exposed-DAP TSSOP package. Refer to the Connection Diagrams for the pin out of the 20-pin Exposed-DAP TSSOP,  
Exposed-DAP LLP, and micro SMD packages.  
3
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Absolute Maximum Ratings (Note 3)  
θJC (typ)MTC20  
θJA (typ)MTC20  
θJC (typ)MXA20A  
θJA (typ)MXA20A  
θJA (typ)MXA20A  
θJA (typ)MXA20A  
θJC (typ)MXA28A  
θJA (typ)MXA28A  
θJA (typ)MXA28A  
θJA (typ)MXA28A  
θJC (typ)LQA24A  
θJA (typ)LQA24A  
θJA (typ)micro SMD  
20˚C/W  
80˚C/W  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
2˚C/W  
41˚C/W (Note 7)  
51˚C/W (Note 8)  
90˚C/W (Note 9)  
2˚C/W  
Supply Voltage  
Storage Temperature  
Input Voltage  
6.0V  
−65˚C to +150˚C  
−0.3V to VDD  
+0.3V  
41˚C/W (Note 10)  
51˚C/W (Note 11)  
90˚C/W (Note 12)  
3.0˚C/W  
Power Dissipation (Note 4)  
ESD Susceptibility (Note 5)  
ESD Susceptibility (Note 6)  
Junction Temperature  
Solder Information  
Internally limited  
2000V  
200V  
150˚C  
42˚C/W (Note 13)  
60˚C/W (Note 14)  
Small Outline Package  
Vapor Phase (60 sec.)  
Infrared (15 sec.)  
215˚C  
220˚C  
Operating Ratings  
Temperature Range  
TMIN TA TMAX  
Supply Voltage  
See AN-450 “Surface Mounting and their Effects on  
Product Reliablilty” for other methods of soldering  
surface mount devices.  
−40˚C TA 85˚C  
2.0V VDD 5.5V  
Thermal Resistance  
Electrical Characteristics (Notes 3, 15)  
The following specifications apply for VDD= 5V unless otherwise noted. Limits apply for TA= 25˚C.  
Symbol  
Parameter  
Conditions  
LM4873  
Typical Limit  
Units  
(Limits)  
(Note 16) (Note 17)  
VDD  
IDD  
Supply Voltage  
2
V (min)  
V (max)  
mA (max)  
mA (min)  
µA (max)  
V (min)  
5.5  
Quiescent Power Supply Current VIN = 0V, IO = 0A (Note 18) , HP-IN = 0V  
VIN = 0V, IO = 0A (Note 18) , HP-IN = 4V  
7.5  
5.8  
0.7  
15  
6
ISD  
VIH  
VIL  
Shutdown Current  
VDD applied to the SHUTDOWN pin  
2
Headphone High Input Voltage  
Headphone Low Input Voltage  
4
0.8  
V (max)  
Electrical Characteristics for Bridged-Mode Operation (Notes 3, 15)  
The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25˚C.  
Symbol  
Parameter  
Conditions  
LM4873  
Typical Limit  
(Note 16) (Note 17)  
Units  
(Limits)  
VOS  
PO  
Output Offset Voltage  
VIN = 0V  
5
50  
mV (max)  
Output Power (Note 19)  
THD+N = 1%, f = 1kHz (Note 20)  
LM4873MTE-1, RL = 3Ω  
LM4873MTE, RL = 3Ω  
LM4873LQ, RL = 3Ω  
2.4  
2.2  
2.2  
2.1  
1.9  
1.9  
1.9  
1.1  
W
W
W
LM4873MTE-1, RL = 4Ω  
LM4873MTE, RL = 4Ω  
LM4873LQ, RL = 4Ω  
W
W
W
LM4873MT, RL = 4Ω  
LM4873, RL = 8Ω  
W
1.0  
W (min)  
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4
Electrical Characteristics for Bridged-Mode Operation (Notes 3, 15) (Continued)  
The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25˚C.  
Symbol  
Parameter  
Conditions  
LM4873  
Typical Limit  
Units  
(Limits)  
(Note 16) (Note 17)  
THD+N = 10%, f = 1kHz (Note 20)  
LM4873MTE-1, RL = 3Ω  
LM4873LQ, RL = 3Ω  
3.0  
3.0  
2.6  
2.6  
1.5  
0.34  
0.3  
W
W
W
W
W
W
LM4873MTE-1, RL = 4Ω  
LM4873LQ, RL = 4Ω  
LM4873, RL = 8Ω  
THD+N = 1%, f = 1kHz, RL = 32Ω  
THD+N Total Harmonic Distortion+Noise 20Hz f 20kHz, AVD = 2  
LM4873MTE-1, RL = 4, PO = 2W  
LM4873LQ, RL = 4, PO = 2W  
LM4873, RL = 8, PO = 1W  
VDD = 5V, VRIPPLE = 200mVRMS, RL = 8,  
CB = 1.0µF  
0.3  
67  
%
PSRR  
Power Supply Rejection Ratio  
dB  
XTALK  
SNR  
Channel Separation  
f = 1kHz, CB = 1.0µF  
80  
97  
dB  
dB  
Signal To Noise Ratio  
VDD = 5V, PO = 1.1W, RL = 8Ω  
Electrical Characteristics for Single-Ended Operation (Notes 3, 15)  
The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25˚C.  
Symbol  
Parameter  
Conditions  
LM4873  
Typical Limit  
(Note 16) (Note 17)  
Units  
(Limits)  
VOS  
PO  
Output Offset Voltage  
Output Power  
VIN = 0V  
5
50  
75  
mV (max)  
mW (min)  
mW  
THD+N = 0.5%, f = 1 kHz, RL = 32Ω  
THD+N = 1%, f = 1 kHz, RL = 8Ω  
THD+N = 10%, f = 1 kHz, RL = 8Ω  
85  
340  
440  
0.2  
mW  
THD+N Total Harmonic Distortion+Noise AV = −1, PO = 75mW, 20Hz f 20kHz,  
RL = 32Ω  
%
PSRR  
Power Supply Rejection Ratio  
CB = 1.0µF, VRIPPLE = 200mV  
f = 1kHz  
,
52  
dB  
RMS  
XTALK  
SNR  
Channel Separation  
f = 1kHz, CB = 1.0µF  
60  
94  
dB  
dB  
Signal To Noise Ratio  
VDD = 5V, PO = 340mW, RL = 8Ω  
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is  
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which  
guarantee specific performance limits. This assumes that the device operates within the Operating Ratings. Specifications are not guaranteed for parameters where  
no limit is given. The typical value however, is a good indication of device performance.  
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T  
, θ , and the ambient temperature T . The maximum  
JA A  
JMAX  
allowable power dissipation is P  
= (T  
− T )/θ . For the LM4873, T  
= 150˚C. For the θ s for different packages, please see the Application  
DMAX  
JMAX  
A
JA  
JMAX  
JA  
Information section or the Absolute Maximum Ratings section.  
Note 5: Human body model, 100 pF discharged through a 1.5 kresistor.  
Note 6: Machine model, 220 pF–240 pF discharged through all pins.  
2
Note 7: The given θ is for an LM4873 packaged in an MXA20A with the Exposed-DAP soldered to an exposed 2in area of 1oz printed circuit board copper.  
JA  
2
Note 8: The given θ is for an LM4873 packaged in an MXA20A with the Exposed-DAP soldered to an exposed 1in area of 1oz printed circuit board copper.  
JA  
Note 9: The given θ is for an LM4873 packaged in an MXA20A with the Exposed-DAP not soldered to printed circuit board copper.  
JA  
2
Note 10: The given θ is for an LM4873 packaged in an MXA28A with the Exposed-DAP soldered to an exposed 2in area of 1oz printed circuit board copper.  
JA  
2
Note 11: The given θ is for an LM4873 packaged in an MXA28A with the Exposed-DAP soldered to an exposed 1in area of 1oz printed circuit board copper.  
JA  
Note 12: The given θ is for an LM4873 packaged in an MXA28A with the Exposed-DAP not soldered to printed circuit board copper.  
JA  
2
Note 13: The given θ is for an LM4873 packaged in an LQA24A with the Exposed-DAP soldered to an exposed 2in area of 1oz printed circuit board copper.  
JA  
2
Note 14: The θ is specified for an LM4873 packaged in a BLA20AAB or TLA20AAA with their four ground connections soldered to a 3in , 1oz copper plane.  
JA  
Note 15: All voltages are measured with respect to the ground (GND) pins, unless otherwise specified.  
Note 16: Typicals are specified at 25˚C and represent the parametric norm.  
Note 17: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.  
5
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Electrical Characteristics for Single-Ended Operation (Notes 3, 15) (Continued)  
Note 18: The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.  
Note 19: Output power is measured at the device terminals.  
2
Note 20: When driving 3or 4loads and operating on a 5V supply, the LM4873LQ must be mounted to a circuit board that has a minimum of 2.5in of exposed,  
uninterrupted copper area connected to the LLP package’s exposed DAP.  
Typical Performance Characteristics  
MTE (20-pin) and LQ (24-pin) Specific Characteristics  
LM4873MTE, LM4873LQ  
THD+N vs Output Power  
LM4873MTE, LM4873LQ  
THD+N vs Frequency  
10099334  
10099333  
LM4873MTE, LM4873LQ  
THD+N vs Output Power  
LM4873MTE, LM4873LQ  
Power Dissipation vs Power Output  
10099390  
10099336  
LM4873MTE (Note 21)  
LM4873LQ  
Power Derating Curve  
Power Derating Curve  
10099395  
10099356  
Note 21: This curve shows the LM4873MTE’s and the LM4873LQ’s thermal dissipation ability at different ambient temperatures given these conditions:  
500LFPM + JEDEC board: The part is soldered to a 1S2P 20-lead exposed-DAP TSSOP test board with 500 linear feet per minute of forced-air flow across it.  
Board information - copper dimensions: 74x74mm, copper coverage: 100% (buried layer) and 12% (top/bottom layers), 16 vias under the exposed-DAP.  
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6
Typical Performance Characteristics  
MTE (20-pin) and LQ (24-pin) Specific Characteristics (Continued)  
2
2
500LFPM + 2.5in : The part is soldered to a 2.5in , 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.  
2
2
2.5in : The part is soldered to a 2.5in , 1oz. copper plane.  
Not Attached: The part is not soldered down and is not forced-air cooled.  
Typical Performance Characteristics  
MTE-1 (28 pin) Specific Characteristics  
LM4873MTE-1  
LM4873MTE-1  
THD+N vs Output Power  
THD+N vs Frequency  
10099399  
10099397  
LM4873MTE-1  
LM4873MTE-1  
THD+N vs Output Power  
THD+N vs Frequency  
10099398  
10099396  
LM4873MTE-1  
LM4873MTE-1 (Note 22)  
Power Dissipation vs Power Output  
Power Derating Curve  
10099390  
100993A0  
Note 22: This curve shows the LM4835MTE-1’s thermal dissipation ability at different ambient temperatures given these conditions:  
2
2
500LFPM + 2in : The part is soldered to a 2in , 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.  
7
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Typical Performance Characteristics  
MTE-1 (28 pin) Specific Characteristics (Continued)  
2
2
2in on bottom: The part is soldered to a 2in , 1oz. copper plane that is on the bottom side of the PC board through 21 8 mil vias.  
2
2
2in : The part is soldered to a 2in , 1oz. copper plane.  
2
2
1in : The part is soldered to a 1in , 1oz. copper plane.  
Not Attached: The part is not soldered down and is not forced-air cooled.  
Typical Performance Characteristics  
THD+N vs Frequency  
THD+N vs Frequency  
THD+N vs Output Power  
THD+N vs Output Power  
10099303  
10099304  
10099306  
10099308  
THD+N vs Frequency  
10099305  
THD+N vs Output Power  
10099307  
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8
Typical Performance Characteristics (Continued)  
THD+N vs Output Power  
THD+N vs Frequency  
10099387  
10099389  
THD+N vs Output Power  
THD+N vs Frequency  
10099386  
10099388  
Output Power vs  
Load Resistance  
Power Dissipation vs  
Supply Voltage  
10099384  
10099385  
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Typical Performance Characteristics (Continued)  
Output Power vs  
Supply Voltage  
Output Power vs  
Supply Voltage  
10099309  
10099310  
Output Power vs  
Supply Voltage  
Output Power vs  
Load Resistance  
10099311  
10099312  
Output Power vs  
Load Resistance  
LM4873IBL Stereo Output Power  
vs Power Dissipation  
10099313  
10099355  
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10  
Typical Performance Characteristics (Continued)  
Power Dissipation vs  
Output Power  
Dropout Voltage vs  
Supply Voltage  
10099314  
10099315  
Power Derating Curve  
Power Dissipation vs  
Output Power  
10099316  
10099317  
Noise Floor  
Channel Separation  
10099319  
10099318  
11  
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Typical Performance Characteristics (Continued)  
Power Supply  
Rejection Ratio  
Channel Separation  
10099320  
10099321  
Open Loop  
Frequency Response  
Supply Current vs  
Supply Voltage  
10099323  
10099322  
External Components Description  
(Refer to Figure 1.)  
Components  
Functional Description  
1.  
Ri The inverting input resistance, along with Rf, set the closed-loop gain. Ri, along with Ci, form a high pass  
filter with fc = 1/(2πRiCi).  
2.  
Ci The input coupling capacitor blocks DC voltage at the amplifier’s input terminals. Ci, along with Ri, create a  
highpass filter with fc = 1/(2πRiCi). Refer to the section, SELECTING PROPER EXTERNAL  
COMPONENTS, for an explanation of determining the value of Ci.  
3.  
4.  
Rf The feedback resistance, along with Ri, set the closed-loop gain.  
Cs The supply bypass capacitor. Refer to the POWER SUPPLY BYPASSING section for information about  
properly placing, and selecting the value of, this capacitor.  
5.  
CB The capacitor, CB, filters the half-supply voltage present on the BYPASS pin. Refer to the SELECTING  
PROPER EXTERNAL COMPONENTS section for information concerning proper placement and selecting  
CB’s value.  
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12  
Application Information  
LM4863 PIN CONFIGURATION COMPATIBILITY  
The LM4873’s pin configuration simplifies the process of  
upgrading systems that use the LM4863. Except for its four  
MUX function pins, the LM4873’s pin configuration matches  
the LM4863’s pin configuration. If the LM4873’s MUX func-  
tionality is not needed when replacing an LM4863, connect  
the MUX CTRL pin to either VDD or ground. As shown in  
Table 1, grounding the MUX CTRL pin selects stereo input 1  
(–IN A1 and –IN B1), whereas applying VDD to the MUX  
CTRL pin selects stereo input 2 (–IN A2 and –IN B2).  
STEREO-INPUT MULTIPLEXER (STEREO MUX)  
Typical LM4873 applications use the MUX to switch between  
two stereo input signals. Each stereo channel’s gain can be  
tailored to produce the required output signal level. Choos-  
ing the input and feedback resistor ratio sets a MUX chan-  
nel’s gain. Another configuration uses the MUX to select two  
different gains or frequency compensated gains to amplify a  
single pair of stereo input signals. Figure 1 shows two differ-  
ent feedback networks, Network 1 and Network 2. Network 1  
produces increasing gain as the input signal’s frequency  
decreases. This can be used to compensate a small, full-  
range speaker’s low frequency response roll-off. Network 2  
sets the gain for an alternate load such as headphones.  
Connecting the MUX CTRL and HP-IN pins together applies  
the same control voltage to the MUX pins when connecting  
and disconnecting headphones using the headphone jack  
shown in Figure 2 or Figure 3. Simultaneously applying the  
control voltage automatically selects the amplifier (head-  
phone or bridge loads) and switches the gain (MUX channel  
selection). Alternatively, leave the control pins independently  
accessible. This allows a user to select bass boost as  
needed. This alternative user-selectable bass-boost scheme  
requires connecting equal ratio resistor feedback networks  
to each MUX input channel. The value of the resistor in the  
RC network is chosen to give a gain that is necessary to  
achieve the desired bass-boost.  
10099370  
FIGURE 1. Input MUX Example  
micro SMD PACKAGE PCB MOUNTING  
CONSIDERATIONS  
PCB layout specifications unique to the LM4873’s micro  
SMD package are found in National Semiconductor’s  
AN1112.  
EXPOSED-DAP PACKAGE PCB MOUNTING  
CONSIDERATIONS  
The LM4873’s exposed-DAP (die attach paddle) packages  
(MTE, MTE-1, LQ) provide a low thermal resistance between  
the die and the PCB to which the part is mounted and  
soldered. This allows rapid heat transfer from the die to the  
surrounding PCB copper traces, ground plane and, finally,  
surrounding air. The result is a low voltage audio power  
amplifier that produces 2.1W at 1% THD with a 4load.  
This high power is achieved through careful consideration of  
necessary thermal design. Failing to optimize thermal design  
may compromise the LM4873’s high power performance and  
activate unwanted, though necessary, thermal shutdown  
protection.  
Switching between the MUX channels may change the input  
signal source or the feedback resistor network. During the  
channel switching transition, the average voltage level  
present on the internal amplifier’s input may change. This  
change can slew at a rate that may produce audible voltage  
transients or clicks in the amplifier’s output signal. Using the  
MUX to select between two vastly dissimilar gains is a typical  
transient-producing situation. As the MUX is switched, an  
audible click may occur as the gain suddenly changes.  
The MTE, MTE-1, and LQ packages must have their DAPs  
soldered to a copper pad on the PCB. The DAP’s PCB  
copper pad is connected to a large plane of continuous  
unbroken copper. This plane forms a thermal mass and heat  
sink and radiation area. Place the heat sink area on either  
outside plane in the case of a two-sided PCB, or on an inner  
layer of a board with more than two layers. Connect the DAP  
copper pad to the inner layer or backside copper heat sink  
area with 32(4x8) ( (MTE), 40(4x10) (MTE-1), or 6(3x2) (LQ)  
vias. The via diameter should be 0.012in–0.013in with a  
1.27mm pitch. Ensure efficient thermal conductivity by  
plating-through and solder-filling the vias.  
Best thermal performance is achieved with the largest prac-  
tical copper heat sink area. If the heatsink and amplifier  
share the same PCB layer, a nominal 2.5in2 (min) area is  
necessary for 5V operation with a 4load. Heatsink areas  
not placed on the same PCB layer as the LM4873 should be  
5in2 (min) for the same supply voltage and load resistance.  
The last two area recommendations apply for 25˚C ambient  
temperature. Increase the area to compensate for ambient  
temperatures above 25˚C. In systems using cooling fans, the  
LM4873MTE can take advantage of forced air cooling. With  
an air flow rate of 450 linear-feet per minute and a 2.5in2  
exposed copper or 5.0in2 inner layer copper plane heatsink,  
the LM4873MTE can continuously drive a 3load to full  
13  
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between the amplifier output pins and the load’s connec-  
tions. Residual trace resistance causes a voltage drop,  
which results in power dissipated in the trace and not in the  
load as desired. For example, 0.1trace resistance reduces  
the output power dissipated by a 4load from 2.1W to 2.0W.  
This problem of decreased load dissipation is exacerbated  
as load impedance decreases. Therefore, to maintain the  
highest load dissipation and widest output voltage swing,  
PCB traces that connect the output pins to a load must be as  
wide as possible.  
Application Information (Continued)  
power. The LM4873LQ achieves the same output power  
level without forced air cooling. In all circumstances and  
conditions, the junction temperature must be held below  
150˚C to prevent activating the LM4873’s thermal shutdown  
protection. The LM4873’s power de-rating curve in the Typi-  
cal Performance Characteristics shows the maximum  
power dissipation versus temperature. Example PCB layouts  
for the exposed-DAP TSSOP and LQ packages are shown in  
the Demonstration Board Layout section. Further detailed  
and specific information concerning PCB layout, fabrication,  
and mounting an LQ (LLP) package is available from Na-  
tional Semiconductor’s AN1187.  
Poor power supply regulation adversely affects maximum  
output power. A poorly regulated supply’s output voltage  
decreases with increasing load current. Reduced supply  
voltage causes decreased headroom, output signal clipping,  
and reduced output power. Even with tightly regulated sup-  
plies, trace resistance creates the same effects as poor  
supply regulation. Therefore, making the power supply  
traces as wide as possible helps maintain full output voltage  
swing.  
PCB LAYOUT AND SUPPLY REGULATION  
CONSIDERATIONS FOR DRIVING 3AND 4LOADS  
Power dissipated by a load is a function of the voltage swing  
across the load and the load’s impedance. As load imped-  
ance decreases, load dissipation becomes increasingly de-  
pendent on the interconnect (PCB trace and wire) resistance  
10099331  
*
Refer to the section Selecting Proper External Components, for a detailed discussion of C size.  
B
FIGURE 2. Typical Audio Amplifier Application Circuit  
Pin out shown for the 28-pin Expoased-DAP TSSOP package. Refer to the Connection Diagrams for the pin out of the  
20-pin Exposed-DAP TSSOP, Exposed-DAP LLP, and micro SMD package.  
BRIDGE CONFIGURATION EXPLANATION  
Figure 2 shows that Amp1A’s output serves as Amp2A’s  
input. This results in both amplifiers producing signals iden-  
tical in magnitude, but 180˚ out of phase. Taking advantage  
of this phase difference, a load is placed between −OUTA  
and +OUTA and driven differentially (commonly referred to  
as “bridge mode”). This results in a differential gain of  
As shown in Figure 2, the LM4873 consists of two pairs of  
operational amplifiers, forming a two-channel (channel A and  
channel B) stereo amplifier. (Though the following discusses  
channel A, it applies equally to channel B.) External resistors  
Rf and Ri set the closed-loop gain of Amp1A, whereas two  
internal 20kresistors set Amp2A’s gain at −1. The LM4873  
drives a load, such as a speaker, connected between the two  
amplifier outputs, −OUTA and +OUTA.  
*
AVD = 2 (Rf/R )  
(1)  
i
Bridge mode amplifiers are different from single-ended am-  
plifiers that drive loads connected between a single amplifi-  
er’s output and ground. For a given supply voltage, bridge  
www.national.com  
14  
Equation (6) gives the maximum junction temperature  
JMAX. If the result violates the LM4873’s 150˚C, reduce the  
Application Information (Continued)  
T
mode has a distinct advantage over the single-ended con-  
figuration: its differential output doubles the voltage swing  
across the load. This produces four times the output power  
when compared to a single-ended amplifier under the same  
conditions. This increase in attainable output power as-  
sumes that the amplifier is not current limited or that the  
output signal is not clipped. To ensure minimum output sig-  
nal clipping when choosing an amplifier’s closed-loop gain,  
refer to the Audio Power Amplifier Design section.  
maximum junction temperature by reducing the power sup-  
ply voltage or increasing the load resistance. Further allow-  
ance should be made for increased ambient temperatures.  
The above examples assume that a device is a surface  
mount part operating around the maximum power dissipation  
point. Since internal power dissipation is a function of output  
power, higher ambient temperatures are allowed as output  
power or duty cycle decreases.  
If the result of Equation (2) is greater than that of Equation  
(3), then decrease the supply voltage, increase the load  
impedance, or reduce the ambient temperature. If these  
measures are insufficient, a heat sink can be added to  
reduce θJA. The heat sink can be created using additional  
copper area around the package, with connections to the  
ground pin(s), supply pin and amplifier output pins. External,  
solder attached SMT heatsinks such as the Thermalloy  
7106D can also improve power dissipation. When adding a  
heat sink, the θJA is the sum of θJC, θCS, and θSA. (θJC is the  
junction-to-case thermal impedance, θCS is the case-to-sink  
thermal impedance, and θSA is the sink-to-ambient thermal  
impedance.) Refer to the Typical Performance Character-  
istics curves for power dissipation information at lower out-  
put power levels.  
Another advantage of the differential bridge output is no net  
DC voltage across the load. This is accomplished by biasing  
channel A’s and channel B’s outputs at half-supply. This  
eliminates the coupling capacitor that single supply, single-  
ended amplifiers require. Eliminating an output coupling ca-  
pacitor in a single-ended configuration forces a single-supply  
amplifier’s half-supply bias voltage across the load. This  
increases internal IC power dissipation and may perma-  
nently damage loads such as speakers.  
POWER DISSIPATION  
Power dissipation is a major concern when designing a  
successful single-ended or bridged amplifier. Equation (2)  
states the maximum power dissipation point for a single-  
ended amplifier operating at a given supply voltage and  
driving a specified output load.  
POWER SUPPLY BYPASSING  
PDMAX = (VDD)2/(2π2RL) Single-Ended  
(2)  
As with any power amplifier, proper supply bypassing is  
critical for low noise performance and high power supply  
rejection. Applications that employ a 5V regulator typically  
use a 10 µF in parallel with a 0.1 µF filter capacitors to  
stabilize the regulator’s output, reduce noise on the supply  
line, and improve the supply’s transient response. However,  
their presence does not eliminate the need for a local 1.0 µF  
tantalum bypass capacitance connected between the  
LM4873’s supply pins and ground. Do not substitute a ce-  
ramic capacitor for the tantalum. Doing so may cause oscil-  
lation. Keep the length of leads and traces that connect  
capacitors between the LM4873’s power supply pin and  
ground as short as possible. Connecting a 1µF capacitor,  
CB, between the BYPASS pin and ground improves the  
internal bias voltage’s stability and improves the amplifier’s  
PSRR. The PSRR improvements increase as the bypass pin  
capacitor value increases. Too large, however, increases  
turn-on time and can compromise amplifier’s click and pop  
performance. The selection of bypass capacitor values, es-  
pecially CB, depends on desired PSRR requirements, click  
and pop performance (as explained in the section, Selecting  
Proper External Components), system cost, and size con-  
straints.  
However, a direct consequence of the increased power de-  
livered to the load by a bridge amplifier is higher internal  
power dissipation for the same conditions.  
The LM4873 has two operational amplifiers per channel. The  
maximum internal power dissipation per channel operating in  
the bridge mode is four times that of a single-ended ampli-  
fier. From Equation (3), assuming a 5V power supply and a  
4load, the maximum single channel power dissipation is  
1.27W or 2.54W for stereo operation.  
PDMAX = 4 (VDD)2/(2π2RL) Bridge Mode  
(3)  
*
The LM4873’s power dissipation is twice that given by Equa-  
tion (2) or Equation (3) when operating in the single-ended  
mode or bridge mode, respectively. Twice the maximum  
power dissipation point given by Equation (3) must not ex-  
ceed the power dissipation given by Equation (4):  
PDMAX' = (TJMAX − TA)/θJA  
(4)  
The LM4873’s TJMAX = 150˚C. In the LQ package soldered  
to a DAP pad that expands to a copper area of 5in2 on a  
PCB, the LM4873’s θJA is 20˚C/W. In the MTE and MTE-1  
packages soldered to a DAP pad that expands to a copper  
area of 2in2 on a PCB, the LM4873’s θJA is 41˚C/W. At any  
given ambient temperature TA, use Equation (4) to find the  
maximum internal power dissipation supported by the IC  
packaging. Rearranging Equation (4) and substituting PDMAX  
for PDMAX' results in Equation (5). This equation gives the  
maximum ambient temperature that still allows maximum  
stereo power dissipation without violating the LM4873’s  
maximum junction temperature.  
MICRO-POWER SHUTDOWN  
The voltage applied to the SHUTDOWN pin controls the  
LM4873’s shutdown function. Activate micro-power shut-  
down by applying VDD to the SHUTDOWN pin. When active,  
the LM4873’s micro-power shutdown feature turns off the  
amplifier’s bias circuitry, reducing the supply current. The  
logic threshold is typically VDD/2. The low 0.7 µA typical  
shutdown current is achieved by applying a voltage that is as  
near as VDD as possible to the SHUTDOWN pin. A voltage  
that is less than VDD may increase the shutdown current.  
Table 1 shows the logic signal levels that activate and deac-  
tivate micro-power shutdown and headphone amplifier op-  
eration.  
TA = TJMAX – 2*PDMAX θJA  
(5)  
For a typical application with a 5V power supply and an 4Ω  
load, the maximum ambient temperature that allows maxi-  
mum stereo power dissipation without exceeding the maxi-  
mum junction temperature is approximately 99˚C for the LQ  
package and 45˚C for the MTE and MTE-1 packages.  
TJMAX = PDMAX θJA + TA  
(6)  
There are a few ways to control the micro-power shutdown.  
These include using a single-pole, single-throw switch, a  
15  
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ing micro-power shutdown. The switch and resistor guaran-  
tee that the SHUTDOWN pin will not float. This prevents  
unwanted state changes. In a system with a microprocessor  
or a microcontroller, use a digital output to apply the control  
voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin  
with active circuitry eliminates the pull up resistor.  
Application Information (Continued)  
microprocessor, or a microcontroller. When using a switch,  
connect an external 10kpull-up resistor between the  
SHUTDOWN pin and VDD. Connect the switch between the  
SHUTDOWN pin and ground. Select normal amplifier opera-  
tion by closing the switch. Opening the switch connects the  
SHUTDOWN pin to VDD through the pull-up resistor, activat-  
TABLE 1. Logic Level Truth Table for SHUTDOWN, HP-IN, and MUX Operation  
SHUTDOWN HP-INPIN MUX CHANNEL OPERATIONAL MODE  
PIN  
SELECT PIN  
Logic Low  
Logic High  
Logic Low  
Logic High  
X
(MUX INPUT CHANNEL #)  
Bridged Amplifiers (1)  
Logic Low  
Logic Low  
Logic Low  
Logic Low  
Logic High  
Logic Low  
Logic Low  
Logic High  
Logic High  
X
Bridged Amplifiers (2)  
Single-Ended Amplifiers (1)  
Single-Ended Amplifiers (2)  
Micro-Power Shutdown  
HP-IN FUNCTION  
Applying a voltage between 4V and VDD to the LM4873’s  
HP-IN headphone control pin turns off Amp2A and Amp2B,  
muting a bridged-connected load. Quiescent current con-  
sumption is reduced when the IC is in this single-ended  
mode.  
Figure 3 shows the implementation of the LM4873’s head-  
phone control function. With no headphones connected to  
the headphone jack, the R1-R2 voltage divider sets the  
voltage applied to the HP-IN pin (pin 16) at approximately  
50mV. This 50mV enables Amp1B and Amp2B, placing the  
LM4873 in bridged mode operation. The output coupling  
capacitor blocks the amplifier’s half supply DC voltage, pro-  
tecting the headphones.  
The HP-IN threshold is set at 4V. While the LM4873 operates  
in bridged mode, the DC potential across the load is essen-  
tially 0V. Therefore, even in an ideal situation, the output  
swing cannot cause a false single-ended trigger. Connecting  
headphones to the headphone jack disconnects the head-  
phone jack contact pin from −OUTA and allows R1 to pull the  
HP Sense pin up to VDD. This enables the headphone func-  
tion, turns off Amp2A and Amp2B, and mutes the bridged  
speaker. The amplifier then drives the headphones, whose  
impedance is in parallel with resistor R2 and R3. These  
resistors have negligible effect on the LM4873’s output drive  
capability since the typical impedance of headphones is  
32.  
Figure 3 also shows the suggested headphone jack electri-  
cal connections. The jack is designed to mate with a three-  
wire plug. The plug’s tip and ring should each carry one of  
the two stereo output signals, whereas the sleeve should  
carry the ground return. A headphone jack with one control  
pin contact is sufficient to drive the HP-IN pin when connect-  
ing headphones.  
10099324  
FIGURE 3. Headphone Circuit  
SELECTING PROPER EXTERNAL COMPONENTS  
Optimizing the LM4873’s performance requires properly se-  
lecting external components. Though the LM4873 operates  
well when using external components with wide tolerances,  
best performance is achieved by optimizing component val-  
ues.  
The LM4873 is unity-gain stable, giving a designer maximum  
design flexibility. The gain should be set to no more than a  
given application requires. This allows the amplifier to  
achieve minimum THD+N and maximum signal-to-noise ra-  
tio. These parameters are compromised as the closed-loop  
gain increases. However, low gain demands input signals  
with greater voltage swings to achieve maximum output  
power. Fortunately, many signal sources such as audio  
CODECs have outputs of 1VRMS (2.83VP-P). Please refer to  
the Audio Power Amplifier Design section for more infor-  
mation on selecting the proper gain.  
A microprocessor or a switch can replace the headphone  
jack contact pin. When a microprocessor or switch applies a  
voltage greater than 4V to the HP-IN pin, a bridge-connected  
speaker is muted and Amp1A and Amp2A drive a pair of  
headphones.  
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16  
the magnitude of “clicks and pops”. Increasing the value of  
CB reduces the magnitude of turn-on pops. However, this  
presents a tradeoff: as the size of CB increases, the turn-on  
time increases. There is a linear relationship between the  
size of CB and the turn-on time. Here are some typical  
turn-on times for various values of CB:  
Application Information (Continued)  
Input Capacitor Value Selection  
Amplifying the lowest audio frequencies requires high value  
input coupling capacitor (Ci in Figure 2). A high value capaci-  
tor can be expensive and may compromise space efficiency  
in portable designs. In many cases, however, the speakers  
used in portable systems, whether internal or external, have  
little ability to reproduce signals below 150 Hz. Applications  
using speakers with this limited frequency response reap  
little improvement by using large input capacitor.  
CB  
TON  
20ms  
0.01µF  
0.1µF  
0.22µF  
0.47µF  
1.0µF  
200ms  
440ms  
940ms  
2sec  
Besides effecting system cost and size, Ci has an affect on  
the LM4873’s click and pop performance. When the supply  
voltage is first applied, a transient (pop) is created as the  
charge on the input capacitor changes from zero to a quies-  
cent state. The magnitude of the pop is directly proportional  
to the input capacitor’s size. Higher value capacitors need  
more time to reach a quiescent DC voltage (usually VDD/2)  
when charged with a fixed current. The amplifier’s output  
charges the input capacitor through the feedback resistor,  
Rf. Thus, pops can be minimized by selecting an input  
capacitor value that is no higher than necessary to meet the  
desired −3dB frequency.  
In order eliminate “clicks and pops”, all capacitors must be  
discharged before turn-on. Rapidly switching VDD may not  
allow the capacitors to fully discharge, which may cause  
“clicks and pops”. In a single-ended configuration, the output  
is coupled to the load by COUT. This capacitor usually has a  
high value. COUT discharges through internal 20kresistors.  
Depending on the size of COUT, the discharge time constant  
can be relatively large. To reduce transients in single-ended  
mode, an external 1k–5kresistor can be placed in par-  
allel with the internal 20kresistor. The tradeoff for using  
this resistor is increased quiescent current.  
A shown in Figure 2, the input resistor (RI) and the input  
capacitor, CI produce a −3dB high pass filter cutoff frequency  
that is found using Equation (7).  
NO LOAD STABILITY  
The LM4873 may exhibit low level oscillation when the load  
resistance is greater than 10k. This oscillation only occurs  
as the output signal swings near the supply voltages. Pre-  
vent this oscillation by connecting a 5kbetween the output  
pins and ground.  
(7)  
As an example when using a speaker with a low frequency  
limit of 150Hz, Ci, using Equation (4) is 0.063µF. The 1.0µF  
Ci shown in Figure 2 allows the LM4873 to drive high effi-  
ciency, full range speaker whose response extends below  
30Hz.  
AUDIO POWER AMPLIFIER DESIGN  
Audio Amplifier Design: Driving 1W into an 8Load  
The following are the desired operational parameters:  
Bypass Capacitor Value Selection  
Besides minimizing the input capacitor size, careful consid-  
eration should be paid to value of CB, the capacitor con-  
nected to the BYPASS pin. Since CB determines how fast  
the LM4873 settles to quiescent operation, its value is critical  
when minimizing turn-on pops. The slower the LM4873’s  
outputs ramp to their quiescent DC voltage (nominally 1/2  
VDD), the smaller the turn-on pop. Choosing CB equal to  
1.0 µF along with a small value of Ci (in the range of 0.1 µF  
to 0.39 µF), produces a click-less and pop-less shutdown  
function. As discussed above, choosing Ci no larger than  
necessary for the desired bandwith helps minimize clicks  
and pops.  
Power Output:  
Load Impedance:  
Input Level:  
1WRMS  
8Ω  
1Vrms  
Input Impedance:  
Bandwidth:  
20kΩ  
100Hz−20kHz 0.25dB  
The design begins by specifying the minimum supply voltage  
necessary to obtain the specified output power. One way to  
find the minimum supply voltage is to use the Output Power  
vs Supply Voltage curve in the Typical Performance Char-  
acteristics section. Another way, using Equation (8), is to  
calculate the peak output voltage necessary to achieve the  
desired output power for a given load impedance. To ac-  
count for the amplifier’s dropout voltage, two additional volt-  
ages, based on the Dropout Voltage vs Supply Voltage in the  
Typical Performance Characteristics curves, must be  
added to the result obtained by Equation (8). The result in  
Equation (9).  
OPTIMIZING CLICK AND POP REDUCTION  
PERFORMANCE  
The LM4873 contains circuitry that minimizes turn-on and  
shutdown transients or “clicks and pop”. For this discussion,  
turn-on refers to either applying the power supply voltage or  
when the shutdown mode is deactivated. While the power  
supply is ramping to its final value, the LM4873’s internal  
amplifiers are configured as unity gain buffers. An internal  
current source changes the voltage of the BYPASS pin in a  
controlled, linear manner. Ideally, the input and outputs track  
the voltage applied to the BYPASS pin. The gain of the  
internal amplifiers remains unity until the voltage on the  
bypass pin reaches 1/2 VDD . As soon as the voltage on the  
bypass pin is stable, the device becomes fully operational.  
Although the BYPASS pin current cannot be modified,  
changing the size of CB alters the device’s turn-on time and  
(8)  
VDD (VOUTPEAK + (VOD  
+ VODBOT))  
(9)  
TOP  
The Output Power vs Supply Voltage graph for an 8load  
indicates a minimum supply voltage of 4.6V. This is easily  
met by the commonly used 5V supply voltage. The additional  
voltage creates the benefit of headroom, allowing the  
LM4873 to produce peak output power in excess of 1W  
17  
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These circuit boards are easy to use. Apply 5V and ground to  
the board’s VDD and GND pads, respectively. Connect 4Ω  
speakers between the board’s −OUTA and +OUTA and  
OUTB and +OUTB pads.  
Application Information (Continued)  
without clipping or other audible distortion. The choice of  
supply voltage must also not create a situation that violates  
maximum power dissipation as explained above in the  
Power Dissipation section.  
After satisfying the LM4873’s power dissipation require-  
ments, the minimum differential gain needed to achieve 1W  
dissipation in an 8load is found using Equation (10).  
(10)  
Thus, a minimum gain of 2.83 allows the LM4873’s to reach  
full output swing and maintain low noise and THD+N perfor-  
mance. For this example, let AVD = 3.  
The amplifier’s overall gain is set using the input (Ri) and  
feedback (Rf) resistors. With the desired input impedance  
set at 20k, the feedback resistor is found using Equation  
(11).  
Rf/Ri = AVD/2  
The value of Rf is 30k.  
(11)  
10099393  
FIGURE 4. Recommended MTE PC Board Layout:  
Component-Side Silkscreen  
The last step in this design example is setting the amplifier’s  
−3dB frequency bandwidth. To achieve the desired 0.25dB  
pass band magnitude variation limit, the low frequency re-  
sponse must extend to at least one-fifth the lower bandwidth  
limit and the high frequency response must extend to at least  
five times the upper bandwidth limit. The gain variation for  
both response limits is 0.17dB, well within the 0.25dB  
desired limit. The results are an  
fL = 100Hz/5 = 20Hz  
and an  
fH = 20kHz*5 = 100kHz.  
As mentioned in the External Components section, Ri and  
Ci create a highpass filter that sets the amplifier’s lower  
bandpass frequency limit. Find the coupling capacitor’s  
value using Equation (12).  
Ci 1/(2πRifL)  
(12)  
The result is  
1/(2π*20k*20Hz) = 0.398µF.  
10099391  
Use a 0.39µF capacitor, the closest standard value.  
FIGURE 5. Recommended MTE PC Board Layout:  
Component-Side Layout  
The product of the desired high frequency cutoff (100kHz in  
this example) and the differential gain, AVD, determines the  
upper passband response limit. With AVD = 3 and fH  
=
100kHz, the closed-loop gain bandwidth product (GBWP) is  
300kHz. This is less than the LM4873’s 3.5MHz GBWP. With  
this margin, the amplifier can be used in designs that require  
more differential gain while avoiding performance-restricting  
bandwidth limitations.  
RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT  
Figures 4 through 6 show the recommended two-layer PC  
board layout that is optimized for the 20-pin MTE-packaged  
LM4873 and associated external components. Figures 7  
through 11 show the recommended four-layer PC board  
layout that is optimized for the 24-pin LQ-packaged LM4873  
and associated external components. Figures 12 through 16  
show the recommended four-layer PC board layout that is  
optimized for the 20-pin micro SMD-packaged LM4873 and  
associated external components. These circuits are de-  
signed for use with an external 5V supply and 4speakers.  
10099392  
FIGURE 6. Recommended MTE PC Board Layout:  
Bottom-Side Layout  
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18  
Application Information (Continued)  
10099340  
Figure 8. Recommended LQ PC Board Layout:  
Component-Side Layout  
10099339  
Figure 7. Recommended LQ PC Board Layout:  
Component-Side Silkscreen  
10099342  
Figure 10. Recommended LQ PC Board Layout:  
Lower Inner-Layer Layout  
10099341  
Figure 9. Recommended LQ PC Board Layout:  
Upper Inner-Layer Layout  
10099344  
Figure 12. Recommended 20-pin micro SMD PC Board  
Layout:  
10099343  
Figure 11. Recommended LQ PC Board Layout:  
Bottom-Side Layout  
Component-Side Silkscreen  
19  
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Application Information (Continued)  
10099346  
Figure 14. Recommended 20-pin micro SMD PC Board  
Layout:  
Upper Inner-Layer Layout  
10099345  
Figure 13. Recommended 20-pin micro SMD PC Board  
Layout:  
Component-Side Layout  
10099347  
Figure 15. Recommended 20-pin micro SMD PC Board  
Layout:  
10099348  
Figure 16. Recommended 20-pin micro SMD PC Board  
Layout:  
Lower Inner-Layer Layout  
Bottom-Side Layout  
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20  
Physical Dimensions inches (millimeters) unless otherwise noted  
20-Bump micro SMD  
Order Number LM4873IBL  
NS Package Number BLA20AAB  
X1 = 1.996 0.03 X2 = 2.492 0.03 X3 = 0.945 0.10  
20-Bump micro SMD  
Order Number LM4873ITL  
NS Package Number TLA20AAA  
X1 = 1.996 0.03 X2 = 2.492 0.03 X3 = 0.600 0.075  
21  
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead MOLDED PKG, TSSOP, JEDEC, 4.4mm BODY WIDTH  
Order Number LM4873MT  
NS Package Number MTC20  
www.national.com  
22  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
24-Lead MOLDED PKG, Leadless Leadframe Package LLP  
Order Number LM4873LQ  
NS Package Number LQA24A  
23  
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
20-Lead MOLDED TSSOP, EXPOSED PAD, 6.5x4.4x0.9mm  
Order Number LM4873MTE  
NS Package Number MXA20A  
www.national.com  
24  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
28-Lead MOLDED TSSOP, EXPOSED PAD, 9.7x4.4x0.9mm  
Order Number LM4873MTE-1  
NS Package Number MXA28A  
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
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